JPH01208855A - Semiconductor integrated circuit - Google Patents
Semiconductor integrated circuitInfo
- Publication number
- JPH01208855A JPH01208855A JP63034503A JP3450388A JPH01208855A JP H01208855 A JPH01208855 A JP H01208855A JP 63034503 A JP63034503 A JP 63034503A JP 3450388 A JP3450388 A JP 3450388A JP H01208855 A JPH01208855 A JP H01208855A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- output
- monostable multivibrator
- input terminal
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 8
- 239000003990 capacitor Substances 0.000 claims abstract description 11
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体集積回路に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to semiconductor integrated circuits.
従来の半導体集積回路では、テストモードに切換える場
合、空端子をテストモード切換指示端子として利用して
いた。In conventional semiconductor integrated circuits, when switching to a test mode, an empty terminal is used as a test mode switching instruction terminal.
上述した従来の半導体集積回路は、空端子をテストモー
ド切換指示端子として利用しているので、空端子が無い
場合はテストモード切換えができないという欠点がある
。The above-mentioned conventional semiconductor integrated circuit uses an empty terminal as a test mode switching instruction terminal, so there is a drawback that the test mode cannot be changed if there is no empty terminal.
本発明の半導体集積回路は、電源入力端子にコンデンサ
を介して接続され前記電源入力端子に交流信号が印加さ
れたとき該交流信号を整流する整流回路と、該整流回路
の出力により起動し所定時間継続する出力を発生する単
安定マルチバイブレータと、該単安定マルチバイブレー
タの出力により信号端子をテストモード切換指定端子に
切換える切換回路とを含んで構成される。The semiconductor integrated circuit of the present invention includes a rectifier circuit that is connected to a power input terminal via a capacitor and rectifies an alternating current signal when an alternating current signal is applied to the power input terminal, and a rectifier circuit that is activated by the output of the rectifier circuit for a predetermined period of time. It is configured to include a monostable multivibrator that generates a continuous output, and a switching circuit that switches a signal terminal to a test mode switching designation terminal based on the output of the monostable multivibrator.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例のブロック図である。FIG. 1 is a block diagram of one embodiment of the present invention.
第1図に示すように、半導体集積回路1の電源入力端子
3にコンデンサ5が接続されており、外部の交流電源2
から外部コンデンサ10を介して交流信号が電源入力端
子3に印加されると、コンデンサ5で微分信号となり、
ダイオード6によって整流されて単安定マルチバイブレ
ーク7を起動する。As shown in FIG. 1, a capacitor 5 is connected to the power input terminal 3 of the semiconductor integrated circuit 1, and an external AC power source 2
When an AC signal is applied to the power input terminal 3 via the external capacitor 10, it becomes a differential signal at the capacitor 5,
It is rectified by a diode 6 and activates a monostable multi-vib break 7.
単安定マルチバイブレータ7は入力信号があると一定時
間高レベルの出力が持続し、連続的に入力がある間は高
レベルの出力が継続している。単安定マルチバイブレー
タ7の出力により切換回路としてのAND回路8及び9
によりテストモード切換えを行う。The monostable multivibrator 7 maintains a high level output for a certain period of time when there is an input signal, and continues to output a high level while there is a continuous input signal. AND circuits 8 and 9 as switching circuits by the output of monostable multivibrator 7
The test mode is switched by .
AND回路8は単安定マルチバイブレーク7の出力の反
転信号と信号入力端子4からの入力信号の論理積をとり
、AND回路9は単安定マルチバイブレータ7の出力と
信号入力端子4からの入力信号との論理積をとる構成と
なっている。The AND circuit 8 takes the logical product of the inverted signal of the output of the monostable multivibrator 7 and the input signal from the signal input terminal 4, and the AND circuit 9 takes the logical product of the output of the monostable multivibrator 7 and the input signal from the signal input terminal 4. The configuration is to take the logical product of .
従って、単安定マルチバイブレータ7の出力が低レベル
のときは、信号入力端子4からの入力信号はAND回路
8を通って図示しない本来の回路に供給され、単安定マ
ルチバイブレータ7の出力が高レベルのときは、信号入
力端子4からの信号入力はAND回路9を通って図示し
ないテスト回路に供給される。但し、テストモード時に
は、信号入力端子4にデスト信号が入力される。Therefore, when the output of the monostable multivibrator 7 is at a low level, the input signal from the signal input terminal 4 is supplied to the original circuit (not shown) through the AND circuit 8, and the output of the monostable multivibrator 7 is at a high level. In this case, the signal input from the signal input terminal 4 is supplied to a test circuit (not shown) through the AND circuit 9. However, in the test mode, the dest signal is input to the signal input terminal 4.
以上述べたとおり、実施例の説明では信号入力端子を用
いたが、信号出力端子の場合も本発明を適用できる。As described above, although the signal input terminal is used in the explanation of the embodiment, the present invention can also be applied to the case of a signal output terminal.
以上説明したように本発明は、電源入力端子にコンデン
サを介して接続された整流器と単安定マルチバイブレー
タと切換回路とを設け、交流信号を電源入力端子に印加
して信号端子をテストモード切換指示端子として利用す
ることにより、空端子が存在しない場合でもテストモー
ド切換えができる効果がある。As explained above, the present invention includes a rectifier, a monostable multivibrator, and a switching circuit connected to a power input terminal via a capacitor, and applies an AC signal to the power input terminal to instruct the signal terminal to switch to a test mode. By using it as a terminal, there is an effect that the test mode can be switched even when there is no empty terminal.
第1図は本発明の一実施例のブロック図である。
1・・・半導体集積回路、2・・・交流電源、3・・・
電源入力端子、4・・・信号入力端子、5・・・コンデ
ンサ、6・・・ダイオード、7・・・単安定マルチバイ
ブレーク、8,9・・・AND回路、10・・・コンデ
ンサ。FIG. 1 is a block diagram of one embodiment of the present invention. 1... Semiconductor integrated circuit, 2... AC power supply, 3...
Power input terminal, 4... Signal input terminal, 5... Capacitor, 6... Diode, 7... Monostable multi-by-break, 8, 9... AND circuit, 10... Capacitor.
Claims (1)
入力端子に交流信号が印加されたとき該交流信号を整流
する整流回路と、該整流回路の出力により起動し所定時
間継続する出力を発生する単安定マルチバイブレータと
、該単安定マルチバイブレータの出力により信号端子を
テストモード切換指定端子に切換える切換回路とを含む
ことを特徴とする半導体集積回路。A rectifier circuit that is connected to a power input terminal via a capacitor and rectifies an AC signal when an AC signal is applied to the power input terminal, and a monostable that is activated by the output of the rectifier circuit and generates an output that continues for a predetermined time. A semiconductor integrated circuit comprising: a multivibrator; and a switching circuit that switches a signal terminal to a test mode switching designation terminal based on the output of the monostable multivibrator.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63034503A JPH01208855A (en) | 1988-02-16 | 1988-02-16 | Semiconductor integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63034503A JPH01208855A (en) | 1988-02-16 | 1988-02-16 | Semiconductor integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01208855A true JPH01208855A (en) | 1989-08-22 |
Family
ID=12416058
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63034503A Pending JPH01208855A (en) | 1988-02-16 | 1988-02-16 | Semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01208855A (en) |
-
1988
- 1988-02-16 JP JP63034503A patent/JPH01208855A/en active Pending
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