JPH01202167A - Phase controller for thyristor rectifier - Google Patents

Abstract

PURPOSE:To suppress a decrease in a calculating speed by combining a first counter for counting a constant value and a second counter for counting a variable value to constantly control a pulse interval of phase control, and calculating a next ignition time point. CONSTITUTION:A phase controller for a thyristor rectifier has phase control calculating means for determining an ignition time point and first - second counters 1-2. The counters 1-2 are programmable double counters, and phase control calculating means is started by their output signals. The calculating means is processed by a predetermined algorithm, and when it obtains a next time ignition pulse pattern, it writes it in a data latch 5. Further, the calculating means obtains a next ignition time point, and set it in the counter 2. A CPU 3 is interrupted by the start of counting by the counter 1, thereby starting the calculating means, fetching and outputting the ignition pulse pattern of the latch 5 to a data latch 6. A timer 7 and a buffer 8 control it to a necessary pulse width.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a firing phase control device for a thyristor rectifier that converts alternating current power into variable direct current power.

[Conventional technology]

There are two main methods for controlling the phase of a thyristor rectifier: One is that when the thyristor rectifier is a three-phase full-wave bridge, each thyristor's rectifier is adjusted after a time corresponding to the firing angle command value, based on the point in time when 30°゛1 has passed from the time when each phase sum voltage passes the zero point. This involves applying an ignition pulse to the gate.

Another thing is that the interval between firing pulses is a time equivalent to 60'' if the firing angle command value is constant, and when the firing angle command value changes, the amount of change in the firing angle command value changes. If we take ±Δm'', we note that it is a time equivalent to (60±Δm)6, and with the ignition pulse as a reference, the next ignition pulse after a time equivalent to (60±Δm)°''. It is something that occurs.

Here, a conventional example that implements the latter control (hereinafter referred to as constant pulse interval control) will be described with reference to FIG. 4. This is an example using a CPU, a counter, and a comparator, and (a) in the figure shows the count value inside the counter. The shaded area in FIG. 2B indicates that an interrupt processing program (phase control calculation means) activated by an interrupt is being executed. The reason why the interrupt generation time and the operation start time of the phase control calculation means do not match in FIG. be. Moreover, the same figure (c) represents the ignition pulse signal generated by the phase control calculation means.

That is, when the first set value θvat and the counter value match, an interrupt 1 is generated to the CPU and the counter is reset. The phase control calculation means A activated by interrupt 1 generates a firing pulse and outputs a second signal to the comparator.
Set the set value θ2.8. Then, the second set value θf
When ix and the counter value match, an interrupt 2 is generated to the CPU, and the phase control calculation means B is activated by the interrupt 2. The phase control calculating means B erases the firing pulse, determines the time point at which the next firing pulse occurs, and inputs the first set value θ to the comparator.
Set V□. The same process is repeated thereafter.

[Problem to be solved by the invention]

However, the conventional method described above has the following four problems.

There must be one interrupt between one firing point and the next firing point (fourth
Interrupt 2) in the figure occurs, and the overhead generated for each interrupt processing causes a substantial decrease in CPU calculation speed, and substantially extends the processing time of interrupt processing program B. Especially when the current increases ( A restriction occurs when the control angle command changes in the phase control angle α1 direction). Furthermore, since the interrupt processing program A generates the ignition signal, there is dead time between the ignition time point and the actual output of the ignition pulse due to overhead generated during interrupt processing. Also, to minimize this wasted time, this interrupt level should be set to the highest level, and if there is a case where one process is bent to give priority to the other process. In other words, a single CPU cannot perform such phase control. Therefore, in realizing constant pulse interval control, which is a type of thyristor phase control, the present invention minimizes the number of interrupts that start the phase control processing program, and outputs firing pulses using the interrupt processing program. It is an object of the present invention to provide a phase control device capable of automatically generating an ignition pulse at the time of ignition without having to do so.

[Means to solve the problem]

A phase control calculation means for sequentially determining the time from the firing point of each thyristor to the next firing point of a thyristor rectifier for converting AC power into DC power, and a predetermined period of time that is longer than the processing time of the phase control calculation means. a first counter that counts up and issues an output signal each time the first counter outputs an output signal; a second counter that counts up every time a count time elapses from the count-up point to the next ignition point and issues a signal for starting counting of the first counter and starting phase control calculation; and the phase control calculation means. a first data latch in which firing pulse patterns to be applied to each thyristor at the next firing time are sequentially written;
A second data latch is provided, into which the output of the first data latch is written every time the output of the second counter is received, and this is used as a firing pulse signal for each thyristor.

[Effect]

This invention uses the output signal of the second counter (the signal generated at the firing point) in constant pulse interval control that controls the time from one firing point to the next firing point, which is one type of phase control of a thyristor rectifier. ) to determine the next ignition point, and the second counter's output signal (signal generated at the ignition point) starts counting operation, and after a certain period of time has elapsed, a phase control calculation means is activated. UPL
, a first counter that generates an output signal, and a counting operation is started by the output signal of the first counter, and after a certain variable time L*ir elapses, a count UPL and an output signal (signal generated at the time of ignition) are generated. A second counter is provided.

Here, a certain fixed time j fix and a certain variable time t v
ar must satisfy the following formula.

Lfix + j vmr = tb. ±Δt
...... ■However, L6°: Time corresponding to electrical angle 60°0 Δt: Time corresponding to change in phase control input The second counter starts counting operation after the first counter's count time. Therefore, the second counter has a count value (variable (ti)) before the first counter counts up.
tvar must be set.

This count value is calculated and set by the phase control calculation means, so from the count time L fiX of the first counter,
The processing time of the phase side '41■ calculation means must be shorter. In other words, the count time t of the first counter
fix may be a certain value (constant value) longer than the processing time of the phase control calculation means. Furthermore, since this time is a constant value, it only needs to be set once at the beginning.

Formula (■) is transformed as shown in the following formula.

L□, = j6゜−tfix±Δt ・・・・・・■
The second counter calculates Δt by the phase control calculation means and
What is necessary is to set tvir (variable value) obtained from the formula.

As described above, by combining the two counters, the phase control calculating means is activated only once within the firing interval.

In addition, the phase control calculation means is configured such that the second counter is
At any point up to P (ignition signal generation), the firing pulse pattern to be applied to the thyristor of the thyristor rectifier at the next firing time is written into the first day latch. Signal latched in the first data latch (ignition pulse pattern)
is written into the second data latch by the output signal of the second counter (the signal generated at the time of firing). By using the output of the second day latch as a firing pulse signal for the thyristor of the thyristor rectifier, a firing pulse is automatically given to the thyristor at the firing time (when the second counter is UP).

[Embodiment] Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is an explanatory diagram of its operation, and Figs. 3A and 3B are flow charts showing the processing algorithm of the phase control calculation means. .

The counter 2 in FIG. 1 is, for example, a programmable down counter, which subtracts setting data from the outside in synchronization with CLOCK from the time of the GATE signal manually, and generates an output signal when the data becomes zero. First, the counter 2 counts up, the counter starts a counting operation in response to the output signal A, and an interrupt is applied to the CPU 3' to activate the phase control calculation means. As shown in FIG. 3A, a count time j fix is initially set in the counter 1 by the phase control calculation means, so the counter 1 counts that time. On the other hand, the activated phase control calculation means performs processing according to the algorithm shown in FIG. 3B. In addition, the second
The shaded area in Figure (C) indicates that the phase control calculation means is being executed.

When the phase control calculation means determines the next firing pulse pattern, it outputs the firing Hals pattern C (see FIG. 2(d)) via the bus 4 to the write signal D (second pulse pattern) at an arbitrary timing during processing. (see figure (e))) is written to the data latch 5. Data latch 5 holds firing pulse pattern C at the output.

As shown in FIG. 3B, the phase control calculation means calculates the next ignition point, and uses the formula 0 to calculate the count time t□ of the counter 2,
is calculated and set in counter 2.

Thereafter, the phase control calculation means completes all processing and returns from the interrupt state. After the interrupt processing is completed, counter 1 counts up (after time L fix has elapsed from the generation of signal A in Fig. 2(a)), Fig. 2(b)
Output signal B as shown below.

In response to this signal B, the counter 2 starts counting the count time t var set earlier.

Then, after the counter time t□ has elapsed (count UP),
Second [J(a), signal A is output. This signal A causes counter 1 to start counter operation, and C
Similar to the above, the PU3 is interrupted and the phase control calculation means is activated. Furthermore, due to signal A,
Ignition pulse pattern E (held by data latch 5)
(see FIG. 2(f)) is taken into the data latch 6 and held as output data F (see FIG. 2(g)). That is, the ignition pulse data F is output at the time of ignition. The timer 7 and buffer 8 are used to control the ignition pulse data F, which is output until the next ignition time, to a necessary pulse width. Timer 7 starts operating with signal A, and outputs signal H for a period of time equal to the pulse width. Since the buffer 8 outputs the input signal F while the signal H is active, the output signal G has a wide firing pulse pattern as shown in FIG. 2(h).

〔Effect of the invention〕

According to this invention, regarding constant pulse interval control, which is one of the phase controls of a thyristor rectifier, by combining a first counter that counts a constant value and a second counter that counts a variable value, the next ignition The phase control calculation means that calculates and determines the time point is activated by an interrupt only once, and it is possible to minimize the reduction in the actual CPU calculation speed due to the overhead generated during interrupt processing. Also, line up the two data latches,
In the first data latch, the phase control calculation means calculates the next firing pulse pattern, and the second counter counts tJP.
Since it is possible to write at any point up to the point in time, there is a degree of freedom in the processing algorithm of the phase control calculation means. The output of the first data latch is written into the second data latch by means of the output signal of the counter 2 (which occurs at the time of ignition).

The output signal of data latch 2 is converted into a signal with an appropriate width and used as the firing pulse signal for the thyristor of the thyristor rectifier, so the firing pulse is automatically (hardware-wise) output at the time of firing. Therefore, the ignition time and the ignition pulse generation time completely coincide, and -C
It becomes possible to perform multiple phase controls with the PU.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a waveform diagram of each part to explain the operation of FIG. The flowchart shown in FIG. 4 is an operation waveform diagram for explaining a conventional example of a phase control device. Code explanation 1.2... Counter, 3... CPU, 4... Bus, 5゜6... Data latch, 7... Timer, 8...
·buffer. Agent: Akio Namiki, Patent Attorney Agent: Kiyoshi Matsuzaki, Patent Attorney Figure 1 Figure 2 Figure JaA @ Figure 3B

Claims (1)

[Claims] Phase control calculation means for sequentially determining the time from the firing point of each thyristor to the next firing point of a thyristor rectifier that converts AC power into DC power, and the processing time of the phase control calculation means. a first counter that counts up and issues an output signal every time a predetermined time longer than a second counter that counts up every time a count time elapses from the count-up time of the first counter to the next firing time and issues a signal for starting counting of the first counter and starting phase control calculation; a first data latch into which the firing pulse pattern to be given to each thyristor at the next firing time is sequentially written by the phase control calculation means; and an output of the first data latch each time the output of the second counter is received. a second data latch in which is written a second data latch, which is used as a firing pulse signal for each thyristor;