JPH01194661A - Picture processor - Google Patents

Abstract

PURPOSE:To correctly attain the expansion/reduction processing of a designated area by expansion/reduction processing it with the use of at least one of a picture processing control signal and picture concentration information. CONSTITUTION:Shading-corrected digital picture signals VR and VC are supplied to a color discriminating circuit 35, discriminated into plural chrominance signals, supplied to a color ghost correcting means 300 in a next stage, and a color ghost in a main scanning direction (horizontal scanning direction) and in a sub-scanning direction (drum rotating direction) is corrected. An area signal S and an attribute designating signal P in addition to density data outputted from a processing means 420 are supplied to an expanding/reducing circuit 1, and the expansion/reduction processing is carried out as needed. The expansion/reduction processing in the main scanning direction is attained by executing the electric processing, and the processing in the sub-canning direction is attained by controlling the scanning speed of an optical system.

Description

[Detailed Description of the Invention] [Field of Industrial Application] This ♀mei is a simplified electronic photograph that separates image information into multiple colors, performs image processing, and then records it as a monochrome image. The present invention relates to an image processing device suitable for application to a copying machine or the like.

[Background of the Invention] In a simple electrophotographic copying machine, whether the original is black and white or color, regardless of the presence or absence of a multicolor original, it performs monochrome processing from the beginning and then copies the original. I try to do that.

The 112th copying machine makes color copies of multicolor originals.
An image processing apparatus configured as shown in the figure is known.

In the same figure, color image information is separated into white and cyan, each of which is transmitted to an image sensor 100 such as a CCD.
, 105 and photoelectrically converted.

The white and cyan color signals are supplied to a subtracter 2, from which the red signal is divided into 12 color divisions, and the gain of each of these color signals is adjusted by AGC circuits 3 and 4.5, respectively, and then sent to a binarization circuit 6. , 7.8, it is binarized. The binarized output is reconverted into, for example, red and black color signals in the arithmetic circuit 9,
A color image is reproduced by supplying this as an image signal to a color copying device (an output device having a rotating drum).

[Problems to be Solved by the Invention] Incidentally, in the image processing apparatus shown in FIG. 112, since the image signal is binarized and then color separated, various image processing after color separation is performed as follows. This binarized signal must be used.

Therefore, compared to monochrome imaging signals, the content of image processing is poor.

Furthermore, since it is binary information, the image quality also deteriorates. For example, if you perform enlargement processing based on binary information,
The unevenness of the diagonal lines becomes noticeable.

Also, in order to have an independent channel for each color, 1,
This increases the circuit scale and increases the cost of the device.

Therefore, a desirable image processing device is one that eliminates these problems and reproduces monochrome images while also being able to: ・Perform appropriate image processing for each color for multiple colors.

・Processing such as color erasure is possible.

・Ability to use multilevel recording to achieve high image quality.

・It must be low priced.

It is desired that an image processing device that meets these requirements be developed as soon as possible.

Among the above-mentioned processes, if processing such as color erasure becomes possible, for example, it will be possible to write colored characters in places on a black and white document,
This is very convenient because it allows you to erase colored ink stains, etc. even if you leave them intact in the copy.

However, conventional devices such as those described above have not been able to meet these requirements.

In addition, in devices capable of such monochrome recording,
If the image is configured so that it can be scaled, and if it is configured so that only a specific area written on the document can be recorded, it is better to perform scaling processing on signals indicating the specific area along with the image information. .

Therefore, the present invention solves these conventional problems with a simple structure, and provides a monochrome recording device that can easily perform predetermined image processing and can reliably perform magnification processing on specific areas. This paper proposes an image processing device.

[Means for Solving the Problems] An image processing device having a function of enlarging/reducing image information is configured to perform enlarging/reducing processing using at least one of a control signal for image processing and density information of an image. It is characterized by the fact that

"Function" The image information of the optically captured original is separated into a plurality of colors.The color separated image information is photoelectrically converted by a reading means such as a CCD.

The photoelectrically converted image signal is divided into color information and density information of the image. Image processing such as color ghost correction is performed on the color information.

Various image processes are performed on the density information, such as enlargement/reduction processing, resolution processing, processing inside/outside a specific area (extraction, erasure, etc.), and all colors are copied to black and white images. , a procedure is specified as to whether a black and white image copy is to be performed for an image of a specific color.

On the other hand, an attribute designation signal P detection process is performed on the color ghost-corrected image data.

The attribute designation signal P is a signal that determines the content of the document and determines whether it is a line drawing or a photographic image. Using this signal P, the filter coefficient for resolution correction (MTF correction) and the threshold value for multi-value processing are changed.

This applies to filter coefficients for resolution correction (MTF correction),
This is because more appropriate image processing can be performed by changing the threshold value for multi-value processing.

Color markers are attached to the document to extract specific areas.
Based on the area signal obtained by automatically detecting this, image data within or outside the area surrounded by the color marker is extracted.

The region signal and the attribute designation signal described above are collectively referred to as a control signal for the image.

This control signal is subjected to the same enlargement/reduction processing as the image data. Thereby, image processing of a specific area can be performed even in the enlargement/reduction processing mode.

After various types of image processing are completed, multivalue processing is performed. The image is visualized based on the multivalued signal.

Therefore, the image is visualized using fewer colors than the color separation means, and this is developed.

Since the valid color of the image is specified externally, it is possible to copy the image with only a specific color erased.

Since image processing is performed before multi-value conversion, there is no risk of image quality deterioration even if enlargement/reduction processing is performed.

[Embodiment] Hereinafter, an example of an image processing apparatus according to the present invention will be described in detail with reference to FIG. 1 and subsequent figures.

FIG. 1 shows a schematic configuration of an image processing apparatus according to the present invention.

The color image information (optical image) of the original 52 is divided into two color separated images by the dichroic mirror 55. In this example, the image is divided into a red R color separation image and a cyan cy color separation image. Therefore, dichroic mirror 5
A cutoff of about 540 to 600 nm can be used. As a result, the red component becomes transmitted light, and the cyan component becomes reflected light.

Each color separation image of red R and cyan cy is obtained by an image reading means;
For example, it is supplied to the CCDs 104 and 105, and image signals containing only the red component R and the cyan component Cy are output from each.

The image signals R and Cy are sent to the corresponding A/D converters 60A and 60.
When the signal is fully supplied to B, it is converted into a digital signal of a predetermined number of bits, 6 bits in this example. Shading correction can be done at the same time as A/D conversion. 15 A + 15 B
indicates a shading correction data creation circuit.

The area extraction circuit 30 extracts only the signal corresponding to the maximum original size width from the shading-corrected digital image signal. When the maximum document width to be handled is 84 size,
As the gate signal, a maximum size signal B4 generated by a timing signal generating means (not shown) of the system can be used.

Here, if the digital image signals subjected to shedding correction are VR and VC, respectively, these image signals VR.

VC is supplied to a color discrimination circuit 35 and discriminated into a plurality of color signals.

In this example, a case is illustrated in which the color signals are configured to be discriminated (separated) into three color signals: red, helmet, and black.

That is, no matter what color the original is, each pixel is assigned to one of red, blue, and black. When this process is performed, each part of the document is recognized as a red, blue, or black color part.

Note that this color discrimination process also includes changing red, blue, and black to other colors, or in general, using four or more colors.

Each discriminated color signal has color code data k (3 and t data) indicating its color information and density data d.
(6 and cut data). The data for each of these color signals is stored, for example, in a color discrimination map in a ROM configuration.

The color-discriminated image data is transferred to a color image processing step.

First, it is supplied to the next-stage color ghost correction means 300, where color ghosts in the main scanning direction (horizontal scanning direction) and sub-scanning direction (drum rotation direction) are corrected.

This is because unnecessary color ghosts such as red or blue may occur during color discrimination, especially at the edge portions of black characters.

Image quality is improved by removing these color ghosts. Color ghost processing applies only to color code data.

Even when copying in monochrome, for example, if the function is to erase colored parts and copy, a color ghost correction circuit is required as in this example.

300A indicates a color ghost correction circuit in the main scanning direction, and 300B indicates a color ghost correction circuit in the sub-scanning direction.

When performing color ghost correction using image data for 7 bits in the horizontal direction and 7 lines in the vertical direction, a 7-bit shift register 301 and a memory 310 for 7 or 8 lines are used, respectively, as shown in the figure. will be done.

The color ghost-corrected image data passes through a buffer line memory, in this example a 3-line memory 799, and then undergoes various image processing.

In addition to color ghost correction, image processing includes resolution correction means (MTF correction means) 450. Various image processing such as extraction/erasing/filling means 4201 for specific area, enlargement/reduction processing means (variable magnification means) 1, shading processing means 440, inversion means 460, multi-value conversion means 600 for multi-value conversion are considered. It will be done.

Among these image processes, the MTF correction means 450 performs
A sharper image can be obtained by changing the filter coefficients depending on the image content.

Similarly, it is preferable that the multi-value quantization means 600 also change its multi-value quantization threshold according to the image content.

In order to change the filter coefficients or the multivalue threshold, it is necessary to recognize whether the image currently being read is a line drawing or a photographic image.

Therefore, an attribute detection means 800 for detecting the attributes of such an image is provided after the 3-line memory 799, and the filter coefficients and threshold values are changed according to the attribute designation signal P obtained from the attribute detection means 800.

On the other hand, the density data and the color code data subjected to the color ghost correction are first supplied to the resolution correction means 450 to complete the resolution correction (MTF correction) process.

The reason for performing MTF correction is that the aperture size of the CCD 104°/105 may become larger in the sub-scanning direction, as well as the deterioration of sharpness in transmission systems such as lenses, and the integration of optical signals in the sub-scanning direction. This is because MTF deterioration in the sub-scanning direction may be more significant than in the main-scanning direction in order to obtain a signal in the sub-scanning direction, so it is necessary to correct these factors.

By performing MTF correction processing, skipping and blurring of characters can be corrected.

MTF correction is performed using a 3×3 convolution filter.

The MTF-corrected image data is subjected to extraction/erasing/filling processing for a specific area in the processing unit 420.

All of these processes are performed within a specific area or area i4.
Since these processes are executed externally, it is necessary to detect a specific area in order to perform these processes.

Detection of a specific area is performed based on markers written on the document.

A region extraction circuit 500 is provided to detect an original image region marked with a color marker on a document or the like.

The area extraction circuit 500 outputs a signal (area signal) indicating the area surrounded by color markers, and this signal enters the signal processing means 420 for extraction/erasing/filling.

Here, a signal for extraction, erasure, and filling is created according to the signal from which the region has been extracted.

At this time, an area signal is created in accordance with instructions such as inside/outside the marker area or whether to process the entire area or partially.

Even when performing color erasure, an area signal is created from the color code data.

Next, this signal is supplied to an enlargement/reduction circuit 1 for scaling processing through an input buffer 400, and is subjected to enlargement/reduction processing as necessary.

In addition to the density data output from the processing means 420, the data necessary for the enlargement/reduction process includes an area signal S and an attribute designation signal P.

The reason for enlarging/reducing the area signal S in addition to the density data is as follows.

In other words, the area signal S, attribute designation signal P, etc. are used in shading processing, hollow processing, etc. even after the enlargement/reduction processing, so in that case, the control signals such as the area signal S also have a magnification ratio of the density data. This is because it is necessary to scale up or down according to the data and adjust the number of data in advance.

A magnification instruction is set for the enlargement/reduction circuit 1 by the CPU.

Enlargement/reduction processing is performed in the main scanning direction by electrical processing, and in the sub-scanning direction by controlling the scanning speed of the optical system.

After performing these processes on the necessary areas, the image data can be input to the shading circuit 440. Here, the required area is shaded.

Shading is done after completing the enlargement/reduction process.
This is because it is desired that the pitch of the specified mesh remain unchanged even after the enlargement/reduction processing.

The shaded image data is then processed by multi-value processing means 600.
The signal is supplied to the multi-value processing.

The threshold value used when performing multilevel conversion is set manually or automatically.

When automatically determining a threshold value based on input image data ('e4 degree data), in the embodiment, a threshold value for characters (for line drawings) and a threshold value for photographic images are stored in separate ROM 600.
The case where the data is stored in B and 600C is shown.

600B is a ROM for characters, and 600C is a ROM for dithering photographic images.

Furthermore, when multi-value processing is performed at four levels of white, black, and gray (light gray and dark gray), each multi-value processing threshold Ti (i=1 ~3) are selected.

One of the respective threshold values is selected by data selectors 600D and 600E.

Therefore, the attribute designation signal P that has been output from the enlargement/reduction processing means 1 is supplied to the control circuit 600F.

In the control circuit 600F, the selector 600D,
600E can be selected.

In the external specification, when a character image is specified, the threshold ROM 600B is selected, and when a photographic image is specified, the threshold ROM 600C is selected.

Based on the selected threshold value, the density data is subjected to multi-value processing in the multi-value processing means 600A. As a multivalue, 2 to 4
The values are appropriate, and this example shows the case of four values.

The image data multivalued by the multivalue conversion means 600A is supplied to the hollow processing circuit 'Ifi 470 via a 9-line memory 459 which is a delay means.

Hollowing processing is a process of extracting contour data of an image, and in this example, the four edges of the image are extracted by external specification.
Processing is performed to extract only dot width data in each of the main scanning direction and the sub-scanning direction.

The image data subjected to the hollow processing is then input to an inversion circuit 460, and negative/positive inversion is performed only in necessary areas according to an inversion command.

Thereafter, the output device 7
0.

Interface circuit 40 has first and second interfaces. Of these, the second interface circuit is for receiving patch image data and the like used for toner density control.

As the output device 70, a laser recording device (laser printer) or the like can be used. When a laser recording device is used, a multivalued image is converted into a predetermined optical signal, and this is also converted into a predetermined optical signal. Modulated based on value data.

An electrophotographic copying machine is used as the developing device. In this example, two-component development and reversal development can be adopted.

In the example, in order to downsize the apparatus, an irradiated image is developed on an OPC photoreceptor (drum) for image formation in one rotation of the drum, and transfer is performed once after development. The image is transferred to recording paper such as paper as a monochrome image.

Therefore, according to the image processing device shown in Fig. 1, it is possible to perform appropriate image processing for each color for multiple colors, perform processes such as achromatic processing and record in monochrome, and record multi-valued images. It is possible to realize a device with features such as high image quality and low cost.

Next, the configuration of each part of the image appearance processing apparatus according to the present invention configured as described above will be explained in detail.

First, a simplified copying machine suitable for application to the present invention will be explained with reference to FIG. 2 and subsequent figures.

A simple copying machine separates color information into about three types of color information and then records this as a monochrome image.

In this example, black BK is used as the three types of color information to be separated.
, red R and blue B are illustrated.

By turning on the copy button on the device, the document reading section A
is driven.

First, a document on document table 81 is optically scanned by an optical system.

This optical system consists of a carriage 84. ■It is composed of mirrors 89 and 89゛.

A halogen lamp is used as the light source. However, it is also possible to use a commercially available warm white fluorescent lamp; in this case, the fluorescent lamp has a frequency of about 40kHz to prevent flickering.
It is lit and driven by a high frequency power source of about In addition, in order to maintain a constant temperature of the tube wall or promote warm-up, it is necessary to use a heater using a POSISTOR.

A standard white plate 97 is placed on the upper surface side of the left end of the platen glass 81.
is provided. This is because the image signal is normalized to a white signal by optically scanning the standard white plate 97.

The carriage 84 and the mirrors 89 and 89' are each caused to run on a slide rail (not shown) at a predetermined speed in a predetermined direction by a stepping motor 90.

Optical information (image information) obtained by irradiating the original with the light source 85 is guided to the optical information conversion unit 100 via the reflecting mirror 87 and the mirror 89°.

The optical information conversion unit 100 includes a lens 801, a prism 802, a dichroic mirror 55, a CCD 104 on which a red color-separated image is formed, and a CCD 105 on which a cyan color-separated image is formed.

An optical signal obtained from the optical system is focused by a lens 801, and separated into red optical information and cyan optical information by a dichroic mirror 55 provided in the prism 802 described above.

Each color separation image is converted into an electrical signal (image signal) by being formed on the light receiving surface of each CCD 104, 105. The image signal is output to the writing section B after being subjected to the various signal processing described above in the signal processing system.

The writing section B has a deflector 935. As the deflector 935, in addition to a galvanometer mirror or a rotating polygon mirror, a deflector made of an optical deflector using crystal or the like may be used.

The laser beam modulated by the image signal passes through this deflector 9.
35 for deflection scanning.

When deflection scanning is started, beam scanning is detected by a laser beam index sensor (not shown), and beam modulation using an image signal is started.

The modulated beam is scanned by a charger 121 over an image forming member (photosensitive drum) 110 which is charged with a negative charge.

Here, the main scanning by the laser beam and the image forming body 110 are performed.
An electrostatic image corresponding to the image signal is formed on the image forming body 110 by the sub-scanning caused by the rotation of the image forming member 110 .

This electrostatic image is developed by a developing device 123 containing black toner. A predetermined bias voltage from a high voltage source is applied to the developing device 123.

A black and white image is formed by development.

Toner replenishment of the developing device 123 is performed by controlling a toner replenishing means (not shown) based on a command signal from a system control CPU (not shown), thereby replenishing toner when necessary.

On the other hand, the recording paper fed from the paper feeding device 141 via the feed roll 142 and the timing roll 143 is conveyed onto the surface of the image forming body 1100 in a state synchronized with the rotation of the image forming body 110. . Then, the multicolor toner image is transferred onto the recording paper by the transfer pole 130 to which a high voltage is applied from the high voltage power source, and separated by the separation pole 131.

The separated recording paper is conveyed to a fixing device 132, where it undergoes a fixing process and a color image is obtained.

The image forming body 110 after the transfer is transferred to a cleaning device 126
is cleaned and prepared for the next imaging process.

In the cleaning device M126, a predetermined DC voltage is applied to a metal roll 128 provided on the blade 127 in order to facilitate recovery of the toner cleaned by the blade 127. This metal roll 128 is the image forming body 1
10 in a non-contact manner.

After the cleaning is completed, the blade 127 is released from the pressure bonding, but in order to remove unnecessary toner that is left behind when the blade 127 is released, an auxiliary cleaning roller 129 is further provided, and this roller 129 is rotated in the opposite direction to the image forming body 110 and the pressure bonding is performed. By doing this, unnecessary toner is sufficiently cleaned and removed.

The transmittance characteristics of the dichroic mirror 55 described above are
Figure 4 shows the emission spectrum of the combination of the light source and the infrared (IR) cut filter, and the CCD104,10
The spectral sensitivity characteristics of No. 5 are shown in FIG.

Shading correction is performed on A/D converted image data, and the necessity of shading correction is based on the following reasons.

One is for the optical system, and the other is for the CCD PRNU (Pho).
to Re5Ponse Non Uniformit
y) This is because correction is necessary.

The second problem, COD, usually has a structure in which the number of pixels is arranged in a line, ranging from about 2,048 to 5,000 pixels. It is generally difficult to make the characteristics of each pixel of this number uniform. Normally there is ±10% as PRNU,
This is because it is necessary to correct this sensitivity unevenness in order to achieve high image quality.

If there is shading, even if the same white document is imaged, only a white signal with a lower output level around the shading will be obtained as shown in FIG. 6A.

Therefore, in order to perform the shading correction, the optical system first operates, and before starting the main scan, scans the white reference plate 97 to obtain a white signal (FIG. 6B), which is used as a reference signal during A/D conversion. If used as a reference signal, the quantization step during A/D conversion is modulated by this reference signal. That is, as shown in FIG. 6A, the quantization step is controlled so that the increments are small at the edges of the image and large at the center.

As a result, when A/D conversion is performed while modulating the reference signal in this manner, the output (analog output) becomes a constant output level as shown in FIG. 6C, and shading distortion is corrected. In this way, the white signal captured before the main scan is used as a reference signal for shading correction.

FIG. 7 shows an example of the shading correction data creation circuit 15A.

In this example, the white reference plate 97 is imaged over two lines to be used as a reference signal, and the first buffer 16 is supplied with a switching signal that can only be supplied to the first buffer 16 during the period of these two lines. (FIG. 8B), and as a result, the A/D converted white signal is stored in the memory 19 via this first buffer 16.

When the normal image reading operation mode is entered, the image signal shown in FIG. 8A is output, and this is digitized by the A/D converter 60A. When the image reading operation mode is reached, the memory 19 is controlled to read mode, the second buffer 17 is controlled to be active, and the reference signal (white signal) read from the memory 19 is sent to the D/A converter. 20, it is converted to an analog signal, which is the A/D converter 60A.
used as a reference signal for

The A/D converter 60A is a parallel type A/D converter as shown in FIG.
A D converter is used, and the above-mentioned reference signal is applied to each of the parallel-configured comparators 61. Furthermore, this A/D
In the conversion W60A, 62 is a reference signal forming means composed of a plurality of bleeder resistors, 63 is an encoder, and 6
4 is a latch circuit.

In order to control the second buffer 17 to be active only during the operation period, the OR output 0R1 (FIG. 8E) of the switching signal and the image valid signal is supplied via the OR circuit 21.

In this example, a third buffer 18 is provided, and A/D conversion is performed using a reference signal at a predetermined level (high level) during the horizontal blanking period.

Therefore, the inverter 22 outputs the
An output 0R2 (F in the figure) obtained by inverting the phase of R1 is supplied.

Therefore, since the reference signal for the comparator 61 is modulated by the reference signal shown in G in the figure, when the A/D-converted image data is converted into analog data, it becomes as shown in H in the figure.

Note that if the white signals of all pixels of the CCD are stored in the memory 19, the PRNU can be corrected at the same time.

Shading correction is performed independently for each red and cyan channel. This is because, for example, when the cyan side signal is used for correction using the red copper white signal, the PRNU of the red copper CCD is different from that of the cyan side, so the cyan side white signal output after correction is This is because there is a possibility that a problem of increased variation may occur.

In FIG. 8, the horizontal blanking period HBLK is also subjected to A/D conversion using a reference signal having a predetermined reference level, and this is based on the following reason.

During shading correction, especially for A/D conversion operations outside the image valid period, the shading correction data stored in the 1-line memory is used as it is at the reference terminal 62a of the A/D converter 60A.
(FIG. 9), the A/D conversion range of the A/D converter 60A is approximately O, and the input signal and the reference signal for shading correction have roughly the same potential.

Roughly speaking, this input signal contains quite a bit of noise N (FIG. 10A).

Since the A/D converter 60A sequentially performs determination based on the voltage fluctuations of the input image signal and the reference signal, the conversion range is approximately O, so the determination result is either the maximum value of the output (high level) or The minimum value (low level) is determined.

If this fluctuation in output value occurs over a relatively short period of time due to the influence of noise, etc., the comparator of the A/D converter repeats on and off almost simultaneously, causing a large change in current as the A/D converter. occurs.

This change in current has a relatively high frequency and does not exist in the signal waveform, so it is highly likely that it will affect the input signal as noise. Furthermore, since a relatively large amount of current flows through the generation source, the impedance is small, and there is a high possibility that the noise will enter the power supply line or ground line as larger noise than usual.

Noise generated due to the values of the input signal of the A/D converter and the reference signal for shading correction (Figure 10B) mixes into the input signal black level, which causes the black level to fluctuate greatly ( Figure C).

Therefore, in this example, the conversion range is not set to O at least during the black level period outside the image non-effective period to prevent noise from being mixed in.

In the embodiment, the voltage values set outside the image validity period are as follows:
The full scale value of the A/D is used to prevent the change range from becoming 0.2 and preventing the shaded correction signal from becoming the same voltage as the shaded correction signal.

Through the above processing, A/D conversion and shading correction can be performed simultaneously. In such a correction method,
If the white power signal is 30 to 40% or more of the full scale of the A/D, correction is almost possible (FIG. 11A).

However, if a low white signal that exceeds this limit comes (for example, due to blackening or a decrease in light intensity due to long-term lighting), it is possible to correct it, but the image signal will be in the form of a large amount of noise superimposed, and it will remain as it is. It is practically difficult to use it in the form (
Figure 11B).

Next, color discrimination, that is, color molecule il (multi-bit image data) is performed using the red and cyan output signals subjected to the shading correction as described above. Here, black, red, and blue 3
An example is given regarding color.

If a method is adopted in which the image signal is binarized and then color separated as in the conventional example, the data after color separation is a binary signal, which is inappropriate in view of performing various types of processing.

Here, the colors are separated before being binarized. A map as shown in FIG. 12A is prepared for color separation. It is assumed that a ROM (bipolar ROM) is used for the color separation map.

In this case, a 3-pit color code (red, blue, black, red marker, helmet marker) is added to the address given by 6-bit image data VR and VC having halftone levels.
(color specified) and density information are stored. In other words, 1 image information = color code + density information.

For example, the concentration value is 30 levels (XXXO
I 1110) (7) Pixel is blue = OO1011110
=05E Black=OOOO11110=01E White=011011110=ODE Blue marker 101011110=15ED for white
E or CO may be used, but DE is selected due to the continuity of concentration.

The above data is stored in each address as shown in FIG. 12A.

The reason why the R marker and B marker areas are included in the map in the same figure is because image processing is performed on specific areas, so it is necessary to detect the color markers written on the manuscript separately from other image data. This is because there is.

Of course, as shown in FIG. 12B, it is also possible to map color markers without distinguishing them from other color data.

Here, an example of the color code is shown in FIG.

Color codes include white, red, blue, black, white, red marker,
Since there are 6 colors of black markers, 3 bits are used, but it is clear that as the number of colors increases, the number of bits can be increased accordingly. Further, the density information is also 6 bits here, but 4 bits is practically sufficient for characters only. Therefore, it is clear that the number of bits may be changed depending on the target image.

In the map shown in FIG. 12, the boundary lines for color separation must be determined by taking into consideration output fluctuations at the edge portions of the line portions.

Otherwise, unnecessary colors called color ghosts, which are a type of color error, will occur at the edges of black characters and the like.

Since the color separation boundary is generally fixed, the colors to be separated may vary greatly depending on the setting of the boundary line. This variation has a particularly large effect when performing color classification (multicolor). In order to prevent variations in the color separation results, it is especially necessary to (a) prevent variations in the emission spectrum of the light source, (b) prevent variations in chromatic aberration, etc. of the lens, and (c) prevent variations in the cutoff wavelength of the dichroic prism. Become.

(A) is not a big problem with halogen lamps, but
In the case of fluorescent lamps, +Ar spectrum may appear at low temperatures, and it is important to prevent this.

(b) will be discussed later.

Although (c) usually results in the problem of controlling film variations, it is preferable to keep it within ±15 nm, preferably within ±10 nm, with respect to the set cutoff wavelength. If this is not done, the boundary color between red and black or blue and black in the original image will vary greatly due to variations in the cutoff wavelength of the prism.

In this example, the color separation method is performed using two signals, VR and VC, but instead of using such a method, different color separation axes f 1 (VR, VC) and f 2 (VR) are used.

VC) may also be used. When using the color separation axis in calculations, etc., depending on the calculation formula, if noise is superimposed on VR and VC, the addresses will be different compared to when there is no noise.
Care must be taken because isolated noise of different colors is likely to occur.

On the other hand, in practical use, there are cases where it is desired to extract a specific color or a color other than red, blue, or black. For these cases, a color separation map different from this example is prepared, and one of the plurality of color separation maps is selected according to the request. Alternatively, the color Km ROM ft may be made removable so that the necessary ROM (actually in the form of a ROM pack) can be replaced.

The map for three colors is shown in FIGS. 13A and B, and the map for four colors is shown in FIG. 13C.

Next, color ghost correction means 3 removes color ghosts from the image data color-separated as described above.
00 will be explained.

There are many causes of color ghosts, but the main ones are: 1. Pixel misalignment of the two CODs (installation accuracy, changes over time) 2. Cyan and red image magnification mismatch 36 Cyan and red output levels caused by lens chromatic aberration Difference 4: There is noise. This will be explained below.

FIG. 15 shows an example of appearance of color ghosts.

This figure shows the color ghost that appears after the color separation when the black kanji character "sexuality" is written as a non-life insurance with each CCD shifted by 1/2 bell.

As you can see from this example, as a color ghost,
As shown in FIGS. 16A to 16C, red and blue appear at the edge of the black line, black appears at the edge of the blue line, and black appears at the edge of the red line.

It is clear that color ghosts appear differently in other color combinations.

The reason why such a phenomenon occurs will be explained using the above example.

(Refer to Figures 17 and 18) As shown in Figure 17, if the COD alignment is not performed strictly, the black edge will be colored red as shown in Figure 18. Black ghosts will appear at blue and red edges, and black ghosts will appear at helmet edges.

Therefore, in order to prevent this, it is necessary to precisely align the two CODs. Normally, it is necessary to perform alignment within one pixel, preferably within 1/4 pixel.

In this example, this is achieved by aligning the two CCDs on a jig and then fixing them with adhesive.

An example is shown in FIG. 19 and below.

As shown in FIGS. 19 and 20, a lens barrel 801
A V-shaped receiver opening perpendicularly upwards of the holding member 801a is housed in the upper part of the holding member 801a and fixed by a fastener 801c, and then attached to a predetermined position on the device board 810.

The front part 8 of the prism 802 is attached to the rear side of the holding member 801a.
The mounting into which the prism 802b can be dropped is provided with a surface, and the prism 802 held by the mounting member 802a can be pressed against the surface and fixed by screwing.

Since the mounting surface is formed by a simple machining process, the distance from the lens barrel 801 and the perpendicularity to the tip axis are extremely accurate, and the above-mentioned CCD 104. CCD
A predetermined optical image can be accurately formed on the light receiving surface of the lens 105.

How to determine the amount of perpendicularity deviation between the plane 801b of the lens barrel 801 perpendicular to the optical axis and the surface 802b of the prism 802 facing the lens (inclination ff1 of the perpendicularity of the dichroic surface to the lens optical axis) is as follows. , the resolution MTF obtained from the signal output of the white line part and the black line part with respect to the white background is given by MTF = (y-x/y+x)X100%,
Normally, the slope amount is 1 for the angle for a value of 30% or more.
At 0 minutes, the drop will be around 30% (9%), and at 30 minutes, the drop will be more than 50% (15%), which will hinder black and white discrimination signal extraction, so maintain surface accuracy during this time. is important (in this case, the structure may be such that the prism surface is in contact with the end of the lens barrel).

The CCDs 104 and 105 are fixedly attached to the prism 802 via members 804 and 806 with an adhesive.

FIG. 21 shows an embodiment showing a cross section of the main part of the prism 80.
2 is fixed symmetrically with adhesive on both sides of member 8.
04a, 804b (806a, 806b) to the imaging section. '105 is fixed with adhesive.

As for the material of the mounting member, it is desirable to use a material with a small coefficient of linear expansion for two reasons. One is to prevent pixel misalignment due to temperature fluctuations, and the other is to prevent pixel misalignment due to temperature fluctuations, and the other is to prevent the prism from cracking due to internal distortion due to the difference in linear expansion coefficient between the components when attached to the prism. This is to prevent the occurrence of

The problem of pixel misalignment due to temperature fluctuations can be reduced by installing each CCD under exactly the same conditions with the components, but it is also possible to reduce the pixel misalignment between CCDs, but it is also necessary to have a small coefficient of linear expansion. There is.

Usually, what is the coefficient of linear expansion of a prism? , 4X10-6 (optical glass BK-7), so glass and ceramic materials (7°0 to 8.4X10-6) are used for installation.
6) and low thermal expansion alloys (e.g. Invar alloy (1~3X1
0-6), Nijirest cast iron (4-10X 10-6)
) etc. are suitable, and aluminum material (25X 10-6) is not so suitable.

In the above embodiment, the prism and the mounting member were used, and the mounting member and the CCD were fixed using adhesive, and the relative position of each COD was adjusted for the divided optical image, and the example shown in FIG. 21 was used. We decided to fix it tightly using adhesive as shown in the figure below.

In particular, in Fig. 21, even if iron (12X10-6) with a large coefficient of linear expansion is used as the mounting member, the dimension in the C direction is short in practical terms, so the elongation due to heat is not affected much.
Also, since the d direction is the direction in which the line sensors are arranged, and the prism material and the line sensor package material are ceramic materials, their linear expansion coefficients are the same, and with this configuration, no pixel misalignment occurred. .

The adhesive is a two-component type adhesive or a photocurable adhesive, and an ultraviolet curable adhesive is particularly preferred.

In particular, photo-curable adhesives can speed up the curing time of the adhesive simply by changing the intensity of light, improving workability, reducing costs, and stabilizing the product. Among photo-curable adhesives, ultraviolet-curable adhesives in particular exhibit almost no thermal change even when exposed to ultraviolet rays, and can be stably cured.

Three Bond TB3060B (product name), Denka 1045K (product name), Norland 65 as light-curing adhesives
(trade name), etc., and irradiated with ultraviolet rays using a high-pressure mercury lamp, we were able to obtain good results in environmental tests, etc., which will be described later.

Also UV-curable urethane-based ThreeBond 3062
When B (trade name), LT350 (trade name), etc. were used, it was possible to obtain an adhesive that was even more effective in moisture resistance and had strength compensation.

What is the overall positional deviation of COD using the above method, assuming 1 pixel is 7μ? It became possible to suppress it within /4=1.75μ.

When dealing with a colored original, there are effects such as chromatic aberration of the lens.This is because, for example, when the wavelength range of light is divided into two, cyan and red, as shown in Figure 22. This phenomenon is particularly noticeable at high image heights because the image formation position F on the cyan side and the image formation position E on the shore side are different.Depending on the lens, a deviation of about 1 pixel may occur. There is.

Unless a design is made to improve the chromatic aberration of the I-Δ lens, the MTF value may differ greatly between cyan and red due to the chromatic aberration. This is due to the difference in level of the CCD output.

When a black line is imaged, the output signal level of cyan and red at the center or edge of the line is 1Vr-Vat≦10 (level), preferably 1Vr-Vcl≦6 (level), assuming that it is digitized with 6 bits. It is preferable to take this into account when installing the CCD.

Color ghosting can be reduced to some extent by taking the above measures, but considering the variations in lens performance during mass production and the variations in accuracy of CCD mounting, it is difficult to completely eliminate it in practice. be.

For this reason, color ghost correction is also performed electrically using the color code after color separation.

Color ghost removal is performed using the color pattern method.

This is because the color ghost color that appears is fixed for the original color, such as original black → red, blue ghost, original red, blue → black ghost. In the case of the color pattern method, the color of the original image can be identified by examining the appearance (pattern) of the colors of the pixel of interest and its surrounding pixels to determine the color of the pixel of interest.

As an example, FIG. 23 shows the pixel of interest, the surrounding color pattern, and the determination of the color of the pixel of interest that can be determined at that time.

In the first example, since both sides of the pixel of interest are white and black, the blue color of the pixel of interest is determined to be a color ghost appearing at the black edge. The red in the third example can also be determined to be a color ghost of black. Therefore, in both the first and third examples, the pixel of interest is changed to black.

On the other hand, in the second and fourth examples, it is not determined that a color ghost has appeared, and the color of the pixel of interest is output as is.

This type of processing is difficult to implement with an arithmetic circuit, so in this example, it is implemented in ROM and LUT (lookup table).
It is used in the format. One-dimensional and two-dimensional systems are conceivable as color patterns, but if the number of colors is N1 and the number of surrounding pixels including the pixel of interest is M, then the number of color patterns is NM. Therefore, if a two-dimensional pattern is used, the number of M will suddenly increase, making it impractical.

In other words, although a two-dimensional pattern cannot have a large number of peripheral pixels in each dimension (main scanning direction/sub scanning direction), the number of patterns increases. FIG. 24 shows the relationship between size and number of color patterns.

In this example, the size is 1×7 in one dimension (that is, N
=4. M=7) color pattern is used, and color ghost removal is performed independently in the main scanning direction and the sub-scanning direction.

Here, if color markers are included, the number of colors is 6, that is, N = 6, but when performing color ghost correction, the marker color is
The red marker is corrected using the same process as the red marker, and the helmet marker is corrected using the same process as the blue color. Therefore, N=4.

For this purpose, the lower two bits of the red and blue marker color codes are set to be common to the lower two bits of the red and blue color codes.

At this time, since there is no difference in the appearance of color ghosts in the image between the main scanning direction and the sub-scanning direction, the same color pattern is used in the main scanning direction and the sub-scanning direction in this example.

As the color pattern size, we selected a size of 1 x 7, but if the degree of color ghost appearance is small, I
It is also possible to use smaller sized color patterns such as X5. A 1×5 color pattern can remove color ghosts of 1 pixel, and a 1×7 color pattern can remove color ghosts of up to 2 pixels.

When a color pattern of IX7 size is used, the lower two bits of the color code are input as the ROM address. For example, in the color pattern below, the lower 2 bits of the color code are white: white:
Blue: Blue: Black: Black: Black 11: 11:01 :ot :oo:oo:o.

The next address is D40, and the lower two bits O of the black color code are stored at this address as shown in FIG. The LUT is executed using the above method.

In reality, a 1x7 pattern requires a 14-bit address line, and a bipolar ROM with a 14-bit address input and a 2-bit color code output is sufficient, but such a large-capacity, high-speed ROM are not widely available on the market and are expensive.

In the embodiment, the first pixel determines the ROM? ! Then, LOT is performed using the remaining 6 pixel codes.

In other words, it uses two ROMs, the first ROM
The first ROM is black and helmet, and the second ROM is first red and white.

- Start code Black (00), Blue (01) Address content 00000000000000 (black black black black black black black) 00
111111111111 (black white white white white white white) 0100
0000QOOOOOO (Kuro Kuro Kuro Kuro Kuro) 011111
Start code of 11111111 (armor white confession white white white) Red (10), white (11) Address content 10000000000000 (red black black black black black black) 10
111111111111 (red white white white white white white) 1100
0000000000 (black and white black black black black black) 111111
11111111 (white, white, white, white, white) In the color pattern shown in FIG. 23, the first ROM is white, so the second ROM is selected.

If a high-speed ROM (large capacity) is available, all color patterns can be stored in the same ROM. The LUT may be performed by using four ROMs and switching the ROMs depending on the color of the first pixel.

Examples of large-capacity, high-speed bipolar ROMs include Fuji Renso MB7143/7144.

When using a low-speed, large-capacity EPROM, it is also possible to transfer data to a plurality of SRAMs or the like before operation and perform color ghost correction using these SRAMs.

FIG. 25 shows an example of color ghost correction means 30'O. Color ghost processing is performed in the main scanning direction (horizontal scanning direction) and the sub-scanning direction (vertical scanning direction).

In this example, horizontal and vertical ghosts are removed using image data for 7 pixels in the horizontal direction and 7 lines in the vertical direction.

Color ghost processing applies only to the lower two bits of the color code of the image data.

Therefore, the color code read from the color separation ROM is first supplied to the ghost correction circuit 300A in the main scanning direction. Therefore, the color code data is sequentially supplied to a 7-bit shift register 301 and parallelized. The parallel color code data for seven pixels is supplied to the horizontal ghost removal ROM 302, and ghost removal processing is performed for each pixel. An example of how the ROM 302 is used is as described above. When the ghost processing is completed, the data is latched by the latch circuit 303.

On the other hand, the density data output from the color PM ROM is supplied to the latch circuit 306 via the shift register 305 (7-bit configuration) for timing adjustment, and the density data is serially transferred following the color code data. Data transfer conditions are determined so that

The serially processed color code data and density data are supplied to a line memory section 310 provided in the color ghost correction circuit 300B.

The line memory unit 310 is provided to remove vertical color ghosts using seven lines of image data.

Although the line memory is used for a total of 8 lines, this represents one means of real-time processing; of course, real-time processing is possible even for 7 lines.

The color code data and density data for 8 lines are separated in the subsequent gate circuit group 320, respectively. Gate circuit 1-Ta2O is provided with gate circuits 321-328 corresponding to line memories 311-318, respectively.

The output data of the 8-line memory synchronized in the line memory section 310 is separated into color code data and density data in the gate circuit group 320, and the output data is divided into color code data and density data.
The color code data thus obtained is completely supplied to the selection circuit 330, and the color code data of a total of 8 line memories, of which 7 line memories necessary for color ghost processing, are selected. In this case, when line memories 311 to 317 are selected, the selected line memories are sequentially shifted such that line memories 312 to 318 are selected at the next processing timing.

The selected and synchronized 7-line memory worth of color code data is sent to the next vertical ghost removal ROM.
335 to remove vertical color ghosts.

Thereafter, it is latched by the latch circuit 336.

On the other hand, the density data separated by the gate circuit group 320 is directly supplied to the latch circuit 337, and is output after timing adjustment with the color code data. Also, the upper 1 bit of the color code is also stored in memory 31.
After being stored in 9, the timing is adjusted with the lower 2 bits and output in the same manner, and these data are combined to create one complete image information.

The image data for which color ghost correction processing has been completed is supplied to a 3-line memory 799 for buffer use.

Among the output image data, the density data is supplied to the attribute detection circuit 800 and the resolution correction means 450, and in this example, the resolution (MTF) is corrected based on the attribute designation signal P.

For convenience of explanation, the attribute detection circuit 800 will be explained first.

The attribute designation signal P is a signal for determining the contents of a document and distinguishing whether it is a line drawing, that is, a character drawing, or a photographic image. Using this signal P, resolution correction (MT
The filter coefficients for (F correction) and the threshold values for multi-value processing are changed.

This means that it is better to change the filter coefficient for resolution correction (MTF correction) or the threshold value for multi-value processing to produce a more appropriate image depending on whether the document is a character image or a photographic image. This is because processing can be performed.

Therefore, it is determined whether the pixel of interest is a character image or a photographic image using density data after color ghost correction.

This determination is performed using information on density level differences between the pixel of interest and the adjacent pixels on the upper and lower sides, left and right sides, and the pixel of interest.

As shown in FIG. 26, x, y, and z are expressed as pixels (f.

J) When the density is 1-11jL (i, j-1), the density level difference is calculated using the following formula.

t = I X-Y I -I X-Z I and t
When >Q, it is judged as a line drawing, and when t<q, it is judged as a photographic drawing. Here, q=3 to 10 levels, preferably about 5. This is based on the following reasons.

That is, when the difference in density level is calculated when the input image is a photographic image, a character image, or a halftone image, the result is as shown in FIG. 27.

The horizontal axis of the figure is t1, and the vertical axis is the frequency (frequency), the photographic image is like the curve L1 in the figure, and the character image is like the song gAL2. The space between them is halftone painting.

Therefore, as is clear from such a frequency distribution, when t is small, photographic images with small density changes are mainly used, and when t is large, character images and halftone dot images with large density changes are predominant.

The relationship between the photographic image and the overall frequency is as shown in Figure 28, so if we take these together, it is possible to clearly distinguish between the photographic image and other images by selecting q = 3 to 10 levels. can. In particular, from the frequency distribution in FIG. 28, it can be said that q=5 is an appropriate value.

Note that the value of q is shown as a value when the image data is composed of 6 bits.

When t>q, it is determined that it is a line drawing, and in this case, the attribute designation signal P is set to P=0. Therefore, when t x q, it is determined that it is a photographic image,
The attribute designation signal P is set to P=1.

The attribute designation signal P is used as a filter coefficient of MTF and a threshold value switching signal for multi-value conversion.

As mentioned above, MTF correction is processed after color separation. First, this will be explained.

Conventionally, as described above, since the processing step is generally to perform color separation after binarizing image data, it has been necessary to perform resolution correction before the binarizing process. Therefore, in a device that uses a plurality of CCDs to capture color-separated images of a document, resolution correction must be performed in response to each COD output. In other words, it was necessary to prepare multiple circuits for resolution.

Moreover, since the MTF of the optical lens differs for each of the plurality of color separations, there is also a drawback that the parameters for MTF correction differ depending on the respective resolution correction circuits.

If resolution correction processing is performed after color separation and before multi-value processing as in this invention, since only one piece of information is handled, practical applications such as reduction of circuit scale and simplification of determination of correction parameters can be achieved. This will have the above advantages.

In general, the causes of MTF deterioration until an image is recorded and reproduced include problems in 1. the optical system 2, the optical travel system 3, the processing circuit 4, and the recording system, as shown below.

Regarding 1, the MTF of the lens (wavelength range, change in image height, permissible width of image forming position, processing accuracy), prism surface accuracy, COD mounting accuracy, CCD chip warpage,
This is because the performance of the optical system fluctuates due to spectral fluctuations of the light source.

In the optical travel system (2), vibrations of optical mirrors and fluctuations in moving speed can be cited.

Regarding the processing circuit No. 3, there is distortion of the signal waveform due to capacitance components in the analog circuit, especially signal distortion caused by passing through a transmission line or the like.

The following points can be enumerated as the intermediate layer of the recording system No. 4.

φ laser beam beam diameter, beam shape, toner current characteristics on the photoreceptor drum (toner adhesion amount, toner concentration, toner particle size, toner color, etc.), transfer characteristics (transfer rate, transfer characteristics to transfer paper, etc.) -Fixing characteristics (such as fluctuations in toner diameter before and after toner fixation) Among these factors, the optical system and its running system directly affect resolution deterioration.

FIG. 29 shows the MTF values (before correction) in the main scanning direction and the sub-scanning direction when the optical system is driven. This characteristic is 2-1
These are the measured values when scanning a black and white pattern with a spatial frequency of up to 6 dots/mm.

The MTF in this case was defined and used as MTF=(W-BK)/(W+BK)(%). Here, W is a white signal and BK is a black signal.

As is clear from FIG. 29, the deterioration of MTF is more significant in the sub-scanning direction. In order to correct to the same extent, the amount of correction in the sub-scanning direction may be set to 2 to 4 times that in the main scanning direction.

It is said that an MTF value of 30% or more is required to improve the reproducibility of fine line portions of images.

Therefore, when the resolution correction means is configured by adding weights to the pixel of interest and its surrounding pixels, the above-mentioned main and sub-scanning directions are corrected to the same degree, and the reproducibility of fine line parts is not deteriorated. As for the resolution correction means, a convolution filter using image data of 3×3 pixels may be employed.

If we write the filter elements on the left and the corresponding pixel positions (i, j) on the right, we get the following.

Focusing on the density I(ij) of the pixel (i, j), eight pixels around it are focused. At this time, (i'-1, j-1
) ~ (++1.j+1), the new concentration value is I (
ij), then I(ij)=ε(1(i+Δ, j+Δ)xc(i+Δ,
j+Δ)) Here, C(ij) is a filter coefficient, and C(ij
)=a, b, c, ...i.

An example of filter coefficients for realizing the above-mentioned correction contents is shown below.

When it is desired to increase the amount of correction, the filter coefficients may be appropriately set accordingly.

FIG. 30 shows the correction results by the convolution filter using the correction coefficients in the above equation.

FIG. 31 is a circuit diagram showing an example of a resolution correction means 450 using this convolution filter.

Since a 3×3 matrix is used, two line memories 451+452 and seven latch circuits 453 to 4 are required.
59 is used, the first adder 430 performs addition processing of the image data in the 1st row, 2nd column and the 3rd row, 2nd column, and then a multiplier (bit shift circuit) 431 performs multiplication processing by a predetermined coefficient. Ru.

The second adder 433 performs addition of the image data in the 2nd row, 1st column and the 2nd row, 3rd column, and then a multiplier 434 performs multiplication by a predetermined coefficient. This multiplication output and the multiplication output from the multiplier 431 can be added together by an adder 435.

On the other hand, the image data in the second row and second column is multiplied by n in the multiplier 432, and this and the addition output from the adder 435 are combined in the subtracter 43.
6 eliminates the subtraction process. After that, the divider 437
72 and normalized.

Modifications of the resolution correction means 450 are listed below.

A ROM or the like may be used instead of multiplication or addition/subtraction processing.

Resolution correction is performed after color ghost processing, but
The processing position does not matter as long as it is after color separation and before multivalue processing.

The line memory may be configured so that the line memory used for color ghost correction is commonly used.

The power of the laser beam for image recording may be controlled simultaneously with the resolution correction. This improves the reproducibility, especially in fine line portions.

Of the image data for which the resolution has been corrected, the color code data is supplied to the region extraction processing circuit 500.

Area extraction processing is processing for extracting a specified area from an image (black image) within or outside an arbitrary area specified by a color marker so that image processing for each scale can be performed. It is.

Conventionally, a position is specified using a digitizer or the like, and then an original image is placed and scanning processing is started, and a switch for inputting position data is operated each time the position is specified. Further, the position specification is in a rectangular shape such as a square or a rectangle, and it is not possible to specify an arbitrary area.

In the marker area extraction process described below, an arbitrary area written with a marker is detected, and an image can be processed and copied within/outside the designated area of the marker.

For example, as shown in FIG. 32, if you specify the area a with a blue marker, this area a will be automatically detected and this area a
The inside can be copied. Areas outside area a are not copied. A red marker may be used as the color marker.

In order to copy the image inside/outside the area a specified in this way, as shown in FIG.
It is necessary to detect each of Q[.

These area detections basically involve finding the period from the rise to the fall of the marker signal P that is common to the area signal Q of the previous line, and combining this signal and the marker signal. By taking the OR of P, the area on the current line is calculated.

The case where the current line is shown in FIG. 34 and the case where it is shown in FIG. 36 are illustrated in FIG. 35 and FIG. 37, respectively.

A specific example of the area extraction circuit 500 is shown in FIG. 38 and subsequent figures.

First, in FIG. 38, each bit data of color code data obtained by scanning a color marker is supplied to a color marker detection circuit 501, and the presence or absence of a specific color marker is detected. In the embodiment, since the present invention is applied to two types of markers, red and blue, two marker signals BP and RP are detected.

Each marker signal RP, BP is provided by a preprocessing circuit 502.50, respectively.
3, and is preprocessed to become a marker signal faithful to the designated area.

Pre-processing is a type of signal waveform shaping process, and in the embodiment, blur correction circuits 504 and 507, noise correction circuits 505 and 508 (both in the main scanning direction), and marker breakage correction circuit 506 in the sub-scanning direction are used. 509 constitutes preprocessing circuits 502 and 503. Color marker blur correction corrects blur within 16 dots/mm, and noise correction corrects data loss within 8 dots/mm.

It is also possible to omit these pre-processing depending on the width and density of the marker.

The waveform-shaped marker signals RP and BP are supplied to the area extraction unit 520 together with the color code data, and a gate signal for density data extraction formed based on the area signal indicating the inside of the specified area a is extracted for each scanning line. is output to.

These more specific configurations will be explained below.

FIG. 39 shows an example of the color marker detection circuit 501. By scanning the color marker, the color of the marker itself is detected.

In this way, the region extracting unit 520 has a function of finding the transform region of the current line based on the marker signal common to the region signal of the previous line, in addition to the function of cueing the region.

Here, the lower two bits of the blue color code data are °'01'', and the lower two pits of the red color code data are °'10''.

Therefore, as shown in the figure, the lower 1 bit data and the middle 1 bit are phase inverted by an inverter 511 and are supplied to an AND circuit 513.

Similarly, the lower 1 bit whose phase is inverted by the inverter 512 and the middle 1 bit itself are supplied to the AND circuit 514.

Then, the AND output of the vertical valid area signal V-VALID and the size signal B4 obtained from the AND circuit 515 is supplied to the AND circuit 518 together with the upper 1 bit of the color code, and the color marker is determined.

The judgment data is used as a gate signal for each AND circuit 513.
, 514.

As a result, when the color marker is blue, the blue marker signal B has a pulse width corresponding to the thickness of the outline of the marker.
P is output from terminal 516.

Similarly, when the color marker is red, the red marker signal RP is output to the other terminal 517. Markai 3
An example of the number is shown in Figure 33.

An example of the area extraction section 520 is shown in FIG.

The area extraction unit 520 includes first and second area extraction units 520A.
, 520B, each of which is a data storage circuit 521A.
and a region calculation circuit 522A, a data storage circuit 521B, and a region calculation circuit 522B. first and second area extraction units 520Δ;

520B both have a function of extracting a red marker area in addition to a function of extracting a blue marker area. For convenience of explanation, region extraction of the blue marker will be explained.

When forming a blue area signal, the area signal of the current scanning line is calculated and formed from the area signal obtained by scanning immediately before and the marker signal obtained by scanning the current scanning line.

To do this, it is necessary to perform arithmetic processing using a period of three lines.Therefore, in the first data storage circuit 521A, the area signal, which is the final data of the immediately preceding scanning line, is stored in memory over one line. and first and second area signals (
In fact, it is necessary to have a function to memorize the NAND output) and a function to memorize the area signal of the current scanning line obtained by processing these area signals.

Furthermore, in the embodiment, the second area signal is formed by reading the memory from the reverse direction, so the number of memories required to realize these memory functions is:
There will be 16 pieces in total. Roughly speaking, it is necessary to detect the red marker, so 32 line memories are required in total.

Therefore, the first data storage circuit 521A has 8
A pair of memories 525, 5 composed of line memories
It has 26. In order to switch and use these for each line, a pair of Schmitt trigger circuits 523, 5
24, a pair of data selectors 527 and 528 and a latch circuit 529 are provided.

In addition to the blue marker signal BP, the first data storage circuit 521A has a blue marker signal BP as an input signal, as well as a blue first area calculation circuit 530.
The 3δ signal obtained at B is supplied.

In the first region calculation circuit 530B, the immediately preceding region signal QB
The region signal Q8' of the blue marker on the current scanning line n is formed from the marker signal BP on the current scanning line.

For convenience of explanation, considering scanning line n shown in FIG. 33, the relationship between area signal QB (this is the area signal of scanning line (n-1)) and marker signal BP is as shown in FIG. 41B.
, as shown in C. These signals are stored in memory 525 line by line.

In the next scanning line (n+1), these signals are read out via the data selector 527 and latch circuit 529 (E in the figure).

A pair of signals QB and BP are supplied to a NAND circuit 531,
The NAND output PBI (F in the figure) is supplied to the preset terminal PR of the D-type flip-flop 532, and the immediately preceding area signal QB is supplied to its clear terminal CL. the result,
A first NAND output (first contour signal) BNO as shown in G in the figure is obtained.

The first NAND output BNO and marker signal BP are stored in memory 526 sequentially. Therefore, scanning line (n+1
), the Schmitt trigger circuit 524 is controlled to be active.

A similar processing operation can be executed at the same timing in the second region extracting section 520B. However, the addresses of the memories provided therein are controlled so that writing is performed in the forward direction and reading is performed in the reverse direction.

Therefore, the output timing of the marker signal BP and the immediately preceding area signal QB is Wl for the n line, whereas it is (n+
1) The line becomes W2 and is read out a little faster (H and I in the figure). As a result, the second NAND output B
NI will be as shown in the same figure. The marker signal BP and the second NAND output BN1 are again stored in the data storage circuit 521B.

In the next scan line (n+2), the first NAND output B
No, the marker signal BP and the second NAND output BNI are read out (L-0 in the same figure).

Here, as described above, the memory provided in the second area extracting unit 520B is capable of writing in the forward direction and reading in the reverse direction, so in this example, the first NAND output BNI and the second
Read timing of NAND output BN2 W3. W4 matches.

Both are supplied to an AND circuit 533, and the AND output AB and marker signal BP (N, 0 in the figure) are supplied to an OR circuit 534, thereby producing an OR output QB as shown in P in the figure.
' is obtained.

This OR output QB' is nothing but a signal indicating the inside of the outline of the helmet marker drawn on the current scanning line n. In other words, this OR output becomes the area signal QB' of the current scanning line.

Since the area signal QB' is used as the immediately previous area signal QB on the next scanning line, the data storage circuit 521A
, 521B is easily understood.

Thus, a pair of NAND outputs BNO obtained by reversing the memory read direction.

By using BNI, marker areas can be detected accurately.

Since the detection of the red marker is exactly the same, the area calculation circuit 5
Description of 30R will be omitted. However, 535 is a NAND circuit, 536 is a D-type flip-flop, 537 is an AND circuit, and 538 is an OR circuit.

QR'' indicates a red marker area signal.

Schmitt trigger circuits 523, 524, memory 525.
The reason why a pair of data selectors 526 and data selectors 527 and 528 are provided is that even when a blue marker and a red marker exist at the same time, the designated area can be detected at the same time.

Therefore, these lines are alternately switched and used for each line by a two-line cycle switching signal supplied to terminals A and B.

The area signals QB'' and QR= obtained at the output terminals are supplied to an area determination circuit 540 shown in FIG. 42.

The area determination circuit 540 specifies processing of an image area specified from the outside, that is, whether to process the entire screen, process a partial screen, process the inside of the color marker, or process the outside. This is for controlling the transmission of area signals QB'' and QR' according to the area signals QB'' and QR'.

The area determination circuit 540 includes four flip-flops 541 to
544, and front-stage flip-flops 541 and 542
The area signals QB=, QR' latched by are supplied to the corresponding NAND circuits 545 to 548, and the area signals QB'' latched by the subsequent flip-flops 543+544 are supplied to the corresponding NAND circuits 545 to 548.
, QR' are supplied to corresponding NAND circuits 545-548.

Now, if we consider the signal relationship on scanning line n shown in FIG. 43A, it will become as shown in FIGS. 44 and 45.

Fig. 44 shows what kind of FF outputs, Ql, Q2 (H,
This shows whether L) is obtained.

Therefore, by the signals shown in FIG. 45A and B, the first NAND circuit 545 outputs the first NAND output M1 shown in FIG.
is obtained. Similarly, the second NAND circuit 546 obtains a second NAND output M2 shown in FIG. F based on the input signal shown in E in the same figure. As a result, from the first AND circuit 551, the section shown in FIG. A gate signal S1 associated with 11 is output.

Similarly, from the input signals H and I in the same figure, the third NAND output M3 in J in the same figure is transferred to the input signal L (from No. 3 to M
A fourth NAND output M4 is obtained.

As a result, from the second AND circuit 552, the section ■! A gate signal S2 (N in the same figure) related to IV is output. The gate signals SL and S2 are roughly ANDed by the third AND circuit 553, and the third gate 43 S3 is output.

Therefore, when using the blue marker, the gate signal S1 is selected, thereby forming an area signal with the blue marker.

Similarly, when the red marker is used, the gate signal S2 is selected, and when both the red marker and the blue marker are used, each of St and S2 is selected.

Gate signal S3 is used as area signal S.

Whether to use the inside or outside of the area signal S is determined by whether the area signal S is within one marker that can be supplied to the terminal 559 in FIG.
Selected by outside designated signal.

Therefore, the area signal S is supplied to an exclusion pull-or circuit 556 constituting the gate means 555, and an output corresponding to the marker inside/outside designation signal is obtained (Fig. 45, 0-Q).
).

The area signal S is roughly controlled by full screen/partial screen designation No. 8. Therefore, a gate circuit consisting of a pair of NAND circuits 557+558 is provided as shown in the figure.
The specified signal supplied to the terminal 561 controls its gate state.

In other words, if the entire screen is specified, the area signal S will be
becomes.

Other examples of area extraction processing are shown below.

It is possible to predetermine the processing content for each color marker and perform the previously reserved processing on the detected area.

Although the background color of the original is white, it may be any other color.

As a color marker, highlighters, especially red-based colors (orange,
Pink) and blue-based colors are suitable.

If it is not possible to write color markers directly on the original, the same effect can be achieved by marking on a transparent sheet.

Note that the designated area can be detected even if the necessary area is filled in as shown in FIG.

The resolution-corrected density data and area signal S are each supplied to the signal processing means 420, and processing (extraction/erasing/filling/color erasing processing) is selected according to a processing designation signal specified from the outside.

FIG. 47 shows an example of this processing means 420.

In addition to the image data that has passed through the MTF correction means 450, the processing means 420 is supplied with the region signal S created in the region extraction circuit 500 to corresponding input terminals 651 and 652, respectively.

When the document is in color, which color of image information is to be subjected to processing such as extraction and erasure is specified externally.

For this purpose, a match circuit 655 is first provided, to which achromatic designation data is supplied together with the color code (lower two bits). Therefore, as soon as the achromatic designating data and the color code match, the input image data is blocked by the gate circuit 656.

A NAND circuit R653' is provided in order to prevent the gate circuit 656 even when the color code matches the area signal S.

FIG. 48 shows what kind of processing is finally executed by specifying achromatization.

Here, when the achromatic designation code is 000°, no achromatic process is performed and all of the image information of the document is recorded as a black and white image. Similarly, “O
By specifying "O1", only the blue image is erased, and recording processing is performed on other input images.

In order to perform such processing, the matching circuit 655 is designed to provide an output U as shown in FIG. Figure 49 shows the output U only for some achromatic modes.
An example of the relationship between

The image data gated by the gate circuit 656 is supplied to the selector 657 and converted into image data corresponding to the processing designation signal.

Therefore, a control signal forming circuit 660 is provided in association with this selector 657.

As shown in the figure, the control signal forming circuit 660 is composed of three NAND circuits 661 to 663 and a NAND circuit 664 to which the outputs thereof are supplied, and the NAND circuits 661 to 6 on the input side
63 are commonly supplied with a region signal S in addition to the corresponding processing designation signals.

Then, the output of the NAND circuit 661 for specifying filling, that is, all black processing, is supplied to the input side of the selector 657 together with the image data, and the control (8
The selector 657 is controlled by the number.

In the figure, when the control signal is °H°°, the input is selected on the tb side.

When °° extraction processing is designated as the processing designation signal, image data is output only while this is being obtained, and the same goes for °° deletion.

In the process, the output of image data is blocked only during that time, and “°
In the gold fill °° process specification, a °°1°° signal (predetermined DC voltage) is output as image data instead of the input image data.

The image data for which conversion processing such as extraction and erasure has been completed is then supplied to scaling means (enlarging/reducing means) 1, where scaling processing is executed according to a specified magnification.

In this example, 1.0% between 0.5x and 2.0x
This is a case where the image can be enlarged or reduced in increments.

Here, also in this invention, in principle, the enlargement process increases the image data, and the reduction process is an interpolation process that thins out the image data.

The enlargement/reduction in the main scanning direction shown in FIG. The photoelectric conversion element or the moving speed in the sub-scanning direction is changed while the exposure time of the element is kept constant.

Slowing down the movement speed in the sub-scanning direction enlarges the original image,
If you speed it up, it will shrink.

This process controls the increase/decrease in the number of scanning lines.

FIG. 51 shows a specific example of the enlargement/reduction circuit 1.

In the figure, a timing signal generation circuit 10 is used to obtain timing signals for controlling the processing timing of the entire enlargement/reduction circuit 1, and includes a CCD 10.
Similarly to 4,105, the synchronous clock CLKI,
Horizontal effective area signal H-VALID1 Vertical effective area I ε No. V-
VALID and horizontal synchronization signal H-SYNC are supplied.

The timing signal generation circuit 10 first outputs a synchronization clock CLK2 that is output only during the period of the horizontal valid area signal H-VALID. Its frequency is the same as the synchronous clock CLKI.

In general, memory control signals lN5EL and 0UTSEL are output to the memories provided in input buffer 400 and output buffer 350, respectively.

Image data D having 64 gradation levels is input to the input buffer 4.
00.

Input buffer 400 is provided based on the following reasons.

Firstly, since the number of image data used during enlargement processing increases compared to before processing, it is possible to effectively increase the processing speed after data increase without increasing the frequency of the basic clock. This is to do so.

Second, this is to ensure that an enlarged image during enlargement processing is recorded with the center as a reference.

Therefore, in order to satisfy the first condition during enlargement processing, the read clock RDC supplied to this input buffer 400
The frequency of L is lowered than the normal frequency. Then, in order to satisfy the second condition, the read start address is set according to the magnification. The details will be described later.

Image data D output according to the specified magnification/reduction ratio
is supplied to two cascade-connected latch circuits 11° and 12, and the image data D1°DO of two adjacent pixels of the image data D having a 6-bit configuration and thus output with a halftone level are latched. clock DLCK
It is latched at the timing of latch clock DLCK
has the same frequency as the synchronous clock CLKI.

Image data Do latched by latch circuits 11 and 12,
Di can be used as address data for a memory (using ROM, hereinafter referred to as interpolation ROM) 13 for interpolation data.

The interpolation ROM 13 is an interpolation data table in which image data having a new halftone level referenced from two adjacent image data (hereinafter, this image data will be referred to as interpolation data SS) is stored.

As address data of the interpolation ROM 13, in addition to the above-mentioned pair of latch data DO, DI, interpolation selection data S
D is used.

700 is an interpolation data selection means that stores interpolation selection data SD and the like. As will be described in detail later, the interpolation selection data SD is used as address data for determining which data is to be used as interpolation data from among the data table group selected by the pair of latch data DO and DI.

The interpolation selection data SD is determined by the set magnification for enlargement/reduction, as will be described later.

FIG. 52 shows an example of interpolation data SS that can be selected by latch data Do, DI and interpolation selection data SD. In the embodiment, interpolated data is obtained by linearly interpolating Do and DI data.

In FIG. 52, SS is interpolated data (6 bits) output with 64 gradation levels, and since the image data Do and Di used as latch data each have 64 gradation levels, they are used as interpolated data SS. is 64
X 64. = 4096 different data blocks are included.

The figure shows the theoretical values (5 decimal places) obtained by linear interpolation at each step when DO=○, D1=F, and the actually stored interpolation data SS values for positive and negative slopes. The case is shown below.

Then, the interpolated data SS output from the interpolation ROM 13 is latched by the latch circuit 14, and then transferred to the output buffer 35.
0.

The output buffer 350 is provided to process invalid data caused by a reduction in image data during image reduction. Roughly speaking, this is to enable the reduced image to be recorded with the center of the recording paper as a reference when reducing the image.

FIG. 53 shows an example of the input buffer 400.

The input buffer 400 includes a pair of line memories 401.4.
02 are provided, and one line of image data D is supplied to each. The pair of line memories 401 and 402 are provided so that one line of image data can be alternately supplied and image data can be written and read in real time.

Line memories 401 and 402 have a capacity of 4096×8 bits. This capacity increases the resolution to 16
This is the value when dots/mm and the maximum original size is 84 size (frame length is 256 mm).

When writing data to the line memories 401 and 402, the write clock CLK2 is used, and when reading data, the read clock RDCLK is used.
404 to respective address counters 405 and 406.
is supplied to

The read clock RDCLK is set to a frequency different from the normal frequency when specifying the enlargement magnification. The frequency to be set differs depending on the specified magnification.

The first and second switches 403 and 404 are complementary controlled so that when one line memory is in write mode, the other line memory is in read mode. The switch control signal for this purpose is the control signal lN generated by the timing signal generation circuit 10.
5EL is used.

In this case, one of the signals is supplied with its phase inverted by the inverter 409. Control No. 43 lN5E1, is 2
This is a rectangular wave signal whose horizontal period is one period (see FIG. 68).

Here, in order to record the enlarged image based on the center of the recording paper even when the image is enlarged, the writing start timing is controlled during the enlargement process according to the enlargement magnification. Therefore, the clock CLK2 is supplied to the first and second switches 403 and 404 via a clock output control circuit 410 composed of a gate circuit or the like.

The control circuit 410 is supplied with preset data Po for controlling the write start timing.

This control circuit 410 counts the clock CLK2 and outputs the clock CLK2 from when the value matches the reset data Po. This limits the amount of data written to the input buffer 400, a detailed explanation of which will be given later.

The output from the line memories 401 and 402 is selected by the third switch 407, and then the latch circuit 11
is supplied to The above-described control No. 43 IN5EL is used as the switching signal.

FIG. 54 shows an example of the output buffer 350.

Its configuration is almost the same as the input buffer 400, but the line memories 351 and 352 are 4096 x 8 bits in size because image data after enlargement/reduction is stored.

Further, 353, 354.357 are first to third switches, 355.356 is an address counter, and 359 is an inverter.

The control signal for switch selection is the signal 0UTSEL (68th
(see figure) is used.

The frequency of the clock LCK2 is changed only when the reduction magnification is specified. Clock PCLK is the synchronization clock of output device M70.

Address counters 355+356 are supplied with addressing data for setting their initial addresses.

Therefore, as shown in the figure, the write start address data and the read start address data are sent to the respective counters 355, 361 and 362 via the fourth and fifth switches 361 and 362, respectively.
356.

In this case, the write start address data and the read start address data are controlled to be alternately supplied line by line by the switch control signal 0UTSEL. The read start address is always designated as the O address, and the write start address is automatically changed according to the magnification so that the reduced image is always recorded with the center as the reference. Details will be described later.

Both write start address data and read start address data are supplied from a system control circuit (not shown).

Here, the processing operations of the input buffer 400 and the output buffer 350 will be explained with reference to FIGS. 55 to 73.

FIG. 55 (■) shows the processing operation at the same magnification, and the frequency of the read clock RDCLK supplied to the input buffer 400 with respect to the synchronization clock CLKI in the figure is the same as the frequency of the synchronization clock CLKI (same [21B).

As a result, image data D shown in FIG.

As a result, interpolated data SS as shown in the figure is obtained.

This interpolated data SS is finally sent to the output buffer 350.
is supplied to and temporarily stored.

In this case, the frequency of the write clock LCK2 supplied to the output buffer 350 is the same as the frequency of the synchronous clock CLKI.

On the other hand, FIG. 55 II shows the processing operation when the magnification is set to 2 times.

When the magnification is set to 1x or higher, the input buffer 40
Only the frequency of the read clock RDCLK to 0 is changed according to the set magnification.

When the magnification is set to 2 times, the frequency of the read clock RDCLK supplied to the input buffer 400 is reduced to 1/2 with respect to the synchronization clock CLKI in A of the same figure (B of the same figure).

As a result, image data D shown in FIG.

As a result, one piece of interpolated data SS is obtained for one cycle of the synchronous clock CLK1, as shown in the figure. This interpolated data SS is supplied to the output buffer 350 and temporarily stored.

In this case, the frequency of the write clock LCK2 supplied to the output buffer 350 is the same as the frequency of the synchronous clock CLKI (see E in the figure).

In this way, even if a magnification of 1x or more is selected, the enlargement process is performed by lowering the frequency of the read clock RDCLK, so all clocks other than the clock RDCLK supplied to the input buffer 400 remain as the basic clocks. Processing operations can be executed. .

Therefore, as the enlargement/reduction circuit 1, it is not necessary to use circuit elements with high operating speed.

Of course, even if the input buffer 400 can be used, its clock frequency is lower than the clock frequency at the same magnification, so
All circuit elements do not need to operate at high speed.

During reduction, for example, when reducing an image by 0.5 times, the read clock RDCLK to the input buffer 400 is supplied to the output buffer 350 instead of being the same as the synchronous clock CLKI, as shown in FIG. The frequency of the write clock LCK2 is reduced to 1/2.

As a result, the writing timing of interpolated data SS is 2.
Since this is done once per cycle, excess image data can be thinned out and stored in the output buffer 350.

Note that details of the enlargement/reduction processing operation will be described later.

The interpolation data selection means 700 shown in FIG. 51 includes a data selection signal writing circuit 710 and a data selection memory 7.
It consists of 20.

The data selection signal writing circuit 710 has a control a'l that outputs the interpolation amount IR data SD determined by the magnification and the interpolation selection data SD at a timing according to the magnification.
A processing timing signal TD for performing 1 is stored for each block.

Since the interpolation selection data SD has a large capacity, a large capacity ROM is used for the interpolation circuit 710. In this case, a dedicated ROM can be used, but the ROM for the control program implemented in the system control circuit is
M may also be used.

Data selection memory? 20 is interpolation selection data SD stored in the interpolation selection data write circuit 710;

Of the processing timing signal TD, it is used to write data SD and TD according to the magnification designation.

Therefore, the interpolation selection data SD during actual image processing
The interpolation selection data written in this data selection memory 720 is used.

For this reason, as the data selection memory 720, a static RAM or the like that can be written and read at high speed is used.

The magnification designation data and the magnification set pulse DS are each supplied to the input circuit 710.

On the other hand, interpolation selection data SD to data selection memory 720
, when the processing timing signal TD is favorable, the write circuit 7
The clock 5ETCLK on the 10 side is used. Therefore, as shown in FIG. 51, a clock selection circuit 730h is provided on the data selection memory 720 side to select the synchronous clock CL K2 and the write clock 5ETCLK from the write circuit 710.

The selected clock is counted by a counter 740,
Data selection memory 72 as its output or address data
0 to 12-bit address terminals AO to All.

Here, the counter 740 is configured to generate a carry pulse after counting 4096 clocks (therefore, data for 4096 pixels).

The carry pulse is the transfer end signal (write end signal) C3
(Figure 58B).

FIG. 57 shows an example of the write circuit 710.

In the figure, 711 is a data ROM, which stores interpolation selection data SD and processing timing No. 43 TD as shown in FIGS. 59 and 60.

Here, is there a writing circuit before reading the image? ],
The interpolation selection data SD etc. stored at
The data of M711 is transferred to data selection memory 720.

The data set pulse DS is fully supplied to the control circuit 712 shown in FIG. 57, and the write enable control No. 41 ES shown in FIG. 58C is generated.

The control signal ES is supplied to the counter 713,
Clock 5ET from oscillation circuit 714 supplied to this
CLK count state can be controlled (Figure 58, E)
.

During the period when the control signal ES is "o", the counter 7
The interpolation selection data SD corresponding to addresses Δ0 to 80 according to No. 13 and addresses A7 to A13 according to the specified magnification and the processing timing signal TD are repeated in block units (FIGS. 59 and 60 - dot-dashed line area) to form one line. 4096 pieces of data corresponding to 1 are written to the data selection memory.

Here, as shown in FIGS. 58F and 58H, when the magnification is 160%, 160 clocks (data for 160 pixels) are used, and when the magnification is 80%, 100 clocks (data for 160 pixels) are used.
00 pixels worth of data) will be repeated.

Furthermore, since the data ROM 711 has a slow access time, it is read out using a clock having a lower frequency than the normal reading speed. The write timing is synchronized with data transfer lock 5ETCLK.

Note that the buffer circuit 715 receives the signal from the data ROM 711 in the image reading state from the data selection memory 7.
20 and the synchronization circuit 750 side to be described later, it is provided to prevent an adverse effect on the synchronization circuit 750 side, which will be described later, and is active only during the period when the control signal ES is 0'.

Control (No. 3 ES also has data selection memory 72
It is also used as an enable signal for writing to 0 (see FIG. 51).

When writing of the data (4096 pieces of data) to the data selection memory 720 is completed, a transfer end signal C8 is output from the counter 740, thereby ending the data writing period (see FIG. 58).

Thereafter, the normal image processing mode is entered, and the interpolation selection data SD and processing timing signal T are stored in the data selection memory 720.
D is read out and supplied to the synchronization circuit 750 at the subsequent stage.

The counter 713 is cleared by a clear signal CLR (F in the figure), but this clearing timing differs depending on the magnification.

It should be noted that when the reduction magnification is used, the images are shown as shown in FIG. 58, G and H4. G and H in the same figure show the relationship between the address data of the counter 713 when the magnification is 80% and the clear signal CLR that can be fully supplied.

The processing timing signal TD is the interpolated data S as described above.
When S exists, it is selected as 1°, and when it does not exist or when data is to be thinned out, it is selected as 0°.

FIG. 61 shows an example of the synchronization circuit 750 in FIG. 51.

The synchronous circuit 750 includes a plurality of latch circuits 7 as shown in the figure.
51 to 755 and a plurality of AND gates 761 to 764, and the interpolation selection data SD is stored in the latch circuit 751*
It is latched sequentially at 752 and 755.

On the other hand, data of bit 1 of the processing timing signal TD is sequentially latched by latch circuits 751 to 754. On the other hand, the data of bit O is stored in latch circuits 751 and 752.
It is latched with.

The synchronous clock CLK2 is applied to the latch circuits 751 to 754, and the remaining latch circuits 755 and AND gates 761 to 7
64 is supplied with a phase-inverted synchronization clock CLK2 as a latch clock.

On the other hand, the latched processing timing signal TD is supplied to the plurality of AND gates 761 to 764. The output of the AND gate 61 is supplied as the read clock RDCLK of the input buffer 400, and the output of the AND gate 762 is supplied as the latch clock DLCK of the latch circuits 11 and 12.

Similarly, the output of the AND gate 764 is sent to the output buffer 35.
It is supplied as the write clock LCK2 of 0, and the output of the AND gate 763 is supplied as the latch clock LCKI of the latch circuit 14.

Here, the AND gates 761 to 764 are open when the processing timing signal TD is 0°, and are closed when the processing timing signal TD is 0°.

By configuring the synchronization circuit 750 in this way, it is possible to generate read and write clocks having a frequency corresponding to the specified magnification. A specific example will be explained below.

FIG. 62 shows a timing chart when a magnification of 160% is selected.

First, as shown in FIG. 64, 4 bits of the data output from the data selection memory 720 are interpolation selection data SD, and of the remaining 4 bits, bit O is the read clock for the input buffer 400. R.D.
CLK and is used as data for the latch clock DLCK for the latch circuits 11 and 11.

Further, bit 1 is used as a write clock LCK2 to the output buffer 350 and a latch clock LCKI to the latch circuit 14. Bit 2 is data ROM7
It is used as a repetition signal to 11 and a gloss signal CLR to counter 714. Bit 3 is an unused pit in this example.

When the magnification is 160%, the interpolation selection data SD shown in FIG. 62B is output from the data selection memory 720, and the data shown in FIG. Data is output.

Both B and C in the same figure are interpolation selection data SD, and B and C in the same figure are interpolation selection data SD.
C shows the timing before latching by the latch circuit 751, and C shows the timing after latching.

Therefore, the latch circuit 752 at the next stage can output each signal delayed by one cycle as shown in FIGS.

Since the interpolation selection data SD is latched by the rough latch circuit 755, it is delayed by roughly one cycle.
The result will be as shown in Figure 1. The interpolation selection data SD shown in (2) in the figure is supplied to the interpolation ROM 13 as address data.

In the same figure, the AND gates 761 and 762 are supplied with the processing timing signal TD of bit O shown in G.
If these are ANDed with the synchronization clock CLK2 having the opposite phase, the read clock RDCLK and latch clock DLCK shown in J and K in the same figure are obtained.

Furthermore, since the processing timing signal TD of bit 1 is latched in the latch circuits 753+754 (M in the figure), locks LCKI and LCK2 are output from the AND gates 763 and 764 as shown in N and O in the figure. Output. These clocks L, CKI, and LCK2 have opposite phases to each other, but have the same frequency as the synchronous clock CLKI.

In this manner, when the enlargement factor is selected, only the frequency of the read clock RDCLK supplied to the input buffer 400 is changed.

FIG. 63 is a timing chart when reducing the size to 80%.

In this case, data selection memory? 20, the interpolation selection data SD shown in FIG. 2B is outputted, and the data shown in FIG.

Read clock RD supplied to input buffer 400
CLK and latch clock D to latch circuit 11.12
The LCK will be as shown in Figure J. That is, these frequencies do not change.

On the other hand, since the latch circuits 753 and 754 output the latch clock shown as M in the same figure, the latch clock LCKI shown as N in the same figure is obtained from the AND gate 763. And the other AND gate 76
4, the write clock LCK2 shown in FIG. 0 is obtained.

In this way, when reducing an image, only the frequency of the write clock to the output buffer 350 is changed according to the set magnification.

As mentioned at the beginning, in order to record an enlarged/reduced image based on the center line a of the recording paper, it is necessary to control the write start timing of the input buffer 400 or the read start timing of the output buffer 350. Bye. The reason for this will be explained next.

As mentioned above, the maximum image reading size of the CCDs 104 and 105 is 84 format, and the resolution is 16 dots/
If it is assumed to be mm, the memory capacity for one line is 4096 bits. Therefore, line memory 401.
402, 351, and 352 need only have a capacity of 4096 bits.

At the same magnification, line data with a capacity of 4096 bits is supplied as is to the output buffer 350 side, and then sent to the output device 7.
It will be supplied to 0.

On the other hand, when enlarging an image, the amount of image data in the input buffer 400 increases according to the magnification, and the increased image data is supplied to the output buffer 350.
If left as is, the image data would overflow, and not only would the necessary image data not be stored in the output buffer 3/50, but the image could not be recorded with the center as a reference.

When the original image is enlarged twice, the amount of image data becomes twice the original image data due to interpolation processing. Therefore, the amount of data written to the input buffer 400 is limited to 1/2 in advance.

On the other hand, the 2048th bit of the image data corresponds to 1/2 of the capacity (4096 bits) of an effective horizontal line (effective length) in B4 size, and corresponds exactly to the center a of the recorded image.

For this reason, a total of 2048 bits from the 1024th bit to the 3072nd bit of the input image data are stored in the input buffer 400 as shown in FIG. 65A.
By writing sequentially from the address, even if the amount of data is doubled by interpolation processing, all of the image data can be written to the output buffer 350 (FIG. 3B).

In this case, as shown in FIG. 65B, the image data after the interpolation processing is data that has been enlarged around the center of the image, so that a part of the image that is needed may be missing and recorded. Nothing happens.

For this reason, when enlarging the image, if the write start address of the input buffer 400 is controlled according to the set magnification, it is possible to record the image on the recording paper centering on the center of the image, as shown in FIG. 66B.

Therefore, the preset data Po for enlargement is set as follows.

Preset data P.

” (4096X magnification - 4096) / 2
FIG. 66C shows an example of recording at the same magnification.

During the reduction process, as shown in FIG. 65C, the input buffer 4
Writing and reading data to 00 is the same as in the case of the same magnification, and data is written from address 0 and read from address 0.

Then, when the image is reduced by 0.5 times, the image data for one line is reduced to 1/2 by interpolation processing,
This image data is stored in the output buffer 3'50.

Here, if the read image data is written as is to the output buffer 350, the image data will be written from the O address of the output buffer 350 as shown in Figure E, and the image data will be recorded from the 0 address in parentheses. Since the images are recorded sequentially from one side of the paper, only the upper left portion of the original is recorded.

To avoid this, the write start address should be set to the 1024th address (D in the figure).

Then, if the read start address is set to the O address, empty data (corresponding to white) will be recorded up to the 1024th bit, so the recorded image will be the 66th bit.
As shown in FIG. A, the reduced image is completely recorded around the center of the recording paper. The read start address is set by preset data PO.

Therefore, the write start address of the output buffer 350 is set as follows: Write start address=(409B-4096x reduction magnification)/2.

For this reason, if the write start timing (preset data Po) of the input buffer 400 and the write start address of the output buffer 350 are appropriately selected according to the enlargement/reduction magnification, a line memory with a capacity of one line can be created. It can also be used to realize central reference recording processing.

FIG. 67 shows an example of setting the write start address data and preset data Po.

FIG. 68 shows an example of the processing operation described above.

As shown in D-G in the same figure, both the preset data PO and the write start address
Set in synchronization with NC.

The write and read timing for the input buffer 400 is shown in E in the same figure. Similarly, output buffer 35
The write and read timing for 0 is shown in Figure F,
Shown in G.

As described above, the control signals 1N5EL and 0UTSEL are rectangular wave signals whose period is two horizontal periods.

A timing chart of signals in each part during interpolation processing is shown in FIG. 69.

The original image data obtained from the CCDs 104 and 105 are converted into DO(0), DI(F), D2(F)
, D3(0), D4(0) (the gradation level of each image data is shown in parentheses).

When the read clock RDCLK is completely supplied to the input buffer 400, the image data D is completely output after the access time tl (Fig. 69A, B), and this is the latch clock D.
It can be latched with LCK (C in the same figure).

DI (F) from the latch circuit 11 in synchronization with the latch clock.
) is output, the latch circuit 12 outputs D O
(0) is output (E in the same figure).

Note that the latch clock DLCK is the synchronous clock CLKI.
It is only one cycle behind.

On the other hand, according to the magnification signal set externally, the interpolation selection data SD is O;28;1o;38;... (FIG.
) is output.

As a result, the interpolation ROM 13 contains image data Do, D
The interpolation data table is referred to by I and the interpolation selection data SD, and necessary interpolation data SS (G in the figure) is output. Therefore, the interpolated data SS are 0 (So), 9 (S+), F
(S2), F (S3).

8 (S4), O (S5), etc.

The read interpolation data Ss are sequentially sent to the latch circuit 14 (H and I in the figure). Binarized interpolated data SS
is output buffer 35 by write clock LCK2.
0 (J in the same figure).

K).

In FIG. 69, t2 is the access time of interpolation ROM13, and t3 is the access time of output buffer 350.

Next, the reduction process will be explained. FIG. 70 shows a timing chart of signals when the reduction rate is 80%.

It is assumed that the gradation level of the image data is the same as in the case of the enlargement process described above.

Then, two adjacent image data (for example, image data DI, Do) are supplied from the latch circuits 11 and 12 as address signals to the interpolation ROM 13, and the externally set reduction magnification (80%) is used for data selection signal writing. What is supplied to the circuit 710 is also the same as in the case of the enlargement process described above.

In the case of reduction processing, both the read clock RDCLK and the latch clock DLCK have the same frequency as the synchronization clock CLK1, and are transferred from the input buffer 400 to the interpolation ROM1.
The relationship of the signals up to 3 is as shown in FIG. 70 Δ to F.

On the other hand, since the latch clock LCKI becomes G in the same figure, the latch output becomes as shown in FIG. 14.

Here, the write clock LCK2 is also the latch clock L.
Since the frequency is the same as that of CKI, data as shown in (3) in the figure is written into the output buffer 350.

In the above embodiment, if the magnification of enlargement or reduction is changed, the interpolation selection data SD output from the selection memory 720 for interpolation data changes, the interpolation ROM 13 is addressed accordingly, and the corresponding interpolation data SS is output. It is clear that it will be done.

Incidentally, in the above description, the invention is applied to an image processing apparatus that reads an image based on the center of the document and records the image based on the center of the recording paper, but the present invention can also be applied to other image processing apparatuses. can do.

First, when both image reading and image recording are processed based on one side of the original (recording paper),
Image reading start position of CCD 104, 105 and recording start position (light scanning start position, in laser printer,
Since the recording beam start position of the laser beam is the same, the present invention can be applied without any problems.

Second, in an image processing apparatus of the type in which image reading is performed based on the center line of the document and image recording is processed based on one side of the recording paper, the readout start address of the input buffer 400 is as follows. become.

In this case, the preset data Po of the output buffer 350
is always O. On the other hand, the read start address cannot be determined only by the magnification signal. It varies depending on the size of the manuscript.

Therefore, in this type of image processing apparatus, the readout start address is determined from the specified magnification indicating the document size.

The case where the size of the document 52 to be read is A4 size as shown in FIG. 71A will be described below.

As mentioned above, at 16 dots/mm, A
The number of bits for the width of 4-size paper is 210 mm x 16 ots/mm = 3360 bits, so if the maximum read original size is 84-size, the value obtained by multiplying the magnification by the width Y in Figure 71 is the input buffer 400 This is the read start address for.

Therefore, the read start address is (4096-3360)/2=368 bits.

FIG. 72 shows the write start address and preset data Po at any magnification.

However, the original size is A4.

The reason why N>inclusion start address and preset data Po are constant regardless of the magnification is because the image is recorded with one side as the reference.

Thirdly, in an image processing apparatus of the type in which image reading is performed based on one side and image recording is processed based on the center line island of the recording paper, as shown in FIG. 71B, the input buffer 400 The preset data Po and the write start address of the output buffer 350 are determined as follows.

That is, in the case of 4096>3360X magnification, the write start address address can be set, and in the opposite case, the preset data Po is set.

Therefore, when 4096>3360X magnification, the reading start address is: Write start address=(4096-3360X magnification)/2 At this time, the preset data Po of the input buffer 400 is set to O.

On the other hand, when 4096<3360X magnification, preset data Po is preset data P.

= (33(110-4096/magnification)/2. The write start address of the output buffer 350 at this time is O.

As a result, the write start address and preset data Po at any magnification have values as shown in FIG. 73.

In this way, the writing start address or the preset data Po can be changed depending on the document reading or writing criteria.

In addition to the image data described above, the enlargement/reduction circuit 1 is supplied with an area signal S and an attribute designation signal P, respectively.

As a result, both the area signal S and the attribute designation signal P are subjected to the same enlargement/reduction processing as the image data.

Here, since both the area signal S and the attribute designation signal P are 1-bit signals, the following two means can be considered as the enlargement/reduction processing means.

First, among the 1-bit signals (ro, IJ), “O
” corresponds to “0” on levels 0 to 63, and “1” corresponds to “6”.
3”. In other words, 6 of “O” and “63”
Treated as a bit signal.

By doing this, the signal format becomes the same as that of the density data, and the scaling process can be performed using the same circuit as the scaling circuit 2 for the density data.

Second, since it is a 1-bit signal, the nearest neighbor method (SPC method), which is a well-known scaling processing method for binary images, and the 9-bit signal can be used.
Means such as a division method can be used.

Among these, the SPC method, as is well known, is a processing means in which the closest grid is used as the post-magnification grid in the relationship between the equal-magnification grid and the X-fold grid (X is specified from the outside).

By doing this, the area (No. 3 S
The image data and attribute designation signal P are enlarged/reduced, and the area designated by the color marker can be image-processed at the designated magnification.

The enlarged/reduced image data is then subjected to shading processing.

A specific example of shading will be described later, but this shading processing time m
440 is constructed as shown in FIG.

The shading processing circuit 440 is a pattern ROM 44 for shading.
1, and by referring to its column address and row address, data for the necessary shading process is read out.

Therefore, a column counter 442 and a row counter 443 are provided, and the column address of the ROM 441 is specified by the counter output incremented by the signal corresponding to the B4 size, and the clock CK, which is also synchronized with 1 bell.
ROM4 by the counter output incremented by
41 row addresses are specified.

The mesh pattern data obtained by addressing is operated on with image data in an arithmetic circuit (AND circuit) 444. The image data after processing will be shaded data.

The area signal S and the shading designation signal can be supplied to the AND circuit 445, and the chip selection of the ROM 441 is controlled by its output.

As a result, as shown in FIG. 75, when a shaded designation signal is obtained, the ROM 44' is used between the designated areas.
1 is selected, the halftone image data can be selectively output, and the halftone image will be recorded.

The repetition of addressing to the ROM 441 is determined by the repetition period of the network pattern.

In this example, an 8×8 mesh pattern as shown in FIG. 76 is used, so the corresponding address designation is repeated. Therefore, the counters 442 and 443 can also be used as octal counters.

FIG. 77A shows the waveform of the original image before the shading process.

When this is shaded, it becomes a waveform as shown in FIG.

The mesh pattern is not limited to the example shown in FIG.
It is also possible to prepare a plurality of ROMs and select one of them.

The image data subjected to the shading process can be multivalued in the next processing step.

Conventionally, in order to set the threshold value of a recorded image, the threshold value was determined by operating a level selection button provided on an operation unit.

However, are these levels determined to a certain extent? Unless a person is accustomed to operating a 5j copying device, it is often difficult to set an appropriate level in a single operation. In other words, in the past, there were often unnecessary trial firings.

An automatic density method has been devised to overcome these drawbacks. In this method, a pre-scan is performed to obtain density information as a step before the main scanning of the original, and a threshold value of the original is determined based on this density information.

The drawback of this method is that the density information of the document is detected by prescanning. As a result, the time required for the first copy to be made becomes longer, and the productivity of copying is not significantly improved. Therefore, it is necessary to develop a method for setting in real time.

When attempting to set the density of a document in real time, it is conceivable to create a density histogram of the document.

Now, when a 6=degree histogram as shown in FIG. 78 is obtained from the il-degree information, a threshold value for multi-value is calculated from the level giving the peak frequency in this density histogram. Therefore, when adopting this method, it is necessary to count the frequency at each concentration level.
There was a dislike that the circuit scale would increase.

The following description exemplifies an automatic threshold determining means 600B that can set the optimum original density in real time without prescanning and without increasing the circuit scale.This automatic threshold determining means 600B is a multi-value circuit 600
Provided in connection with A.

The key point is that the threshold value is determined for each line from the maximum value D11 and minimum value DL of the density data in each scanning line. In a color original, because the three colors of helmet, red, and black are to be separated, density data of pixels corresponding to the currently recorded color is sampled, and the maximum and minimum values are calculated for each color.

An example of a formula for calculating the threshold value T is shown.

T I = k + (Dll-DL) + DL where i = blue, red, black j = multivalue level = coefficient from 0.1 to 0.8, preferably 0.2 to 0.6 The value of is different for each color.

However, it is clear that the difference also depends on the value of the density data stored in the above-mentioned color separation map.

For example, in the case of binary values, k is 1/2 to 1/3 for black, and about 1/2 for red and blue. Therefore, the multi-value threshold is DI(
- It is determined differently for each multivalue level depending on DL and the value of DL.

In the process of calculating the maximum or minimum value, it is possible that noise etc. may be mixed in, but as a countermeasure in such a case, if the concentration data changes suddenly, use the previous concentration data without sampling, or Alternatively, it is possible to use the average value of the concentration data before and after. Further, in order to avoid a sudden change in the calculated threshold value, the average value of the threshold values of a plurality of already determined lines may be used as the threshold value of the current line.

It is also clear that when performing multilevel conversion, it is sufficient to select the coefficient rAk corresponding to each threshold value.

The reason for obtaining it in the above manner is as follows.

When copying an original painting in a single color, please refer to section '19. k is different for each color. In other words, the original picture has black clay typeface letters, and colored letters are present less frequently than this. Therefore, if the threshold value is determined according to black characters, the colored characters in the reproduced image will tend to jump out for red or blue. When matched with colored text, the black text becomes a bit crushed.

A specific example of the automatic threshold value determining means 600B will be explained next.

The example shown in FIG. 79 is a case where a ROM 611 is prepared in which a plurality of threshold values Ti obtained from the above-mentioned threshold value calculation formula are stored, and the threshold value data is selected from the maximum and minimum values of the line.

In the figure, when three lower thresholds 1 to T3 are used, three ROMs 621 to 623 are used. The density data is simultaneously supplied to a maximum value calculation circuit 612 and a minimum value calculation circuit 616.

Since these are the same in content, the maximum value calculation circuit 61
The second configuration will be explained.

The density data of the current pixel and the density data of the previous pixel latched by the latch circuit 614 are completely supplied to the switching circuit 613. Then, the density data of the current pixel and the density data of the previous pixel are supplied to a comparator 615 for comparing their magnitude, and the levels are compared, and the comparison output is used to compare the density data of the current pixel and the previous pixel.
Any of the density data in front of the pixel is selected. When the density data of the original pixel is larger, the density data of the current pixel is selected based on the comparison output as shown in the figure.

Such a magnitude comparison operation is performed for all pixels of the line, and the maximum value DI(of the line) is detected.

Similarly, in the minimum value calculation circuit 616, the minimum value DL of the line is detected from the comparison output indicating the minimum value obtained by the comparator 619.

Maximum and minimum values DH obtained at the end of one line,
Which threshold value to select can be determined by DL.

The threshold value may be calculated by sequentially calculating the above-mentioned calculation formula in real time.

The contents of the ROM 611 differ depending on how the image data is multi-valued, but for example, when converting to four-valued data of white, black, light gray, and dark gray, the following C is used as the output threshold: It can be determined as follows.

Threshold T1...Low threshold...White 1. Ash 1/
3 Threshold T2...Medium threshold...Gray 1/3.
Ash 2/3 Threshold T3...High threshold... Ash 2/
3. Black 1 Note that as a noise countermeasure, a preprocessing circuit such as an averaging circuit for density data may be provided. g
A post-processing circuit may be provided to average the two threshold values Ti.

In the case of this device, all threshold values are automatically calculated. The density of the line portion can be controlled by the developing bias voltage. Therefore, a switch (not shown) is provided to control this bias voltage.

When converting a photographic image into a multivalued image, a dedicated threshold value is selected. Therefore, a dedicated threshold ROM 600C is provided.

As the threshold value ROM 600C, for example, a dither matrix of 4×4°8×8 or the like can be used. In that case,
For address control of the threshold ROM 600C, a counter output specifying a row and a column may be used. In this example, 8X8
It is converted into four values using three matrices.

FIG. 80 shows an example of a dither matrix for quaternization.

Ti (i=1 to 3) indicates the threshold value to be used.

The threshold value for character images and the threshold value for photographic images are selected according to external specifications.

Therefore, the first and second selectors 600D.

600E, and a control circuit 600F for these.

FIG. 81 shows a specific example of this control circuit 600F, in which when an external designation mode is selected, that is, a character image or a photographic image, the designated mode M (Ml, M2) is selected regardless of the attribute designation signal P. The relevant threshold will be selected.

The control circuit 600F is composed of an encoder 625 and a logic circuit 630 for its output Yi, and the relationship between the external specified mode M and the outputs EOC and DOC from the logic circuit 630 is as follows.
The regulations are complete as shown in Figure 2.

When a character image is selected from the outside, the first selector 600D is selected by the selection output EOC, and when all photographic images have been selected, the second selector 600E is selected by the selection output DOC.

When a mixed image is selected, the first or second selector 600D is selected depending on the value of the attribute designation signal P.

600E, a corresponding threshold value is automatically selected depending on the content of the input image.

Multi-value processing is performed according to the selected threshold value.

Note that the logic circuit 630 includes four NAND circuits 631 to 63.
4 and two inverters 635 and 636 are connected as shown in the figure.

The selected threshold value data and the image data (density data) output from the shading processing circuit 440 are sent to the multi-value conversion circuit 600A.
is supplied to the system and multi-valued.

As shown in FIG. 83, the multi-level north circuit "#! 1600A is composed of a data comparator 640 and an encoder 641, and the image data can be compared with the selection threshold data T1 to T3.

In this case, if the levels of threshold data T1 to T3 are set as shown in FIG.
~The relationship between C3 and encoder outputs JO and Jl is the 85th
The settings are as shown in the figure.

Therefore, if the laser beam is modulated (PWM modulated) by the encoder outputs JO and Jl, the recording density at that point will change in density in four steps from white to black.

The multivalued image data is supplied to a hollow processing circuit 470 shown in FIG.

The hollow processing uses 4 bits/4 lines of edge data to create a completely hollow image (character).

Therefore, the image data that has been subjected to the multilevel conversion processing is supplied to the 9-line memory 459, and is thereby delayed by 1 line, 5 lines, and 9 lines, respectively.

The image data associated with each delayed line is supplied to a hollow processing circuit 470 shown in FIG.

Here, 4-valued data is exemplified as the image data.

Therefore, the 4-value data (2-bit data) of each line is transmitted through delay elements 471 to 47 composed of shift registers, etc.
6, the signal is delayed by a predetermined number of bits.

Then, if the 4-value data delayed by 4 lines is the image data of the pixel of interest on the line of interest, the delay element 471
476 delay outputs can be supplied to the edge detection circuits 480 and 490 in the sub-scanning direction and the main scanning direction in the line of interest.

The detection circuits 480 and 490 have the same configuration, and include logic circuits 481, 482, 491, 492 for edge detection regarding the upper one bit of the four-value data, and edge detection logic circuits 483 and 492 for the lower one pit. 484
,493,494.

Regarding the processing of the upper 1 bit, the NAND circuit 48
1 is supplied with the data a+b+c of the upper one pit delayed by 4 bits in each line (the waveforms of which are shown in FIG. 87A-C. The same applies hereinafter), and its NAND output d (D of the same figure) and the 4-bit delay output of the line of interest are exclusive ORed in an exclusive pull-OR circuit 482.

If the output is e (87th [ff1E)], this output e becomes an edge output in the sub-scanning direction.

Similarly, three four-value data f at 4-bit intervals in the sub-scanning direction of the 5th line, which is the line of interest.

b, h (FIG. 87 F-H) are supplied to the NAND circuit 491, and the NAND output i (■ in the same figure) and the four-value data b of the pixel of interest are supplied to the exclusive pull-OR circuit 492, and exclusive A logical sum operation is performed.

Therefore, the output j (J in the figure) becomes an edge output in the main scanning direction.

Edge output e in the main and sub-scanning directions.

By supplying j to one of the NAND circuits 496 constituting the edge detection circuit 495 for the pixel of interest, the edge detection output k for the top one pit (K in FIG. 87) is obtained.
is obtained.

FIG. 87, described above, is a waveform for explaining edge detection at the starting point of a contour (for example, a character). On the other hand, Fig. 88 is a diagram for explaining edge detection in the middle part of a contour, and in a contour with a certain width like this, the edge part corresponds to the edge part as shown in the figure. As a result, a 4-bit detection output k is obtained.

Similar edge detection processing is performed for the lower 1 bit of the image data. Therefore, NAND circuit 483°493.49
7 and exclusive pull-or circuits 484 and 494 are provided.

Then, the edge detection output and the pixel of interest in the line of interest (
The image data of 4 (cut data) can be selected by the selector 498 depending on whether or not hollow processing is specified.

Therefore, when the selection signal C3 which is the AND output of the area signal S and the hollow signal is obtained, the edge detection output, that is, the hollow signal (P input of the selector 498) is selected, and the other input is the normal input g. image data will be selected.

Note that 485 is a 4-bit delay element, and 486 is an AND/
It is a gate.

The output of the hollow processing circuit 470 is inverted in an inverting circuit 460.

When the multi-value recording is four-value recording (generally even-value recording), 2 bits is sufficient as the multi-value data. Therefore, 00 white 1 l
Black 01 Light gray Reversed 10 eAAl
O2 dark ash → 01 light ash 11 black 00 Inverted like white.

Therefore, the inversion circuit 460 is composed of a pair of exclusive pull-or circuits 461 and 462, and also includes a region signal S
An AND gate 463 for an inversion signal and an inversion signal is provided, and only when an inversion signal is obtained, the bits of the image data subjected to hollow processing or unprocessed can be inverted.

The various external designation signals and image processing signals described above are entirely composed of 24 bits, as shown in FIG. 89, and various processing signals are assigned to each bit.

The signal processed above is sent to the interface circuit 40.
Supplied on the side.

Next, the configuration and operation of this interface circuit 40 will be explained with reference to FIG. 90.

The interface circuit 40 is composed of a first interface 41 that receives 4-value data, and a second interface 42 that receives 4-value data sent from the first interface 41.

The first interface 41 includes a timing circuit 43
to the horizontal and vertical valid area signal H-VALID.

V-VALID is supplied, and the counter clock circuit 44 outputs a predetermined frequency r;
, 6Ml1. L) clock is supplied.

As a result, 4-level data is sent to the second interface 42 in synchronization with the COD drive clock only during the period when the horizontal and vertical effective area signals are generated.

The counter clock circuit 44 generates a main scanning side timing clock synchronized with the optical index signal.

The second interface 42 is an interface for selecting the four-level data sent from the first interface 41 and other image data and sending it to the output device 70 side.

Other image data refers to the following image data.

First, test pattern image data obtained from the test pattern generation circuit 46, and second, the patch circuit 47.
Thirdly, it is control data obtained from the printer control circuit 45.

The test pattern image data is used when inspecting image processing, and the patch image data for toner density detection is used during patch processing.

Both the test pattern generation circuit 46 and the patch circuit 47 are driven based on the clock of the counter clock circuit 44, thereby adjusting the timing with the four-value data sent from the first interface 41.

The four-level data output from the second interface 42 is used by the output device 70 as a modulation signal for the laser beam.

FIG. 91 shows a specific example of the first interface 41, in which a pair of line memories 901 and 902 are used. This is to process four-value data in real time.

A pair of line memories 901 and 902 are supplied with an enable signal having two lines as one cycle, and are also supplied with predetermined address data from address counters 903 and 904, respectively. CK indicates the clock for the address counter (FIG. 92B).

The enable signal forming circuit 910 is provided with a first AND circuit 911 as shown in the figure, which includes the above-mentioned clock CK and a size signal B4 that can be handled by this device.
(In this example, the maximum size is 84 format. FIG. 92A) is fully supplied, and the first AND output AI (FIG. 92C) is formed.

On the other hand, a D-type flip-flop 912 is provided, and as its clock, a line signal SH (D in the figure) is output once per line in synchronization with the deflection timing of a deflector 935 provided in the output device 70. applied. As a result, it is assumed that outputs (shown as Q and Ω) with the polarities shown in E and F in the figure are obtained from the Q and (9) terminals.

q output and the first AND output A1 are the first NAND circuit 91
3, the Q output and the first AND output A1 are connected to the second
The first and second NAND outputs N1 and N2 are supplied to the NAND circuit 914 and output from each other (G, H in the same figure).
is supplied as an enable signal to line memories 901 and 902.

Therefore, each line memory 901, 902 is alternately set to the write enable state for each line.

The output state of each line memory 901 and 902 is regulated by gate circuits 905 and 906 having a three-state configuration. A gate signal forming circuit 920 is provided for this purpose.

This forming circuit 920 consists of a pair of AND circuits 921 and 922.
and a NAND circuit 1923.924, and the Q and q outputs and the horizontal effective area signal 1 (-VALID (FIG. 1)) are supplied to the second and third AND circuits 921.922, , K are formed.In addition to these AND outputs A2 and A3, the third and fourth NAND circuits 923 and 924 provided at the next stage receive a vertical effective area signal V-. VALID (L in the figure) is commonly supplied, the third NAND output N3 (M in the figure) is supplied to the gate circuit 905, and the fourth NAND output N4 (N in the figure) is supplied to the other gate circuit 906. .

As a result, in this case as well, the gate state is controlled alternately for each line, and the four-level image data of each line is sequentially read out from the first interface 41.

Horizontal valid area signal II-VALID and vertical valid area signal V-
VALID determines the effective width in the horizontal and vertical directions. Clock CK, horizontal valid area signal H-VA
Both LID and vertical valid area signal V-VALID are
It is supplied from the output device 70 side.

FIG. 93 shows a peripheral circuit of the output device 70. A semiconductor laser 931 is provided with a drive circuit 932, and the above-mentioned four-value data is supplied to the drive circuit 932 as a modulation signal. The laser beam is internally modulated. The timing circuit 93 is configured so that the laser drive circuit 932 is driven only in the horizontal and vertical effective area sections.
It can be controlled by the control signal from 3. Further, a signal indicating the amount of light of the laser beam is fed back to the laser drive circuit 932, and driving of the laser is controlled so that the amount of light of the beam is constant.

The scanning start point of the laser beam deflected by the octahedral polygon 935 is detected by the index sensor 936, and the index signal is converted into a voltage signal by the I/V amplifier 937, and then this index signal is sent to the counter clock circuit. 44, etc., to form a line signal S H and adjust the timing of optical main scanning.

Note that 934 is a polygon motor drive circuit, and its on/off signals are supplied from a timing circuit 933.

The image exposure means shown in FIG. 94 uses a laser beam scanner (light scanning device).

The laser beam scanner 940 has a laser 931 such as a semiconductor laser, and the laser 931 is controlled on/off based on a color separation image (four-value data). A laser beam emitted from a laser 931 enters a polygon 935 made of an octahedral rotating polygon mirror via mirrors 942 and 943. A laser beam is deflected by this polygon 935, and is irradiated onto the surface of the image forming body 110 through an f-θ lens 944 for imaging.

945 and 946 are cylindrical lenses for correcting inclination angles.

The polygon 935 directs the laser beam to the image forming body 110.
The surface of the image is scanned at a constant speed in a predetermined direction a, and such scanning results in image exposure corresponding to the color separation image.

Note that the f-θ lens 944 is used to adjust the beam diameter on the image forming body 110 to a predetermined diameter.

As the polygon 935, a galvanometer mirror 1 optical crystal polarizer or the like may be used instead of a rotating polygon mirror.

The latent image created as described above is
A primary image is formed on the photoreceptor by positive reversal development. This situation is shown in FIG.

The electrostatic latent image formed on the image forming body 110 is developed by the developer attached to the image forming body 110.

Note that during development, the development bias signal is applied to the development sleeve (
(not shown). The developing bias (No. 6) consists of a DC component selected to have approximately the same potential as the potential of the non-exposed portion of the image forming body 110.

As a result, only the toner of the developer on the developing sleeve selectively transfers to the surface of the image forming body 110, which has been made into a latent image, and is deposited on the surface of the image forming member 110, thereby performing the development process.

FIG. 95 shows changes in the surface potential of the image forming body 110, taking as an example the case where the charging polarity is positive. P.H.
is the exposed area of the imaging pair, DΔ is the unexposed area of the imaging pair, DU
P indicates an increase in potential caused by the positively charged toner T1 adhering to the exposed area P H' during the first development.

The image forming body 110 is uniformly charged by a charger, and
A constant positive surface potential E is obtained.

Image exposure using a laser as an exposure source is applied, and the potential of the exposed portion PH decreases in accordance with the amount of light.

The electrostatic latent image thus formed is developed by a developing device to which a positive bias approximately equal to the surface potential E of the unexposed area is applied. As a result, the positively charged toner adheres to the exposed portion PH, which has a relatively low potential, and a first toner image is formed.

In the area where this toner image is formed, the potential increases by DUP due to the adhesion of the positively charged toner T1, but normally it does not have the same potential as the unexposed area DA.

Next, recorded image data is obtained by transferring the image to a transfer paper and roughly heating or pressurizing it to fix it. In this case, the toner and charges remaining on the surface of the image forming body are cleaned and used for the next image forming body.

In addition to electrophotography, methods for forming latent images for image formation include methods in which charges are directly injected onto the image forming body using a multi-needle electrode, etc., and methods in which electrostatic latent images are formed by directly injecting charges onto the image forming body using a magnetic head. A method of forming an image, etc. can be used.

In this device, a two-component developer consisting of a non-magnetic toner and a magnetic carrier is used because it is easy to control the frictional electrification of the toner, has excellent development properties, and can impart any color to the toner. is preferably used.

The various devices or circuits described above are all controlled by first and second control sections 200 and 250, as shown in FIG. The explanation will start from the second control unit 250.

The second control unit 250 mainly controls the image reading system and its peripheral devices, and 251 is a microcomputer (second microcomputer) for controlling the optical drive; The exchange of various information 43 with the microcomputer (first microcomputer) 201 is serial communication. Further, the optical scanning start signal sent from the first microcomputer 201 is directly supplied to the interrupt terminal of the second microcomputer 251.

The second microcomputer 251 uses a predetermined frequency (12MIIz) obtained from the reference clock generator 254.
Various command signals are generated in synchronization with the clock.

The second microcomputer 251 outputs a color designation signal and the like for color processing.

The second microcomputer 251 outputs the following control signals.

First, a control signal for turning on and off the drive circuits of the CCDs 104 and 105 is supplied to their power supply control circuits (not shown). Second, a predetermined control signal is supplied to the lighting control circuit 253 for the light source 85 for irradiating the document 52 with necessary light.

Thirdly, the carriage 8 provided on the image reading section A side
A control signal is also supplied to a drive circuit 252 that drives a stepping motor 90 for moving the 4 and V mirror units 89, 89''.

Data indicating the home position is input to the second microcomputer 251.

The first microcomputer 201 is mainly used to control the projector.

FIG. 97 shows an example of an input system and an output system from a copying machine.

The operation/display unit 202 receives input data such as magnification designation, recording position designation, and recording color designation, and displays the contents thereof.

As the display means, an element such as an LED is used.

The paper size detection circuit 203 is used to detect and display the size of the cassette paper loaded in the tray, or to automatically select the paper size according to the size of the document.

The cassette zero sheet detection sensor 220 detects whether there are no sheets in the cassette. Similarly, the manual feed zero sheet detection sensor 222 detects the presence or absence of paper for manual feed in the manual feed mode.

The toner intensity detection sensor 221 detects the density of toner on the drum 110 or after fixing.

Further, the remaining toner amount detection sensor 223 individually detects the remaining amount of toner in each developing device, and when toner replenishment is necessary, the display element for toner replenishment provided on the operation unit is controlled to light up. .

- The time stop sensor 224 is for detecting whether or not the paper has been correctly fed from the cassette to the second paper feed roller (not shown) side while the copying machine is in use.

Contrary to the above, the paper ejection sensor 225 is used to determine whether or not the fixed paper is correctly ejected to the outside.

The manual feed sensor 226 is used to detect whether a manual feed tray is set. If it is set, it will automatically switch to manual feed mode.

The sensor output obtained from each sensor as described above is taken into the first microcombi user 201, and is operated and operated.
Necessary data is displayed on the display unit 202, and the driving state of the copying machine is controlled as desired.

In the case of copying, a developing motor 227 is provided, and these are all controlled by command signals from the first microcomputer 201. Similarly, the driving state of the main motor (drum motor) 204 is controlled by a drive circuit 205 having a PLL configuration, and this drive circuit 205 is also
Its driving state is controlled by a printing section signal from the microcomputer 201.

During development, it is necessary to apply a predetermined high voltage to a developing device or the like during development.

Therefore, a high-voltage power source 228 for charging, a high-voltage power source 229 for development, a high-voltage power source 230 for transfer and separation, and a high-voltage power source 231 for toner receiver are respectively provided, and when necessary, a high-voltage power source 231 is provided for each of them. A high voltage of

Note that 233 is a cleaning roller drive unit, 234 is a first paper feed roller drive unit, 235 is a second paper feed roller drive unit, and 232 is a cleaning pressure release motor. Roughly speaking, 236 is a drive section for the separation claw.

The second paper feed roller is used to generally feed the paper conveyed by the first paper feed roller to the electrostatic latent image formed on the drum 110.

The fixing heater 208 can be controlled by the fixing heater on/off circuit 207 according to the first microcomputer 2010 control number 43.

The fixing temperature is read by the thermistor 209, and the first microcomputer 2
Controlled by 01.

206 is a clock circuit (approximately 12 MHz).

A nonvolatile memory 210 provided along with the first microcomputer 201 is used to store data that should be preserved even when the power is turned off. for example,
This includes total counter data and initial setting values.

In this way, the first and second microcomputers 20
At 1,251, various controls necessary for image formation are executed according to a predetermined sequence.

FIG. 98 is a timing chart schematically showing when recording an image.

Next, the operation/display section 202 of this device will be explained with reference to FIG. 99.

(A) is a copy switch, and by pressing this switch, the copying operation is performed in the above-mentioned sequence. There is also an LED below this switch, the red LED
When D is lit, it indicates warming up time, and the green LED
It becomes ready when the light turns on.

(B) is a display section that displays the number of copies, self-diagnosis mode, or indicates an abnormal state or its location. 7 segment LE
It consists of D and its contents are displayed numerically.

(c) is a group of keys for setting the number of copies, etc., instructing the self-diagnosis mode operation, interrupting the copying operation, clearing the set number of copies, etc.

For example, by pressing number keys 4 and 7 and turning on the power switch, it is possible to enter the self-diagnosis mode, and by inputting a specific number at this time, for example, the motor of the developing unit can be rotated independently. It is possible.

From this mode, it is possible to return to normal mode by inputting a specific number, or by turning the power off and then turning it on without pressing any keys.

In the normal mode, normal copying operations are possible, but by combining the numeric keys and the P button, operations such as printing out data and printing out test patterns are also possible.

For example, by connecting a print controller to the second interface 42, the test pattern in the memory can be printed out.

If the stop/clear key is pressed during the copy operation, the process moves to a post-rotation process operation, and after this operation is completed, the initial state is returned. The same holds true when making multiple copies.

The key (D) selects text image processing (multi-value fixed threshold selection), photo image processing (multi-value dither threshold), and mixed image processing of text and photo images (processing selection using attribute designation signal P). This is the key.

(H) is a key for instructing to perform area detection on the entire screen or on a portion of the screen, and when this key is pressed, a marker area on the document is detected.

The designation of inside/outside the marker area and the entire screen is changed each time the (g) key is pressed.

On the other hand, the key group (l) is the key for specifying processing.

The functions described above can be used to perform various types of image processing as described below.

If you want to do this in full screen, specify "Full screen" and then click "
Press the "Invert" key to copy (see Figure 100).

If you want to make a partial copy, specify inside/outside the marker and then press the "reverse" key to copy (see FIG. 101).

-S mode For example, press the marker "inside" key to copy (102nd
(see figure).

- After specifying the ``full screen'' mode, press the ``shading'' key and then copy (see Figure 103).

After specifying the "inside" side with the marker, press the "shading" key and copy (see Figure 104).

After specifying the mode “Full surface”, press the “Contour (hollow)” key,
Then press the copy key (see Figure 105).

After specifying the area outside the marker, press the "Middle blank" key and then press the copy key (see FIG. 106).

VOICE φ HA 几 After specifying the mode "full screen", press the "variable magnification" key, set the magnification, and then press the copy key (see Figures 107 and 108).

After specifying within the marker, press the "Enlarge" key to copy (see Figure 109).

After specifying in the marker, press the "Extract" key and copy (see Figure 110).

book 55 science and technology 25 The function is the opposite of the extraction processing mode.

5. After specifying the mode "Full surface", press the "Light Erase" key to copy (see Figure 111).

(E) is a key for specifying achromatization, and it is possible to specify one or two colors among red, blue, and black.

Furthermore, by combining the (chi) and (ru) keys, this key can erase the color inside/outside the area specified by the color marker.

(W) is a key for setting fixed and vertical/horizontal zoom magnifications. By pressing this key, the LED turns on and off, and processing for the specified magnification is set.

When changing the zoom by setting the desired magnification,
Press the (W) key to select "Zoom", and use the (Power) key to select the magnification independently in the vertical and horizontal directions.

Furthermore, by setting a fixed magnification with (wa) and selecting a magnification from B5 size to B4 size with the (power) key, it is possible to set a fixed magnification with the same magnification in the vertical and horizontal directions.

On the other hand, in this state, if you press (wa) to select vertical and use the (strength) key to select magnification, horizontal will use the initial magnification and fir will use the subsequently set magnification, making it possible to achieve fir/horizontal independent magnification.

Conversely, pressing the horizontal key instead of the vertical key has the same effect.

In a different method, the user may first press the "vertical" key to set the vertical magnification, and then press the "horizontal" key to set the magnification.

Furthermore, by using the key switch group (c), it is possible to give instructions for various operations for operation confirmation. For example, (I) 6XP: Scanner check 60P + copy; light source (halogen lamp) turned on, scanner optical system stopped, 1 + copy in this state; halogen still on, optical system only at a speed slower than the normal speed in the sub-scanning direction Move.

However, when the copy switch is turned off, the optical system will stop at that position with the halogen on 2+copy; Same function as 1+copy, but the optical system will move in the opposite direction 3+copy; Regular scanning will continue with the halogen on. 61P+Copy: With the halogen turned off and the scanner optical system stopped, press 1 to 6+Copy in this state to perform the same operation as above.

This operation is canceled by pressing the stop/clear key. Further, during each operation, it is possible to check the signal level of the image data output from each circuit.

(II) 7XP: Printer section check 70P+copy; only the polygon motor rotates and the laser is turned on. Index signal can be checked, 1+copy in this state; Output 2+copy of printer controller data; Output 3+copy of test pattern data; Output of batch data is possible 71P+copy; Check mode related to recording section, 1+copy in this state ;Charging machine on 2+copy;Black developer motor on, developing bias on 5+copy;Transfer pole on 6+copy;Cleaning blade crimping 7+copy;Cleaning blade released 8+copy;Cleaning roller application (voltage) 9+copy;Minute W & pole on 10+ Copy; first paper feed motor turned on 11+copy; second paper feed motor turned on, etc. are performed. In this case, this mode is canceled by pressing the stop/clear key in the same manner as described above.

This type of self-diagnosis check is not limited to this example, and it is possible to perform such self-diagnosis checks, making maintenance easier for service personnel in the market, or by having users perform a simple check before going for maintenance, to prevent malfunctions. will be able to respond more quickly.

In addition, (e) is the mode setting display of the interface circuit, and is a switch that determines either print pattern mode or copy mode. In this mode, the connection from the host machine or host computer is connected to the second interface. This is possible by passing it through.

[Effects of the Invention] As explained above, according to the present invention, enlargement/reduction processing is performed using at least one of a control signal for image processing and image density information. It is.

According to this, since the control signal can be similarly enlarged or reduced at the same time as the image data is enlarged or reduced, there is a practical advantage that the designated area can be accurately enlarged or reduced.

When using an attribute specification signal as a control signal,
Multi-value conversion is possible using the optimal threshold for the input image.

Further, in the present invention, various types of image processing are performed after color separation and before multivalue processing.

According to this, it is possible to eliminate the disadvantages of conventional circuits that increase the circuit scale and increase the cost of the device, and also to perform color ghost correction, resolution correction, etc. on image data before multilevel conversion. Since image processing can be performed, the desired image processing can be performed without deteriorating the image quality. Therefore, it has the practical benefit of achieving high quality records.

Therefore, according to the image processing device according to the present invention, - Appropriate image processing can be performed for each color for multiple colors - Processing such as color erasure is possible even though it is monochrome recording - Multi-value recording It is possible to realize a device with features such as high image quality and low cost.

[Brief explanation of the drawing]

11 is a system diagram of essential parts showing an example of an image processing device according to the present invention, FIG. 2 is a schematic configuration diagram of an electrophotographic copying device applicable to this invention, and FIG. 3 is a transmittance characteristic diagram of a dichroic mirror. , Figure 4 is an emission spectrum curve diagram, Figure 5 is a spectral sensitivity characteristic diagram, Figure 6 is a shading correction characteristic diagram, Figure 7 is a shading circuit system diagram, Figure 8 is its waveform diagram, and Figure 9. is a system diagram of the A/D converter, Figures 10 and 11 are diagrams for explaining its operation, Figures 12 and 13 are diagrams each showing an example of a color separation map, and Figure 14 is a diagram of the color code. The truth table, FIGS. 15 and 16 are illustrations of color ghosts, FIGS. 17 and 18 are illustrations of color ghost occurrence, respectively, FIG. 19 is a configuration diagram of the device for CCD installation, and FIG. The figure is a configuration diagram of the main parts, No. 21
The figure is a partial sectional view, FIG. 22 is an explanatory diagram of color ghost generation, FIGS. 23 and 24 are explanatory diagrams of color ghost correction, and FIG. 25 is a system diagram of color ghost correction means.
Figures 26 to 28 are diagrams for explaining line drawings and photographic images, Figures 29 and 30 are MTFs using color ghosts.
An explanatory diagram of deterioration, FIG. 31 is a system diagram of a convolution filter which is an example of MTF, FIG. 32 is a system diagram of a region extraction section, FIGS. 33 to 37 are waveform diagrams for explaining its operation, and FIG. The figure is a system diagram of the area extraction circuit, Figure 39 is a connection diagram of the color marker detection circuit, Figure 40 is a connection diagram of the area extraction section, Figure 41 is a waveform diagram for explaining the operation of area extraction, and Figure 42 is A system diagram of the area determination circuit, FIGS. 43 to 45 are explanatory diagrams of its operation, FIG. 46 is a diagram showing another example of area specification, FIG. 47 is a system diagram of the processing means, and FIGS. 48 and 49 Figure 50 shows an achromatic designation code and its processing contents, Figure 50 is an explanatory diagram of enlargement/reduction processing, Figure 51 is a system diagram showing a specific example of the enlargement/reduction circuit, and Figure 52 shows enlargement/reduction processing. Figure 53 is a diagram showing an example of interpolation data used when
55 and 56 are operation explanatory diagrams of enlargement/reduction processing, FIG. 57 is a system diagram of the data selection signal writing circuit, and FIG. 58
The figures are waveform diagrams of enlargement/reduction processing operations, Figs. 59 and 60.
The figures show numerical values of interpolation data used for enlargement/reduction processing, Fig. 61 is a system diagram of the synchronization circuit, Figs. 62 and 63 are waveform diagrams for explaining its operation, and Fig. 64 is Fig. 65 is a diagram showing the data input/output state of the human output buffer, Fig. 66 is an explanatory diagram of enlargement/reduction processing of the central reference, and Fig. 67 is when recording the central reference. Figure 68 is a waveform diagram to explain the processing operation at that time, Figure 69 is a waveform diagram to explain the operation during image enlargement processing, and Figure 70 is an image reduction diagram. A waveform diagram for explaining the operation during processing, Fig. 71 is a diagram showing another example of image reading and image recording, and Figs. 72 and 73 show the relationship between the write start address and preset data used at that time. 74 is a system diagram of the shading means, FIG. 75 is a diagram of its operation waveforms, FIG. 76 is a diagram showing an example of shading pattern data, and FIG. 77 is a diagram showing waveforms before and after shading. , No. 78
Figure 79 is a diagram of a density histogram, Figure 79 is a system diagram of the automatic threshold value determining means, Figure 80 is a diagram showing a specific example of a dither matrix, Figure 81 is a system diagram of a selector control circuit, and Figure 82 is a diagram showing a specific example of a dither matrix.
Figure 83 is a diagram showing the logic table, Figure 83 is a system diagram of the multi-value conversion circuit, Figure 84 is a diagram showing the threshold level, Figure 85 is a diagram showing the logic for multi-value conversion, and Figure 86 is a diagram showing the logic for multi-value conversion. FIG. 87 and FIG. 88 are waveform diagrams for explaining its operation, FIG. 89 is a diagram showing data allocation, FIG. 90 is a system diagram of the interface circuit, and FIG. 91 is a system diagram of the hollow processing circuit. A system diagram of the first interface, FIG. 92 is its operating waveform diagram, FIG. 93 is a system diagram of the output device, FIG. 94 is a configuration diagram of the laser beam scanner, FIG. 95 is an explanatory diagram of the developing process, and FIG. 96 is a system diagram of the first interface. Figure 97 is a configuration diagram of the second control unit, Figure 97 is a configuration diagram of the first control unit, Figure 98 is a waveform diagram for explaining its operation,
Figure 99 is a diagram showing the key layout of the operation/display section,
Figures 00 to 111 are explanatory diagrams of key operation processing, respectively.
FIG. 12 is a system diagram of a device for explaining the conventional technology. 1... Enlargement/reduction processing means 15A, 15B... Shading correction circuit 35...
Color discrimination circuit 40...Interface circuits 60A, 60B---A/D converter 70...Output device 300...Color ghost correction means 420...Processing means for extraction etc. 440...Shading means 450...Resolution correction means 4, 60...Inversion means 500...Area extraction means 600Δ...Multi-value conversion means 600B...Automatic threshold setting means 800...Attribute detection circuit patent applicant Nika Co., Ltd.・(・°n・20″ 舅3こHaruka(nm+ -m- Author 40 跋JC(nm) Figure 6 Figure 10 Figure 7 Figure 8 Figure 9 Figure 9 Danyi: ADC Chapter Figure 11 (Vin>A/D Flush-IL/30%L, 4j)
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Claims (5)

[Claims] (1) An image processing device having a function of enlarging/reducing image information, characterized in that the enlarging/reducing processing is performed using at least one of a control signal for image processing and image density information. Image processing device. (2) The image processing apparatus according to claim 1, wherein an area designation signal is used as the control signal. (3) The image processing apparatus according to claim 1, wherein an attribute designation signal is used as the control signal. (4) The image processing apparatus according to claim 1, wherein an area designation signal and an attribute designation signal are used as the control signals. (5) The image processing apparatus according to claim 1, 2 or 4, wherein the area designation signal is determined by a signal including color information.