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JPH01184857A - Integrated circuit chip case - Google Patents

Integrated circuit chip case

Info

Publication number
JPH01184857A
JPH01184857A JP518588A JP518588A JPH01184857A JP H01184857 A JPH01184857 A JP H01184857A JP 518588 A JP518588 A JP 518588A JP 518588 A JP518588 A JP 518588A JP H01184857 A JPH01184857 A JP H01184857A
Authority
JP
Japan
Prior art keywords
integrated circuit
circuit chip
hole
external input
output terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP518588A
Other languages
Japanese (ja)
Inventor
Yoshiaki Umezawa
梅沢 義明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP518588A priority Critical patent/JPH01184857A/en
Publication of JPH01184857A publication Critical patent/JPH01184857A/en
Pending legal-status Critical Current

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  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To improve the wiring accommodating capability, by pinching a signal wire from the outside, in the through hole of a substrate to mount integrated circuit chips, and electrically connecting the signal line and the integrated circuit chip. CONSTITUTION:The case base plate 1 of an integrated circuit chip case is provided with a through hole 2 at the position of an external input-output terminal 3, which is inserted into the through hole 2. In the through hole 2, a contact point 4 connected with an integrated circuit chip (not shown in the figure) by a connecting pattern is installed. The external input-output terminal 3 inserted in the through hole 2 is pinched by the contact point. The external input-output terminal 3 is provided with a protrusion 31, and prevented from being inserted more deeply than a specified depth by the protrusion 31.

Description

【発明の詳細な説明】 1皿欠工 本発明は集積回路チップケースに関し、特にビングリッ
ドアレイ方式の集積回路チップケースの補遺に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an integrated circuit chip case, and more particularly to a supplement for a bin grid array type integrated circuit chip case.

え嵐盈亘 従来、集積回路チップケースにおいては、第4図および
第5図に示すように、接続パターン11により図示せぬ
集積回路チップと接続された外部入出力端子10は集積
回路チップケース9に固定されていた。
Conventionally, in integrated circuit chip cases, as shown in FIGS. 4 and 5, external input/output terminals 10 connected to integrated circuit chips (not shown) through connection patterns 11 are connected to integrated circuit chip cases 9. was fixed.

近年、プリント配線基板に搭載される部品(集積回路チ
ップケース9内に搭載された集積回路チップ)の実装率
が増加の一途を辿り、それに伴ってプリント基板の配線
パターンのm細化や信号層数の増加の傾向が強くなって
いる。
In recent years, the mounting rate of components mounted on printed wiring boards (integrated circuit chips mounted inside the integrated circuit chip case 9) has been steadily increasing, and with this, the wiring patterns of printed circuit boards have become thinner and the signal layer has become thinner. There is a strong tendency for the number to increase.

従来、論理変更などにより配線変更が発生した場合には
、プリント配線基板のパターンを切断し、部品の端子に
布線することにより対処している。
Conventionally, when a change in wiring occurs due to a change in logic or the like, this is dealt with by cutting the pattern of the printed wiring board and wiring it to the terminals of the component.

しかしながら、部品の実装率の増加によりプリント配線
基板のパターンが微細になっており、隣接パターンとの
間隔が狭くなっているので、切断工事の場合には誤って
切断箇所以外の箇所を切断する恐れがあるという欠点が
ある。
However, due to an increase in the mounting rate of components, the patterns on printed wiring boards are becoming finer, and the spacing between adjacent patterns is becoming narrower, so there is a risk of accidentally cutting a part other than the part to be cut during cutting work. There is a drawback that there is.

また、信号層数が多い場合には内層パターンを直接切断
できず、表裏層に切断用のパターンを引出してからその
パターンと内層パターンとの配線を行うこととなるので
、配線収容性の低下を招くという欠点がある。
In addition, when there are many signal layers, it is not possible to cut the inner layer pattern directly, and it is necessary to draw out the cutting pattern on the front and back layers and then wire that pattern and the inner layer pattern, which reduces the wiring capacity. It has the disadvantage of being inviting.

一方、布線工事の場合にはプリント配線基板の裏側に突
起した部品の端子に線材を絡げてハンダ付けしているが
、一般的にプリント配線基板の裏側に突起している部分
は短いので、その部分へのハンダ付けには熟練を要し、
またハンダ付けに伴って隣接ビンあるいは隣接パターン
においてショート事故が発生する恐れがあるという欠点
がある。
On the other hand, in the case of wiring work, wires are tied around and soldered to the terminals of parts protruding from the back side of the printed wiring board, but generally the parts protruding from the back side of the printed wiring board are short. , soldering to that part requires skill.
Another disadvantage is that there is a risk that a short circuit may occur in adjacent bottles or patterns during soldering.

さらに、布線の変更工事が必要になった場合には線材の
取付けや取外しが重なることにより、プリント配線基板
や搭載部品の損傷を招き、ひいてはこれらプリント配線
基板や搭載部品が使用不能になるという欠点がある。
Furthermore, if it becomes necessary to change the wiring, the repeated installation and removal of wires may cause damage to the printed wiring board and mounted components, which in turn may render these printed wiring boards and mounted components unusable. There are drawbacks.

1五立亘追 本発明は上記のような従来の°ものの欠点を除去すべく
なされたもので、論理変更などによる切断工事および布
線工事をプリント配線基板の構造に左右されることなく
行うことができ、プリント配線基板や搭載部品に損傷を
与えることなく切断工事および布線工事を容易に、かつ
迅速に行うことができ、配線収容性を向上させることが
できる集積回路チップケースの提供を目的とする。
1. The present invention was made to eliminate the drawbacks of the conventional products as described above, and it is possible to perform cutting work and wiring work by changing the logic, etc., without being influenced by the structure of the printed wiring board. The purpose of the present invention is to provide an integrated circuit chip case that can easily and quickly perform cutting and wiring work without damaging printed wiring boards or mounted components, and that can improve wiring accommodation. shall be.

1匪ゑ璽丞 本発明による集積回路チップケースは、集積回路チップ
を搭載する搭載部材と、前記搭載部材に設けられた貫通
孔と、前記貫通孔の内部に設けられ、かつ外部から挿入
される信号線を挟持する挟持手段と、前記挟持手段と前
記集積回路チップとを電気的に接続する接続部材とを有
することを特徴とする。
An integrated circuit chip case according to the present invention includes a mounting member on which an integrated circuit chip is mounted, a through hole provided in the mounting member, and a through hole provided inside the through hole and inserted from the outside. It is characterized by comprising a clamping means for clamping a signal line, and a connecting member for electrically connecting the clamping means and the integrated circuit chip.

K旌j 次に、本発明の一実施例について図面を参照して説明す
る。
Next, an embodiment of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例の斜視図である0図において
、本発明の一実施例による集積回路チップケースのケー
ス基板1には、外部入出力端子位置に貫通孔2が設けら
れ、この貫通孔2に外部入出力端子3が差込まれている
FIG. 1 is a perspective view of an embodiment of the present invention. In FIG. 0, a case substrate 1 of an integrated circuit chip case according to an embodiment of the present invention is provided with through holes 2 at external input/output terminal positions. An external input/output terminal 3 is inserted into this through hole 2.

第2図は第1図の部分断面図である0図において、貫通
孔2内には、接続パターン5により図示せぬ集積回路チ
ップと接続された接点4が設けられており、この接点4
により貫通孔2に差込まれた外部入出力端子3が挟持さ
れるようになっている。
FIG. 2 is a partial sectional view of FIG. 1, and in FIG.
The external input/output terminal 3 inserted into the through hole 2 is held between the two.

外部入出力端子3には突起部31が設けられており、こ
の突起部31により外部入出力端子3は貫通孔2の所定
の深さまでしか差込むことができないようになっている
The external input/output terminal 3 is provided with a projection 31, and the projection 31 allows the external input/output terminal 3 to be inserted only to a predetermined depth of the through hole 2.

第3図は本発明の一実施例における切断工事および布線
工事を示す部分断面図である。これら第1図〜第3図を
用いて本発明の一実施例における切断工事および布線工
事について説明する。
FIG. 3 is a partial sectional view showing cutting work and wiring work in one embodiment of the present invention. The cutting work and wiring work in one embodiment of the present invention will be explained using these FIGS. 1 to 3.

プリント配線基板6にハンダ7によって固定された外部
入出力端子3−1が貫通孔2−1に差込まれて接点4−
1によって挟持されているケース1基板において[第3
図(a)参照]、論理変更などにより接続パターン5−
1の切断工事および布線工事を行い、接続パターン5−
2によりプリント配線基板6と電気的に接続する場合に
は、まず、貫通孔2−1から外部入出力端子3−1を抜
取る。
External input/output terminal 3-1 fixed to printed wiring board 6 with solder 7 is inserted into through hole 2-1 and contacts 4-
In the case 1 board held by the
See figure (a)], connection pattern 5- due to logic changes, etc.
Perform the cutting work and wiring work in 1, and connect pattern 5-
2, when electrically connecting to the printed wiring board 6, the external input/output terminal 3-1 is first extracted from the through hole 2-1.

外部入出力端子3−1を貫通孔2−1から抜取った後に
、その外部入出力端子3−1を切断し、プリント配線基
板6に外部入出力端子3−2をハンダ7により固定する
After extracting the external input/output terminal 3-1 from the through hole 2-1, the external input/output terminal 3-1 is cut, and the external input/output terminal 3-2 is fixed to the printed wiring board 6 with solder 7.

外部入出力端子3−2がプリント配線基板6に固定され
ると、外部入出力端子3−2をケース基板1の貫通孔2
−2に差込んで接続パターン4−2に電気的に接続する
When the external input/output terminal 3-2 is fixed to the printed wiring board 6, the external input/output terminal 3-2 is connected to the through hole 2 of the case board 1.
-2 and electrically connect to the connection pattern 4-2.

このとき、外部入出力端子3−1が抜取られた貫通孔2
−1に線材8を差込んで配線を行うことにより接続パタ
ーン5−1の切断工事および布線工事が完了し、接続パ
ターン5−2によりプリント配線基板6と電気的に接続
する作業が完了する[第3図(b)参照]。
At this time, the through hole 2 from which the external input/output terminal 3-1 was removed
By inserting the wire rod 8 into -1 and wiring, the cutting work and wiring work of connection pattern 5-1 are completed, and the work of electrically connecting with printed wiring board 6 through connection pattern 5-2 is completed. [See Figure 3(b)].

このように、集積回路チップケースのケース基板1の外
部入出力端子位置に、接続パターン5により集積回路チ
ップに接続された接点4を有する貫通孔2を設け、この
貫通孔2において外部入出力端子3や線材8の脱着を自
在とすることにより、論理変更などによる切断工事や布
線工事をプリント配線基板6の構造に左右されることな
く行うことができる。
In this way, the through hole 2 having the contact 4 connected to the integrated circuit chip by the connection pattern 5 is provided at the external input/output terminal position of the case substrate 1 of the integrated circuit chip case, and the external input/output terminal is provided in the through hole 2. By making it possible to freely attach and detach the wires 3 and 8, cutting work and wiring work due to logic changes etc. can be performed without being influenced by the structure of the printed wiring board 6.

また、パターンが微細になった所や隣接パターンとの間
隔が狭くなっている所において切断工事を行わなくても
よく、布線工事において線材の取付けや取外しが重なっ
てもハンダ付けの必要がなくなるので、プリント配線基
板6や図示せぬ搭載部品に損傷を与えることなく切断工
事および布線工事を容易に、かつ迅速に行うことができ
る。
In addition, there is no need to perform cutting work where the pattern is fine or where the distance between adjacent patterns is narrow, and there is no need for soldering even when wires are attached and removed at the same time during wiring work. Therefore, cutting work and wiring work can be performed easily and quickly without damaging the printed wiring board 6 or mounted components (not shown).

さらに、信号層数が多い場合の内層パターンの切断工事
において、表裏層に切断用のパターンを引出す必要がな
くなるので、配線収容性を向上させることができる。
Furthermore, in cutting work for inner layer patterns when the number of signal layers is large, there is no need to draw out cutting patterns on the front and back layers, so wiring accommodation can be improved.

尚、本発明の一実施例では集積回路チップを搭載するケ
ース基板1に貫通孔2を設けるようにしたが、内部に集
積回路チップを搭載し、上蓋を有する搭載部材において
も本発明の一実施例と同様に貫通孔を設けることによっ
て同様の効果を得られることは明白であり、この搭載部
材を種々に変形することは勿論可能である。
In one embodiment of the present invention, the through hole 2 is provided in the case substrate 1 on which an integrated circuit chip is mounted, but the present invention may also be implemented in a mounting member having an integrated circuit chip mounted therein and having a top cover. It is clear that similar effects can be obtained by providing through holes as in the example, and it is of course possible to modify this mounting member in various ways.

また、本発明の一実施例においてはビングリッドアレイ
方式の集積回路チップケースについて述べたが、他の集
積回路チップケースにも適用できることは明白である。
Further, in one embodiment of the present invention, a bin grid array type integrated circuit chip case has been described, but it is obvious that the present invention can be applied to other integrated circuit chip cases.

発明の詳細 な説明したように本発明によれば、集積回路チップを搭
載する基板に設けられた貫通孔とミこの貫通孔の内部に
おいて外部からの信号線を挾持するとともに、その外部
からの信号線と集積回路チップとを電気的に接続するよ
うにすることによって、論理変更などによる切断工事お
よび布線工事をプリント配線基板の構造に左右されるこ
となく行うことができ、プリント配線基板や搭載部品に
損傷を与えることなく切断工事および布線工事を容易に
、かつ迅速に行うことができ、配線収容性を向上させる
ことができるという効果がある。
DETAILED DESCRIPTION OF THE INVENTION According to the present invention, a signal line from the outside is sandwiched between the through hole provided in the substrate on which the integrated circuit chip is mounted and the through hole of the hole, and the signal line from the outside is By electrically connecting wires and integrated circuit chips, cutting work and wiring work due to logic changes etc. can be performed without being affected by the structure of the printed wiring board. This has the effect that cutting work and wiring work can be performed easily and quickly without damaging components, and that wiring accommodation can be improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の斜視図、第2図は第1図の
部分断面図、第3図は本発明の一実施例における切断工
事および布線工事を示す部分断面図、第4図は従来例の
斜視図、第5図は第4図の部分断面図である。 主要部分の符号の説明 1・・・・・・集積回路チップケース のケース基板 3.3−1.3−2・・・・・・貫通孔4.4−1.4
−2・・・・・・接点
FIG. 1 is a perspective view of an embodiment of the present invention, FIG. 2 is a partial sectional view of FIG. 1, FIG. 3 is a partial sectional view showing cutting work and wiring work in an embodiment of the present invention, and FIG. 4 is a perspective view of a conventional example, and FIG. 5 is a partial sectional view of FIG. 4. Explanation of symbols of main parts 1...Case board of integrated circuit chip case 3.3-1.3-2...Through hole 4.4-1.4
-2...Contact

Claims (1)

【特許請求の範囲】[Claims] (1)集積回路チップを搭載する搭載部材と、前記搭載
部材に設けられた貫通孔と、前記貫通孔の内部に設けら
れ、かつ外部から挿入される信号線を挟持する挾持手段
と、前記挾持手段と前記集積回路チップとを電気的に接
続する接続部材とを有することを特徴とする集積回路チ
ップケース。
(1) A mounting member on which an integrated circuit chip is mounted, a through hole provided in the mounting member, a clamping means provided inside the through hole and clamping a signal line inserted from the outside, and the clamping member An integrated circuit chip case comprising a connecting member for electrically connecting means and the integrated circuit chip.
JP518588A 1988-01-13 1988-01-13 Integrated circuit chip case Pending JPH01184857A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP518588A JPH01184857A (en) 1988-01-13 1988-01-13 Integrated circuit chip case

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP518588A JPH01184857A (en) 1988-01-13 1988-01-13 Integrated circuit chip case

Publications (1)

Publication Number Publication Date
JPH01184857A true JPH01184857A (en) 1989-07-24

Family

ID=11604170

Family Applications (1)

Application Number Title Priority Date Filing Date
JP518588A Pending JPH01184857A (en) 1988-01-13 1988-01-13 Integrated circuit chip case

Country Status (1)

Country Link
JP (1) JPH01184857A (en)

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