JPH01183858A - Semiconductor device - Google Patents

Abstract

PURPOSE:To increase breakdown strength between a gate and a drain and breakdown strength between the gate and a source and reduce leakage currents, and to lower source resistance, by making the thickness of a contact forming layer have a specific value or above while forming a source metallic electrode and a drain metallic electrode in regions where parts of the contact formation layer are removed through etching. CONSTITUTION:The thickness 10 of a contact forming layer 5 is brought to 0.3mum or more while a source metallic electrode 8 and a drain metallic electrode 9 are formed into regions shaped by getting rid of part of the thickness 10 of the contact forming layer 5 through etching. Consequently, since the contact forming layer 5 is thickened as 0.3mum, the quantity of side etching is increased when a gate recess region 6 is shaped, and the contact forming layer 5 in high concentration is not brought near to a gate electrode 7 even when the gate electrode 7 is formed subsequently. Accordingly, breakdown strength is improved largely, and leakage currents are reduced. Distances among a two-dimensional electron layer and an active layer and these metallic electrodes are not changed, and source resistance is not increased, and, on the contrary, lowered only by the thickening section of the contact forming layer 5.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is directed to increasing the breakdown voltage of high electron mobility transistors and field effect transistors using a semi-insulating GaAs substrate on which an epitaxial layer is deposited.

Conventional technology High electron mobility transistors and field effect transistors using a semi-insulating GaAs substrate with an epitaxial layer deposited show high gain and low noise even at high frequencies of around 10 GH2, and are used as main elements in satellite communications, etc. It is used as. In general, one noise value of high electron mobility transistors and field effect transistors varies depending on parameters such as gate resistance and transconductance, but another important parameter is the leakage current between the gate and source and the gate and drain current. It also varies greatly depending on the value of the leakage current between the two. In order to reduce these leakage currents, it is necessary to improve the breakdown voltage between the gate and source and the breakdown voltage between the gate and drain of high electron mobility transistors and field effect transistors.

In particular, in high electron mobility transistors and field effect transistors using semi-insulating GaAs substrates with epitaxial layers deposited on them, good ohmic contact between the source metal electrode and drain metal electrode and the two-dimensional electronic layer or active layer is required. In order to obtain this, a contact formation layer made of N0 type GaAs or the like is formed on the top of the substrate, and this contact formation layer is recessed and etched only in the vicinity of the gate metal electrode to form the gate metal electrode. The distance between the contact formation layer, which is an N0-type GaAs layer in the drain region, and the gate metal electrode is short, which causes a decrease in breakdown voltage.

FIG. 2 is a cross-sectional structural diagram of a high electron mobility transistor formed on a conventional semi-insulating GaAs substrate and using a selectively doped heterojunction. In FIG. 2, a GaAs buffer layer 2, an S1-doped N-type A I
C; a As N 3, N-type AIG a As
N 4 and an N medium-sized GaAs layer 5 are successively deposited as a contact forming layer. The gate electrode 7 of the high electron mobility transistor is formed at the bottom of the gate recess region 6 after etching it. N medium-sized GaAs layer 5 divided into two by gate recess region 6
A source electrode 8 and a drain electrode 9 are added to the surface of each of the electrodes, and are used as electrodes for leading to the outside.

As shown in FIG. 2, the N0 type CaAs layer 5 is made of gate TiF.
j! Since it extends to the vicinity of 'z, the source resistance and drain resistance become small, which works to lower the transistor noise value. Also, the breakdown voltage between the gate and the source is very low, around -1 volt, and the leakage current increases, and this leakage current conversely increases the noise value. This breakdown voltage between the gate and drain and the breakdown voltage between the gate and source are determined simply by the distance between the gate and drain and the distance between the gate and source, and in order to increase the breakdown voltage and significantly reduce leakage current, these It is necessary to keep the distance between

For example, in order to ensure the breakdown voltage between the gate and the drain and the breakdown voltage between the gate and the source at -10V or more, it is necessary to keep the distance between the gate electrode and the N medium-sized GaAs layer 5 at least 0.3 μm, which cannot be achieved with the conventional structure. Ta.

Problems to be Solved by the Invention The N medium size G of the N medium size GaAs layer 5 as a contact formation layer of the conventional high electron mobility transistor shown in FIG.
a A s layer thickness 10 is 0.1 pm to 0.15 μm
Since the gate recess region 6 is thin, the lateral spread of the gate recess region 6 formed by cutting into this region, that is, the gate-drain distance 11, is very short, for example, 0.0 mm by the thickness of the N0 type GaAs layer 10. It is only about 0.15 μm from I Bya. Therefore, the distance between the gate and drain and the distance between the gate and source are close, and the breakdown voltage between the gate and drain and the breakdown voltage between the gate and source are very low, around -1 volt, which increases the leakage current and conversely increases the noise value. was.

The present invention has been made in view of the above, and an object thereof is to provide a semiconductor device with high gate-to-drain breakdown voltage and gate-to-source breakdown voltage, low leakage current, small source resistance, etc., and low noise value. The purpose is

Means for Solving the Problems In order to solve the above problems, the present invention provides a high electron mobility transistor using a heterojunction selectively doped by a method such as MBE. The thickness of the contact formation layer, which is located at a higher concentration than the two-dimensional electron layer, is set to 0.3 μm or more, and the source metal electrode and drain metal electrode are formed in a region where a part of the thickness of the contact formation layer is removed by etching. In addition, in a field effect transistor having an active layer continuously grown by epitaxial method and a contact formation layer having a higher impurity concentration than the active layer, the thickness of the contact formation layer located directly under the source metal electrode and drain metal electrode is set to 0.
．． The thickness is set to 3 μm or more, and the source metal electrode and drain metal electrode are formed in a region where a part of the thickness of the contact formation layer is removed by etching.

Effect The present invention has the above-described structure, so that the contact forming layer has a 0.
Because it is as thick as 3 μm, when a gate recess region is formed, the amount of lateral expansion, that is, the amount of side etching becomes large, and even if the gate electrode is formed afterwards, the highly concentrated contact formation layer does not approach the gate electrode, which reduces the breakdown voltage. is significantly improved and leakage current is reduced. By side etching, the gate electrode and contact formation layer, which is N medium-sized Ga, are removed.
Since the distance to AsFi is 0.31III+ or more,
The breakdown voltage between gate and drain and the breakdown voltage between gate and source are −
It can be 1OV or more. Furthermore, since the source and drain electrodes are formed after etching away a portion of the thickness of the contact formation layer, the distance between the two-dimensional electronic layer and active layer and these metal electrodes remains unchanged, and the source resistance does not increase. It decreases by the amount that the contact forming layer becomes thicker. Therefore, high breakdown voltage and low resistance can be achieved at the same time.

Embodiment FIG. 1 is a cross-sectional structural diagram of an embodiment of a semiconductor device of the present invention. The semiconductor device of the present invention shown in FIG. 1 is a high electron mobility transistor formed on a semi-insulating GaAs substrate and using a heterojunction selectively doped by a method such as MBE, Components equivalent to those in FIG. 2 shall be indicated with the same numbers or symbols.

In FIG. 1, N+ type Ga as a contact formation layer is shown.
AsFj' thickness 10 is 0.37 Lm, which is about twice or three times the thickness of the conventional one. Therefore, even if the gate recess region 6 is formed using the same width of the recess etching window as in the conventional method, the lateral spread, that is, the amount of side etching is large, and even if the gate electrode is formed in the gate recess region 6, a high concentration N medium-sized GaAS layer is formed. 5 does not come close to the gate electrode, the gate-drain distance 11 is widened, the withstand voltage is greatly improved, and the leakage current is reduced. N+ type G, which is the gate electrode and contact formation layer, is formed by side etching.
Since the distance to the aAs layer 5 is 0.3 μm or more, the breakdown voltage between the gate and the drain and the breakdown voltage between the gate and the source are -10
It can be set to V or more. Furthermore, the source electrode 8 and the drain electrode 9 are formed by etching a part of the thickness of the N0 type GaAs layer 5 to form a source recess region 12 and a drain recess region 13, and then inserting them into the substrate, so that they are two-dimensional. The distance between the electronic layer and active layer and these metal electrodes remains the same, and the source resistance does not increase, but rather the N medium-sized GaA
It decreases by the amount that s Jij 5 becomes thicker. Therefore, it is possible to achieve high breakdown voltage and low resistance at the same time.

The embodiment of the semiconductor device of the present invention shown in FIG. 1 is a high electron mobility transistor using a selectively doped heterojunction. Even in field-effect transistors that have an active layer that is continuously grown by an epitaxial method and a contact formation layer that has a higher impurity concentration than the active layer, the only difference is in the structure of the substrate located below the N0 type GaAs layer that serves as the contact formation layer. , the functions of the N0-type GaAs layers are the same. Therefore, even if the present invention is applied to a field-effect transistor that has an active layer that is continuously grown on a semi-insulating GaAs substrate by a normal epitaxial method rather than an MBE method, and a contact formation layer that has a higher impurity concentration than the active layer, the same result will be obtained. Needless to say, it is effective.

Effects of the Invention As described above, the present invention brings about the following effects.

l) By setting the thickness of the N+ type GaAs layer as a contact formation layer to 0.37 tm or more, when a gate recess region is formed, the gate electrode and the N+ type GaA
The lateral distance from the sFii is greatly expanded, which improves the breakdown voltage between the gate and the drain and the breakdown voltage between the gate and the source, and reduces leakage current.

2) The source and drain electrodes are N medium-sized GaAs
, a part of the thickness of p3 is removed by etching to form a source recess region and a drain recess region, which are then buried in the substrate, so the distance between the two-dimensional electronic layer or active layer and these metal electrodes remains unchanged, and the source resistance There is no increase in the source resistance, but rather the source resistance is reduced by the increase in thickness of the N0 type GaAs layer 5.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional structural diagram of a semiconductor device showing an embodiment of the present invention, and FIG. 2 is a cross-sectional structural diagram of a conventional semiconductor device. l... Semi-insulating GaAs substrate, 2... GaAs buffer layer, 3... S1-doped N-type AIGaAsF'
, 4--N type AI GaAs layer, 5... N0 type GaAs layer, 6... gate recess region, 7... gate electrode, 8... source electrode, 9... layer/drain Electrode, lO fist...N medium Ga As layer thickness, 11...
Gate-drain distance, 12...source recess region,
13...Drain recess area. Name of agent: Patent attorney Toshio Nakao (1 person) Figure 1 Figure 2

Claims (2)

[Claims] (1) In a high electron mobility transistor formed on a semi-insulating GaAs substrate and using a selectively doped heterojunction, the contact is located directly under the source metal electrode and drain metal electrode and has a higher concentration than the two-dimensional electron layer. A semiconductor device characterized in that the thickness of the forming layer is 0.3 μm or more, and the source metal electrode and the drain metal electrode are formed in a region where a portion of the contact forming layer is removed by etching. (2) In a field-effect transistor that has an active layer that is continuously grown on a semi-insulating GaAs substrate by an epitaxial method and a contact formation layer that has a higher impurity concentration than this active layer, the contact layer is located directly below the source metal electrode and the drain metal electrode. A semiconductor device characterized in that the thickness of the contact forming layer is 0.3 μm or more, and the source metal electrode and the drain metal electrode are formed in a region where a portion of the contact forming layer is removed by etching.