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JPH01173776A - Wiring board structure - Google Patents

Wiring board structure

Info

Publication number
JPH01173776A
JPH01173776A JP33193087A JP33193087A JPH01173776A JP H01173776 A JPH01173776 A JP H01173776A JP 33193087 A JP33193087 A JP 33193087A JP 33193087 A JP33193087 A JP 33193087A JP H01173776 A JPH01173776 A JP H01173776A
Authority
JP
Japan
Prior art keywords
wiring board
board structure
wiring boards
insulating adhesive
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP33193087A
Other languages
Japanese (ja)
Inventor
Itaru Okumura
奥村 至
Takeshi Meguro
目黒 赳
Minoru Fujisaku
藤作 実
Osamu Asai
修 浅井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP33193087A priority Critical patent/JPH01173776A/en
Publication of JPH01173776A publication Critical patent/JPH01173776A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/144Stacked arrangements of planar printed circuit boards

Landscapes

  • Combinations Of Printed Boards (AREA)

Abstract

PURPOSE:To microminiaturize an electronic apparatus and to form the apparatus into a extremely small thickness by a method wherein a plurality of wiring boards are adhered and connected to each other through insulating adhesive. CONSTITUTION:Electrical joints 7' of wiring boards 1a and 1b are an insulating adhesive material 2 having a moisture resistance and the boards are adhered and connected to each other through the insulating adhesive materials. By such a constitution, a wiring board structure, wherein the restriction of the height of a hybrid IC and the restriction of its mounting density are significantly improved, can be obtained.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、アルミナ基板等の上に、導電材料や抵抗材料
を印刷、焼成してなる配線板を重ね合わせてなる配線板
構造体に関するものである。
[Detailed Description of the Invention] Industrial Application Field The present invention relates to a wiring board structure formed by laminating a wiring board made by printing and firing a conductive material or a resistive material on an alumina substrate or the like. .

従来の技術 近年、電子機器の軽薄短小化や高機能化に対する要望は
益々増大しており、それにともなってこれら電子機器の
回路をいかに高密度化して信頼性を高めていくかが極め
て重要な課題となってきている。
Conventional technology In recent years, the demand for smaller, lighter, thinner, and more sophisticated electronic devices has been increasing, and with this, the issue of how to increase the density and reliability of the circuits in these electronic devices has become an extremely important issue. It is becoming.

このような中にあって昨今電子回路の高密度化な高信頼
化をはかる為様々な実装技術の検討がなされているが、
とりわけ従来から一般的に行われている実装方法として
は、対象とする電子回路ブロックを構成する回路素子を
集積化することによって回路ブロック体を作成し、この
回路ブロック体をマザー印刷配線板に実装して電子回路
を構成する方法がある。
Under these circumstances, various mounting technologies have recently been studied in order to increase the density and reliability of electronic circuits.
In particular, a conventional mounting method that has been commonly used is to create a circuit block by integrating the circuit elements that make up the target electronic circuit block, and then mount this circuit block on a mother printed wiring board. There is a method of constructing an electronic circuit.

この様な機能ブロック化思想を採り入れた装置では、電
子回路の小型、高密度化はもとより高信頼性化に対して
優れた効果が得られる為、多くの電子機器に採用されて
いる。
Devices adopting such a concept of functional blocks have been adopted in many electronic devices because they have excellent effects in reducing the size and density of electronic circuits as well as increasing reliability.

以下、図面を参照しながら、従来の実装方法の一例とし
てアルミナ基板等を用いたハイブリッドICについて説
明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A hybrid IC using an alumina substrate or the like will be described below as an example of a conventional mounting method with reference to the drawings.

このアルミナ基板を用いたハイブリッドICの配線基板
は、通常、銀パラジウム等の導電材料を印刷、焼成する
ことにより、そのスルーホールを含めた配線導体を形成
している。次に抵抗体材料を印刷、焼成して抵抗体を成
し、更に保護膜としてガラスの印刷、焼成を行う。そし
てレーザートリミング等により、抵抗体の抵抗値調整を
実施した後、電子部品を装着し、更に端子を接続して完
成品となる。第4図イ9口は、夫々完成されたハイブリ
ッドICを示すもので、イは縦型実装タイプ、口は伏型
実装タイプを示すものである。図中ld、leは配線基
板、3b、3cは端子、4は電子部品を示す。
In a hybrid IC wiring board using this alumina substrate, wiring conductors including through holes are usually formed by printing and firing a conductive material such as silver palladium. Next, a resistor material is printed and fired to form a resistor, and glass is further printed and fired as a protective film. After adjusting the resistance value of the resistor by laser trimming or the like, electronic components are attached and terminals are connected to complete the product. Figure 4 (a) shows the completed hybrid ICs, with a (a) showing a vertical mounting type and an (a) a vertical mounting type. In the figure, ld and le are wiring boards, 3b and 3c are terminals, and 4 is an electronic component.

発明が解決しようとする問題点 ところが、上述したハイブリッドICは機能ブロック化
思想に合致してものとして、近年ひろく採用されてはい
るが、昨今の超小型化成るいは超薄型化の要望が強い電
子機器分野においては、モジュールの小型化という面で
未だ不十分である。
Problems to be Solved by the InventionHowever, although the above-mentioned hybrid ICs have been widely adopted in recent years as they meet the concept of functional blocks, there is a strong demand for ultra-miniaturization or ultra-thinness these days. In the field of electronic equipment, miniaturization of modules is still insufficient.

つまり第4図イにおいては、マザー基板についての面密
度は向上するが、その高さ方向において制約を受けるも
のについては、不向きであるし、同図口においては、そ
の実装密度の点で不十分であるという欠点を有している
In other words, although the areal density of the motherboard improves in Figure 4A, it is not suitable for devices that are constrained in the height direction, and in Figure 4A, the mounting density is insufficient. It has the disadvantage of being

本発明は上記問題点に鑑み、超薄型化、超高密度化を可
能ならしめる電子回路形態(配線板構造体)を提供する
ものである。
In view of the above-mentioned problems, the present invention provides an electronic circuit form (wiring board structure) that enables ultra-thinness and ultra-high density.

問題点を解決する為の手段 上記問題点を解決する為に本発明の配線板構造体は、複
数の配線板相互を、耐湿性を有する絶縁接着材を介して
密着接続するようにしたものである。
Means for Solving the Problems In order to solve the above problems, the wiring board structure of the present invention is such that a plurality of wiring boards are tightly connected to each other through an insulating adhesive having moisture resistance. be.

作   用 本発明は、上記した構成とすることによって、電子機器
の超小型化、超薄型化を可能ならしめる電子回路形態を
得る配線板構造体を提供できることとなる。
Effects The present invention can provide a wiring board structure that obtains an electronic circuit form that enables ultra-miniaturization and ultra-thinness of electronic equipment by having the above-described configuration.

実施例 以下本発明の実施例を図面を参照しながら説明する。第
1図は本発明の配線板構造体の一実施例であるところの
要部斜視図であり、1a、1bは配線基板、2は配線基
板相互間に設けた耐湿性を有する絶縁接着材(接着材シ
ート)、7゛は配線基板相互酸るいは、他の印刷配線基
板との電気的結合する為の結合部である。第3図は本発
明の一実施例を説明する為の配線基板の要部パターン図
である。図中7はスルーホールであり、同図8に示す分
断線で後に基板分割されて、第1図の如く電気的結合部
7゛を形成できることとなる。第1図の5は印刷により
形成した抵抗体を示すものであり、同図6は前記抵抗体
5の抵抗トリミング及びチエツクをする為のチエツクラ
ンドを示すものである。第3図の如き、印刷抵抗体を含
む導体配線が形成された配線基板は、電子部品を搭載後
、第1図の如く絶縁接着材を介在させて複数枚を爪 ・
ね合わせ、更に第2図に示すように外部接続する為の端
子3aを取付けて配線板構造体として完成する。尚、配
線基板間に介在させた接着材シート2は、端子3aの取
付の際のフロー熱により溶けて、配線基板相互を密着接
続できることとなる。
EXAMPLES Hereinafter, examples of the present invention will be described with reference to the drawings. FIG. 1 is a perspective view of the main parts of an embodiment of the wiring board structure of the present invention, in which 1a and 1b are wiring boards, and 2 is a moisture-resistant insulating adhesive provided between the wiring boards. (adhesive sheet), 7' is a connecting portion for electrically connecting the wiring boards to each other or to other printed wiring boards. FIG. 3 is a pattern diagram of a main part of a wiring board for explaining one embodiment of the present invention. Reference numeral 7 in the figure represents a through hole, which allows the substrate to be divided later along the dividing line shown in FIG. 8 to form an electrical connection portion 7' as shown in FIG. Reference numeral 5 in FIG. 1 shows a resistor formed by printing, and FIG. 6 shows a check land for trimming and checking the resistance of the resistor 5. As shown in Figure 3, after mounting electronic components on a wiring board on which conductor wiring including printed resistors is formed, multiple pieces are glued together with an insulating adhesive interposed as shown in Figure 1.
Then, as shown in FIG. 2, terminals 3a for external connection are attached to complete the wiring board structure. Note that the adhesive sheet 2 interposed between the wiring boards is melted by the flow heat when the terminals 3a are attached, so that the wiring boards can be closely connected to each other.

ここでは、介在させる接着材をシート状のものを例にと
って説明したが、この接着材をシート状のものを片側の
配線基板に塗布することでも良いことは言うまでもない
。これら接着材層を介在させることで、配線基板相互の
重ね合わせ面の吸湿と易いという欠点を克服して、耐湿
性、即ち耐マイグレーション性を改善することができる
こととなる。
Here, explanation has been given by taking as an example a sheet-like adhesive material to be interposed, but it goes without saying that a sheet-like adhesive material may also be applied to one side of the wiring board. By interposing these adhesive layers, it is possible to overcome the drawback that the overlapping surfaces of the wiring boards tend to absorb moisture, and improve the moisture resistance, that is, the migration resistance.

発明の効果 以上の説明から明らかなように本発明は、従来の欠点で
あったハイブリッドICの高さ制約や実装密度の制約を
大幅に改善できる配線板構造体を提供できるという点で
、極めて有用であるといえる。
Effects of the Invention As is clear from the above explanation, the present invention is extremely useful in that it can provide a wiring board structure that can significantly improve the height restrictions and packaging density restrictions of hybrid ICs, which were conventional drawbacks. You can say that.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の配線板構造体の一実施例を示す要部斜
視図、第2図は本発明の一実施例を示す要部断面図、第
3図は本発明の一実施例を説明する為の配線基板の要部
パターン図、第4図イ2口は従来のハイブリッドICの
要部断面図である。 1a〜1e・・・・・・配線基板、2・・・・・・接着
材シート、3a〜3c・・・・・・端子、4・・・・・
・電子部品、5・・・・・・印刷抵抗、6・・・・・・
チエツクランド。 代理人の氏名 弁理士 中尾敏男 ほか1名第1図 IcL、  Ie−−−−m已!、!じ[第4図   
 、36.3C−繻子 〆) (tヱノ
FIG. 1 is a perspective view of a main part showing an embodiment of the wiring board structure of the present invention, FIG. 2 is a sectional view of a main part showing an embodiment of the invention, and FIG. A pattern diagram of a main part of a wiring board for explanation, and FIG. 4A is a sectional view of a main part of a conventional hybrid IC. 1a to 1e...Wiring board, 2...Adhesive sheet, 3a to 3c...Terminal, 4...
・Electronic components, 5...Printed resistors, 6...
Checkland. Name of agent: Patent attorney Toshio Nakao and one other person Figure 1 IcL, Ie----m已! ,! [Figure 4
, 36.3C-satin finish) (teno

Claims (1)

【特許請求の範囲】[Claims] 導体材塗布型印刷配線板を複数枚重ね合わせ接続してな
る配線板構造体であって、前記導電体材塗布型印刷配線
板相互の重ね合わせ面が略平滑面で、該重ね合わせ面の
略全面に耐湿性を有する絶縁接着材を介して密着接続し
てなることを特徴とする配線板構造体。
A wiring board structure formed by stacking and connecting a plurality of printed wiring boards coated with a conductive material, wherein the overlapping surfaces of the printed wiring boards coated with a conductive material are substantially smooth surfaces, and the overlapping surface has a substantially smooth surface. A wiring board structure characterized in that the entire surface is closely connected via a moisture-resistant insulating adhesive.
JP33193087A 1987-12-28 1987-12-28 Wiring board structure Pending JPH01173776A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33193087A JPH01173776A (en) 1987-12-28 1987-12-28 Wiring board structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33193087A JPH01173776A (en) 1987-12-28 1987-12-28 Wiring board structure

Publications (1)

Publication Number Publication Date
JPH01173776A true JPH01173776A (en) 1989-07-10

Family

ID=18249227

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33193087A Pending JPH01173776A (en) 1987-12-28 1987-12-28 Wiring board structure

Country Status (1)

Country Link
JP (1) JPH01173776A (en)

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