JPH01169932A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH01169932A JPH01169932A JP32855687A JP32855687A JPH01169932A JP H01169932 A JPH01169932 A JP H01169932A JP 32855687 A JP32855687 A JP 32855687A JP 32855687 A JP32855687 A JP 32855687A JP H01169932 A JPH01169932 A JP H01169932A
- Authority
- JP
- Japan
- Prior art keywords
- film
- nitride film
- lpcvd
- substrate
- nitride
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明はＭＩＳＦＥＴのゲート絶縁膜もしくは、ＤＲＡ
Ｍの容量絶縁膜として窒化膜を用いる半導体装置の製造
方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is applicable to gate insulating films of MISFETs or DRAs.
The present invention relates to a method of manufacturing a semiconductor device using a nitride film as a capacitive insulating film of M.
従来の技術
従来、ゲート絶縁膜やＤＲＡＭ容量絶縁膜には、熱酸化
膜や、熱窒化膜、酸化膜とｃｖｎ窒化膜の積層膜が用い
られている。しかし、酸化膜は薄膜化した場合や低抵抗
材料のゲートを用いる場合、絶縁耐圧が劣化する。また
、熱窒化膜は実用的膜厚を得るのに高温長時間の熱処理
、もしくはプラズマ中での処理が必要であり、これらは
、未だ実用レベルに至っていない。更に、熱酸化膜とＣ
ｖＤ窒化膜の積層膜は誘電率の小さい熱酸化膜を用いる
ため、高容量化、高Ｇｍ化にとって不利である。2. Description of the Related Art Conventionally, a thermal oxide film, a thermal nitride film, or a laminated film of an oxide film and a CVN nitride film has been used as a gate insulating film or a DRAM capacitor insulating film. However, when the oxide film is made thinner or when a gate made of a low resistance material is used, the dielectric breakdown voltage deteriorates. In addition, thermal nitride films require high-temperature, long-term heat treatment or treatment in plasma to obtain a practical film thickness, and these have not yet reached a practical level. Furthermore, thermal oxide film and C
Since the laminated film of the vD nitride film uses a thermal oxide film with a low dielectric constant, it is disadvantageous for increasing the capacity and increasing the Gm.
発明が解決しようとする問題点
以上のように、従来の絶縁膜は高Ｇｍ化、高容量化、高
耐圧化の点で充分とはいえない。また、Ｓｉ基板に直接
ＳｉＮをデボした場合、Ｓｉ−絶縁膜界面に多量の界面
準位が発生し、デバイスとしての使用に適さなかった。Problems to be Solved by the Invention As described above, conventional insulating films are not sufficient in terms of high Gm, high capacitance, and high breakdown voltage. Further, when SiN was directly deposited on the Si substrate, a large amount of interface states were generated at the Si-insulating film interface, making it unsuitable for use as a device.
そこで本発明は、ＭＯＳＦＥＴのゲート絶縁膜もしくは
ＤＲＡＭ用容量絶縁膜にＳｉ窒化膜を用いる場合の、従
来方法における問題点、即ち、熱窒化での膜厚限界、Ｌ
ＰＧＶＤ、ＳｉＮでの界面準位の問題を解決するもので
ある。Therefore, the present invention addresses the problems in conventional methods when using a Si nitride film for the gate insulating film of MOSFET or the capacitive insulating film for DRAM, namely, the film thickness limit in thermal nitridation,
This solves the problem of interface states in PGVD and SiN.
問題点を解決するだめの手段
本発明は、Ｓｉ基板を、０．６〜Ｓｎｍ熱窒化し、その
上にＬＰＣＶＤでＳｉＮを、堆積して５ｎｍ〜５０ｎｍ
の膜厚にしたものをアンモニア雰囲気で熱処理するもの
である。Means to Solve the Problem The present invention thermally nitrides a Si substrate to a thickness of 0.6 to 50 nm, and deposits SiN on it by LPCVD to a thickness of 5 to 50 nm.
The film thickness is then heat treated in an ammonia atmosphere.
作用
Ｓｉ基板を熱窒化して得られる窒化膜は、Ｓｉ−窒化膜
界面に界面準位が少ない。又、ＬＰＣＶＤ窒化膜は、膜
厚制御が容易である。ＬＰＣｖＩ）窒化膜は、Ｓｉ
Ｖｉｃｈであり、これは膜中のトラックを増やしている
。アンモニアガス中で熱処理すれば、Ｓｉ Ｖｉｃｈの
ＳｉＮに窒素が入り、トラップを減少させる。以上を組
みあわせて、界面特性に優れ、膜中トラップの少ない、
Ｓｉ−窒化膜構造が得られる。A nitride film obtained by thermally nitriding a working Si substrate has few interface states at the Si-nitride film interface. Furthermore, the thickness of the LPCVD nitride film can be easily controlled. LPCvI) nitride film is Si
Vich, which increases the number of tracks in the membrane. When heat treated in ammonia gas, nitrogen enters the SiN of the Si Vich, reducing traps. By combining the above features, it has excellent interfacial properties and fewer traps in the film.
A Si-nitride film structure is obtained.
実施例
以下第１図の製造工程断面図を用いて、具体的に説明す
る。Ｓｉ基板１を熱窒化して０６６〜６ｎｍの熱窒化膜
２を成長させる（第１図ａ）。この熱窒化膜２とＳｉ基
板１との界面は界面準位の少ない良好なものがえられる
。EXAMPLE A detailed explanation will be given below using the manufacturing process cross-sectional diagram of FIG. 1. The Si substrate 1 is thermally nitrided to grow a thermal nitride film 2 of 066 to 6 nm (FIG. 1a). A good interface between the thermal nitride film 2 and the Si substrate 1 can be obtained with few interface states.
次に、熱窒化膜２の上に、ＬｐｃｖｎでＬｐｃｖｎ膜３
を堆積する（第１図ｂ）。Next, on the thermal nitride film 2, an Lpcvn film 3 is formed using Lpcvn.
(Fig. 1b).
このｌ、ＰＣＶＤ窒化膜３は、Ｓｉ、Ｎ４のストイキオ
メトリ−からずれて、Ｓｉリッチになるのが一般的で、
これが絶縁膜中に電子トラ、ノブを作る。Generally, this PCVD nitride film 3 deviates from the stoichiometry of Si and N4 and becomes Si-rich.
This creates electronic tabs and knobs in the insulating film.
そこでこのＬＰＧＶＤ窒化膜３をアンモニア雰囲気４で
熱処理して改質すると、窒素が入って膜中トラップの少
ないＬＰＧＶＤ再窒化膜６が得られる。以上の処理で得
られる窒化膜を、ＭＯ８ＩＣＴのゲート絶縁膜、ＤＲＡ
Ｍの容量絶縁膜として用いる。Therefore, when this LPGVD nitride film 3 is modified by heat treatment in an ammonia atmosphere 4, an LPGVD re-nitride film 6 containing nitrogen and fewer traps in the film can be obtained. The nitride film obtained through the above process is used as the gate insulating film of MO8ICT and DRA.
Used as a capacitive insulating film for M.
発明の効果
本発明によれば、きわめて簡易な処理により、充分な膜
厚を持つ、Ｓｉとの界面の界面準位の少ない、窒化膜が
得られ、半導体装置に用いられる絶縁膜の形成法として
、実用的にきわめて有用である。Effects of the Invention According to the present invention, a nitride film with a sufficient thickness and a small number of interface states at the interface with Si can be obtained by an extremely simple process, and can be used as a method for forming an insulating film used in semiconductor devices. , is extremely useful in practice.
第１図は、本発明の半導体装置の製造方法の工程断面図
である。
１・・・・・・Ｓｉ基板、２・・・・・・熱窒化膜、３
・・・・・・Ｌｐｃｖｎ窒化膜、４・・・・・・アンモ
ニア雰囲気、５・・・・・・Ｌｐｃｖｎ再窒化膜。FIG. 1 is a process cross-sectional view of a method for manufacturing a semiconductor device according to the present invention. 1... Si substrate, 2... Thermal nitride film, 3
... Lpcvn nitride film, 4 ... Ammonia atmosphere, 5 ... Lpcvn re-nitride film.
Claims (1)
、Ｓｉ窒化膜をデボする工程と、このＳｉ窒化膜をアン
モニア雰囲気中でアニールする工程を有することを特徴
とする半導体装置の製造方法。A method for manufacturing a semiconductor device, comprising the steps of thermally nitriding the surface of a Si substrate, depositing a Si nitride film on the surface by LPCVD, and annealing the Si nitride film in an ammonia atmosphere.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32855687A JPH01169932A (en) | 1987-12-24 | 1987-12-24 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32855687A JPH01169932A (en) | 1987-12-24 | 1987-12-24 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01169932A true JPH01169932A (en) | 1989-07-05 |
Family
ID=18211594
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP32855687A Pending JPH01169932A (en) | 1987-12-24 | 1987-12-24 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01169932A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5478765A (en) * | 1994-05-04 | 1995-12-26 | Regents Of The University Of Texas System | Method of making an ultra thin dielectric for electronic devices |
| US7619274B2 (en) | 2004-06-23 | 2009-11-17 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device and method of manufacturing the same |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4830789A (en) * | 1971-08-23 | 1973-04-23 | ||
| JPS55134937A (en) * | 1979-04-09 | 1980-10-21 | Hitachi Ltd | Preparation of semiconductor device |
-
1987
- 1987-12-24 JP JP32855687A patent/JPH01169932A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4830789A (en) * | 1971-08-23 | 1973-04-23 | ||
| JPS55134937A (en) * | 1979-04-09 | 1980-10-21 | Hitachi Ltd | Preparation of semiconductor device |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5478765A (en) * | 1994-05-04 | 1995-12-26 | Regents Of The University Of Texas System | Method of making an ultra thin dielectric for electronic devices |
| US7619274B2 (en) | 2004-06-23 | 2009-11-17 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device and method of manufacturing the same |
| US7985650B2 (en) | 2004-06-23 | 2011-07-26 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device and method of manufacturing the same |
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