JPH01156633U - - Google Patents
Info
- Publication number
- JPH01156633U JPH01156633U JP2304489U JP2304489U JPH01156633U JP H01156633 U JPH01156633 U JP H01156633U JP 2304489 U JP2304489 U JP 2304489U JP 2304489 U JP2304489 U JP 2304489U JP H01156633 U JPH01156633 U JP H01156633U
- Authority
- JP
- Japan
- Prior art keywords
- calculation
- circuit
- calculation result
- result
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 3
- 230000003247 decreasing effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 230000010354 integration Effects 0.000 description 1
Landscapes
- Complex Calculations (AREA)
- Manipulation Of Pulses (AREA)
Description
第１図は従来のデジタル積分回路の一例を表す
ブロツク図、第２図は第１図の回路の動作波形図
、第３図は本考案の一実施例のブロツク図、第４
図は第３図の回路の動作波形図である。
１６，４０…演算回路、１８，４２…比較回路
、３８…選択回路、４４…変化検出回路。
FIG. 1 is a block diagram showing an example of a conventional digital integration circuit, FIG. 2 is an operating waveform diagram of the circuit in FIG. 1, FIG. 3 is a block diagram of an embodiment of the present invention, and FIG.
The figure is an operational waveform diagram of the circuit of FIG. 3. 16, 40... Arithmetic circuit, 18, 42... Comparison circuit, 38... Selection circuit, 44... Change detection circuit.
Claims (1)
（上限終極値）または演算結果最小値（下限終極
値）に対応する符号の入力を受け、所定の積分演
算を行う演算回路、 該演算回路の出力および演算結果最大値と演算
結果最小値の間の任意のしきい値信号を受け両者
間の大小関係の識別を行う比較器、 該比較器の出力を受け該出力の変化および増加
・減少方向の検出を行う変化検出回路、 演算結果最大値および演算結果最小値に対応す
る符号の入力信号を受け、該変化検出回路の出力
信号にもとづいて選択を行い、該選択の結果を該
演算回路に供給する選択回路、を具備し、 該演算回路における演算の結果が該しきい値を
増加方向に通過するときは、該演算結果最大値が
演算結果として設定され、該しきい値を減少方向
で通過するときは該演算結果最小値が演算結果と
して設定され、該設定された演算結果の状態から
有意デジタル入力信号についての演算が再開され
るようになつている、 ことを特徴とするデジタル積分回路。[Claims for Utility Model Registration] An arithmetic circuit that receives a significant digital input signal and a sign corresponding to the maximum value of the calculation result (upper limit final value) or the minimum value of the calculation result (lower limit final value), and performs a predetermined integral calculation. , a comparator that receives an arbitrary threshold signal between the output of the arithmetic circuit and the maximum value of the arithmetic result and the minimum value of the arithmetic result, and identifies the magnitude relationship between the two; and a change detection circuit that detects an increase/decrease direction, which receives an input signal with a sign corresponding to the maximum value of the calculation result and the minimum value of the calculation result, makes a selection based on the output signal of the change detection circuit, and selects the result of the selection. a selection circuit that supplies the calculation circuit to the calculation circuit, and when the calculation result in the calculation circuit passes the threshold in an increasing direction, the maximum value of the calculation result is set as the calculation result, and the selection circuit supplies the calculation result to the calculation circuit. When passing through the value in a decreasing direction, the minimum value of the calculation result is set as the calculation result, and the calculation for the significant digital input signal is restarted from the set calculation result state. A digital integrator circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2304489U JPH01156633U (en) | 1989-03-02 | 1989-03-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2304489U JPH01156633U (en) | 1989-03-02 | 1989-03-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01156633U true JPH01156633U (en) | 1989-10-27 |
Family
ID=31241705
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2304489U Pending JPH01156633U (en) | 1989-03-02 | 1989-03-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01156633U (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5065163A (en) * | 1973-09-12 | 1975-06-02 | ||
| JPS50149259A (en) * | 1974-04-25 | 1975-11-29 | ||
| JPS524158A (en) * | 1975-06-24 | 1977-01-13 | Hitachi Ltd | Noise eliminator |
-
1989
- 1989-03-02 JP JP2304489U patent/JPH01156633U/ja active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5065163A (en) * | 1973-09-12 | 1975-06-02 | ||
| JPS50149259A (en) * | 1974-04-25 | 1975-11-29 | ||
| JPS524158A (en) * | 1975-06-24 | 1977-01-13 | Hitachi Ltd | Noise eliminator |
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