JPH0115005Y2 - - Google Patents
Info
- Publication number
- JPH0115005Y2 JPH0115005Y2 JP1979119894U JP11989479U JPH0115005Y2 JP H0115005 Y2 JPH0115005 Y2 JP H0115005Y2 JP 1979119894 U JP1979119894 U JP 1979119894U JP 11989479 U JP11989479 U JP 11989479U JP H0115005 Y2 JPH0115005 Y2 JP H0115005Y2
- Authority
- JP
- Japan
- Prior art keywords
- output
- rotation
- circuit
- speed
- capstan motor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Control Of Ac Motors In General (AREA)
Description
【考案の詳細な説明】
本考案は異なる記録モードのテープを所定の再
生モードで再生するキヤプスタンモータ制御回路
に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a capstan motor control circuit for reproducing tapes in different recording modes in a predetermined reproduction mode.
カセツト式ビデオテープレコーダは記録時間を
長ぜしめるため、再生画像の鮮明度を犠性にして
記録時のテープ速度を半減せしめて記録を為すこ
とがある。よつて再生モードを指定して斯る記録
テープを走行せしめる場合には、記録モードが変
更されている部分でテープの走行速度を変更する
必要がある。第1図は通常記録モードで記録した
テープと、2倍の長時間記録モードで記録したテ
ープを各々通常再生した場合と、倍速再生した場
合に於けるコントロール信号とキヤプスタンの回
転検出信号の周波数関係を例示するものであり、
同図より明らかな如く記録モードは、コントロー
ル信号と回転検出信号の周波数比によつて検出で
きることが解る。 In order to lengthen the recording time, cassette video tape recorders sometimes perform recording by cutting the tape speed by half at the expense of the clarity of the reproduced image. Therefore, when running such a recording tape by specifying a playback mode, it is necessary to change the running speed of the tape at the portion where the recording mode is changed. Figure 1 shows the frequency relationship between the control signal and the capstan rotation detection signal when a tape recorded in normal recording mode and a tape recorded in double long-time recording mode are played back normally and at double speed, respectively. This is an example of
As is clear from the figure, the recording mode can be detected by the frequency ratio of the control signal and the rotation detection signal.
そこで本考案は、上述の点に鑑し記録モードに
応じてテープの走行を変更し所定の再生モードで
再生を実現する新規なキヤプスタンモータ制御回
路を提案せんとするものである。 In view of the above-mentioned points, the present invention proposes a novel capstan motor control circuit that changes the running of the tape according to the recording mode and realizes playback in a predetermined playback mode.
以下本考案を図示せる一実施例に従い説明す
る。 The present invention will be described below with reference to an illustrative embodiment.
本実施例は、再生モードを設定することによつ
てコントロール信号と回転検出信号を第1図に図
示する関係に規定するキヤプスタンモータ制御回
路であり、第2図は本実施例の回路ブロツク図を
顕わす。図中図番1はキヤプスタンモータMの回
転に関連して回転検出信号aを導出する回転検出
手段、2は発振回路3の発振出力cによつて前記
回転検出信号aと再生コントロール信号bの周期
を各々回転検出信号周期計数回路2aと再生コン
トロール信号周期計数回路2bにて計数し、両計
数値の比が1:1(長時間記録テープ)か2:1
(通常記録テープ)かを計数値比判別回路2cに
て判別する周期比較回路(周期比較手段)、4は
該周期比較回路2が長時間記録テープであること
を判別する出力dが導出されたときセツトされ通
常記録テープであることを判別する出力eが導出
されたときリセツトせしめられるフリツプフロツ
プ、5はモード選択信号g,hと前記フリツプフ
ロツプ出力f,を入力としキヤプスタンモータ
の速度を3種類に変更せしめる回転速度指定出力
v1,v2,v3を導出する論理回路(論理手段)、6
は該回転速度指定出力v1,v2,v3に基づき前記回
転検出信号aの周期を規定しキヤプスタンモータ
の回転制御出力rを導出する回転制御回路、7は
前記発振出力を分周し通常再生時はフレーム周期
の基準信号fをまた倍速再生時はフイールド周期
の基準信号fを導出する分周回路、8はモード選
択信号gxhによつて時定数回路を変更し基準信号
iと前記再生コントロール信号bを位相比較して
キヤプスタンモータの位相制御出力pを導出する
位相制御回路、SWはモード選択スイツチをそれ
ぞれ顕わす。尚前記周期比較回路2、前記発振回
路3、前記フリツプフロツプ4、前記論理回路
5、及び分周回路7はマイクロコピユータの機能
をハード的に表現しものであり、斯る回路はマイ
クロコンピユータのソフトウエアで構成されてい
る。 This embodiment is a capstan motor control circuit that defines the relationship between the control signal and the rotation detection signal as shown in FIG. 1 by setting the playback mode, and FIG. 2 shows the circuit block of this embodiment. Reveal the figure. In the figure, number 1 is a rotation detection means for deriving a rotation detection signal a in relation to the rotation of the capstan motor M, and 2 is a rotation detection means that derives the rotation detection signal a and a reproduction control signal b based on the oscillation output c of the oscillation circuit 3. are counted by the rotation detection signal period counting circuit 2a and the playback control signal period counting circuit 2b, respectively, and the ratio of both counts is 1:1 (long-term recording tape) or 2:1.
A period comparison circuit (period comparison means) that determines whether the period comparison circuit 2 is a long-time recording tape (normal recording tape) by a count ratio determination circuit 2c, and 4 derives an output d that determines whether the period comparison circuit 2 is a long-time recording tape. A flip-flop 5 is reset when an output e is derived to determine that the tape is a normal recording tape, and a flip-flop 5 inputs mode selection signals g, h and the flip-flop output f, and controls three speeds of the capstan motor. Rotation speed specified output that changes to
Logic circuit (logic means) for deriving v 1 , v 2 , v 3 , 6
7 is a rotation control circuit that defines the cycle of the rotation detection signal a based on the rotation speed designation outputs v 1 , v 2 , and v 3 and derives the rotation control output r of the capstan motor, and 7 is a rotation control circuit that divides the oscillation output. 8 is a frequency divider circuit which derives a frame period reference signal f during normal playback and a field period reference signal f during double speed playback, and a time constant circuit 8 is changed by the mode selection signal gxh to derive the reference signal i and the reference signal f described above. SW represents a phase control circuit that compares the phases of the reproduction control signal b and derives the phase control output p of the capstan motor, and SW represents a mode selection switch. The period comparator circuit 2, the oscillation circuit 3, the flip-flop 4, the logic circuit 5, and the frequency divider circuit 7 express the functions of the microcomputer in hardware, and these circuits are implemented by the software of the microcomputer. Consists of clothing.
従つて前記モード選択スイツチSWを通常再生
側に設定すると、前記分周回路7はフレーム周期
の基準信号を導出し、前記位相制御回路8はフレ
ーム周期の位相比較を為すため参照信号の発生タ
イミングや比較傾斜部の傾斜角を時定数回路によ
つて変更する。また前記論理回路5は記録モード
に応じてセツト状態若くはリセツト状態に設定さ
れる前記フリツプフロツプ4の出力f,とモー
ド選択信号gによつて通常記録部分を再生してい
るときには第2の回転速度指定出力v2を導出し長
時間記録部分を再生しているときには第1の回転
速度指定出力v1を導出する。更に前記回転制御回
路6は、第2の回転速度指定出力v2が入力される
と、前記回転検出信号aの周波数を60Hzとしてテ
ープを通常記録時と同様のスピードで走行せしむ
べく前記キヤプスタンモータMの回転を制御し、
第1の回転速度指定出力が入力されると前記回転
検出信号aの周波数を30Hzとしてテープを長時間
記録と同様のスピード(即ち道通常記録の1/2の
スピード)でキヤプスタンモーターの回転を制御
する。従つて再生中にテープの記録モードが変更
されると、前記フリツプフロツプ4が反転し、キ
ヤプスタンモータMの回転が自動屯的に倍増若し
くは半減して通常再生を実行する。 Therefore, when the mode selection switch SW is set to the normal playback side, the frequency divider circuit 7 derives a reference signal of the frame period, and the phase control circuit 8 determines the generation timing and timing of the reference signal in order to compare the phases of the frame period. The inclination angle of the comparison inclination section is changed by a time constant circuit. In addition, the logic circuit 5 operates at a second rotational speed when a normal recorded portion is being reproduced based on the output f of the flip-flop 4, which is set to a set state or a reset state depending on the recording mode, and a mode selection signal g. A designated output v 2 is derived, and when a long-time recorded portion is being reproduced, a first rotational speed designated output v 1 is derived. Furthermore, when the second rotation speed designation output v2 is input, the rotation control circuit 6 sets the frequency of the rotation detection signal a to 60 Hz and controls the cap to run the tape at the same speed as during normal recording. Controls the rotation of the stun motor M,
When the first rotation speed designation output is input, the frequency of the rotation detection signal a is set to 30Hz, and the capstan motor rotates at the same speed as when recording a tape for a long time (i.e., 1/2 the speed of normal recording). control. Therefore, when the recording mode of the tape is changed during playback, the flip-flop 4 is reversed, and the rotation of the capstan motor M is automatically doubled or halved to perform normal playback.
同様にして前記モード選択スイツチSWを倍速
再生側Qに設定すると、前記位相制御回路8は時
定数回路を変更してフイールド周期の位相比較を
実行し、前記論理回路5は通常記録部分再生時に
第3の回転速度指定出力v3を導出し長時間記録部
分再生時に第2の回転速度指定出力v2を導出す
る。更に前記回転制御回路6は、前記第3の回転
速度指定出力v3によつて前記キヤプスタンモータ
Mを通常記録の2倍のスピードで回転せしめ、前
記第2の回転速度指定出力v2によつて前記キヤプ
スタンモータMを長時間記録の2倍のスピード
(通常記録と同一スピード)で回転せしめる。従
つて映出される再生画像は2倍速再生モードとな
る。 Similarly, when the mode selection switch SW is set to the double speed playback side Q, the phase control circuit 8 changes the time constant circuit to perform a phase comparison of the field period, and the logic circuit 5 changes the time constant circuit to perform the phase comparison of the field period. 3 is derived, and a second rotational speed designation output v2 is derived at the time of long-time recording partial reproduction. Further, the rotation control circuit 6 causes the capstan motor M to rotate at twice the speed of normal recording using the third rotation speed designation output v3 , and causes the capstan motor M to rotate at twice the speed of normal recording using the third rotation speed designation output v2 . Therefore, the capstan motor M is rotated at twice the speed of long-time recording (same speed as normal recording). Therefore, the reproduced image to be displayed is in double speed reproduction mode.
第5図は上述する論理回路5を具体的に図示し
ており第1アンド回路AD1は、2倍速再生時の
選択出力hとフリツプフロツプ出力fを入力して
おり2倍速再生時に通常記録部分を再生している
ときにテープをV3(高速)で走行せしめる出力を
発する。また第2アンド回路AD2は通常再生時
の選択出力9とフリツプフロツプの反転出力を
入力しており通常再生時に長時間記録部分を再生
しているときテープをV1(低速)で走行せしめる
出力を発する。更に両アンド回路より出力が発生
しない場合、即ち通常再生時に通常記録部分を再
生しているとき及び2倍速再生時に長時間記録部
を再生しているときに、ノア回路NRよりテープ
V2(中速)で走行せしめる出力を発する。 FIG. 5 specifically shows the logic circuit 5 described above. The first AND circuit AD1 inputs the selection output h and the flip-flop output f during double-speed playback, and reproduces the normally recorded portion during double-speed playback. output that causes the tape to run at V 3 (high speed). In addition, the second AND circuit AD2 inputs the selection output 9 during normal playback and the inverted output of the flip-flop, and generates an output that causes the tape to run at V 1 (low speed) when a long recorded portion is being played back during normal playback. . Furthermore, when no output is generated from both AND circuits, that is, when the normal recorded part is being played back during normal playback, or when the long time recording part is being played back during double speed playback, the tape is output from the NOR circuit NR.
Generates output that allows the vehicle to run at V 2 (medium speed).
尚本実施例では、通常再生と倍速再生のみを為
す回路を例示したが、論理回路等を適宜変更する
ことにより、スローモーシヨン再生等の特殊再生
も容易に実現できることは言を俟たない。また、
本実施例では周期比較回路の具体的構成に付いて
言及しなかつたが、斯る回路はマイクロコンピユ
ータのソフトウエアの一部であり、具体的回路構
成を開示することに意味がないため説を割愛す
る。 In this embodiment, a circuit that performs only normal playback and double-speed playback is illustrated, but it goes without saying that special playback such as slow-motion playback can also be easily realized by appropriately changing the logic circuit and the like. Also,
In this example, we did not mention the specific configuration of the period comparison circuit, but since such a circuit is part of the software of the microcomputer, there is no point in disclosing the specific circuit configuration, so we will not discuss it here. Omit.
更に、本実施例に於て、位相比較制御回路で
は、再生コントロール信号の周期に合わせて位相
制御を実行したが、例えば実施例の如く通常再生
と2倍速再生のみを実行する場合には、キヤプス
タンの回転速度変更量は高々1:4の範囲に留ま
るため、位相比較周期を一定にすべくコントロー
ル信号を適宜分周する様構成しても良いことは言
を俟たない。 Furthermore, in this embodiment, the phase comparison control circuit executes phase control in accordance with the cycle of the reproduction control signal, but for example, when executing only normal reproduction and double speed reproduction as in the embodiment, the capstan Since the rotational speed change amount remains within the range of 1:4 at most, it goes without saying that the control signal may be appropriately frequency-divided in order to keep the phase comparison period constant.
上述せる如く、本考案によれば、記録モードの
変更に追随してテープスピードを変更し再生モー
ドを一定とするため、記録モード変更の度にテー
プスピードの変更操作をする必要もなく、その効
果は大である。 As mentioned above, according to the present invention, since the tape speed is changed in accordance with the change in the recording mode and the playback mode is kept constant, there is no need to change the tape speed every time the recording mode is changed, and the effect is is large.
第1図は、記録モードと再生モードに対する再
生コントロール信号と回転検出信号の関係を例示
する図、第2図は本考案の一実施回路ブロツク図
をそれぞれ顕わす。
主な図番の説明、1……回転検出手段、2……
周期比較手段、5……論理手練段、6……回転制
御回路。
FIG. 1 is a diagram illustrating the relationship between a reproduction control signal and a rotation detection signal for recording mode and reproduction mode, and FIG. 2 is a block diagram of an embodiment of the present invention. Explanation of main drawing numbers, 1...Rotation detection means, 2...
Period comparison means, 5...Logic means, 6...Rotation control circuit.
Claims (1)
手段と、 該回転検出手段の出力と再生コントロール信号
の各周期を定発振出力によつて計数し両計数値の
比に基づいて記録モードを検出する周期比較手段
と、 再生モードの設定を為すモード選択スイツチ
と、 前記周期比較手段と前記選択スイツチの各出力
を入力して前記キヤプスタンモータの回転速度を
指定する論理手段と、 該論理手段の出力に基づき前記キヤプスタンモ
ータの回転速度を制御する回転制御回路とを、 それぞれ配して成るキヤプスタンモータ制御回
路。[Scope of Claim for Utility Model Registration] Rotation detection means for detecting the rotation of a capstan motor, and each cycle of the output of the rotation detection means and a reproduction control signal is counted by a constant oscillation output, and the ratio of the two counted values is calculated. a mode selection switch for setting a playback mode; and logic for inputting each output of the period comparison means and the selection switch to specify the rotational speed of the capstan motor. A capstan motor control circuit comprising: a means for controlling a rotation speed of the capstan motor; and a rotation control circuit for controlling the rotation speed of the capstan motor based on an output of the logic means.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1979119894U JPH0115005Y2 (en) | 1979-08-30 | 1979-08-30 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1979119894U JPH0115005Y2 (en) | 1979-08-30 | 1979-08-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5641852U JPS5641852U (en) | 1981-04-17 |
JPH0115005Y2 true JPH0115005Y2 (en) | 1989-05-02 |
Family
ID=29352088
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1979119894U Expired JPH0115005Y2 (en) | 1979-08-30 | 1979-08-30 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0115005Y2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS623833A (en) * | 1985-06-28 | 1987-01-09 | Isao Kimura | Manufacture of integrated head lug with dish part |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52113709A (en) * | 1976-03-22 | 1977-09-24 | Hitachi Ltd | Track switching control circuit |
JPS5947368B2 (en) * | 1976-07-06 | 1984-11-19 | ソニー株式会社 | Recording/playback device |
JPS549906A (en) * | 1977-06-24 | 1979-01-25 | Matsushita Electric Ind Co Ltd | Speed detector |
JPS5814432Y2 (en) * | 1977-09-19 | 1983-03-23 | ソニー株式会社 | Automatic speed conversion device for playback equipment |
JPS5827894B2 (en) * | 1977-12-06 | 1983-06-13 | 松下電器産業株式会社 | Recording mode discrimination device |
-
1979
- 1979-08-30 JP JP1979119894U patent/JPH0115005Y2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5641852U (en) | 1981-04-17 |
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