JPH01145843A - Semiconductor device - Google Patents

Abstract

PURPOSE:To form grooves which are actually used as elements, by a design wherein dummy grooves on which elements on a mask are not formed at the peripheral part of a pattern, in which the grooves are concentrated densely, beforehand, so that the number of the dummy grooves is determined to cover a region, where the shape becomes unstable. CONSTITUTION:The required number (since 1M pieces of capacitors are required, 1000 pieces (e) for both rows and columns) of silicon grooves 2 are provided in a memory cell part 5. In addition, two pieces (two columns or lines) of dummy silicon groove patterns 6, which are not used as cell capacitors, are formed along the sides of the outside parts of the memory cell part 5. A forming part 7 of the dummy grooves on a silicon substrate 1 is a part between the memory cell part, where the capacitors are present, and a peripheral circuit 8, where capacitors are not provided. The shapes of the grooves at the two columns (a) at the peripheral part are unstable. It is expected that the capacitance is smaller than a specified capacitance because of poor breakdown strength of a capacitor oxide film and the shallow grooves. However, lead-out electrodes are not formed at this part, and this part is not utilized as capacitors for a DRAM.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to all semiconductor devices in which grooves are formed in a semiconductor substrate in order to increase the density of elements.

Conventional Technology Techniques for forming trenches in a semiconductor substrate include (trench isolation in 7M03 circuits, trench capacitors in dynamic RAM, etc.).

These grooves are used as isolation between elements and capacitors, respectively, but they are designed to meet predetermined element characteristics (isolation characteristics between elements,
It is necessary to obtain a stable etching shape in order to obtain capacitor characteristics).

Problems to be Solved by the Invention However, when the groove width becomes approximately 0.571 m or less, it becomes extremely difficult to stably form a vertical groove shape. Currently, groove formation is generally performed using R,1,E (Reactive IonItc), which has strong anisotropy.
hing) is used to ensure a vertical groove shape. However, if the area ratio of forming the grooves differs, the plasma state there will differ microscopically, so as shown in FIG. As is clear from FIG. 3a, the etched shape of the grooves differs in the other portions 22 (including the portions where the etching changes from dense to sparse). In addition, area effects (effects in which pattern widths differ between dense and sparse areas) in the photo process may also cause instability in the etched shape.

This instability of the etching shape affects the characteristics of the elements built therein, and causes, for example, a memory element formed at the outermost periphery (the part where the grooves are not dense) of the pattern where the grooves are densely packed to not have the desired characteristics.

For example, when attempting to form a capacitor in this groove, problems arise in that due to the instability of the shape, the withstand voltage deteriorates only in that part, or a predetermined capacitance cannot be achieved.

Means for Solving the Problems In order to solve the above-mentioned problems, the present invention forms in advance dummy grooves in which no elements are formed on the mask in areas where the shape is unstable, around the periphery of the pattern where grooves are concentrated. It is characterized by being designed to. For example 1
If there are 1000 grooves in a row and it is known that the shape of the two rows of grooves at the end will be unstable, then 1000+(2X2)=
It is assumed that 1,004 grooves are placed in a pattern in advance, and that 1,000 grooves are actually formed, excluding two dummy grooves.

Effect By forming extra dummy grooves on the mask in advance in areas where the shape is unstable, the groove shape in the area where elements are formed becomes more stable as the plasma state is almost uniform, and all elements can have predetermined properties.

Embodiment FIG. 1 is a plan view a and a sectional view showing the structure of a semiconductor device in an embodiment of the present invention.

In this example, a groove formed in a silicon substrate 1 is used as a capacitor for a 1M bit DRAM (dynamic random access memory), and 2 is R, I
A silicon trench with a depth of 3.611 m formed by J.
4 is an oxide film formed on the inner surface of the groove 2 to serve as a capacitor capacitor with a thickness of 100 mm, and 4 is a polysilicon film serving as a plate electrode.

As shown in the plan view, in addition to a predetermined number of silicon grooves 2 in the memory cell section 6 (1000 capacitors in row 0 and column 0 because 1V capacitors are required here), cells are placed in the outer part of the memory cell section 6. 2 pieces on each side that are not used as capacitors (
2 rows) of dummy silicon ill patterns 6 are formed. The formation portion 7 of the dummy groove 6 is located on the silicon substrate 1 between the memory cell portion where the capacitor is present and the peripheral circuit 8 where the capacitor is not present.

As shown in cross-sectional view a, the shape of the two peripheral rows of grooves 6 is unstable, and the capacitance is expected to be smaller than the predetermined value due to the poor breakdown voltage of the capacitor oxide film and the shallow groove depth. No lead electrode is formed and it is not used as a DRAM capacitor. For this reason.

When a predetermined number of elements (1o
oox 1000=I M ) will be formed.

FIG. 2 shows a pattern diagram in which the groove forming portions 9 are arranged in a grid pattern. In this case as well, there are two rows and two columns of dummies between the memory cell area where the capacitor is present and the peripheral circuit area where there is no capacitor. Form a silicon groove forming pattern.

The reason why the silicon groove forming part is completely separated into the peripheral dummy part 7 and the central memory cell part 6 is because when the silicon trench is in a lattice shape, the embedded polysilicon is common, so that the part of the peripheral dummy part 6 is completely separated. This is to prevent the breakdown voltage deterioration of the capacitor oxide film from having an adverse effect on the central memory cell section.

Incidentally, when an insulator is buried in this lattice groove and utilized for element isolation, it is not necessary to completely separate the silicon groove forming portion into the peripheral portion and the central portion as described above.

As described in detail, according to the present invention, a dummy is designed in advance at the time of mask design in the outermost periphery where the groove shape is unstable in the area where the groove forming portions are concentrated, so that it can be used effectively as an element. Grooves can be stably formed, and the present invention is extremely practical and of high industrial value in the technology of forming grooves in semiconductor substrates to form high-density semiconductor integrated circuits.

[Brief explanation of the drawing]

FIG. 1a is a schematic plan view showing the structure of a semiconductor device according to an embodiment of the present invention, FIG. 1 is a sectional view taken along the line AA' in FIG. FIG. 3A is a schematic plan view of an example semiconductor device, and FIG. 3A is a schematic plan view of a conventional semiconductor device, and FIG. 3A is a sectional view taken along line BB' in FIG. 3A. 1...Silicon substrate, 2...Silicon groove, 3...Capacitive oxide film, 4...Polysilicon, 6...Memory cell Part, 6...
- Groove, 7...Dummy groove forming part. Name of agent: Patent attorney Toshio Nakao and one other name
1 Figure '7- Gummy clasp ←−→←
----------Screaming and exchanging 2 items 1000 lines 2 works/-1-Silicon base 1 and 2-1 groove 3-Customer volume gland 5---Memory t2 part 7-Dummy Wakugata 8 De

Claims (3)

[Claims] (1) A semiconductor device in which a large number of grooves are formed in a semiconductor substrate, in which dummy grooves in which no elements are formed are formed around grooves for forming elements. (2) The semiconductor device according to claim 1, wherein a capacitor for charge storage is formed in the groove. (3) The semiconductor device according to claim 1, wherein the groove is an element isolation region.