JPH01143293U - - Google Patents
Info
- Publication number
- JPH01143293U JPH01143293U JP3842088U JP3842088U JPH01143293U JP H01143293 U JPH01143293 U JP H01143293U JP 3842088 U JP3842088 U JP 3842088U JP 3842088 U JP3842088 U JP 3842088U JP H01143293 U JPH01143293 U JP H01143293U
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- resistor
- inverter
- circuit
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Control Of High-Frequency Heating Circuits (AREA)
- Power Conversion In General (AREA)
Description
第１図は本考案が対象とする電流型トランジス
タインバータの回路図、第２図は本考案の実施例
回路図、第３図ａおよびｂそれぞれは本考案にお
けるインバータ動作電圧とコンデンサ電圧との関
係を示す線図、第４図ａおよびｂそれぞれは従来
過電圧保護回路図およびインバータ動作電圧とコ
ンデンサ電圧との関係を示す線図である。
２０……トランジスタインバータ、Ｒ１，Ｒ２
……抵抗、Ｄ……ダイオード、Ｃ……コンデンサ
、ＴＳｃｒ……サイリスタ。
Fig. 1 is a circuit diagram of a current-type transistor inverter to which the present invention is applied, Fig. 2 is an embodiment circuit diagram of the present invention, and Fig. 3 a and b respectively show the relationship between the inverter operating voltage and capacitor voltage in the present invention. FIGS. 4a and 4b are a diagram showing a conventional overvoltage protection circuit and a diagram showing the relationship between the inverter operating voltage and the capacitor voltage, respectively. 20...Transistor inverter, R1, R2
...Resistor, D...Diode, C...Capacitor, TScr...Thyristor.
Claims (1)
路間に、抵抗Ｒ１、ダイオードＤおよびコンデン
サＣを順方向接続した直列回路と、上記コンデン
サＣの両端電圧をインバータの動作電圧ピーク値
に平均化可能な抵抗Ｒ２を具え、前記直列回路の
抵抗Ｒ１およびダイオードＤに並列するバイパス
回路と、上記コンデンサＣの両端電圧が基準値を
超えた場合に点弧されるサイリスタＴＳｃｒを介
挿した短絡回路とを設けたことを特徴とするイン
バータの過電圧抑制回路。 A series circuit in which a resistor R1, a diode D, and a capacitor C are connected in the forward direction, and a resistor R2 that can average the voltage across the capacitor C to the peak operating voltage value of the inverter are installed between the power supply side circuits of the current supply type transistor inverter. A bypass circuit is provided in parallel with the resistor R1 and the diode D of the series circuit, and a short circuit in which a thyristor TScr is inserted, which is fired when the voltage across the capacitor C exceeds a reference value. Features: Inverter overvoltage suppression circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3842088U JPH01143293U (en) | 1988-03-25 | 1988-03-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3842088U JPH01143293U (en) | 1988-03-25 | 1988-03-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01143293U true JPH01143293U (en) | 1989-10-02 |
Family
ID=31264972
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3842088U Pending JPH01143293U (en) | 1988-03-25 | 1988-03-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01143293U (en) |
-
1988
- 1988-03-25 JP JP3842088U patent/JPH01143293U/ja active Pending
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