JPH01122196A - Circuit substrate - Google Patents
Circuit substrateInfo
- Publication number
- JPH01122196A JPH01122196A JP62280020A JP28002087A JPH01122196A JP H01122196 A JPH01122196 A JP H01122196A JP 62280020 A JP62280020 A JP 62280020A JP 28002087 A JP28002087 A JP 28002087A JP H01122196 A JPH01122196 A JP H01122196A
- Authority
- JP
- Japan
- Prior art keywords
- film
- thin
- thin film
- superconductive
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/60—Superconducting electric elements or equipment; Power systems integrating superconducting elements or equipment
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Containers, Films, And Cooling For Superconductive Devices (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Superconductors And Manufacturing Methods Therefor (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、混成集積回路基板・プリント基板などに用い
られる回路基板に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a circuit board used for hybrid integrated circuit boards, printed circuit boards, and the like.
従来の技術
以下図面を参照しながら、従来の回路基板について説明
する。第6図(a) (b)は従来の回路基板の一部拡
大平面図および断面図である。第6図において5はアル
ミナなどの絶縁基板、■は銅ペーストあるいは銀ペース
トなどを焼成して形成された端子電極、2は厚膜抵抗で
ある。なお以下の図面において拡大あるいは縮小した部
分が存在し、特に前記のことは膜厚方向に対して著しい
。BACKGROUND OF THE INVENTION A conventional circuit board will be described below with reference to the drawings. FIGS. 6(a) and 6(b) are a partially enlarged plan view and a sectional view of a conventional circuit board. In FIG. 6, 5 is an insulating substrate made of alumina, etc., 2 is a terminal electrode formed by firing copper paste or silver paste, and 2 is a thick film resistor. Note that there are enlarged or reduced portions in the following drawings, and this is particularly noticeable in the film thickness direction.
また本明細書中でいう薄膜とは、スパッタなどの蒸着技
術で形成される薄膜だけでなく、スクリーンの印刷技術
あるいは塗布技術により形成される通常膜厚と呼ばれる
ものも含む。Furthermore, the term "thin film" as used herein includes not only a thin film formed by a vapor deposition technique such as sputtering, but also a so-called normal film formed by a screen printing technique or a coating technique.
第6図で明らかなように絶縁基板5上に端子電極1など
の回路パターンを形成し、厚膜抵抗2などの電子部品を
形成あるいは実装する。As is clear from FIG. 6, circuit patterns such as terminal electrodes 1 are formed on the insulating substrate 5, and electronic components such as the thick film resistor 2 are formed or mounted.
発明が解決しようとする問題点
しかしながら従来の回路基板上に厚膜抵抗などの電子部
品を形成すると、第7図に示すように他の電子部品など
から発生する磁束の影響をうけることはさけられない。Problems to be Solved by the Invention However, when electronic components such as thick film resistors are formed on a conventional circuit board, it is difficult to avoid the influence of magnetic flux generated from other electronic components, as shown in FIG. do not have.
前記磁束は電子部品内で電圧または電流を発生させ、ノ
イズとなる。したがって従来の回路基板に電子部品を形
成あるいは実装するさいは前記ノイズ対策が必要となる
。前記ノイズ対策は非常に高度な技術と経験を必要とし
ていた。The magnetic flux generates voltage or current within the electronic component, resulting in noise. Therefore, when forming or mounting electronic components on a conventional circuit board, the above-mentioned noise countermeasures are required. The above-mentioned noise countermeasures required extremely advanced technology and experience.
本発明は上記問題点に鑑み、ノイズなどが外部からの影
響をうけにくい基板を提供するものである。In view of the above problems, the present invention provides a substrate that is less susceptible to external influences such as noise.
問題点を解決するための手段
上記問題点を解決するための本発明の回路基板は絶縁基
板上に超電導物質からなる閉じた薄膜パターンを形成し
、前記薄膜パターン内に電子部品を形成あるいは実装す
ることを特徴とするものである。Means for Solving the Problems To solve the above problems, the circuit board of the present invention forms a closed thin film pattern made of a superconducting material on an insulating substrate, and forms or mounts electronic components within the thin film pattern. It is characterized by this.
作用
本発明は、絶縁基板上に超電導物質からなる薄膜リング
を形成する。前記Wi膜リングに磁束は貫くことは不可
能である。したがって、前記薄膜リング内に電子部品を
形成あるいは実装すれば、磁束により発生するノイズを
大幅に軽減できることになる。Function The present invention forms a thin film ring made of a superconducting material on an insulating substrate. It is impossible for magnetic flux to penetrate the Wi film ring. Therefore, by forming or mounting electronic components within the thin film ring, noise generated by magnetic flux can be significantly reduced.
実施例
以下、本発明の回路基板の一実施例について図面を参照
しながら説明する。EXAMPLE Hereinafter, an example of the circuit board of the present invention will be described with reference to the drawings.
第1図(a) (b)は本発明の第1の実施例における
回路基板の一部拡大平面図および断面図である。第1図
において4は超電導物質からなる薄膜パターン(以後、
超電導薄膜と呼ぶ、)であり、閉じたリング状のパター
ンとなっている。また、3は絶縁膜である。FIGS. 1(a) and 1(b) are a partially enlarged plan view and a sectional view of a circuit board according to a first embodiment of the present invention. In Fig. 1, 4 is a thin film pattern made of superconducting material (hereinafter referred to as
It is called a superconducting thin film) and has a closed ring-shaped pattern. Further, 3 is an insulating film.
第1図で明らかなように、絶縁基板5上に超電導薄膜4
を形成し、前記超電導薄膜4上にガラスなどを主成分と
する絶縁膜3を形成する。さらに前記絶縁膜3と重複す
るように銅ペーストあるいは銀ペーストなどを焼成して
得られる端子電極1を形成し、厚膜抵抗2を形成してい
る。As is clear from FIG. 1, superconducting thin film 4 is placed on insulating substrate 5.
An insulating film 3 mainly composed of glass or the like is formed on the superconducting thin film 4. Furthermore, a terminal electrode 1 obtained by firing copper paste or silver paste is formed so as to overlap with the insulating film 3, thereby forming a thick film resistor 2.
本発明の第1の実施例では第2図に示すように磁束9が
印加されてもリング状の超電導薄膜4に電流が流れ、磁
束の進入を防ぐため、厚膜抵抗2に進入は大幅に軽減さ
れ、したがってノイズはほとんど生じなくなる。In the first embodiment of the present invention, as shown in FIG. 2, even when magnetic flux 9 is applied, current flows through the ring-shaped superconducting thin film 4, and in order to prevent the magnetic flux from entering, the penetration into the thick film resistor 2 is significantly reduced. reduced, so that almost no noise occurs.
以下のことは以下の実施例に対してもほぼ同様の効果が
得られる。Almost the same effects can be obtained in the following embodiments.
第3図(al (b)は本発明の第2の実施例における
回路基板の一部拡大平面図および断面図である。第3図
において、6はチップコンデンサ、チップ抵抗などのチ
ップ部品、7はハンダである。FIG. 3(b) is a partially enlarged plan view and cross-sectional view of a circuit board in a second embodiment of the present invention. In FIG. 3, 6 is a chip component such as a chip capacitor, a chip resistor, is solder.
第2の実施例でも第1の実施例と同様に超電導薄膜4を
形成し、前記超電導薄膜4内にチップ部品6を実装して
いる。In the second embodiment, a superconducting thin film 4 is formed similarly to the first embodiment, and a chip component 6 is mounted within the superconducting thin film 4.
第4図Tal (b)は本発明の第3の実施例における
回路基板の一部拡大平面図および断面図である。第4図
において8は金属あるいはガラスあるいは樹脂などの被
覆膜である。FIG. 4B is a partially enlarged plan view and cross-sectional view of a circuit board in a third embodiment of the present invention. In FIG. 4, 8 is a coating film made of metal, glass, resin, or the like.
第1の実施例と第3の実施例の相違点は超電導薄膜4上
を被覆膜8で被覆した点にある。前述のような構成をと
ることにより、超電導薄膜4を外部からの機械的応力か
ら保護することができ、また、外気と遮断しているため
化学的に安定的な状態を長期間に保つことができる。The difference between the first embodiment and the third embodiment is that the superconducting thin film 4 is covered with a coating film 8. By adopting the above-mentioned configuration, the superconducting thin film 4 can be protected from external mechanical stress, and since it is isolated from the outside air, it can maintain a chemically stable state for a long period of time. can.
なお本発明の実施例では超電導薄膜4上に絶縁膜3を形
成し、前記絶縁膜3上に端子電極1を形成するとしたが
、これに限るものではなく、絶縁基板5上に閉じた超電
導薄膜4パターンを形成すればよい。たとえば第5図(
a) (blに示すように絶縁膜3上の超電導薄膜4を
形成してもよい、また、上記実施例中、超電導体物質と
しては、たとえば、いわゆる常温超電導体を用いるか、
または、超電導臨界温度が室温と液体窒素の沸点の間の
材料を用いて液体窒素で冷却するか(図示せず)、もし
くは超電導臨界温度が液体窒素の沸点以下の材料を用い
て液体ヘリウムで冷却するか(図示せず)をすればよい
。常温超電導体の一例としては、組成としてストロンチ
ウム(Sr)、バリウム(Ba)、インドリウム(Y)
および銅((:u)、を夫々1:l:l:3の比率で含
有するセラミック酸化物がある。その製造方法の一例と
しては、出発原料として5rCO,、BaC0コ、Y、
03、CuOの夫々の粉体を所定量混合し、粉砕し、空
気中において920℃で5時間焼成する。In the embodiment of the present invention, the insulating film 3 is formed on the superconducting thin film 4, and the terminal electrode 1 is formed on the insulating film 3, but the present invention is not limited to this. It is sufficient to form four patterns. For example, Figure 5 (
a) (As shown in bl, a superconducting thin film 4 may be formed on the insulating film 3. Also, in the above embodiments, as the superconducting material, for example, a so-called room temperature superconductor may be used,
Alternatively, use a material with a superconducting critical temperature between room temperature and the boiling point of liquid nitrogen and cool it with liquid nitrogen (not shown), or use a material with a superconducting critical temperature below the boiling point of liquid nitrogen and cool it with liquid helium. (not shown). Examples of room-temperature superconductors include strontium (Sr), barium (Ba), and indium (Y) as compositions.
There is a ceramic oxide containing copper ((:u)) in a ratio of 1:l:l:3. An example of its production method includes starting materials such as 5rCO, BaCO, Y,
03. A predetermined amount of each powder of CuO is mixed, pulverized, and fired in air at 920° C. for 5 hours.
この焼成・粉砕を3回繰り返し、均質性を高める。This firing and crushing process is repeated three times to improve homogeneity.
このようにして処理した混合粉体を冷間圧縮成型した後
、空気中において1000℃で5時間焼成し、徐冷する
ことにより製造する。After cold compression molding the mixed powder treated in this way, it is produced by firing in air at 1000° C. for 5 hours and slowly cooling.
発明の効果
以上のように本発明の回路基板は超電導物質からなる閉
じた薄膜パターンを形成し、前記閉じた薄膜パターン内
に電子部品を形成あるいは実装するものであるから、電
子部品を外部からのノイズなどに対して保護することが
できる。したがって、ノイズ対策が必要な回路基板の部
位に閉じた薄膜パターンを形成し、前記閉じた薄膜パタ
ーン内に電子部品を形成するだけでよい、ゆえに回路設
計は非常に容易になるという大きな効果を有する。Effects of the Invention As described above, the circuit board of the present invention forms a closed thin film pattern made of a superconducting material, and electronic components are formed or mounted within the closed thin film pattern. It can protect against noise etc. Therefore, it is only necessary to form a closed thin film pattern in a part of the circuit board where noise countermeasures are required and to form electronic components within the closed thin film pattern, which has the great effect of making circuit design very easy. .
第1図(a) (b)は本発明の第1の実施例における
回路基板の一部拡大平面図及び断面図、第2図は本発明
の回路基板の断面図、第3図(a) (b)は本発明の
第2の実施例における回路基板の一部拡大平面図及び断
面図、第4図+8) (b)は本発明の第3の実施例に
おける回路基板の一部拡大平面図および断面図、第5図
(a) (b)は本発明の回路基板の一部拡大平面図お
よび断面図、第6図(al (blは従来の回路基板の
一部拡大平面図および断面図、第7図は従来の回路基板
の断面図である。
1・・・・・・端子電極、2・・・・・・厚膜抵抗、3
・・・・・・絶縁膜、4・・・・・・超電導薄膜、5・
・・・・・絶縁基板、6・・・・・・チップ部品、7・
・・・・・ハンダ、8・・・・・・被覆膜、9・・・・
・・磁束。1(a) and (b) are a partially enlarged plan view and a sectional view of a circuit board according to a first embodiment of the present invention, FIG. 2 is a sectional view of a circuit board of the present invention, and FIG. 3(a) (b) is a partially enlarged plan view and cross-sectional view of the circuit board in the second embodiment of the present invention, FIG. 4+8) (b) is a partially enlarged plane view of the circuit board in the third embodiment of the present invention 5(a) and 5(b) are a partially enlarged plan view and a sectional view of a circuit board of the present invention, and FIG. 6(al) is a partially enlarged plan view and a sectional view of a conventional circuit board. 7 are cross-sectional views of conventional circuit boards. 1...Terminal electrode, 2...Thick film resistor, 3
...Insulating film, 4...Superconducting thin film, 5.
...Insulating substrate, 6...Chip parts, 7.
...Solder, 8...Coating film, 9...
...magnetic flux.
Claims (2)
ーンを形成し、前記閉じた薄膜パターン内に電子部品を
形成または実装することを特徴とする回路基板。(1) A circuit board characterized in that a closed thin film pattern made of a superconducting material is formed on an insulating substrate, and electronic components are formed or mounted within the closed thin film pattern.
またはガラスまたは樹脂で被覆したことを特徴とする特
許請求の範囲第(1)項記載の回路基板。(2) The circuit board according to claim (1), characterized in that a closed thin film pattern made of a superconducting material is coated with metal, glass, or resin.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62280020A JPH01122196A (en) | 1987-11-05 | 1987-11-05 | Circuit substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62280020A JPH01122196A (en) | 1987-11-05 | 1987-11-05 | Circuit substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01122196A true JPH01122196A (en) | 1989-05-15 |
Family
ID=17619182
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62280020A Pending JPH01122196A (en) | 1987-11-05 | 1987-11-05 | Circuit substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01122196A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0445657A2 (en) * | 1990-03-08 | 1991-09-11 | Fujitsu Limited | Apparatus for eliminating trapping of magnetic flux from an object |
-
1987
- 1987-11-05 JP JP62280020A patent/JPH01122196A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0445657A2 (en) * | 1990-03-08 | 1991-09-11 | Fujitsu Limited | Apparatus for eliminating trapping of magnetic flux from an object |
US5164696A (en) * | 1990-03-08 | 1992-11-17 | Fujitsu Limited | Apparatus for eliminating trapping of magnetic flux from an object |
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