JPH01101665A - Transistor circuit - Google Patents

Abstract

PURPOSE:To achieve a very high speed operation inherent in a heterojunction bipolar transistor (HBT) without causing the operating speed to slow down with the presence of a contact resistance by providing a schottky electrode in parallel to an ohmic junction electrode in an emitter or an emitter and base. CONSTITUTION:Schottky junction diodes 5, 6 are respectively inserted in parallel to contact resistances 3, 4 between a base contact and an input terminal 10, and between an emitter contact and a ground, of a transistor 1. When the transistor 1 is forward-biased, the schottky diodes 5, 6 are reverse biased, such condition being assumed as a capacitance. Accordingly, a very high speed operation can be possible with the presence of a contact resistance between wirings of individual electrodes of a transistor.

Description

[Detailed description of the invention] [Purpose of the invention] (Industrial application field) The present invention relates to transistor circuits.

(Prior Art) A Peter junction bipolar transistor (hereinafter abbreviated as HBT) which uses a GaAs substrate and has a Peter junction between an emitter and a base is known as a high-speed bipolar transistor. Since HBTs are constructed using a material with a larger bandgap for the emitter than the base, it is possible to increase the impurity concentration in the base while maintaining a high current amplification factor, resulting in advantages such as lower base resistance. It is a device capable of ultra-high-speed operation. However, when forming an HBT using this GaAs substrate into an IC, there are the following problems. Since it is difficult for GaAs to make ohmic contact with metal, contact resistance exists in the connection between each contact region (emitter, base, collector, and each electrode) of the HBT element and the metal electrode. This contact resistance is usually on the order of several 10 to 100 ohms, which is a factor that significantly degrades the operating speed of the HBT element. This will be explained below using the drawings. Fourth
The figure shows a basic inverter circuit, in which a transistor 1 whose emitter is grounded to the ground potential, whose core terminal is connected to a power supply 9 via a resistor 8, and whose base terminal is connected to an input terminal 10. The collector terminal is the output terminal 11. In the inverter circuit shown in this figure, a logic input is applied to the input terminal 10, and if the voltage value is equal to or higher than the on-voltage (VBEON) of the transistor 1, the output of the output terminal 11 outputs the logic state Pa○'', and vice versa. If it is less than VBEON, it outputs 111 IP.In the high-speed operation of such an inverter circuit, the maximum switching speed is determined by how quickly the base-emitter capacitance of transistor 1 can be charged and discharged.By the way, the HBT element When the inverter shown in Fig. 4 is constructed, as mentioned above, there is contact resistance between each contact region of the collector, base, and emitter and each electrode, so the equivalent circuit becomes as shown in Fig. 5. Here, resistors 2 and 3.4 indicate the contact resistances with the contact, base, and emitter electrodes, respectively.As is clear from FIG. The speed of charging and discharging the emitter capacitance is significantly reduced due to the presence of contact resistances 3 and 4.
The original high-speed performance of HBT cannot be utilized.

Specifically, the charging/discharging speed is determined by the impedance of a circuit (not shown) that drives the input terminal 10 and the resistors 3 and 4.
It is mainly controlled by the time constant determined by the product of the sum of and the base-emitter capacitance of transistor 1.

The switching speed also depends on the base-collector capacitance (Cμ9, not shown) of the transistor 1, but since Cμ is extremely small in the case of an HBT element, it will be ignored here.

Furthermore, since the contact resistor 4 is located between the emitter of the transistor 1 and the ground, it causes a decrease in mutual conductance (ym), which further causes a decrease in speed. In the grounded emitter format, qm is approximately 1/(1+g
, m'RE) times.

Here, 9m' represents fm when there is no resistance between the emitter and ground, and RE represents the resistance value of the contact resistor 4 between the emitter and ground. A decrease in g-m leads to a decrease in gain, which results in a decrease in speed.

As mentioned above, HBTs have the disadvantage that they cannot operate at the original high speed due to the presence of contact resistance between the contact region (particularly the emitter region) and the electrode.

(Problems to be Solved by the Invention) In an HBT element using a GaAs substrate, it is difficult to establish ohmic contact between a contact region and an electrode, and a finite contact resistance exists.

This contact resistance is a factor that significantly reduces the operating speed of the circuit. The present invention has been made in view of the above-mentioned drawbacks, and an object of the present invention is to provide a transistor circuit that can perform the ultra-high-speed operation inherent to an HBT without causing a decrease in operating speed even in the presence of contact resistance. do.

[Structure of the invention]

(Means for Solving the Problems) The present invention has a machine that provides a Schottky junction electrode in parallel with an ohmic junction electrode on an emitter portion or an emitter and base portion as an electrode of an HBT element.

(Function) According to the present invention, a Schottky capacitance accompanying a Schottky junction is generated between the emitter or the base and the contact region of the emitter and the wiring lead connected thereto, and during high frequency operation, an input signal is transmitted to the transistor via this Schottky capacitance. , high-speed operation is possible. Further, in the case of an HBT using a GaAs substrate, a Schottky junction can be easily formed between the contact region and the wiring without requiring almost any extra steps.

(Example) Hereinafter, the present invention will be explained in detail using examples.

FIG. 1 is a diagram showing an embodiment of the present invention.6 Note that the same parts as in the conventional example described above are given the same numbers. The characteristics of the present invention are that the base contact of the transistor 1 and the input terminal 10. Schottky junction diodes 5 and 6 are inserted between the emitter contact and ground in parallel with contact resistors 3 and 4, respectively. When transistor 1 is forward biased in FIG. 1, Schottky junction diodes 5 and 6 are reverse biased and can be treated as capacitors. Therefore, if the Schottky junction diode in FIG. 1 is equivalently replaced with a capacitor, the result will be as shown in FIG. 2. In FIG. 2, capacitors 12 and 13 are respectively replaced by Schottky junction diodes 5 in FIG.
and 6 are shown.

The effects of the present invention will be qualitatively explained below. In FIG. 2, when the logic input signal applied to the input terminal 10 has a relatively low frequency, the signal is input to the base of the transistor 1 via the contact resistor 3, but in FIG. In an extremely high frequency range where the operating speed is limited, the signal is input to the base of the transistor 1 via the capacitor 12. Also, at that time, the emitter of the transistor 1 is grounded via the capacitor 13. In other words, for ultra-high frequency signals, the impedances of capacitors 12 and 13 are smaller than contact resistances 3 and 4, respectively, and capacitors 12 and 13 serve as speed-up capacitors. In this way, by providing a Schottky junction diode in parallel with the ohmic electrode, the capacitance of the Schottky junction acts as a speed-up capacitor during ultra-high frequency operation, increasing the speed of charging and discharging the capacitance between the base and emitter of transistor 1. Furthermore, it is possible to improve the decrease in gain due to emitter degeneration.

The above structure can be easily realized, for example, as follows. FIG. 3 shows an example of a simplified cross-sectional structure.

In FIG. 3, emitter region 14. which constitutes transistor 1. Base area 15. Ohmic electrodes 17, 18, each having an ohmic contact with the collector region 16.
There are 19. Further, the emitter region 14. base area 1
Schottky electrodes 20.21 each having a Schottky junction are formed for each Schottky electrode 20.21.
and ohmic electrodes 19 are respectively connected to emitter wiring leads 22. Base wiring lead 23. Collector wiring lead 24
is connected to.

Incidentally, the metal of the Schottky electrodes 20, 21 is not limited to a different type of metal than the ohmic electrodes 17, 18, 19, but may be of the same type. By the way, the following properties can be used to realize the structure described above. That is, simply forming a metal electrode on a GaAs element results in a Schottky junction. Therefore, the ohmic electrode 1
The emitter regions 14. Base area 15. After forming an ohmic contact with the collector region 16, metals that will become the Schottky electrodes 22 and 23 may be simply formed on the respective elements. In this way, the Schottky electrode can be formed in parallel with the ohmic electrode without adding any extra process compared to the conventional device structure.

〔Effect of the invention〕

According to the present invention, there are the following effects.

1) Ultra high-speed operation is possible even if there is contact resistance between each electrode of the transistor and the wiring.

2) It can be achieved by adding only a very small number of steps and with almost no increase in area.

3) Gain can be improved in the ultra-high frequency range.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram showing one embodiment of the present invention, and FIG.
FIG. 3 is an element structure diagram showing an example of a simplified cross-sectional structure of a transistor according to the present invention; FIG. 4 is a diagram showing a basic inverter circuit;
FIG. 5 is a diagram showing an equivalent circuit of an inverter circuit using a conventional HBT. 1...HBT transistor, 2,3.4.
...Contact resistance. 5.6...Schottky diode, 8...resistor. 9... Voltage source, 10... Input terminal. 11...output terminal, 12.13
...Capacitor. 14...Emitter, 15...Base. 16...Collector. 17.18,19...Ohmic junction electrode. 20, 21... Schottky junction electrode. 22.23.24... Wiring lead Figure 1 Figure 2 Figure 3

Claims (2)

[Claims] (1) In a heterojunction bipolar transistor in which the emitter is formed of a material with a wider bandgap than the base on a GaAs substrate, a Schottky transistor is connected to the emitter region in parallel with a first metal electrode having an ohmic contact with at least the emitter region. A transistor circuit characterized in that a second metal electrode with a junction is provided. (2) A transistor circuit according to claim 1, further comprising a third metal electrode having an ohmic contact with the base region and a fourth metal electrode having a Schottky contact with the base region in parallel. .