JP7646483B2 - Overvoltage protection circuit and module equipped with overvoltage protection circuit - Google Patents

Description

The present invention relates to an overvoltage protection circuit and a module equipped with an overvoltage protection circuit, and is suitable as a protection technology for multi-gate semiconductor elements having multiple gates used in power conversion devices.

In recent years, power electronics equipment has come to use semiconductor elements called power devices that are capable of controlling high voltages and large currents. In particular, high-voltage power converters mainly use power devices called IGBTs (Insulated Gate Bipolar Transistors).

IGBTs are semiconductor elements that combine the characteristics of MOS gate devices, which allow for high-speed switching, with the features of bipolar devices, such as low conduction resistance, and are mainstream for applications requiring DC voltages of 1.2 kV or more.

The IGBTs used in power converters control the power supplied to a load, such as a motor, by switching (turning on and off) the current supplied to the load. When supplying a large amount of power to a load, it is necessary to switch a large current. In particular, when cutting off a large current, an overvoltage (surge voltage) is generated by the energy stored in the parasitic inductance present in the wiring of the power conversion circuit due to a sudden decrease in current. This surge voltage may be applied between the collector and emitter of the IGBT and destroy the IGBT. A collector clamp circuit, which suppresses the increase in collector voltage, is known as a preventative measure for this.

FIG. 9 is a diagram showing a circuit configuration of an IGBT equipped with a collector clamp circuit as a conventional technique.
In FIG. 9, an IGBT module 501 is composed of an IGBT 502 and a freewheel diode 503, and has, as terminals, a collector 504 and an emitter 506 corresponding to a pair of main terminals, and a gate 505 corresponding to a control terminal.

A collector clamp circuit, which is a series circuit of multiple clamp diodes 507 and reverse blocking diodes 508, is connected between the collector 504 and the gate 505, and a gate signal is input to the gate 505 from a gate driver 509. Here, the series circuits of multiple clamp diodes 507 and reverse blocking diodes 508 connect their anodes to each other to form a collector clamp circuit.

Next, the operation will be described.
9, a current supplied to a load (not shown) flows between a collector 504 and an emitter 506. This current is controlled by a voltage applied to a gate 505. Specifically, when a voltage equal to or greater than a threshold voltage required to turn on the element, for example +15 V, is applied to the gate 505, the current flows, and when a voltage equal to or less than this threshold voltage, for example -15 V, is applied to the gate 505, the current is cut off.

When a large current is being supplied to a load and the current is to be cut off, the voltage applied to the gate 505 is lowered from +15V to -15V by the gate driver 509. When the voltage of the gate 505 becomes lower than the above-mentioned threshold voltage, the current of the IGBT is cut off. Although not shown, an overvoltage occurs in the collector of the IGBT due to the energy stored in the parasitic inductance present in the wiring connected to the IGBT. When this overvoltage exceeds the breakdown voltage of the clamp diode 507, a current flows from the collector terminal to the gate terminal. This current charges the gate-emitter capacitance of the IGBT, i.e., the input capacitance, and the voltage of the gate 505 increases again above the threshold. When the voltage of the gate 505 exceeds the threshold voltage, a current starts to flow again in the IGBT, and the increase in the collector voltage is suppressed by suppressing the steep current drop, thereby preventing the IGBT from being destroyed by the overvoltage.
The above-mentioned technology is a well-known technology that has been widely used in the field of IGBTs.

Furthermore, in recent years, various techniques for reducing losses in IGBTs have been developed.
For example, Patent Document 1 discloses a technique for reducing the switching loss of an IGBT by providing multiple gate electrodes and applying voltages to the gate electrodes in a predetermined sequence. These elements are also called multi-gate semiconductor elements because they have multiple gates. Multi-gate semiconductor elements can achieve low loss that could not be achieved with conventional IGBTs, and therefore are being actively developed for practical use.

FIG. 10 is a diagram showing an example of a circuit of a multi-gate IGBT.
10 , the multi-gate IGBT has a configuration in which a parallel circuit of a first IGBT 101 having a first freewheel diode 102 and a second IGBT 103 having a second freewheel diode 104 is connected between a collector 111 and an emitter 112. A gate signal is input to the gate of the first IGBT 101 and the gate of the second IGBT 103 from a first gate driver circuit 105 and a second gate driver circuit 106 that constitute a gate driver unit 113.

Next, the operation of the multi-gate IGBT will be described.
FIG. 11 is a diagram showing voltage and current waveforms at various points during operation of the multi-gate IGBT.
At time t1, when an ON command is sent from a higher-level controller (not shown) to the first gate driver circuit 105 and the second gate driver circuit 106, the signals of both the gate driver circuits 105 and 106 are inverted from low to high. As a result, the output voltages of the first gate driver circuit 105 and the second gate driver circuit 106 increase.

When each output voltage exceeds the threshold voltage that turns on the IGBT, the first IGBT 105 and the second IGBT 106 both turn on and current begins to flow. At the same time, the voltage of the collector 111 begins to drop, dropping to a few volts.

At time t2, the gate of the second IGBT 106 is turned off in preparation for cutting off the current at time t3.

Next, at time t3 when it is originally desired to cut off the current, the input to the first gate driver circuit 105 is turned off, turning off the output of the first gate driver circuit 105 and cutting off the current. At this time, since the current is cut off in a short time, a sudden negative current change occurs. An overvoltage occurs in the collector 111 due to the energy stored in the parasitic inductance in the wiring connected to the collector 111, and as shown in FIG. 11, a spike-shaped overvoltage occurs in the voltage of the collector 111.

In this way, the multi-gate IGBT is an element that controls multiple gates with a time difference. In the above example, during the period from when the second IGBT 106 is cut off at time t2 to when the first IGBT 105 is cut off at time t3, excess charge accumulated inside the IGBT is discharged, reducing loss when the current is cut off at time t3.

JP 2019-161720 A

As mentioned above, even with a multi-gate IGBT, a spike voltage occurs when current is interrupted. If the current being interrupted or the parasitic inductance of the wiring is large, the spike voltage increases, and if it exceeds the rated voltage of the IGBT, the IGBT will be destroyed by the overvoltage.

To prevent this situation, it is possible to apply the above-mentioned collector clamp circuit to the multi-gate IGBT. However, this collector clamp circuit is a means of connecting a clamp diode between the gate and collector to cut off the current. In the configuration shown in FIG. 10, since the second gate driver circuit 106 is already off, the collector clamp circuit is connected between the first gate driver circuit 105 and the collector 111.

However, if a collector clamp circuit is provided only to the first gate driver circuit 105 for a multi-gate IGBT, there is a problem in that the breakdown resistance during current interruption decreases.
As described above, the collector clamp circuit is a technology that suppresses overvoltage by turning the gate on again when the current is interrupted, slowing down the current interruption speed. However, since the current is interrupted slowly when a high voltage is applied, large losses occur.

In a multi-gate IGBT, multiple gates are shut off in sequence with a time lag. For this reason, if the collector clamp circuit is connected only to the gate that is shut off last, the function of suppressing the collector voltage can be realized. However, since the large loss that occurs during clamping is borne only by the few elements performing the clamping operation, it has become clear that the breakdown resistance is lower than when a collector clamp circuit is applied to a conventional single-gate IGBT.

The present invention aims to solve the above-mentioned problems and provide a technology for applying a collector clamp circuit to a multi-gate semiconductor element.

In order to solve the above-mentioned problems, one representative overvoltage protection circuit of the present invention is an overvoltage protection circuit connected to a multi-gate semiconductor element having a pair of main terminal pairs and a plurality of control terminals connected in parallel for controlling the current flowing through the main terminal pairs, the circuit comprising a plurality of diode groups, each of which has a plurality of first diodes connected in series in the same direction, corresponding to each of the plurality of control terminals, each of which has a cathode terminal connected to the high-voltage side terminal of the main terminal pair, and each of which has a different number of first diodes connected in series, and each of which has a plurality of second diodes corresponding to each of the plurality of control terminals, each of which has a cathode terminal connected to each of the plurality of diode groups , and each of which has an anode terminal connected to each of the plurality of diode groups.

According to the present invention, when a collector clamp circuit is provided in a multi-gate IGBT, it is possible to prevent a decrease in breakdown resistance, which is a problem specific to multi-gate IGBTs, and by enabling overvoltage protection, it is possible to improve the reliability of the system.
Furthermore, if overvoltage protection is possible using collector clamping, the current can be increased, making it possible to increase the output of the system.
Furthermore, since overvoltage protection is possible even if the parasitic inductance of the wiring increases, the wiring length can be increased, allowing greater freedom in layout, and facilitating the design of the device.
Problems, configurations and effects other than those described above will become apparent from the description of the following embodiments.

1 is a diagram showing a configuration of a collector clamp circuit according to a first embodiment of an overvoltage protection circuit of the present invention; FIG. 11 is a diagram showing a configuration of a collector clamp circuit according to a second embodiment of an overvoltage protection circuit of the present invention. FIG. 11 is a diagram showing a configuration of a collector clamp circuit according to a third embodiment of an overvoltage protection circuit of the present invention. FIG. 11 is a diagram showing a configuration of a collector clamp circuit according to a fourth embodiment of an overvoltage protection circuit of the present invention. FIG. 11 is a diagram showing an implementation of a collector clamp circuit and a gate driver unit in a 2-in-1 module as a fifth embodiment of the overvoltage protection circuit of the present invention. FIG. 13 is a diagram showing a connection state when the fifth embodiment is implemented. FIG. 13 is a diagram showing a circuit configuration of an overvoltage protection circuit according to a sixth embodiment of the present invention. FIG. 13 is a diagram showing an operation mode according to the sixth embodiment. FIG. 1 is a diagram showing a circuit configuration of an IGBT equipped with a collector clamp circuit as a conventional technique. FIG. 1 is a diagram showing an example of a circuit of a multi-gate IGBT. 3A to 3C are diagrams showing voltage and current waveforms at various parts during operation of the multi-gate IGBT.

Below, with reference to the drawings, Examples 1 to 6 will be described as embodiments for carrying out the present invention. Note that the present invention is not limited to these embodiments. In addition, in the drawings, the same parts are denoted by the same reference numerals.

FIG. 1 is a diagram showing a configuration of a collector clamp circuit according to a first embodiment of an overvoltage protection circuit of the present invention.
In FIG. 1, the multi-gate IGBT is composed of a first IGBT 101 having a first freewheel diode 102 and a second IGBT 103 having a second freewheel diode 104 .

For the first IGBT 101, a first gate driver circuit 105 is connected to the gate, and a series circuit of a first collector clamp diode 107 and a first reverse blocking diode 109 is connected between the gate and the collector 111. Specifically, the cathode of the first collector clamp diode 107 is connected to the collector 111 of the first IGBT 101, and the cathode of the first reverse blocking diode 109 is connected to the gate of the first IGBT 101.

Similarly, for the second IGBT 103, a second gate driver circuit 106 is connected to the gate, and a series circuit of a second collector clamp diode 108 and a second reverse blocking diode 110 is connected between the gate and the collector 111. Specifically, the cathode of the second collector clamp diode 108 is connected to the collector 111 of the second IGBT 103, and the cathode of the second reverse blocking diode 110 is connected to the gate of the second IGBT 103.

The first gate driver circuit 105 and the second gate driver circuit 106 form a gate driver unit 113.

The feature of the first embodiment is that a collector clamp diode is provided for each of the multiple gates of the multi-gate IGBT.

As mentioned above, in a multi-gate IGBT, if a collector clamp circuit is provided only on the gate that actually blocks current, there is a problem in that the breakdown resistance is reduced. In response to this, as in Example 1, a collector clamp circuit is provided for each of the gates of the multi-gate, and current is passed through the IGBTs that are off, so that the energy when an overvoltage is applied can be shared by all the IGBTs. This makes it possible to prevent a decrease in breakdown resistance.

Note that in FIG. 1, clamp diodes 107 and 108 are shown as three Zener diodes connected in series, but the number of Zener diode stages can be changed as appropriate to suit the type of diode used and the withstand voltage of the IGBT. For example, if the diodes are Schottky diodes, the breakdown voltage of the diodes will be low, so the number of diodes connected in series must be increased. On the other hand, if the withstand voltage of the IGBT is low, the number of stages will be reduced.

FIG. 2 is a diagram showing a configuration of a collector clamp circuit according to a second embodiment of an overvoltage protection circuit of the present invention.
2, the second collector clamp diode 108a differs from the first embodiment in that the number of series diode stages is changed compared to the second collector clamp diode 108 of the first embodiment, and is different from the number of series diode stages of the first collector clamp diode 107. In Fig. 2, the second collector clamp diode 108a has a larger number of series diode stages on the assumption that the second IGBT has a higher threshold value.

In addition, instead of the number of stages of the collector clamp diodes connected in series, the number of stages of the first or second reverse blocking diodes connected in series may be made different.

The feature of the second embodiment is that collector clamp diodes or reverse blocking diodes with different numbers of series stages are connected to each of the multiple IGBTs. By changing the number of series stages of these diodes, it is possible to change the starting voltage of overvoltage protection when an overvoltage is applied. This makes it possible to operate overvoltage protection at the appropriate timing even when IGBTs with different threshold values are combined to form a multi-gate IGBT, preventing a decrease in breakdown resistance.

FIG. 3 is a diagram showing a configuration of a collector clamp circuit according to a third embodiment of an overvoltage protection circuit of the present invention.
The third embodiment differs from the first and second embodiments in that, as shown in FIG. 3 , the collector clamp diode 114 is connected to both the gate of the first IGBT 101 via a reverse blocking diode 109 and to the gate of the second IGBT 103 via a reverse blocking diode 110.

The feature of the third embodiment is that the collector clamp diode is consolidated into one and distributed to two gates by a reverse blocking diode. This makes it possible to control two gates with one clamp diode, enabling overvoltage protection of the multi-gate IGBT while minimizing the increase in the number of parts.

In addition, because multiple gates are controlled by one clamp diode, the effects of manufacturing variations in the breakdown voltage of the clamp diode can be eliminated. This makes it possible to operate the collector clamp function at the same time for multiple IGBTs, preventing variations in breakdown resistance caused by variations in the clamp voltage.

FIG. 4 is a diagram showing a configuration of a collector clamp circuit according to a fourth embodiment of an overvoltage protection circuit of the present invention.
As shown in FIG. 4, the fourth embodiment differs from the third embodiment in that two first reverse blocking diodes 408 are connected in series.

The feature of the fourth embodiment is that the number of reverse blocking diodes connected in series is changed depending on the gate to which it is connected. In a multi-gate IGBT, the threshold voltages of the multiple IGBTs may differ. In that case, if the circuit configuration shown in Figure 3 is used, the gate voltages of each IGBT increase simultaneously, so the IGBT with the lower threshold voltage turns on first, causing a problem of increased loss in that IGBT and reduced breakdown resistance.

According to the fourth embodiment, the increase in gate voltage can be adjusted by changing the number of reverse blocking diodes connected in series, and the collector clamp function can be operated at an appropriate timing for IGBTs with different threshold voltages.
In this case, even if the difference in threshold voltage of the IGBTs is changed by changing the number of reverse blocking diodes connected in series, it is possible to match the timing.

The voltage can also be adjusted with precision by changing the type of reverse blocking diode. For example, when pn junction diodes are used, a potential difference of about 0.7 V can be obtained per diode stage, but when Schottky barrier diodes are used, it is possible to obtain a potential difference of about 0.3 V, which is lower than that of pn junction diodes, although this depends on the structure.
Furthermore, when there are three or more multi-gate IGBTs each having a different threshold value, it is possible to set an appropriate voltage by changing the number of stages and the type of diode.

Fig. 5 is a diagram showing a fifth embodiment of the overvoltage protection circuit of the present invention, in which a collector clamp circuit and a gate driver unit are mounted on a 2-in-1 module, and Fig. 6 is a diagram showing a connection state when mounted.
5, a clamp substrate 805 having a collector clamp diode mounted thereon is attached to a 2-in-1 module 804 having a positive terminal 801, an AC terminal 802, and a negative terminal 803, and is connected to an external gate driver unit 113. Here, the letters "U" and "L" suffixed to the reference numerals (805 and 113) represent the upper arm and the lower arm, respectively, of the 2-in-1 module.

The feature of the fifth embodiment is that a 2-in-1 module, which has multi-gate IGBTs connected in series mounted in a single package, is equipped with only the collector clamp circuit of any of the first to fourth embodiments, and the gate driver unit itself is placed separately from this module.

As shown in FIG. 5, a 2-in-1 module equipped with a high-voltage power device of 1 kV or more has a positive terminal 801 and a negative terminal 803 adjacent to each other at one end of the module, and an AC terminal 802 at the other end. As shown in FIG. 6, IGBTs constituting an upper arm (U side) and a lower arm (L side) are housed in a 2-in-1 module 804, and the connection point between the upper arm and the lower arm is drawn out to the outside of the module via an AC terminal 802. The clamp diodes and reverse element diodes shown in Examples 1 to 4 are collected on a clamp diode board 805 and connected to the upper arm and the lower arm, respectively.

As shown in FIG. 5, a space is provided between the negative terminal 803 and the AC terminal 802. In conventional IGBT or SiC-MOSFET modules, a collector clamp circuit and a gate driver are mounted in this space. However, when mounting a multi-gate IGBT on a 2-in-1 module, the number of gate terminals increases, leaving insufficient space to mount the circuits, making it difficult to mount both the clamp diode and the gate driver on the module.

Therefore, by separating the gate driver substrate and placing it as a unit in a space separate from the module, sufficient circuit space can be secured. Also, in the fifth embodiment, a case where there are two gates is shown as an example of a multi-gate IGBT, but in the case of three or more gates, the space on the module becomes even more insufficient due to the increase in terminals, but by placing the gate driver separately as in the fifth embodiment, these problems can be solved.

Figure 7 is a diagram showing a circuit configuration according to a sixth embodiment of the overvoltage protection circuit of the present invention. Figure 8 is a diagram showing an operation mode according to the sixth embodiment. As shown in Figure 7, the sixth embodiment differs from the first to fourth embodiments in that a clamp detection circuit 1001 is added to the circuit configuration. The clamp detection circuit 1001 is connected to the gate of the first IGBT 101 and the gate of the second IGBT 103. In Figure 7, the clamp detection circuit 1001 is included in the gate driver unit 113, but is not limited to this.

The feature of the sixth embodiment is that the clamp detection circuit 1001 detects that the overvoltage protection provided by the clamp diode has functioned, and transmits the information to a higher-level controller to provide appropriate protection.

The operation of the sixth embodiment will be described with reference to FIG.
At time t1, the second gate driver circuit 106 is turned off, cutting off the current of the second IGBT 103. The current flowing through the second IGBT 103 is commutated to the first IGBT 101.

At time t2, when the first gate driver circuit 105 is turned off, the output of the first gate driver circuit 105, i.e., the gate voltage of the first IGBT 101, decreases. When this gate voltage decreases to near the threshold voltage of the element, the collector voltages of the first IGBT 101 and the second IGBT 103 increase.

At time t3, when the collector voltage exceeds the Zener voltage of the clamp diode, the gate voltage of the second IGBT 103 is raised, turning it on and allowing current to flow through the second IGBT 103.

At time t4, if the gate voltage of the second IGBT 103 rises within a predetermined time after the output voltage of the first gate driver circuit 105 is inverted from Hi to Lo, even though the second gate driver circuit 106 is off, the clamp detection circuit 1001 determines that the clamp function has been activated. The clamp detection circuit 1001 transmits this determination information to a higher-level controller (not shown).

The above operations enable the upper controller to take appropriate measures such as stopping the system and prohibiting restarts, thereby improving the reliability of the system.
The above-mentioned predetermined time period varies depending on the specifications of the multi-gate IGBT, but is preferably set to approximately 10 μs or less.

As described above, in Examples 1 to 6 of the present invention, a multi-gate IGBT with two gates has been described, but the number of gates is not limited to this, and similar effects can be obtained even when there are three or more gates.

In addition, in Examples 1 to 6, the configuration of the multi-gate IGBT itself was not specifically described, but in this regard, the present invention can be applied to a configuration in which IGBT1 and IGBT2 are different chips that are mounted in parallel in a single package, or a configuration in which two types of IGBTs are formed in a single chip, and similar effects can be obtained.

Although the embodiment of the present invention has been described above, the present invention is not limited to the above-mentioned embodiment, and various modifications are possible without departing from the gist of the present invention.

101: first IGBT; 102: first freewheeling diode;
103: second IGBT; 104: second freewheel diode;
105: first gate driver circuit; 106: second gate driver circuit;
107: first collector clamp diode;
108: second collector clamp diode;
108a: second collector clamp diode;
109: first reverse blocking diode; 110: second reverse blocking diode;
111: collector, 112: emitter, 113: gate driver unit,
114: collector clamp diode, 408: first reverse blocking diode,
501: IGBT module, 502: IGBT, 503: freewheel diode,
504: collector, 505: gate, 506: emitter, 507: clamp diode,
508: reverse blocking diode, 509: gate driver,
801: positive terminal, 802: AC terminal, 803: negative terminal,
804: 2-in-1 module, 805U, 805L: clamp board,
101U, 101L: first IGBT,
102U, 102L: first freewheel diode,
103U, 103L: second IGBT,
104U, 104L: second freewheel diode,
105U, 105L: first gate driver circuit,
106U, 106L: second gate driver circuit,
107U, 107L: first collector clamp diode,
108U, 108L: second collector clamp diode,
109U, 109L: first reverse blocking diode,
110U, 110L: second reverse blocking diode,
113U, 113L: gate driver unit,
1001: Clamp detection circuit

Claims (6)

An overvoltage protection circuit connected to a multi-gate semiconductor device having a pair of main terminal pairs and a plurality of control terminals connected in parallel for controlling a current flowing through the main terminal pairs,
a plurality of diode groups, each of which includes a plurality of first diodes connected in series in the same direction, corresponding to the plurality of control terminals , each of which has a cathode terminal connected to a high-voltage side terminal of the main terminal pair, and each of which has a different number of first diodes connected in series ,
an overvoltage protection circuit including a plurality of second diodes corresponding to the plurality of control terminals, each of the second diodes having a cathode terminal connected to each of the plurality of control terminals, and each of the second diodes having an anode terminal connected to each of the anode terminals of the plurality of diode groups. 2. The overvoltage protection circuit of claim 1,
The group of the plurality of first diodes connected in series with a larger number of the first diodes is connected to a control terminal of the multi-gate semiconductor device with a higher threshold voltage via the second diode.
1. An overvoltage protection circuit comprising: An overvoltage protection circuit connected to a multi-gate semiconductor device having a pair of main terminal pairs and a plurality of control terminals connected in parallel for controlling a current flowing through the main terminal pairs,
a diode group, each of which includes a plurality of first diodes connected in series in the same direction, is provided corresponding to each of the plurality of control terminals, and a cathode terminal of the one diode group or each of the cathode terminals of the plurality of diode groups is connected to a high-voltage side terminal of the main terminal pair;
an anode terminal of each of the second diodes is connected in common to an anode terminal of one of the diode groups or is connected to each of the anode terminals of the plurality of diode groups; and the number of series connected in each of the plurality of second diodes is different, and the number of series connected to a control element having a lower threshold value of the multi-gate semiconductor element is greater than the number of series connected to the control element having a lower threshold value of the multi-gate semiconductor element. 4. The overvoltage protection circuit according to claim 1,
the first diode is a clamp diode;
The second diode is a reverse blocking diode.
1. An overvoltage protection circuit comprising: 5. An overvoltage protection circuit according to claim 1,
a clamp detection circuit that detects a voltage of each of the plurality of control terminals;
The clamp detection circuit detects that a control terminal other than the one control terminal has changed from an off state to an on state within a predetermined time after the one control terminal among the plurality of control terminals has changed from an on state to an off state, and transmits the detection result to a higher-level controller.
1. An overvoltage protection circuit comprising: A first substrate on which the overvoltage protection circuit according to any one of claims 1 to 4 is mounted is mounted on a module in which a plurality of the multi-gate semiconductor elements are housed in one package, a second substrate on which a gate driver that outputs a drive signal for each of the plurality of multi-gate semiconductor elements is mounted is disposed outside the module, and the first substrate and the second substrate are connected by wiring.
A module having an overvoltage protection circuit having a configuration .

Images