JP7633827B2 - Silicon wafer and method for manufacturing stacked wafers using the same - Google Patents

Description

The present invention relates to a silicon wafer and a method for manufacturing a laminated wafer using the same, and in particular to a silicon wafer that is less susceptible to cracking or chipping of the bevel in the device-used area of the silicon wafer that is thinned during the device manufacturing process, and a method for manufacturing a laminated wafer using the same.

In recent years, there has been research into stacking multiple semiconductor chips to improve functionality, capacity, processing power, etc. One method for achieving this is to create a three-dimensional device by stacking multiple semiconductor wafers to form a stacked wafer. In a stacked wafer, the first semiconductor wafer, which is the lowest layer, is formed to a certain thickness, and a second semiconductor wafer of a similar thickness is then stacked on the top surface of the first semiconductor wafer. After that, the top surface of the second semiconductor wafer is ground to make it thinner in order to improve heat dissipation or to enable further semiconductor wafers to be stacked on top of it.

For example, as shown in FIG. 6(a), in this laminated wafer 30, a bonded wafer 32 having approximately the same thickness is laminated on a lower support wafer 31 (bonded with a silicon oxide film or adhesive). As shown in the figure, the support wafer 31 and the bonded wafer 32 are each chamfered. Then, in order to improve heat dissipation or to enable another semiconductor wafer (not shown) to be laminated on top of it, the bonded wafer 32 is ground from the top side (front side) to make it thinner.

However, because the outer peripheral end surface (chamfered surface) of the bonded wafer 32 before grinding has a trapezoidal or arcuate cross section as shown in the figure, when this bonded wafer 32 is ground until it becomes thin, the outer peripheral end surface takes on an acute angle like a knife edge as shown in FIG. 6(b), which makes it prone to chipping. Furthermore, when chipping occurs, cracks can develop, reducing the quality of the laminated wafer or making it unusable.

In response to such problems, Patent Document 1 discloses a processing method in which a second semiconductor wafer (corresponding to a bonded wafer) 42 is stacked on a first semiconductor wafer (corresponding to a support wafer) 41 as shown in FIG. 7, and the outer peripheral end face of the second semiconductor wafer 42 is removed while rotating the first semiconductor wafer 41, and then the upper surface side of the second semiconductor wafer 42 is ground to make it thinner.
As a means for removing the outer peripheral end surface of the second semiconductor wafer 42, as shown in FIG. 7, a grinding wheel 43 having a grinding wheel portion 43a at its outer peripheral end is lowered while rotating at high speed, and the grinding wheel portion 43a at the tip is brought into contact with the outer peripheral end surface of the second semiconductor wafer 42 to grind it off.

JP 2005-116614 A

According to the method disclosed in Patent Document 1, when this method is implemented, it is possible to prevent the peripheral edge portion (bevel portion) of the second semiconductor wafer (corresponding to the bonded wafer) 42 from becoming knife-edge shaped.
However, when attempting to remove only the peripheral edge of the second semiconductor wafer 42 by lowering the grinding wheel 43 rotated at high speed, there was a risk of damaging the first semiconductor wafer 41 underneath, which was a technically difficult problem.
Furthermore, even if processing is performed, not only the periphery but also part of the surface of the second semiconductor wafer 42 is removed, which causes a problem that the effective area for stacking semiconductor chips is reduced.
Furthermore, deep fracture layers are likely to occur on the processed surface, which may cause contamination, cracks, and the like in the subsequent device manufacturing process.

The present invention was made under the circumstances described above, and aims to provide a silicon wafer that can suppress the occurrence of cracks and chips at the peripheral edge of the silicon wafer that is thinned and bonded to a support wafer, and a method for manufacturing stacked wafers using the same.

The silicon wafer of the present invention, which has been made to solve the above problems, is a silicon wafer that is thinned in a device manufacturing process, and includes a handling section having a chamfered peripheral portion and first and second inclined surfaces formed on the front and back peripheral portions, respectively, and a disk-shaped device forming section formed on one side of the handling section, concentric with the handling section and with a smaller diameter, the peripheral portion of the device forming section has a third inclined surface inclined with respect to the wafer surface, and the third inclined surface is formed so that a lower end of the third inclined surface is connected to an upper end of the first inclined surface of the peripheral portion of the handling section, and the inclination angle of the third inclined surface is formed to be 40° or more and 75° or less with respect to the wafer surface.
The inclination angle of the first and second inclined surfaces is preferably 15° to 50° with respect to the wafer surface.

In this way, in the silicon wafer according to the present invention, the inclination angle (bevel angle) of the peripheral portion of the device formation portion is formed to be 40° or more and 75° or less, so the corners of the peripheral end portion are not acute angles, and the occurrence of cracks and chips can be prevented. As a result, deterioration in the quality of the semiconductor wafer can be suppressed.

Further, in order to solve the above problems, a manufacturing method for laminated wafers using silicon wafers according to the present invention is a manufacturing method for laminated wafers in which a silicon wafer is bonded onto a support wafer and the silicon wafer is ground to thin the silicon wafer, the manufacturing method comprising the steps of: bonding an upper surface side of the device formation part onto the support wafer; and grinding and removing the handling part, characterized in that, before the step of bonding the upper surface side of the device formation part onto the support wafer, an inclined surface is formed on a peripheral portion of the device formation part, and an inclination angle of the inclined surface with respect to the wafer surface is formed in a range of 40° or more and 75° or less.
Furthermore, before the step of bonding the upper surface side of the device formation section onto the support wafer, it is desirable to form an inclined surface on the peripheral portion of the handling section, and to form the inclination angle of the inclined surface with respect to the wafer surface to be 15° or more and 50° or less.

According to this method, the grinding process can be easily performed because it is only necessary to remove the handling section that is placed above the device formation section and has a larger diameter than the device formation section. In addition, no sharp corners are formed on the peripheral edge of the device formation section that remains after the thinning process, and the occurrence of cracks or chips in the wafer can be prevented.

The present invention provides a silicon wafer that can suppress the occurrence of cracks and chips at the peripheral edge of a silicon wafer that is thinned and bonded onto a support wafer, and a method for manufacturing a stacked wafer using the same.

FIG. 1 is a perspective view showing an embodiment of a silicon wafer according to the present invention. FIG. 2 is an enlarged cross-sectional view showing the peripheral edge (bevel portion) of the silicon wafer of FIG. FIG. 3 is a cross-sectional view showing a state in which the peripheral edge of the silicon wafer is ground with a bevel grindstone. 4(a) and (b) are cross-sectional views showing a state in which the peripheral edge of a silicon wafer is ground with another bevel grinding wheel. 5(a) to (c) are cross-sectional views for explaining the process of manufacturing a laminated wafer using the silicon wafer of the present invention. 6A and 6B are cross-sectional views for explaining problems with conventional laminated wafers. FIG. 7 is a cross-sectional view for explaining a conventional method for manufacturing laminated wafers.

The silicon wafer according to the present invention and its manufacturing method are described below. The silicon wafer according to the present invention is bonded onto a disk-shaped support glass or support wafer, and then ground in the thickness direction to reduce its thickness before use.

Fig. 1 is a perspective view showing a schematic diagram of an embodiment of a silicon wafer according to the present invention. Fig. 2 is a cross-sectional view showing an enlarged peripheral edge (bevel portion) of the silicon wafer of Fig. 1. In the following description, the upper surface side of the silicon wafer 1 shown in Fig. 1 is referred to as the front surface, and the lower surface side is referred to as the back surface.
A silicon wafer 1 shown in FIG. 1 has a handling section 2 which forms the back surface side, and a device forming section 3 which is formed concentrically on the handling section 2 and forms the front surface side.

As shown in FIG. 2, the upper surface of the handling section 2 and the lower surface of the device forming section 3 are connected, and the handling section 2 and the device forming section 3 are integrally formed.
The peripheral edge of the handling portion 2 is formed into a trapezoidal cross section with chamfers on both the front and back sides.
The device forming section 3 has a device forming surface 3a on its front side and a chamfered inclined surface 3b (third inclined surface) on its periphery. The lower end of the inclined surface 3b is formed so as to be continuous with the upper end of the inclined surface 2a on the front side of the handling section 2.

The reason for this shape is that the grinding for thinning can be performed in stages, making the thinning process easy without causing cracks or the like. That is, when manufacturing laminated wafers, the front side of silicon wafer 1 (the front side of device formation section 3) is bonded onto a disk-shaped support glass or support wafer (not shown) (that is, silicon wafer 1 is upside down from the state in Figures 1 and 2), and handling section 2 is removed during grinding.

The shape of the silicon wafer 1 before thinning will be described more specifically.
In the handling section 2, the inclination angles (called bevel angles) of the inclined surfaces 2a and 2b (first and second inclined surfaces) of the chamfer (bevel) with respect to the horizontal plane are 15° to 50° for both the front side θ1 and the back side θ2. The bevel angles θ1 and θ2 may be the same angle or different angles as long as they are within the above-mentioned angle range.
When the bevel angles θ1 and θ2 are less than 15°, the bevel width becomes too large for a standard wafer thickness (for a wafer with a thickness of 300 mm, the bevel width becomes 775 μm), which is not preferable. Also, when the bevel angles θ1 and θ2 are more than 50°, chipping, cracks, and dust generation during handling and polishing/grinding are likely to occur, which is not preferable.

In addition, the device forming part 3 is formed such that the inclination angle (called the bevel angle) θ3 of the inclined surface 3b is 40° or more and 75° or less. That is, the bevel angle θ3 is formed to be equal to or more than the bevel angle θ1, and as long as the bevel angles θ2 and θ3 are not equal, a concave step is formed between the inclined surface 2a and the inclined surface 3b. If the angle θ4 of this concave step is small, it becomes difficult to process the surface, such as polishing it, so it is preferable that the angle θ4 is 130° or more.
Moreover, when the bevel angle θ3 is less than 40°, cracks are generated during processing for thinning the wafer, which is not preferable, and when the bevel angle θ3 is more than 75°, cracks are generated during handling, the film formed on the device is likely to peel off, and dust is generated due to contact with the wafer carrier (cassette), which is not preferable.

2, the thickness A of the device forming portion 3 after grinding is set in the range of A≦ _T1 ≦100 μm, where _T1 is the thickness of the device forming portion 3 before grinding. This makes it possible to prevent cracks and chips from occurring at the outer peripheral edge of the thinned silicon wafer 1. If _T1 is greater than 500 μm, the outer peripheral edge of the handling portion 2 of the silicon wafer 1 becomes too thin, which is undesirable because it makes the bevel portion more susceptible to cracks and chips during processing.

2, the radial length (bevel width) _W1 of the chamfered portion at the peripheral end of the handling unit 2 is set to 500 μm or less. By satisfying this condition, it is possible to prevent the wafer diameter after thinning from becoming too small, and to facilitate processing into the desired bevel shape.
The thickness _T0 of the silicon wafer 1 is not particularly specified, but is formed to be, for example, 775 μm.

To form a silicon wafer 1 with such a shape, as shown in FIG. 3, a bevel grindstone 15 corresponding to the desired bevel shape is prepared in advance, and the peripheral edge of the wafer is ground with the bevel grindstone 15 while rotating the silicon wafer 1 at high speed around its central axis.

Alternatively, as shown in FIG. 4(a), for example, a bevel grindstone 16 that corresponds to the shape of the back side of the silicon wafer 1 (the peripheral edge of the lower back side of the handling section 2) is used to grind only the peripheral edge of the back side of the wafer, and then, as shown in FIG. 4(b), a bevel grindstone 17 that corresponds to the shape of the front side of the silicon wafer 1 (from the top of the handling section 2 to the peripheral edge of the device formation section 3) is used to grind the peripheral edge of the front side of the wafer.

Next, a process for forming a laminated wafer 20 using the silicon wafer 1 having such a shape will be described with reference to FIGS.
5(a), the front side of the silicon wafer 1 (the front side of the device forming section 3) is bonded to the front side of the support wafer 10 via a silicon oxide film of several tens of nm or an adhesive (resin). As a result, the back side of the silicon wafer 1 (the back side of the handling section 2) becomes the upper surface of the stacked wafer 20. The thickness of the silicon wafer 1 at this time is T ₀ (for example, 775 μm).

Next, as the grinding process, a grinder is used to grind the silicon wafer 1 from above to a target value A (e.g., 100 μm), and the handling section 2 is removed as shown in Fig. 5(b). In this manner, the grinding process is a process of grinding and removing the handling section 2 located above the device forming section 3 and having a larger diameter than the device forming section 3, so that the grinding operation can be performed easily.
Here, the bevel angle θ3 of the device formation portion 3 is between 40° and 75°, and therefore the device formation portion 3 does not have a knife edge shape.

In this way, in the laminated wafer 20 using the silicon wafer 1 according to the present embodiment, the bevel angle θ3 of the device formation portion 3 on the supporting wafer 10 is formed to be 40° or more and 75° or less with respect to the surface of the supporting wafer 10, so that the corners of the peripheral edge are not acute angles, and the occurrence of cracks and chips can be prevented. As a result, deterioration in the quality of the semiconductor wafer can be suppressed.
Furthermore, when forming the laminated wafer 20 using the silicon wafer 1, the grinding process can be easily performed since it is only necessary to remove the handling section 2 arranged on the device forming section 3 and having a diameter larger than that of the device forming section 3. Furthermore, no sharp corners are formed on the peripheral edge of the device forming section 3 remaining after the thinning process, and cracks or chips in the wafer can be prevented.

The silicon wafer and the method for manufacturing a laminated wafer using the same according to the present invention will be further described based on examples.
In this example, silicon wafers having a diameter of 300 mm and a thickness of 775 μm (T ₀ ) were manufactured, and the peripheral edge of the wafer was processed based on the conditions set in Examples 1 to 7 and Comparative Examples 1 to 4, to produce verification silicon wafers having a handling section and a device formation section having a smaller diameter than that, and each having a different bevel angle.
Next, the verification silicon wafer was bonded onto a support wafer via a silicon oxide film having a thickness of 80 nm, and grinding (using a #8000 grindstone) was carried out to gradually reduce the thickness based on the embodiment described above.

The target values (set values) of the stepwise grinding of the test silicon wafers were set to an initial value _T0 of 775 μm and a target value A after grinding of 5 μm for each condition. The radial protrusion length _W1 of the peripheral end (bevel portion) of the large diameter portion was set to 500 μm.

In each of the examples (Examples 1 to 7 and Comparative Examples 1 to 4), 1000 samples were examined, and conditions were set for θ1, θ2, and θ3 shown in FIG.
Table 1 shows the conditions and results of Examples 1 to 7 and Comparative Examples 1 to 4. In Table 1, the evaluation item "bevel cracking, chipping" is indicated as ○ when no cracking or chipping occurred, and × when it occurred. Note that bevel cracking and chipping include cracking and chipping at the peripheral end of the handling part that occurs when grinding the silicon wafer. In addition, the evaluation item "bonding failure" is indicated as ○ when there was no bonding failure with the support wafer, × when the incidence rate is 1% or more, and △ when the incidence rate is less than 1%. In addition, the evaluation item "metal contamination" is indicated as △ when the level is the same as the conventional bevel shape, and as ○ when the good level. If it is ○ or △, it is judged to be a good product.

(Table 1)

In Example 1, the conditions were handling portion bevel angle θ1 = 30°, handling portion bevel angle θ2 = 30°, and device formation portion bevel angle θ3 = 40°, but no cracks, chips, or poor bonding occurred in the bevel portions, and metal contamination was good.
In Example 2, the conditions were handling portion bevel angle θ1 = 30°, handling portion bevel angle θ2 = 30°, and device formation portion bevel angle θ3 = 60°, and no cracks, chips, or poor bonding occurred in the bevel portions, and metal contamination was good.

In Example 3, the conditions were handling portion bevel angle θ1 = 30°, handling portion bevel angle θ2 = 30°, and device formation portion bevel angle θ3 = 75°, and no cracks, chips, or poor bonding occurred in the bevel portions, and metal contamination was good.
In Example 4, the conditions were handling portion bevel angle θ1 = 15°, handling portion bevel angle θ2 = 15°, and device formation portion bevel angle θ3 = 60°, and no cracks, chips, or poor bonding occurred in the bevel portions, and metal contamination was good.

In Example 5, the conditions were handling portion bevel angle θ1 = 20°, handling portion bevel angle θ2 = 20°, and device formation portion bevel angle θ3 = 65°, and no cracks, chips, or poor bonding occurred in the bevel portions, and metal contamination was good.
In Example 6, the conditions were handling portion bevel angle θ1 = 40°, handling portion bevel angle θ2 = 40°, and device formation portion bevel angle θ3 = 60°, and no cracks, chips, or poor bonding occurred in the bevel portions, and metal contamination was good.
In Example 7, the conditions were handling portion bevel angle θ1 = 50°, handling portion bevel angle θ2 = 50°, and device formation portion bevel angle θ3 = 60°, and no cracks, chips, or poor bonding occurred in the bevel portions, and metal contamination was good.

On the other hand, in Comparative Example 1, the conditions were as follows: handling section bevel angle θ1=30°, handling section bevel angle θ2=30°, and device formation section bevel angle θ3=35°.
No bonding failure occurred, and there was little metal contamination, but the peripheral edge of the device formation area became knife-edge shaped, and cracks and chips occurred in the bevel area.

In Comparative Example 2, the conditions were as follows: handling section bevel angle θ1=30°, handling section bevel angle θ2=30°, and device formation section bevel angle θ3=80°.
No bonding failure occurred, and there was little metal contamination. In addition, there was no cracking or chipping of the bevel at the peripheral edge of the device formation part during the thinning process, but cracking and chipping occurred in the bevel of the handling part.

In Comparative Example 3, the conditions were as follows: handling section bevel angle θ1=15°, handling section bevel angle θ2=15°, and device formation section bevel angle θ3=60°.
There was no bonding failure and no metal contamination. In addition, there was no cracking or chipping of the bevel at the peripheral edge of the device formation part during the thinning process, but the bevel part of the handling part became edge-like, and cracks and chipping occurred there.

In Comparative Example 4, the conditions were as follows: handling section bevel angle θ1=55°, handling section bevel angle θ2=55°, and device formation section bevel angle θ3=60°.
No bonding failure occurred, and there was little metal contamination. In addition, there was no cracking or chipping of the bevel at the peripheral edge of the device formation portion during thinning, but cracking and chipping occurred in the bevel of the handling portion during handling.

From the results of the above examples, it was found that the risk of cracks occurring during wafer handling can be reduced by setting the handling portion bevel angles θ1, θ2 to be 15° or more and 50° or less.
It was also found that by setting the bevel angle θ3 of the device formation portion to 40° or more, the peripheral portion of the device formation portion does not become edge-like, and the occurrence of cracks can be suppressed. It was also confirmed that by setting the bevel angle θ3 of the device formation portion to 75° or less, the risk of crack occurrence during wafer handling can be reduced.

REFERENCE SIGNS LIST 1 Silicon wafer 2 Handling section 2a Inclined surface 2b Inclined surface 3 Device forming section 3a Inclined surface 10 Support wafer 20 Stacked wafers θ1 Bevel angle θ2 Bevel angle θ3 Bevel angle

Claims (4)

A silicon wafer that is thinned in a device manufacturing process,
a handling section having a chamfered peripheral portion and first and second inclined surfaces formed on the front and back peripheral portions, respectively;
a disk-shaped device forming section formed on one side of the handling section, the disk-shaped device forming section being concentric with the handling section and having a smaller diameter than the handling section;
the peripheral portion of the device forming portion has a third inclined surface inclined with respect to the wafer surface, and the lower end of the third inclined surface is formed so as to be continuous with an upper end of the first inclined surface of the peripheral portion of the handling portion;
A silicon wafer, wherein the third inclined surface is formed with an inclination angle of 40° or more and 75° or less with respect to the wafer surface. 2. The silicon wafer according to claim 1 , wherein the inclination angle of the first and second inclined surfaces is 15 degrees or more and 50 degrees or less with respect to the wafer surface. A method for manufacturing a laminated wafer, comprising bonding the silicon wafer according to claim 1 or 2 onto a support wafer and grinding the silicon wafer to reduce its thickness,
bonding an upper surface side of the device formation portion onto the support wafer;
and removing the handling portion by grinding.
Prior to the step of bonding the upper surface side of the device formation portion onto the support wafer,
A method for manufacturing a laminated wafer, comprising forming an inclined surface on the peripheral portion of the device formation portion, and forming the inclination angle of the inclined surface with respect to the wafer surface in the range of 40° to 75°. Prior to the step of bonding the upper surface side of the device formation portion onto the support wafer,
4. The method for manufacturing laminated wafers according to claim 3, further comprising forming an inclined surface on the peripheral portion of the handling portion, the inclination angle of the inclined surface relative to the wafer surface being 15 degrees or more and 50 degrees or less.

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