JP7476733B2 - COMMUNICATION CONTROL DEVICE AND METHOD FOR CONTROLLING COMMUNICATION CONTROL DEVICE - Google Patents

Description

The present invention relates to a communication control device that transfers data received from a network to a main memory.

Conventionally, there is known a technique for preventing erroneous data transfer due to a descriptor in a communication control device that transfers data received from a network to a main memory. For example, the below-mentioned Patent Document 1 discloses a DMA circuit that checks whether the descriptor is correct when reading it and determines whether or not a DMA transfer of data from memory is possible. If the DMA circuit determines that the descriptor is incorrect, it does not perform the DMA transfer and notifies the CPU of an error. Then, after the CPU that has been notified of the error makes appropriate settings, the DMA circuit executes the transfer.

JP 2006-178795 A

However, the above-mentioned conventional technology has a problem in that it is not possible to execute the data reception process, which involves "transferring received data to main memory according to the descriptor," at high speed. For example, the above-mentioned conventional technology has difficulty completing the data reception process, which should be executed periodically at a high-speed control period (e.g., 100 μs), within the control period. The details of the problems with the conventional technology are explained below with reference to FIG. 8.

Figure 8 is a diagram explaining the time required for a communication control device that transfers data to a main memory according to a descriptor to transfer the data to the main memory after determining whether the descriptor is permissible (valid) in the prior art described above.

In the conventional technology described above, when the communication control device detects an error in the descriptor, the communication control device notifies the CPU of the detection result. The CPU, which receives the notification, resets the descriptor. Then, the communication control device transfers data to the main memory according to the descriptor reset by the CPU.

As a result, as shown in FIG. 8 (A), the communication control device must wait until the CPU (software) has completed the descriptor reconfiguration process, and it takes a long time from detecting a descriptor error to transferring the data to the main memory.

Furthermore, communications control devices generally store received data in a buffer (for example, a data FIFO, which is a storage area using the FIFO (First In First Out) method) as a temporary storage area between when the data is received and when it is transferred to the main memory. The communications control device then transfers the data stored in the buffer to the main memory according to the descriptor. However, the storage capacity of the buffer provided in the communications control device is usually limited. Furthermore, as a rule, once data has been stored in the buffer, the communications control device will keep the data stored in the buffer until the transfer of that data to the main memory is complete.

Therefore, as shown in FIG. 8B, if the time required from determining whether the descriptor is acceptable to transferring the data to the main memory becomes long, the received data cannot be stored in the buffer, and as a result, the received data may be lost.

In the example shown in FIG. 8B, after receiving data 1, the communication control device according to the conventional technology further receives data 2 and data 3, and stores the received data 1, data 2, and data 3 in a buffer. The communication control device then keeps data 1 stored in the buffer until the transfer of data 1 to the main memory is complete, that is, until the CPU (software) has completed the descriptor resetting process. However, because the buffer has a limited storage capacity, the buffer storing data 1, data 2, and data 3 received by the communication control device does not have enough room to store new data.

Therefore, if the communication control device further receives data 4 before the software completes the descriptor reconfiguration process and the transfer of data 1 to the main memory is completed, the communication control device will not be able to store data 4 in the buffer. Therefore, the communication control device will not be able to transfer the received data 4 to the main memory, and data 4 will be lost.

As explained with reference to FIG. 8, the conventional technology "when an error in a descriptor is detected, the detection result is notified to the CPU, and data is transferred to the main memory according to the descriptor reset by the CPU" has the following problems. That is, the conventional technology has a problem that it takes a long time to transfer data, and as a result of the long time required for data transfer, there is a problem that the received data may be lost (i.e., the data cannot be transferred to the main memory).

One aspect of the present invention aims to realize a communication control device that can transfer data received from a network to main memory at high speed while preventing erroneous data transfer due to a descriptor.

In order to solve the above problem, a communication control device according to one aspect of the present invention is a communication control device that transfers data received from a network to a main memory, and includes a reading unit that reads a descriptor that specifies the start address of an area in which the data is to be stored, a determination unit that determines that the descriptor read by the reading unit is usable if the start address specified in the descriptor read by the reading unit is within an allowed area that is a pre-set area in the main memory in which the data can be stored, and a transfer unit that transfers the data to an area whose top address is the start address specified in the descriptor read by the reading unit. and a transfer unit that transfers the data, and a plurality of the descriptors are prepared in advance, and the transfer unit (A) transfers the data to an area having the start address specified in the first descriptor as a leading address when the determination unit determines that a first descriptor read by the reading unit among the plurality of the prepared descriptors is available, and (B) transfers the data to an area having the start address specified in a second descriptor read by the reading unit after the first descriptor as a leading address when the determination unit determines that the first descriptor is not available.

According to the above configuration, when the communication control device determines that the first descriptor read from the multiple prepared descriptors is "available," it transfers data to an area whose top address is the start address specified by the first descriptor. When the communication control device determines that the first descriptor is "unavailable," it further reads the second descriptor from the multiple prepared descriptors. Then, the communication control device transfers the data to an area whose top address is the start address specified by the second descriptor.

In other words, even if the communication control device determines that the start address specified by the read first descriptor is not within the permitted area, it does not notify the CPU or the like of the determination result, and does not cause the CPU or the like to reset the first descriptor to the correct one. When the communication control device determines that the start address specified by the first descriptor is not within the permitted area, it further reads the second descriptor prepared in advance, and transfers the data to main memory according to the read second descriptor.

The communication control device selects an "available descriptor" for the data transfer from among the multiple descriptors prepared in advance, and transfers the data according to the selected "available descriptor."

As a result, the communication control device can prevent erroneous data transfer using the descriptor, and can reduce the time required to transfer the data compared to when the CPU or the like is forced to reset the "available descriptor" for the data transfer.

In other words, the communication control device has the effect of preventing erroneous data transfer due to the descriptor, while being able to transfer data received from the network to the main memory at high speed.

In particular, the determination of "whether or not the start address specified in the read descriptor is within the permitted area" can be performed even before the data is received from the network. Therefore, the communication control device can perform processing to prevent "erroneous data transfer due to a descriptor" before receiving the data.

The communication control device performs processing to prevent "erroneous data transfer due to a descriptor" before receiving the data, thereby achieving the effect of shortening the time from receiving the data to transferring the data to the main memory.

Here, it is preferable that the communication control device is realized as a NIC (Network Interface Card). The communication control device is typically configured with a hardware logic circuit such as an FPGA (Field-Programmable gate array) or an ASIC (Application Specific Integrated Circuit).

When the communication control device that determines whether to reject a descriptor is configured with a hardware logic circuit, the following effect can be achieved. That is, generally, if the processing content is the same, processing by hardware can be executed faster than processing by software (specifically, a CPU). Therefore, the communication control device configured with a hardware logic circuit has the effect of being able to determine whether to reject a descriptor faster than when the CPU is used to determine whether to reject a descriptor.

In particular, the communication control device selects an "available descriptor" for the data transfer from among a number of descriptors prepared in advance, without requiring a CPU or other device to reconfigure the descriptor, and executes the transfer according to the selected descriptor.

When configured with a hardware logic circuit, the communication control device can extremely quickly select an "available descriptor" for the data transfer from among a number of descriptors prepared in advance. Also, when configured with a hardware logic circuit, the communication control device can extremely quickly perform transfer according to a descriptor selected from a number of descriptors prepared in advance.

Therefore, when the communication control device is configured with a hardware logic circuit, the communication control device has the effect of being able to transfer data received from the network at extremely high speeds while preventing erroneous data transfer due to the descriptor.

In a communication control device according to one aspect of the present invention, the determination unit may determine that the descriptor read by the reading unit is available if (A) the start address specified in the descriptor read by the reading unit is within the permitted area, and (B) the end address of the area after the data is transferred, calculated from the data size of the received data and the start address specified in the descriptor read by the reading unit, is within the permitted area.

According to the above configuration, the communication control device calculates the end address from the data size of the received data and the start address specified by the descriptor read by the reading unit. Then, when the communication control device determines that "the start address specified by the read descriptor is within the permitted area" and "the end address is within the permitted area," it determines that the read descriptor is available for use.

Here, even if "the start address specified by the read descriptor is within the permitted area," there may be times when "the end address is not within the permitted area." In such cases, the read descriptor is inappropriate as a descriptor for determining the transfer destination of the received data, that is, it cannot be used (is unusable) as a descriptor for determining the transfer destination of the received data.

Therefore, the communication control device determines whether the read descriptor is available by taking into account the data size of the received data in addition to the starting address specified by the read descriptor.

Therefore, by taking into account the data size of the received data in addition to the starting address, the communication control device can more accurately select an "available descriptor" for transferring the received data from among multiple descriptors prepared in advance.

The communication control device according to one aspect of the present invention may calculate the permission area from the start address of the permission area and the data size of the permission area, which are obtained in advance.

According to the above configuration, the communication control device acquires the start address of the permission area and the data size of the permission area in advance, and calculates the permission area from the acquired start address of the permission area and the data size of the permission area.

Therefore, the communication control device has the effect of being able to calculate the permission area from the start address of the permission area and the data size of the permission area, which are previously acquired.

The communication control device according to one aspect of the present invention further includes a storage unit that stores the descriptor set in the main memory before receiving the data each time the data is to be received, the first descriptor being stored in the storage unit, and the transfer unit may transfer the data to an area having the start address specified in the subsequent descriptor as the second descriptor when (A) the determination unit determines that the first descriptor is not available, and (B) the determination unit determines that a subsequent descriptor, which is different from the first descriptor stored in the storage unit and is read by the reading unit after the first descriptor, is available.

According to the above configuration, when the communication control device determines that the first descriptor stored in the storage unit is "available," it transfers data to an area whose top address is the start address specified by the first descriptor.

Furthermore, when the communication control device determines that the first descriptor is "unavailable" and the subsequent descriptor is "available," the communication control device sets the subsequent descriptor as the second descriptor and executes a transfer according to the subsequent descriptor. For example, when the communication control device determines that the first descriptor is "unavailable," it further reads the subsequent descriptor stored in the storage unit. Then, when the communication control device determines that the read subsequent descriptor is "available," it transfers the data to an area whose leading address is the start address specified by the subsequent descriptor.

Generally, the CPU or the like (software) does not calculate how many pieces of data (more precisely, how many frames of data) a certain piece of information (e.g., image information of several megabytes (Mbytes)) will be transmitted as. For example, even if the data size of one piece of data (frame data) is normally "1.5 kilobytes (Kbytes)," the CPU or the like does not calculate how many pieces of data the certain piece of information will be transmitted as.

Instead, the CPU or the like generally sets a sufficient number (number) of the descriptors in the main memory before receiving certain information so that the certain information can always be received (transferred to the main memory). In other words, the CPU or the like sets in advance in the main memory a number of the descriptors that is sufficient compared to the number of pieces of data to be received from the network before receiving the data.

The descriptors set in the main memory by the CPU or the like are then stored in the storage unit. Therefore, the number of the descriptors stored in the storage unit is sufficiently large compared to the number of pieces of data to be received from the network.

Therefore, the communication control device can select "available descriptors" for transferring the data from among a number of descriptors that is sufficiently larger than the number of data to be transferred.

In a communication control device according to one aspect of the present invention, when the number of the descriptors stored in the storage unit and read by the reading unit that are determined by the determination unit to be unavailable exceeds a preset reference number, the reading unit may read a save descriptor that is the descriptor pre-stored in a second storage unit different from the storage unit, and the transfer unit may transfer the data to an area whose top address is the start address specified in the save descriptor, using the save descriptor read by the reading unit as the second descriptor.

According to the above configuration, when the number of "descriptors stored in the storage unit" that are read and determined to be unavailable exceeds the reference number, the communication control device reads the save descriptor that is pre-stored in the second storage unit. Then, the communication control device transfers the data to an area whose top address is the start address specified in the save descriptor, using the save descriptor as the second descriptor.

If the number of "descriptors stored in the storage unit" that have been read and determined to be unavailable exceeds the reference number, the following event may have occurred. That is, an abnormality may have occurred in all or most of the "descriptors stored in the storage unit." If an abnormality has occurred in all or most of the "descriptors stored in the storage unit," it is impossible or takes a great deal of time to select a "usable descriptor" from the "descriptors stored in the storage unit."

Therefore, when the number of "descriptors stored in the storage unit and determined to be unusable" exceeds the reference number, the communication control device transfers the data according to the backup descriptor instead of the "descriptors stored in the storage unit."

Therefore, the communication control device has the effect of being able to reliably and quickly transfer the data to the main memory even if an abnormality occurs in all or most of the "descriptors stored in the storage unit."

In a communication control device according to one aspect of the present invention, the start address specified by the save descriptor may be in an area in the main memory where the data can be stored, and may be in an area different from the permitted area.

According to the above configuration, when the communication control device transfers the data to the main memory in accordance with the save descriptor, the communication control device transfers the data to an area different from the permission area in accordance with the save descriptor. In other words, the area to which the data is transferred in accordance with the save descriptor is different from the permission area.

If the start address specified by the save descriptor is within the permission area, the following event may occur. That is, data transferred into the permission area according to the save descriptor may be overwritten by other data transferred into the permission area according to the descriptor stored in the storage unit.

To prevent the above situation, complex processing is required, such as determining whether the area to which the certain data is transferred overlaps with the area to which the other data is transferred.

In contrast, if the start address specified by the save descriptor is not within the permitted area, the certain data transferred to the main memory according to the save descriptor will not be overwritten by the other data.

The communication control device therefore has the effect of being able to avoid a situation in which "certain data transferred according to the save descriptor is overwritten with other data transferred according to the descriptor stored in the storage unit" without the need for complex processing.

In order to solve the above problem, a control method according to one aspect of the present invention is a control method for a communication control device that transfers data received from a network to a main memory, comprising: a read step of reading a descriptor that specifies a start address of an area in which the data is to be stored; a determination step of determining that the descriptor read in the read step is available if the start address specified in the descriptor read in the read step is within an allowed area that is a pre-set area in the main memory in which the data can be stored; and a determination step of storing the data in an area whose top address is the start address specified in the descriptor read in the read step. and a transfer step of transferring the data, where a plurality of the descriptors are prepared in advance, and the transfer step (A) transfers the data to an area having the start address specified in the first descriptor as a leading address when it is determined in the determination step that a first descriptor read in the read step among the plurality of the prepared descriptors is available, and (B) transfers the data to an area having the start address specified in a second descriptor read in the read step after the first descriptor as a leading address when it is determined in the determination step that the first descriptor is not available.

According to the above configuration, when the control method determines that the first descriptor read from among the multiple prepared descriptors is "available," the control method transfers data to an area whose top address is the start address specified by the first descriptor. When the control method determines that the first descriptor is "unavailable," the control method further reads the second descriptor from among the multiple prepared descriptors. Then, the control method transfers the data to an area whose top address is the start address specified by the second descriptor.

In other words, even if the control method determines that the start address specified by the read first descriptor is not within the permitted area, it does not notify the CPU or the like of the determination result, and does not cause the CPU to reset the first descriptor to the correct one. When the control method determines that the start address specified by the first descriptor is not within the permitted area, it further reads the second descriptor prepared in advance and transfers the data to the main memory according to the read second descriptor.

The control method involves selecting an "available descriptor" for the data transfer from among the multiple descriptors prepared in advance, and transferring the data according to the selected "available descriptor."

Therefore, the control method can prevent erroneous data transfer using the descriptor, and can also reduce the time required to transfer the data compared to a case in which the CPU or the like is forced to reset the "available descriptor" for the data transfer.

In other words, the control method has the effect of preventing erroneous data transfer due to the descriptor while transferring data received from the network to the main memory at high speed.

In particular, the determination of "whether or not the start address specified in the read descriptor is within the permitted area" can be performed even before the data is received from the network. Therefore, the control method can perform processing to prevent "erroneous data transfer due to a descriptor" before the data is received.

The control method has the effect of shortening the time from receiving the data to transferring the data to the main memory by executing a process to prevent "erroneous data transfer by a descriptor" before receiving the data.

Here, it is preferable that the communication control device is realized as a NIC (Network Interface Card). The communication control device is typically configured with a hardware logic circuit such as an FPGA (Field-Programmable gate array) or an ASIC (Application Specific Integrated Circuit).

When the communication control device that determines whether to reject a descriptor is configured with a hardware logic circuit, the following effect can be achieved. That is, generally, if the processing content is the same, processing by hardware can be executed faster than processing by software (specifically, a CPU). Therefore, the communication control device configured with a hardware logic circuit has the effect of being able to determine whether to reject a descriptor faster than when the CPU is used to determine whether to reject a descriptor.

In particular, the control method selects an "available descriptor" for the data transfer from among a number of previously prepared descriptors, without requiring a CPU or other device to reset the descriptor, and executes the transfer according to the selected descriptor.

When configured with a hardware logic circuit, the communication control device can extremely quickly select an "available descriptor" for the data transfer from among a number of descriptors prepared in advance. Also, when configured with a hardware logic circuit, the communication control device can extremely quickly perform transfer according to a descriptor selected from a number of descriptors prepared in advance.

Therefore, when the communication control device is configured with a hardware logic circuit, the control method has the effect of preventing erroneous data transfer due to the descriptor while being able to transfer data received from the network at extremely high speeds.

According to one aspect of the present invention, it is possible to prevent erroneous data transfer due to the descriptor, while transferring data received from the network to the main memory at high speed.

1 is a diagram showing a configuration of a main part of a PLC including a communication control device according to a first embodiment of the present invention; FIG. 2 is a diagram showing an overview of a control system including the PLC of FIG. 1. 11 is a diagram illustrating an example in which the communication control device according to the first embodiment of the present invention sequentially reads normal descriptors and transfers data to a main memory in accordance with the normal descriptors. FIG. 11 is a diagram illustrating an example in which the communication control device according to the first embodiment of the present invention reads a save descriptor and transfers data to a main memory in accordance with the save descriptor. FIG. 4A to 4C are diagrams illustrating the effects of the communication control device according to the first embodiment of the present invention. 11A and 11B are diagrams for explaining an overview of a process for identifying a standard receiving area and a determination process. FIG. 11 is a flow diagram illustrating an example of a data receiving process. 1 is a diagram for explaining the time required for a conventional communication control device to transfer data to a main memory after determining whether a descriptor is permissible;

[Embodiment 1]
An embodiment according to one aspect of the present invention (hereinafter also referred to as "the present embodiment") will be described below with reference to the drawings. Note that the same or corresponding parts in the drawings are given the same reference numerals and their description will not be repeated. In this embodiment, a communication control device 10 provided in a PLC (Programmable Logic Controller) 1 that controls controlled objects such as machines and equipment will be described as a typical example of a "communication control device that transfers data received from a network to a main memory." In the following description, "N,""P,""Q,""X,""Y," etc. each represent an integer equal to or greater than "1."

§1. Application Example In order to facilitate understanding of the communication control device 10 according to one aspect of the present invention, first, an example of a situation in which the present invention is applied, specifically, an overview of a control system 0 including a PLC 1 equipped with the communication control device 10, will be described with reference to FIG.

(Overview of the control system)
Fig. 2 is a diagram showing an overview of a control system 0 including a PLC 1. As shown in Fig. 2, the control system 0 includes a PLC 1, a network hub 2, and networks 3(1) and 3(2) each connected to the PLC 1 via the network hub 2. Hereinafter, when there is no need to particularly distinguish between the networks 3(1) and 3(2), they may be simply referred to as "network 3." The network 3 includes one or more network devices.

In the control system 0 illustrated in FIG. 2, multiple networks 3 are connected to the PLC 1 via a network hub 2. Gigabit bandwidth may be used for communication in the control system 0.

PLC 1 is a control device that controls the entire control system 0. Network hub 2 is a network hub or network switch that manages communication between PLC 1 and multiple networks 3. In the control system 0 shown in FIG. 2, multiple networks 3, for example networks 3(1) and 3(2), exist for one network port of PLC 1 (i.e., receiving port 130 in FIG. 1).

Here, either network 3(1) or 3(2) may be a control network, i.e., all networks 3 that communicate with PLC 1 may be control networks. Also, either one of networks 3(1) or 3(2) may be a control network and the other a data network, i.e., the networks 3 that communicate with PLC 1 may be a mixture of control networks and data networks.

For example, when network 3 is a control network, PLC 1 is a control device that controls input and output devices in the production equipment, and the network devices are, for example, input and output devices in the production equipment. PLC 1 and the network devices send and receive IN data and OUT data (hereinafter referred to as "IO data") by cyclically communicating via network 3, and PLC 1 controls the entire production equipment. In other words, when network 3 is a control network, control system 0 can be considered as a master-slave control system in which PLC 1 is the master device (the master device that manages data transmission) and the network devices are the slave devices.

When network 3 is a control network, network 3 may conform to an industrial Ethernet (registered trademark) standard such as the EtherCAT (Ethernet for Control Automation Technology: registered trademark) standard. When network 3 is a control network, network 3 may conform to the EtherNet/IP (registered trademark) standard.

The following describes an example in which communication between the PLC 1 and the network device in FIG. 2 (hereinafter also referred to as "network communication") complies with the Ethernet standard. In addition, the CPU 30 and the communication control device 10 are connected to each other so that they can communicate with each other via PCIe (Peripheral Component Interconnect Express).

Note that while FIG. 2 illustrates a control system 0 in which multiple networks 3 are connected to the PLC 1 via a network hub 2, it is not essential that multiple networks 3 are connected to the PLC 1 via a network hub 2 in the control system 0. In the control system 0, one network 3 (particularly, one control network) may be connected to the PLC 1 without going through a network hub 2. For example, in the control system 0, which is a master-slave control system, the PLC 1, which is a master device, and one or more network devices, each of which is a slave device, may be communicatively connected in a unicursal format.

(Overview of the communication control device according to this embodiment)
Details will be described later using Figure 1, but the PLC 1 illustrated in Figure 2 includes a communication control device 10 that executes data reception processing, a main memory 20 which is the storage means of the PLC 1, and a CPU 30 that executes various processes using the data Dt transferred to the main memory 20.

(General process for transferring received data to main memory)
In the PLC 1, various data Dt received from the network 3 at each control period Cc (e.g., 100 μs) are transferred to the main memory 20, for example, as follows. That is, first, the CPU 30 sets a descriptor Dc that specifies a start address As of "an area in the main memory 20 in which the data Dt received by the PLC 1 from the network 3 should be stored" in the main memory 20. For example, every time the PLC 1 attempts to receive data Dt (e.g., at each control period Cc), the CPU 30 sets a normal descriptor Dco in the main memory 20 before receiving the data Dt.

When the CPU 30 completes setting the normal descriptor Dco in the main memory 20, it notifies the communication control device 10 accordingly. The communication control device 10, which has been notified by the CPU 30 that the normal descriptor Dco has been set, refers to the main memory 20 in accordance with the notification and reads the normal descriptor Dco set by the CPU 30. Specifically, the communication control device 10 stores the normal descriptor Dco set in the main memory 20 by the CPU 30 in the first descriptor FIFO 125. The first descriptor FIFO 125 is a storage area for storing the normal descriptor Dco, and is, for example, a storage area of the FIFO (First In First Out) type.

When the PLC 1 receives the data Dt from the network 3, the communication control device 10 executes a data reception process. That is, the communication control device 10 first stores the data Dt that the PLC 1 receives from the network 3 in the data FIFO 127. The data FIFO 127 is a buffer (storage area) that temporarily stores the data Dt, and is, for example, a storage area using the FIFO method.

The communication control device 10 transfers the data Dt stored in the data FIFO 127 to the main memory 20 according to the descriptor Dc, for example, to the main memory 20 according to the normal descriptor Dco stored in the first descriptor FIFO 125. Specifically, the communication control device 10 transfers the data Dt to an area in the main memory 20 whose top address is the start address As specified in the descriptor Dc.

When the transfer of the data Dt to the main memory 20 is completed, the communication control device 10 updates the descriptor Dc in the main memory 20 corresponding to the descriptor Dc used to transfer the data Dt to the main memory 20 with the following information. That is, the communication control device 10 updates with "information indicating the data size of the data Dt transferred to the main memory 20" and "information indicating that it was used in the transfer of the data Dt". Therefore, "information indicating the data size of the data Dt" and "information indicating that it was used in the data transfer" are added to the descriptor Dc in the main memory 20 corresponding to the descriptor Dc used to transfer the data Dt to the main memory 20.

(Regarding data loss due to incorrect descriptors)
If the start address As defined in the descriptor Dc contains an error, the following situation may occur when data Dt is transferred to the main memory 20 in accordance with the descriptor Dc: That is, a situation may occur in which data Dt(X) transferred to the main memory 20 in accordance with a descriptor Dc that defines an incorrect start address As overwrites another data Dt(Y) transferred to the main memory 20 before the data Dt(X).

(Decision on whether a descriptor is acceptable)
To prevent a situation in which data Dt is lost due to the use of a normal descriptor Dco that specifies an incorrect start address As, the communication control device 10 determines whether the normal descriptor Dco is permissible before performing a transfer in accordance with the normal descriptor Dco.

Specifically, the communication control device 10 uses the standard receiving area Rgo that has been set in advance as the "area in which the transfer of data Dt is permitted" to determine whether or not the normal descriptor Dco used when transferring data Dt to the main memory is permitted. For example, the communication control device 10 acquires in advance the start address of the standard receiving area Rgo and the data size of the standard receiving area Rgo, and calculates (sets) the standard receiving area Rgo from the acquired start address of the standard receiving area Rgo and the data size of the standard receiving area Rgo.

Then, the communication control device 10 determines whether the start address As defined in the normal descriptor Dco is within the standard receiving area Rgo (first determination process FJ). The communication control device 10 also calculates the end address Ae of the "area after transfer when data Dt is transferred" from the data size of the data Dt and the start address As defined in the normal descriptor Dco. The communication control device 10 then determines whether the calculated end address Ae is within the standard receiving area Rgo (second determination process SJ).

If the start address As is within the standard receiving area Rgo and the end address Ae is within the standard receiving area Rgo, the communication control device 10 determines that the normal descriptor Dco is an "available descriptor" that can be used to transfer data Dt. If at least one of the start address As and the end address Ae is not within the standard receiving area Rgo, the communication control device 10 determines that the normal descriptor Dco is an "unavailable descriptor" that cannot be used to transfer data Dt.

(Transfer is performed using multiple descriptors prepared in advance)
When the communication control device 10 transfers data Dt received from the network 3 to the main memory 20, if it determines that a certain normal descriptor Dco(X) is an "unavailable descriptor", it executes the transfer using another descriptor Dc(Y). The communication control device 10 prepares a plurality of descriptors Dc in advance, and even if a certain normal descriptor Dco(X) is an "unavailable descriptor", it executes the transfer using another descriptor Dc(Y) as an "available descriptor".

The communication control device 10 first performs the above-mentioned judgment on the certain normal descriptor Dco(X), that is, judges whether the certain normal descriptor Dco(X) is correct or not.

When the communication control device 10 determines that a certain normal descriptor Dco(X) is an "available descriptor," it transfers the data Dt to the main memory 20 in accordance with that normal descriptor Dco(X).

When the communication control device 10 determines that the certain normal descriptor Dco(X) is an "unavailable descriptor," it executes the following process. That is, the communication control device 10 executes the transfer of the data Dt according to another previously prepared descriptor Dc(Y) without notifying the CPU 30 of the result of the determination that the certain normal descriptor Dco(X) is an "unavailable descriptor."

In other words, in addition to a certain normal descriptor Dco(X), the communication control device 10 prepares another descriptor Dc(Y) in advance for the case where the certain normal descriptor Dco(X) is an "unavailable descriptor."

(Select an "available descriptor" from multiple normal descriptors)
When a certain normal descriptor Dco(X) is determined to be an "unavailable descriptor", the descriptor Dc that the communications control device 10 uses as an "available descriptor" to execute the transfer of data Dt is, for example, the normal descriptor Dco(Y).

In other words, the communication control device 10 prepares in advance another normal descriptor Dco(Y) in addition to a certain normal descriptor Dco(X). Then, when the communication control device 10 determines that a certain normal descriptor Dco(X) is an "unavailable descriptor," it executes the transfer of data Dt using another normal descriptor Dco(Y) that it has determined to be an "available descriptor."

For example, the communication control device 10 prepares in advance multiple normal descriptors Dco, including a certain normal descriptor Dco(X), as the descriptor Dc to be followed when transferring data Dt received from the network 3 to the main memory 20.

When the communication control device 10 determines that a certain normal descriptor Dco(X) is an "unavailable descriptor," it determines whether or not another normal descriptor Dco(Y) is permitted without notifying the CPU 30 of the determination result. When the communication control device 10 determines that the other normal descriptor Dco(Y) is an "available descriptor," it transfers the data Dt to the main memory 20 in accordance with the other descriptor Dco(Y).

In other words, when the communication control device 10 determines that a certain normal descriptor Dco(X) is an "unavailable descriptor," it skips that certain normal descriptor Dco(X) and does not use that certain normal descriptor Dco(X) for transferring data Dt. The communication control device 10 further reads another normal descriptor Dco(Y) from among a plurality of normal descriptors Dco prepared in advance and determines whether to reject that other normal descriptor Dco(Y). When the communication control device 10 determines that the other normal descriptor Dco(Y) is an "available descriptor," it transfers data Dt to an area whose leading address is the start address As(Y) specified by that other descriptor Dc(Y).

The above process can be summarized as follows. That is, the communication control device 10 prepares multiple normal descriptors Dco in advance. Then, the communication control device 10 sequentially reads the multiple normal descriptors Dco prepared in advance until a normal descriptor Dco that the communication control device 10 determines to be an "available descriptor" appears from among the multiple normal descriptors Dco prepared in advance, and determines whether each one is acceptable or not. When a normal descriptor Dco that the communication control device 10 determines to be an "available descriptor" appears from among the multiple normal descriptors Dco prepared in advance, the communication control device 10 executes the transfer according to the normal descriptor Dco that it determined to be an "available descriptor."

In other words, in a receiving process in which data Dt received from the network 3 is transferred to the main memory 20, the communication control device 10 may select an "available descriptor" to be used for transferring the data Dt as follows. That is, the communication control device 10 may select an "available descriptor" to be used for transferring the data Dt from among a plurality of normal descriptors Dco prepared in advance.

Even if the communication control device 10 determines that a certain normal descriptor Dco(X) is an "unavailable descriptor," it does not notify the CPU 30 of the determination result, nor does it cause the CPU 30 to reset the certain normal descriptor Dco(X) to the correct content. Instead, the communication control device 10 reads another normal descriptor Dco(Y) from among a plurality of normal descriptors Dco prepared in advance. The communication control device 10 then determines whether the other normal descriptor Dco(Y) is acceptable, and if it determines that the other normal descriptor Dco(Y) is an "available descriptor," it transfers the data Dt according to the other normal descriptor Dco(Y).

Even if the communication control device 10 determines that a certain normal descriptor Dco (X) is "unavailable," it does not cause the CPU 30 to reset the "available descriptor" to be used for transferring the data Dt, and executes the transfer according to, for example, another normal descriptor Dco (Y). In other words, the communication control device 10 selects an "available descriptor" from a plurality of normal descriptors Dco prepared in advance, and transfers the data Dt according to the selected "available descriptor."

As a result, the communication control device 10 can reduce the time required to transfer the data Dt compared to when the CPU 30 is forced to reconfigure the "available descriptors."

For example, suppose that a certain normal descriptor Dco(X) is an "available descriptor" and therefore a transfer is performed using that certain normal descriptor Dco(X), and the time required until the transfer is complete is time T(X). Also, suppose that a certain normal descriptor Dco(X) is an "unavailable descriptor" and therefore a transfer is performed using another normal descriptor Dco(Y), and the time required until the transfer is complete is time T(Y).

At this time, if a certain normal descriptor Dco(X) and another normal descriptor Dco(Y) are prepared in advance, the difference between time T(X) and time T(Y) will be sufficiently small. In particular, if the communication control device 10 is configured with a hardware logic circuit, the difference between time T(X) and time T(Y) can be made small enough to be negligible. In other words, even if the communication control device 10 has to use another normal descriptor Dco(Y) for transfer because a certain normal descriptor Dco(X) is an "unavailable descriptor," it can transfer data Dt in approximately the same time as time T(X).

Even if the communication control device 10 determines that a certain normal descriptor Dco(X) is an "unavailable descriptor," it skips the certain normal descriptor Dco(X) and executes the transfer according to another descriptor Dc(Y). Since the communication control device 10 executes the transfer according to another previously prepared descriptor Dc(Y) without waiting for the CPU 30 to reset the "available descriptor," it is possible to transfer the data Dt in a time T(Y) that is approximately the same as the time T(X).

(The saved descriptor is used as the "available descriptor")
When a certain normal descriptor Dco(X) is determined to be an "unavailable descriptor", the descriptor Dc that the communications control device 10 uses as an "available descriptor" for executing the transfer of data Dt is, for example, a save descriptor Dce.

For example, the CPU 30 sets a save descriptor Dce in the main memory 20 separately from the normal descriptor Dco before receiving the data Dt. The save descriptor Dce set in the main memory 20 by the CPU 30 is then stored in the second descriptor FIFO 126, which is a FIFO-based storage area for storing the save descriptor Dce. That is, in this embodiment, the descriptor Dc is broadly divided into a normal descriptor Dco and a save descriptor Dce.

Specifically, the communication control device 10 prepares a save descriptor Dce in advance in addition to a certain normal descriptor Dco(X). When the communication control device 10 determines that a certain normal descriptor Dco(X) is an "unavailable descriptor," it may determine that the save descriptor Dce is an "available descriptor" and use the save descriptor Dce to transfer the data Dt.

For example, when the number of errors Ct, which is the number of normal descriptors Dco determined to be "unavailable descriptors", exceeds a preset reference number Nr, the communication control device 10 executes the following process. That is, when the number of errors Ct exceeds the reference number Nr, the communication control device 10 transfers the data Dt to the main memory 20 according to the save descriptor Dce(Y). Specifically, the communication control device 10 may transfer the data Dt to an area in the main memory 20 whose top address is the start address As defined in the save descriptor Dce(Y).

If the reference number Nr is preset to "0", the communication control device 10 executes the following process. That is, when the communication control device 10 judges a certain normal descriptor Dco (X) to be an "unavailable descriptor", it executes the transfer of data Dt using the evacuation descriptor Dce without judging the validity of other normal descriptors Dco.

For example, suppose that a certain normal descriptor Dco(X) is an "available descriptor" and therefore a transfer is performed using that certain normal descriptor Dco(X), and the time required until the transfer is complete is time T(X). Also, suppose that a certain normal descriptor Dco(X) is an "unavailable descriptor" and therefore a transfer is performed using a backup descriptor Dce(Y), and the time required until the transfer is complete is time T(Y).

At this time, if a certain normal descriptor Dco(X) and a save descriptor Dce(Y) are prepared in advance, the difference between time T(X) and time T(Y) will be sufficiently small. In particular, if the communication control device 10 is configured with a hardware logic circuit, the difference between time T(X) and time T(Y) can be made small enough to be negligible. In other words, even if the communication control device 10 has to use the save descriptor Dce(Y) to transfer data because a certain normal descriptor Dco(X) is an "unavailable descriptor," it can transfer data Dt in approximately the same time as time T(X).

As explained above, when transferring data Dt, the communication control device 10 first reads a certain normal descriptor Dco (X) and determines whether to reject it. If the communication control device 10 determines that a certain normal descriptor Dco (X) is an "unavailable descriptor", it determines whether the number of normal descriptors Dco determined to be "unavailable descriptors" (number of errors Ct) exceeds a reference number Nr. If it determines that the number of errors Ct does not exceed the reference number Nr, the communication control device 10 reads another normal descriptor Dco from among multiple normal descriptors Dco prepared in advance and determines whether to accept it. The normal descriptor Dco(Y) that the communication control device 10 reads next to a certain normal descriptor Dco(X) is the normal descriptor Dco that follows the certain normal descriptor Dco(X) and is also called the following descriptor Dc.

(A) When the communication control device 10 determines that the other normal descriptor Dco that it has read is an "available descriptor," it executes the transfer of data Dt in accordance with the other normal descriptor Dco that it has determined to be an "available descriptor."

(B) When the communication control device 10 determines that the read normal descriptor Dco is an "unavailable descriptor," it further determines whether the "number of errors Ct exceeds the reference number Nr." When it determines that the number of errors Ct does not exceed the reference number Nr, the communication control device 10 reads yet another normal descriptor Dco from among the multiple normal descriptors Dco prepared in advance and determines whether it is acceptable. When the communication control device 10 determines that the read normal descriptor Dco is an "unavailable descriptor," it reads yet another normal descriptor Dco and determines whether it is acceptable until it determines that the "number of errors Ct exceeds the reference number Nr."

When a normal descriptor Dco determined to be an "available descriptor" appears among the normal descriptors Dco that have been read, the communication control device 10 executes the transfer of data Dt according to the normal descriptor Dco determined to be an "available descriptor."

When the communication control device 10 determines that the number of errors Ct has exceeded the reference number Nr, it reads the save descriptor Dce and transfers the data Dt to an area whose top address is the start address As of the save descriptor Dce.

In other words, the communication control device 10 repeats the following process until the "number of errors Ct exceeds the reference number Nr" or "a normal descriptor Dco determined to be an 'available descriptor' appears." In other words, the communication control device 10 sequentially reads the normal descriptors Dco that have been prepared in advance and sequentially determines whether or not they are acceptable.

When the "number of errors Ct exceeds the reference number Nr," the communication control device 10 reads the save descriptor Dce and transfers the data Dt to an area whose top address is the start address As specified in the save descriptor Dce.

When a normal descriptor Dco determined to be an "available descriptor" appears, the communication control device 10 transfers data Dt to an area whose leading address is the start address As specified by the normal descriptor Dco determined to be an "available descriptor."

(Relationship between standard receiving area Rgo and retreat receiving area Rge)
Although details will be described later, the start address As specified by the save descriptor Dce(Y) is in an area in the main memory 20 different from the standard receiving area Rgo (the "save receiving area Rge" described later). In other words, the save receiving area Rge, which is the area to which (storage area) the data Dt is transferred (storage destination) when the data Dt is transferred according to the save descriptor Dce(Y), and the standard receiving area Rgo are different areas in the main memory 20.

§2. Configuration Example The communication control device 10 and the PLC 1 including the communication control device 10, the outline of which has been explained above with reference to Fig. 2, will now be explained in detail with reference to Fig. 1.

Figure 1 is a diagram showing an example of the configuration of PLC1. As shown in Figure 1, PLC1 includes, as a hardware configuration, a communication control device 10, a main memory 20, and a CPU 30. PLC1 may further include a non-volatile memory that stores various programs, parameters, and other data in a non-volatile manner, and a USB connector for connecting an external device to PLC1. The communication control device 10, the main memory 20, the CPU 30, and the non-volatile memory (not shown) are each connected via various buses (internal buses).

The CPU 30 is typically configured according to a general-purpose computer architecture, and interprets and executes instruction codes sequentially according to an internal clock. The hardware configuration of the CPU 30 includes one or more CPU cores and a network control unit.

The main memory 20 is a storage means of the PLC 1, and stores, for example, data Dt that the PLC 1 (particularly the communication control device 10) receives from the network 3. The CPU 30 executes various types of arithmetic processing on the data Dt stored in the main memory 20.

The main memory 20 is a volatile storage area (RAM), and in addition to storing data Dt received from the network 3 and subject to various arithmetic processing by the CPU 30, it also holds various programs to be executed by the CPU 30 after the PLC 1 is powered on. The main memory 20 is also used as a working memory when the CPU 30 executes various programs. For example, a DRAM (Dynamic Random Access Memory), an SRAM (Static Random Access Memory), etc. can be used as this type of main memory 20.

In the main memory 20 illustrated in FIG. 1, together with the data Dt, a normal descriptor Dco is stored which is set by the CPU 30 each time the PLC 1 attempts to receive the data Dt (e.g., every control period Cc) before receiving the data Dt. The normal descriptor Dco corresponds to, for example, specific data Dt received by the PLC, and includes information indicating the storage address of the corresponding data Dt in the main memory 20 (i.e., the starting address As), the data size of the corresponding data Dt in the main memory 20, etc.

As mentioned above, the PLC 1 may further include a non-volatile memory (not shown), which stores various programs, parameters, and other data in a non-volatile manner. This data is copied to the main memory 20 so that the CPU 30 can access it as necessary. Such non-volatile memory may be a semiconductor memory such as a flash memory. Alternatively, a magnetic recording medium such as a hard disk drive or an optical recording medium such as a DVD-RAM (Digital Versatile Disk Random Access Memory) may also be used.

The communication control device 10 is a data transfer device that receives data Dt from the network 3 and stores (transfers) the received data Dt to the main memory 20, and is realized, for example, as a NIC (Network Interface Card). The communication control device 10 is typically configured with a hardware logic circuit such as an FPGA (Field-Programmable gate array) or an ASIC (Application Specific Integrated Circuit). The communication control device 10 is configured to be able to transmit and receive data to and from each of the main memory 20, the CPU 30, and a non-volatile memory (not shown).

The communication control device 10 is connected to the network 3 via the receiving port 130, and controls data exchange with the network 3, in particular, the reception of data Dt. The communication control device 10 provides, for example, the functions of the physical layer and data link layer in the network 3. That is, the communication control device 10 controls the transmission of transmission data and the reception of data Dt in accordance with the standards to which the network 3 conforms. Specifically, the communication control device 10 receives data Dt from a network device connected to the network 3, and stores the received data Dt in the data FIFO 127.

As will be described in more detail later, the PLC 1 controls the transfer of data Dt received from the network 3 to the main memory 20, and in particular determines the transfer destination, not by the CPU 30 but by the communication control device 10 configured with a hardware logic circuit. Therefore, the PLC 1 has the effect of being able to transfer data Dt to a desired area in the main memory 20 by the communication control device 10 configured with a hardware logic circuit, without increasing the processing load of the CPU 30.

The communication control device 10 illustrated in FIG. 1 includes, as functional blocks, an IF 110, a receiving processing unit 120, and a receiving port 130. In order to ensure conciseness in the description of the communication control device 10 illustrated in FIG. 1, configurations that are not directly related to this embodiment, such as a configuration for transmitting transmission data to the network 3 via a transmitting port, have been omitted. However, depending on the actual implementation situation, the communication control device 10 may include the omitted configurations.

The IF (Interface) 110 is an interface through which the communication control device 10 (particularly the DMAC 121) communicates with each of the main memory 20, the CPU 30, and the non-volatile memory (not shown).

The data Dt (received data) received at the receiving port 130 is stored in the data FIFO 127.

The receiving processing unit 120 executes a receiving process, which is a process of "transferring data Dt received from the network 3 (specifically, data Dt stored in the data FIFO 127) to the main memory 20 according to a previously prepared descriptor Dc." The receiving processing unit 120 includes a DMAC 121, an address determination unit 122, a first descriptor FIFO 125, a second descriptor FIFO 126, and a data FIFO 127.

The DMAC (Direct Memory Access Controller) 121 performs data exchange between the main memory 20 and each of the first descriptor FIFO 125, the second descriptor FIFO 126, and the data FIFO 127.

For example, each time data Dt is received (e.g., every control period Cc), DMAC121 reads out the normal descriptor Dco set in the main memory 20 by the CPU 30 before receiving the data Dt, and stores it in the first descriptor FIFO125. In addition, DMAC121 reads out the save descriptor Dce set in the main memory 20 by the CPU 30, unrelated to the specific data Dt, and stores it in the second descriptor FIFO126.

The DMAC 121 stores the received data (data Dt) stored in the data FIFO 127 in the main memory 20, starting from the top. The DMAC 121 transfers the data Dt stored in the data FIFO 127 to an area in the main memory 20 whose starting address is the "start address As specified in the 'available descriptor' for transferring the data Dt" notified by the address determination unit 122.

When the DMAC 121 completes the transfer of the data Dt to the main memory 20, it transfers the write-back descriptor to the main memory 20, i.e., it overwrites the descriptor in the main memory 20 with the write-back descriptor. Specifically, the DMAC 121 overwrites the descriptor Dc in the main memory 20 that corresponds to the descriptor Dc used to transfer the data Dt to the main memory 20 with the write-back descriptor. The write-back descriptor is a descriptor Dc to which the following two pieces of information have been added to the descriptor Dc used to transfer the data Dt to the main memory 20. That is, the descriptor Dc is a descriptor Dc to which "information indicating the data size of the data Dt transferred to the main memory 20 according to that descriptor Dc" and "information indicating that it has been used to transfer the data Dt" have been added.

The address determination unit 122 selects an "available descriptor" that can be used to transfer data Dt from among a plurality of previously prepared descriptors Dc, and notifies the DMAC 121 of the start address As of the selected "available descriptor." The address determination unit 122 includes a reading unit 123 and a determination unit 124.

When the determination unit 124 determines that a certain normal descriptor Dco is an "available descriptor" that can be used to transfer data Dt, the address determination unit 122 notifies the DMAC 121 of the following information. That is, the address determination unit 122 notifies the DMAC 121 of the start address As specified by the certain normal descriptor Dco that has been determined to be an "available descriptor" that can be used to transfer data Dt.

When the save descriptor Dce is read by the read unit 123, the address determination unit 122 notifies the DMAC 121 of the start address As specified by the save descriptor Dce read by the read unit 123. In other words, the address determination unit 122 determines that the save descriptor Dce is an "available descriptor" that can be used to transfer data Dt, and notifies the DMAC 121 of the start address As specified by the save descriptor Dce.

The reading unit 123 reads the descriptor Dc and notifies the determination unit 124 of the start address As specified by the read descriptor Dc. For example, when transferring data Dt, the reading unit 123 first reads the normal descriptor Dco stored in the first descriptor FIFO 125 and notifies the determination unit 124 of the start address As specified by the read normal descriptor Dco.

When the reading unit 123 is notified by the determination unit 124 that a certain normal descriptor Dco is an "unavailable descriptor," the reading unit 123 executes the following determination. That is, the reading unit 123 determines whether the number of normal descriptors Dco determined by the determination unit 124 to be "unavailable descriptors" (number of errors Ct) exceeds a reference number Nr.

When the reading unit 123 determines that the number of errors Ct does not exceed the reference number Nr, it refers to the first descriptor FIFO 125 to read another normal descriptor Dco, and notifies the determination unit 124 of the start address As specified by the other normal descriptor Dco. For example, the reading unit 123 reads the normal descriptor Dco stored next to a certain normal descriptor Dco in the first descriptor FIFO 125 (i.e., the succeeding descriptor of a certain normal descriptor Dco).

When the reading unit 123 is notified of the result of the determination that a certain normal descriptor Dco is an "unavailable descriptor," the reading unit 123 sequentially reads the normal descriptor Dco stored in the first descriptor FIFO 125 until the number of errors Ct exceeds the reference number Nr. Then, the reading unit 123 notifies the determination unit 124 of the start address As specified by the read normal descriptor Dco.

When the reading unit 123 determines that the number of errors Ct exceeds the reference number Nr, it reads the save descriptor Dce stored in the second descriptor FIFO 126. The address determination unit 122 notifies the DMAC 121 of the start address As specified by the save descriptor Dce read by the reading unit 123.

For example, the reading unit 123 obtains the reference number Nr in advance from the CPU 30.

(Example of the reference number value)
It is desirable to set the reference number Nr to, for example, "3."

Here, the normal descriptor Dco is judged to be an "unavailable descriptor" for transferring data Dt in the following two cases. That is, the first case is when "the start address As specified by the normal descriptor Dco is not within the standard receiving area Rgo (for example, the start address As indicates an address beyond the end address of the standard receiving area Rgo)." The second case is when "the data size of the data Dt received from network 3 is larger than expected, and the end address Ae is not within the standard receiving area Rgo."

Even if either of the two typical cases described above occurs, the third normal descriptor Dco is likely to be determined to be an "available descriptor" for transferring data Dt. It is unlikely that three consecutive normal descriptors Dco are determined to be "unavailable descriptors", and if three consecutive normal descriptors Dco are determined to be "unavailable descriptors", some kind of abnormality may have occurred.

Therefore, by setting the reference number Nr to "3", the communication control device 10 can achieve the following two effects. That is, first, even if either of the two typical cases described above occurs, the communication control device 10 can transfer the data Dt according to the normal descriptor Dco (the third normal descriptor Dco) rather than according to the save descriptor Dce. Second, even if some kind of abnormality occurs, the communication control device 10 can reliably transfer the data Dt according to the save descriptor Dce.

As mentioned above, the reference number Nr is the number of normal descriptors Dco that can be determined to be "unusable descriptors" for transferring data Dt. The interval between the start addresses As defined by each of the multiple normal descriptors Dco is, for example, "1.5 KByte (kilobytes)". Therefore, if the reference number Nr is set to "3", an area of "1.5 * 3 = 4.5 KByte" can become "area reserved for the data Dt to be transferred but not actually used", that is, "wasted area". Since this would increase the amount of "wasted area", it is preferable not to set the reference number Nr to a large value such as "10". Therefore, it is preferable to set the reference number Nr to a small value such as "3".

(Example of how to determine the reference number)
The reading unit 123 may acquire in advance from the CPU 30 a method for determining the reference number Nr instead of the reference number Nr itself. For example, the reading unit 123 may acquire in advance a determination method in which "the reference number Nr is a value obtained by subtracting "2" from the number X of normal descriptors Dco set by the CPU 30 and for which the determination unit 124 has not yet determined whether the descriptors are permitted or not." However, the reference number Nr is an integer equal to or greater than "0." The reading unit 123 may determine the reference number Nr based on the previously acquired determination method and use the determined reference number Nr. The number X may be rephrased as "the number of normal descriptors Dco stored in the first descriptor FIFO 125 and for which the determination unit 124 has not yet determined whether the descriptors are permitted or not."

For example, if the number X is "1", when the determination unit 124 determines that a certain normal descriptor Dco is an "unavailable descriptor", there is no next normal descriptor Dco remaining for which the determination unit 124 should determine whether to reject it. Therefore, it is preferable for the reading unit 123 to set the reference number Nr to "0".

For example, when the number X is "4", it is preferable that the reading unit 123 sets the reference number Nr to "2 = 4 - 2". When the number X is "4", even if there are multiple pieces of data Dt (e.g., two pieces) to be transferred to the main memory 20, the communication control device 10 can set the reference number Nr to "2" and transfer each of the multiple pieces of data Dt according to the normal descriptor Dco.

For example, if four normal descriptors Dco whose allowance or denial has not yet been determined are stored in the first descriptor FIFO 125, the communication control device 10 determines the reference number Nr to be "2" based on the above-mentioned determination method. Then, the communication control device 10 may execute the following process when transferring each of the first data Dt(0) and the second data Dt(1).

In other words, even if the communication control device 10 determines that the first normal descriptor Dco(0) and the second normal descriptor Dco(1) are "unusable descriptors" for the transfer of the first data Dt(0), it still determines to reject the third normal descriptor Dco(2). Then, when the communication control device 10 determines that the third normal descriptor Dco(2) is "usable descriptor" for the transfer of the first data Dt(0), it transfers the first data Dt(0) in accordance with the third normal descriptor Dco(2).

The communication control device 10 also determines to reject the fourth normal descriptor Dco(3). Then, when the communication control device 10 determines that the fourth normal descriptor Dco(3) is an "available descriptor" for transferring the second data Dt(1), it transfers the second data Dt(1) in accordance with the fourth normal descriptor Dco(3).

As described above, by determining the reference number Nr based on the determination method of "setting the reference number Nr as the value obtained by subtracting '2' from the number X," the communication control device 10 can achieve the following effect. That is, even if there are multiple pieces of data Dt to be transferred to the main memory 20, the communication control device 10 can achieve the effect of being able to transfer each of the multiple pieces of data Dt to the main memory 20 in accordance with the normal descriptor Dco.

The determination unit 124 determines whether to reject the normal descriptor Dco read by the reading unit 123, and executes a first determination process FJ and a second determination process SJ, for example, using the start address As specified by the normal descriptor Dco.

As a first determination process FJ, when the determination unit 124 is notified by the reading unit 123 of the "start address As of the normal descriptor Dco read by the reading unit 123," the determination unit 124 determines whether the notified start address As is within the standard reception area Rgo.

The determination unit 124 also calculates the end address Ae of the "area after the data Dt is transferred to the area whose leading address is the start address As" from the start address As notified by the reading unit 123 and the data size of the data Dt. Then, as a second determination process SJ, the determination unit 124 determines whether the calculated end address Ae is within the standard receiving area Rgo.

When the start address As is within the standard reception area Rgo and the end address Ae is within the standard reception area Rgo, the determination unit 124 determines that the "normal descriptor Dco read by the reading unit 123" is an "available descriptor" for transferring data Dt. The address determination unit 122 notifies the DMAC 121 of the start address As specified by the normal descriptor Dco that the determination unit 124 has determined to be an "available descriptor."

If at least one of the start address As and the end address Ae is not within the standard receiving area Rgo, the determination unit 124 determines that the "normal descriptor Dco read by the reading unit 123" is an "unusable descriptor" for transferring data Dt. The determination unit 124 notifies the reading unit 123 of the determination result that the "normal descriptor Dco read by the reading unit 123" is an "unusable descriptor."

For example, the determination unit 124 acquires in advance the start address of the standard receiving area Rgo and the data size of the standard receiving area Rgo from the CPU 30. The determination unit 124 then calculates the standard receiving area Rgo from the acquired start address of the standard receiving area Rgo and the data size of the standard receiving area Rgo.

The first descriptor FIFO 125 stores the normal descriptor Dco set in the main memory 20 by the CPU 30, for example, in a FIFO (first in, first out) format. When the CPU 30 completes setting the normal descriptor Dco in the main memory 20 and issues a receive permission to the communication control device 10, the communication control device 10 (specifically, the DMAC 121) reads the normal descriptor Dco from the main memory 20. Then, the DMAC 121 stores the read normal descriptor Dco in the first descriptor FIFO 125.

The second descriptor FIFO 126 stores the save descriptor Dce set in the main memory 20 by the CPU 30, for example, in a FIFO (first in, first out) format. When the CPU 30 completes setting the save descriptor Dce in the main memory 20 and issues a receive permission to the communication control device 10, the communication control device 10 (specifically, the DMAC 121) reads the save descriptor Dce from the main memory 20. Then, the DMAC 121 stores the read save descriptor Dce in the second descriptor FIFO 126.

The data FIFO 127 temporarily stores data Dt (received data) received by the PLC 1 (particularly the communication control device 10) from the network 3, for example, in a FIFO manner.

(Regarding the distinction between normal and backup descriptors)
In this embodiment, a plurality of descriptors Dc are prepared in advance, and can be roughly divided into normal descriptors Dco and save descriptors Dce.

The normal descriptor Dco is set in the main memory 20 by the CPU 30 each time the PLC 1 attempts to receive data Dt (e.g., every control period Cc) before receiving the data Dt. The normal descriptor Dco set in the main memory 20 by the CPU 30 is stored in the first descriptor FIFO 125 by the DMAC 121.

The save descriptor Dce is preset in the main memory 20 by the CPU 30, regardless of the reception of the data Dt.
The save descriptor Dce set in the main memory 20 by the CPU 30 is stored in the second descriptor FIFO 126 by the DMAC 121 .

For example, before receiving certain data Dt(X), the CPU 30 sets a normal descriptor Dco(X) in the main memory 20 to indicate an area in the main memory 20 (particularly, the starting address) to which the certain data Dt(X) should be transferred. The CPU 30 may set normal descriptors Dco(X1), Dco(X2), Dco(X3), ..., Dco(Xn) in the main memory 20 to indicate an area in the main memory 20 to which the certain data Dt(X) should be transferred. The normal descriptor Dco(X) (or normal descriptors Dco(X1), Dco(X2), Dco(X3), ..., Dco(Xn)) set in the main memory 20 by the CPU 30 is stored in the first descriptor FIFO 125. In other words, the normal descriptor Dco is a descriptor Dc that corresponds (or should correspond) to specific data Dt received by the PLC; for example, the normal descriptor Dco(X) corresponds to a certain specific data Dt(X) received by the PLC.

In contrast, the save descriptor Dce is a descriptor Dc that does not correspond to specific data Dt received by the PLC, and specifies the transfer destination (particularly, the starting address) of any data Dt received by the PLC. The area in the main memory 20 whose starting address is the "start address As specified by the save descriptor Dce" is also called the save receiving area Rge (save area). The save receiving area Rge is an area capable of storing any data Dt received by the PLC, and is different from the "area designated by the CPU 30 as an area in which to store specific data Dt (i.e., the standard receiving area Rgo (permitted area))."

Up until now, the configuration example of the communication control device 10 has been explained using FIG. 1. Next, specific examples of the reception processing executed by the communication control device 10 will be explained using FIG. 3 to FIG. 5.

(Example of "Selecting an available descriptor from the normal descriptors")
3 is a diagram illustrating an example in which the communication control device 10 sequentially reads a plurality of normal descriptors Dco prepared in advance and transfers data Dt to the main memory 20 according to the normal descriptor Dco determined to be "available." In the example shown in FIG. 3, data Dt(0) and data Dt(1) are stored in the data FIFO 127 in a FIFO manner. Also, normal descriptors Dco(0), Dco(1), Dco(2), ..., Dco(N) are stored in advance in the first descriptor FIFO 125.

(Example of first data transfer)
In order to transfer the data Dt(0) stored at the head of the data FIFO 127, the communication control device 10 first determines whether the normal descriptor Dco(0) stored at the head of the first descriptor FIFO 125 is rejected.

Specifically, first, the reading unit 123 reads the normal descriptor Dco(0) stored at the beginning of the first descriptor FIFO 125, and notifies the determination unit 124 of the start address As(0) defined in the normal descriptor Dco(0).

The determination unit 124 determines whether the start address As(0) is within the standard reception area Rgo that has been set in advance (first determination FJ).

The determination unit 124 also calculates the end address Ae(0,0) of the "area after transfer when data Dt(0) is transferred according to normal descriptor Dco(0)" from the data size of data Dt(0) and the start address As(0).The communication control device 10 then determines whether the calculated end address Ae(0,0) is within the standard receiving area Rgo that has been set in advance (second determination SJ).

When the start address As(0) is within the standard receiving area Rgo and the end address Ae(0,0) is within the standard receiving area Rgo, the determination unit 124 determines that the normal descriptor Dco(0) is a "usable descriptor" for transferring data Dt(0). The address determination unit 122 notifies the DMAC 121 of the start address As(0) specified in the normal descriptor Dco(0) that the determination unit 124 has determined to be a "usable descriptor" for transferring data Dt(0).

DMAC121 transfers data Dt to an area in main memory 20 whose starting address is the "start address As specified in the 'available descriptor' for transferring data Dt" notified by address determination unit 122. DMAC121 transfers data Dt(0) to an area in main memory 20 whose starting address is the "start address As(0) specified in normal descriptor Dco(0), which is the 'available descriptor' for transferring data Dt(0)."

When DMAC 121 completes the transfer of data Dt(0) to main memory 20, it overwrites normal descriptor Dco(0) in main memory 20 with a write-back descriptor. As a result, "information indicating the data size of data Dt(0)" and "information indicating that it has been used to transfer data Dt(0)" are added to normal descriptor Dco(0) in main memory 20.

(Example of data transfer)
In order to transfer the data Dt(1), the communication control device 10 determines whether to reject the normal descriptor Dco(1) stored next to the normal descriptor Dco(0) in the first descriptor FIFO 125. In other words, the communication control device 10 determines whether to reject the normal descriptor Dco(1), which is the first of the normal descriptors Dco stored in the first descriptor FIFO 125 and for which rejection has not been determined.

Specifically, first, the reading unit 123 reads the normal descriptor Dco(1) and notifies the determination unit 124 of the start address As(1) defined in the normal descriptor Dco(1).

The determination unit 124 determines whether the start address As(1) is within the standard reception area Rgo that has been set in advance (first determination FJ).

The determination unit 124 also calculates the end address Ae(1,1) of the "area after transfer when data Dt(1) is transferred according to normal descriptor Dco(1)" from the data size of data Dt(1) and the start address As(1).The communication control device 10 then determines whether the calculated end address Ae(1,1) is within the standard receiving area Rgo that has been set in advance (second determination SJ).

As shown in FIG. 3, the normal descriptor Dco(1) specifies a start address As(1) outside the standard receiving area Rgo, instead of the start address As'(1) within the standard receiving area Rgo that the CPU 30 intended to set in the normal descriptor Dco(1).

When the determination unit 124 confirms that the start address As(1) is not within the standard receiving area Rgo, it determines that the normal descriptor Dco(1) is an "unavailable descriptor." The determination unit 124 notifies the reading unit 123 of this determination result without notifying the CPU 30.

The reading unit 123, which has been notified of the determination result that the normal descriptor Dco(1) is an "unavailable descriptor," reads the normal descriptor Dco(2) stored next to the normal descriptor Dco(1) in the first descriptor FIFO 125. The reading unit 123 then notifies the determination unit 124 of the start address As(2) defined in the read normal descriptor Dco(2).

The determination unit 124 determines whether the start address As(2) is within the standard reception area Rgo that has been set in advance (first determination FJ).

The determination unit 124 also calculates the end address Ae(1,2) of the "area after transfer when data Dt(1) is transferred according to normal descriptor Dco(2)" from the data size of data Dt(1) and the start address As(2).The communication control device 10 then determines whether the calculated end address Ae(1,2) is within the standard receiving area Rgo that has been set in advance (second determination SJ).

When the start address As(2) is within the standard reception area Rgo and the end address Ae(1,2) is within the standard reception area Rgo, the determination unit 124 determines that the normal descriptor Dco(2) is an "available descriptor" for the transfer of data Dt(1). The address determination unit 122 notifies the DMAC 121 of the start address As(2) specified in the normal descriptor Dco(2) that the determination unit 124 has determined to be an "available descriptor" for the transfer of data Dt(1).

DMAC121 transfers data Dt to an area in main memory 20 whose starting address is the "start address As specified in the 'available descriptor' for transferring data Dt" notified by address determination unit 122. DMAC121 transfers data Dt(1) to an area in main memory 20 whose starting address is the "start address As(2) specified in normal descriptor Dco(2), which is an 'available descriptor' for transferring data Dt(1)."

When DMAC 121 completes the transfer of data Dt(1) to main memory 20, it overwrites normal descriptor Dco(2) in main memory 20 with a write-back descriptor. As a result, "information indicating the data size of data Dt(1)" and "information indicating that it has been used to transfer data Dt(1)" are added to normal descriptor Dco(2) in main memory 20.

(Regarding the number of normal descriptors)
Generally, the CPU 30 (software) does not calculate how many pieces of data Dt (more precisely, how many frames of data) a certain piece of information (e.g., image information of several megabytes (Mbytes)) will be transmitted as. For example, even if the data size of one piece of data Dt (frame data) is normally "1.5 kilobytes (Kbytes)," the CPU 30 does not calculate how many pieces of data Dt the certain piece of information will be transmitted as.

Instead, the CPU 30 (software) typically sets a sufficient number of normal descriptors Dco in the main memory 20 before receiving certain information so that the certain information can always be received.

In other words, the CPU 30 sets in advance in the main memory 20 a number of normal descriptors Dco that is sufficiently larger than the number of data Dt that the PLC 1 should receive for each control period Cc, for example, before the PLC 1 receives the data Dt. Then, the normal descriptors Dco set in the main memory 20 by the CPU 30 are stored in the first descriptor FIFO 125 by the DMAC 121.

Therefore, the number of normal descriptors Dco stored in the first descriptor FIFO 125 is sufficiently large compared to the number of data Dt stored in the data FIFO 127. Therefore, the address determination unit 122 (particularly the judgment unit 124) can select "available descriptors" for transferring the data Dt from among the number of normal descriptors Dco that is sufficiently large compared to the number of data Dt to be transferred.

(How the CPU knows about the rejection of a descriptor)
As described above, when the DMAC 121 completes the transfer of the data Dt, it overwrites the normal descriptor Dco in the main memory 20 corresponding to the normal descriptor Dco used in the transfer with a write-back descriptor. As a result, "information indicating the data size of the data Dt" and "information indicating that it has been used in the transfer of the data Dt" are added to the normal descriptor Dco in the main memory 20 corresponding to the normal descriptor Dco used in the transfer.

Therefore, the CPU 30 can determine whether the normal descriptor Dco in the main memory 20 is permitted or not by referring to the "information indicating that it has been used to transfer the data Dt."

For example, the DMAC 121 updates the "result flag," which is one of the items in the normal descriptor Dco in the main memory 20 that corresponds to the normal descriptor Dco used in the transfer, from "0" to "1." The CPU 30 can determine from the "result flag" which of the normal descriptors Dco in the main memory 20 were used in the transfer and which were not used in the transfer.

Furthermore, DMAC 121 may update the "discard flag," which is one of the items in the normal descriptor Dco, from "0" to "1" for the normal descriptor Dco in main memory 20 that corresponds to the normal descriptor Dco that was not used in the transfer. The "discard flag" allows CPU 30 to identify the normal descriptor Dco in main memory 20 that was not used in the transfer of data Dt.

(Example of "Using a saved descriptor as an available descriptor")
4 is a diagram for explaining an example in which the communication control device 10 reads the save descriptor Dce and transfers the data Dt to the main memory 20 in accordance with the save descriptor Dce. The communication control device 10 (particularly, the DMAC 121) executes the following process when the error count Ct, which is the number of normal descriptors Dco determined by the determination unit 124 to be "unavailable descriptors," exceeds a preset reference count Nr. That is, when the error count Ct exceeds the reference count Nr, the DMAC 121 transfers the data Dt to an area whose leading address is the start address As defined in the save descriptor Dce.

In the example shown in FIG. 4, data Dt(0) and data Dt(1) are stored in the data FIFO 127 in a FIFO manner. Furthermore, normal descriptors Dco(0), Dco(1), Dco(2), ..., Dco(N) are pre-stored in the first descriptor FIFO 125. Furthermore, a save descriptor Dce(Z) is pre-stored in the second descriptor FIFO 126. Furthermore, the reference number Nr is preset to "0" by the CPU 30.

(Example of first data transfer)
In the example shown in Fig. 4, the process executed by the communication control device 10 when transferring data Dt(0) is similar to the process exemplified in Fig. 3. That is, in order to transfer data Dt(0) stored at the head of the data FIFO 127, the communication control device 10 first determines whether to reject the normal descriptor Dco(0) stored at the head of the first descriptor FIFO 125, as in the example shown in Fig. 3. That is, the determination unit 124 executes a first determination FJ and a second determination SJ on the normal descriptor Dco(0).

When the start address As(0) is within the standard receiving area Rgo and the end address Ae(0,0) is within the standard receiving area Rgo, the determination unit 124 determines that the normal descriptor Dco(0) is a "usable descriptor" for transferring data Dt(0). The address determination unit 122 notifies the DMAC 121 of the start address As(0) specified in the normal descriptor Dco(0) that the determination unit 124 has determined to be a "usable descriptor" for transferring data Dt(0).

The DMAC 121 transfers the data Dt(0) to an area in the main memory 20 whose leading address is the start address As(0) notified by the address determination unit 122.

When DMAC 121 completes the transfer of data Dt(0) to main memory 20, it overwrites the normal descriptor Dco(0) in main memory 20 with a write-back descriptor.

(Example of data transfer)
In order to transfer data Dt(1), the communication control device 10 determines whether to reject the normal descriptor Dco(1), which is stored in the first descriptor FIFO 125 and is the first of the normal descriptors Dco for which rejection has not been determined. That is, the determination unit 124 executes the first determination FJ and the second determination SJ for the normal descriptor Dco(1).

In the example shown in Figure 4, as in Figure 3, the normal descriptor Dco(1) specifies a start address As(1) outside the standard reception area Rgo.

Therefore, the determination unit 124 confirms that the start address As(1) is not within the standard receiving area Rgo, and determines that the normal descriptor Dco(1) is an "unavailable descriptor." The determination unit 124 notifies the reading unit 123 of this determination result without notifying the CPU 30.

The reading unit 123, which has been notified of the result of the determination that the normal descriptor Dco(1) is an "unavailable descriptor," executes the following process. That is, the reading unit 123 determines whether the error count Ct, which is the number of normal descriptors Dco that have been determined by the determination unit 124 to be "unavailable descriptors," exceeds the reference count Nr.

As described above, in the example shown in FIG. 4, the reference number Nr is "0". In addition, since the determination unit 124 determines that the normal descriptor Dco(1) is an "unavailable descriptor", the error number Ct, which is the number of normal descriptors Dco that the determination unit 124 has determined to be "unavailable descriptors", is "1".

Therefore, the reading unit 123 determines that "the number of errors Ct has exceeded the reference number Nr." Then, the reading unit 123, which has determined that "the number of errors Ct has exceeded the reference number Nr," reads the evacuation descriptor Dce(Z) stored in the second descriptor FIFO 126.

The address determination unit 122 notifies the DMAC 121 of the start address As(Z) defined in the save descriptor Dce(Z) read by the reading unit 123.

DMAC121 transfers data Dt to an area in main memory 20 whose starting address is the "start address As specified in the 'available descriptor' for transferring data Dt" notified by address determination unit 122. DMAC121 transfers data Dt(0) to an area in main memory 20 whose starting address is the "start address As(Z) specified in the save descriptor Dce(Z), which is the 'available descriptor' for transferring data Dt(1)."

When DMAC 121 completes the transfer of data Dt(1) to main memory 20, it overwrites the save descriptor Dce(Z) in main memory 20 with a write-back descriptor. As a result, "information indicating the data size of data Dt(1)" and "information indicating that it has been used to transfer data Dt(1)" are added to the save descriptor Dce(Z) in main memory 20.

(Regarding the transfer area defined by the save descriptor)
As shown in FIG. 4, it is preferable that the save receiving area Rge, in which the start address As defined by the save descriptor Dce(Y) exists, and the standard receiving area Rgo are different areas in the main memory 20 .

When the start address As specified by the save descriptor Dce(Y) is within the standard receiving area Rgo, the following event may occur. That is, the data Dt(1) transferred to the standard receiving area Rgo in accordance with the save descriptor Dce(Y) may be updated (overwritten) by other data Dt transferred to the standard receiving area Rgo in accordance with the normal descriptor Dco.

And if data Dt(1) is overwritten by other data Dt before CPU 30 executes processing using data Dt(1), naturally CPU 30 will not be able to execute processing using data Dt(1).

To avoid such an event, it is necessary to perform complicated processing such as determining whether the area to which data Dt(1) is transferred overlaps with the area to which other data Dt is transferred according to the normal descriptor Dco.

By making the save receiving area Rge and the standard receiving area Rgo different areas, the above-mentioned phenomenon can be avoided without the need for the above-mentioned complicated processing. In other words, by separating the save receiving area Rge and the standard receiving area Rgo, it is possible to easily avoid a phenomenon in which "certain data Dt transferred according to the save descriptor Dce is overwritten by other data Dt transferred according to the normal descriptor Dco."

(Effects achieved by the communication control device according to the present embodiment)
Fig. 5 is a diagram for explaining the effects of the communication control device 10. Fig. 5(A) is similar to Fig. 8(A), and is a diagram for explaining the time required from determining whether or not the descriptor Dc is permissible until the data Dt is transferred, for a conventional communication control device that transfers data Dt to the main memory 20 in accordance with the descriptor Dc.

When a conventional communication control device detects an abnormality in an address (start address As) or the like for a certain descriptor Dc(X), the device executes the following process.
That is, when a conventional communication control device detects an error in a certain descriptor Dc(X), it notifies the CPU of the detection result and causes the CPU (software) to reset the certain descriptor Dc(X). For example, a conventional communication control device causes the CPU 30 to rewrite "a certain descriptor Dc(X) that specifies an abnormal address" to "a certain descriptor Dc(X') that specifies a correct address."

Therefore, conventional communication control devices must wait until the CPU has completed the reconfiguration process for a certain descriptor Dc(X), and it takes a long time from detecting an error in a certain descriptor Dc(X) to transferring the data Dt to the main memory 20. Conventional communication control devices must wait for the software to complete the reconfiguration process for the descriptor Dc after detecting an abnormality in the start address As of the descriptor Dc, etc., before transferring the data Dt.

Figure 5 (B) is a diagram explaining the time required for the communication control device 10 to transfer data Dt after determining whether or not the descriptor Dc is acceptable.

When the communication control device 10 determines that a certain normal descriptor Dco (X) is an "unavailable descriptor," it uses another descriptor Dc (Y) as an "available descriptor" to transfer the data Dt. Therefore, as shown in FIG. 5B, the communication control device 10 does not need to wait for the completion of the reconfiguration process of the descriptor Dc by the CPU 30 between detecting an abnormality in the start address As of the descriptor Dc and executing the transfer of the data Dt.

For example, suppose that a certain normal descriptor Dco(X) is an "available descriptor" and therefore a transfer is performed using that certain normal descriptor Dco(X), and the time required until the transfer is complete is time T(X). Also, suppose that a certain normal descriptor Dco(X) is an "unavailable descriptor" and therefore a transfer is performed using another descriptor Dc(Y), and the time required until the transfer is complete is time T(Y).

At this time, if a certain normal descriptor Dco(X) and another descriptor Dc(Y) are prepared in advance, the difference between time T(X) and time T(Y) will be sufficiently small. In particular, if the communication control device 10 is configured with a hardware logic circuit, the difference between time T(X) and time T(Y) can be made small enough to be negligible. In other words, even if the communication control device 10 has to use another descriptor Dc(Y) to transfer data because a certain normal descriptor Dco(X) is an "unavailable descriptor," it can transfer data Dt in approximately the same time as time T(X).

(Clarification of communication control devices)
The contents described above with reference to Figures 1 to 5 can be summarized as follows: The communication control device 10 is a communication control device that transfers data Dt received from the network 3 to the main memory 20. The communication control device 10 includes a reading unit 123, a determination unit 124, and a DMAC 121 (transfer unit).

The reading unit 123 reads a descriptor Dc that specifies the starting address As of the area in which the data Dt should be stored.

The determination unit 124 determines whether the start address As defined in the descriptor Dc read by the reading unit 123 is within the standard receiving area Rgo (permitted area), which is an area that is preset in the main memory 20 as an area in which data Dt can be stored. If the start address As is within the standard receiving area Rgo, the determination unit 124 determines that the descriptor Dc read by the reading unit 123 is "available."

The DMAC 121 transfers the data Dt to an area whose leading address is the start address As defined in the descriptor Dc read by the reading unit 123.

In the communication control device 10, a plurality of descriptors Dc are prepared in advance. The reading unit 123 first reads, for example, a first descriptor Dc(X) (particularly, a first normal descriptor Dco(X)) from among the plurality of descriptors Dc prepared in advance.

(A) When the determination unit 124 determines that the first descriptor Dc(X) is "available," the DMAC 121 executes the following transfer. That is, the DMAC 121 transfers data Dt to an area whose top address is the start address As(X) defined in the first descriptor Dc(X).

(B) When the determination unit 124 determines that the first descriptor Dc(X) is "unavailable," the DMAC 121 executes the following transfer. That is, the DMAC 121 transfers the data Dt according to the second descriptor Dc(Y) that was read by the reading unit 123 after the first descriptor Dc(X) among the multiple descriptors Dc prepared in advance. As a specific example, the DMAC 121 transfers the data Dt to an area whose leading address is the start address As(Y) defined in the second descriptor Dc(Y).

According to the above configuration, when the communication control device 10 determines that the first descriptor Dc(X) read from among the multiple descriptors Dc prepared in advance is "available," it transfers the data Dt according to the first descriptor Dc(X). As a specific example, the communication control device 10 transfers the data Dt to an area whose leading address is the start address As(X) specified by the first descriptor Dc(X).

Furthermore, when the communication control device 10 determines that the first descriptor Dc(X) is "unavailable," it further reads the second descriptor Dc(Y) from among the multiple descriptors Dc prepared in advance. Then, the communication control device 10 transfers the data Dt to an area whose top address is the start address As(Y) specified by the second descriptor Dc(Y).

In other words, even if the communication control device 10 determines that the start address As(X) specified by the first descriptor Dc(X) that it has read is not within the standard receiving area Rgo, it does not notify the CPU 30 or the like of the result of this determination. Even if it determines that the start address As(X) is not within the standard receiving area Rgo, the communication control device 10 does not cause the CPU 30 or the like to reset the first descriptor Dc(X) to the correct one. When the communication control device 10 determines that the start address As(X) specified by the first descriptor Dc(X) is not within the standard receiving area Rgo, it further reads the second descriptor Dc(Y) that has been prepared in advance. Then, the communication control device 10 transfers the data Dt to the main memory 20 according to the second descriptor Dc(Y) that it has read.

The communication control device 10 selects an "available descriptor" for transferring data Dt from among a plurality of descriptors Dc prepared in advance, and transfers data Dt according to the selected "available descriptor."

Therefore, the communication control device 10 can prevent erroneous data transfer using the descriptor Dc. Furthermore, the communication control device 10 can reduce the time required to transfer the data Dt, compared to when the CPU 30 or the like is caused to reset the "available descriptor" for the transfer of the data Dt.

In other words, the communication control device 10 has the effect of being able to transfer data Dt received from the network 3 to the main memory 20 at high speed while preventing erroneous data transfer due to the descriptor Dc.

In particular, the determination of "whether or not the start address As defined in the read descriptor Dc is within the standard receiving area Rgo" can be performed even before the data Dt is received from the network 3. Therefore, the communication control device 10 can perform processing to prevent "erroneous data transfer by the descriptor Dc" before receiving the data Dt.

The communication control device 10 performs processing to prevent "erroneous data transfer using the descriptor Dc" before receiving the data Dt, thereby achieving the effect of shortening the time from receiving the data Dt to transferring the data Dt to the main memory 20.

Here, it is preferable that the communication control device 10 is realized as a NIC (Network Interface Card). The communication control device 10 is typically configured with a hardware logic circuit such as an FPGA (Field-Programmable gate array) or an ASIC (Application Specific Integrated Circuit).

When the communication control device 10 that determines whether to reject the descriptor Dc is configured with a hardware logic circuit, the following effects can be achieved. That is, generally, if the processing content is the same, processing by hardware can be executed faster than processing by software (specifically, a CPU). Therefore, the communication control device 10 configured with a hardware logic circuit has the effect of being able to determine whether to reject the descriptor Dc faster than when the CPU 30 or the like is made to determine whether to reject the descriptor Dc.

In particular, the communication control device 10 selects an "available descriptor" for transferring data Dt from among a plurality of descriptors Dc prepared in advance, without requiring the CPU 30 or the like to reconfigure the descriptor Dc, and executes the transfer according to the selected descriptor Dc.

When configured with a hardware logic circuit, the communication control device 10 can extremely quickly execute the process of selecting an "available descriptor" for transferring data Dt from among a plurality of descriptors Dc prepared in advance. Also, when configured with a hardware logic circuit, the communication control device 10 can extremely quickly execute the transfer according to the descriptor Dc selected from a plurality of descriptors Dc prepared in advance.

Therefore, when the communication control device 10 is configured with a hardware logic circuit, the communication control device 10 has the effect of being able to transfer data Dt received from the network 3 at extremely high speeds while preventing erroneous data Dt transfer due to the descriptor Dc.

In the communication control device 10, the determination unit 124 determines that the descriptor Dc read by the reading unit 123 is "available" if both of the following two conditions are satisfied. That is, the determination unit 124 determines that the descriptor Dc is "available" if both of the following conditions are satisfied: (A) the start address As specified by the descriptor Dc is within the standard reception area Rgo, and (B) the end address Ae is within the standard reception area Rgo.

The end address Ae is the end address of the area after the data Dt is transferred in accordance with the descriptor Dc read by the reading unit 123. The end address Ae is calculated from the data size of the received data Dt and the start address As specified by the descriptor Dc read by the reading unit 123.

According to the above configuration, the communication control device 10 calculates the end address Ae from the data size of the received data Dt and the start address As specified by the descriptor Dc read by the reading unit 123. The communication control device 10 then determines that the read descriptor Dc is "available" because "the start address As specified by the read descriptor Dc is within the standard receiving area Rgo" and "the end address Ae is within the standard receiving area Rgo."

Here, even if the "start address As specified by the read descriptor Dc is within the standard receiving area Rgo," there may be times when the "end address Ae is not within the standard receiving area Rgo." In such cases, the read descriptor Dc is inappropriate as a descriptor Dc for determining the transfer destination of the received data Dt, meaning that it cannot be used (is unusable) as a descriptor Dc for determining the transfer destination of the received data Dt.

Therefore, the communication control device 10 determines whether the read descriptor Dc is usable (i.e., whether the descriptor Dc is acceptable) by taking into consideration the data size of the received data Dt in addition to the start address As specified by the read descriptor Dc.

By taking into account the data size of the received data Dt in addition to the starting address As, the communication control device 10 can more accurately select an "available descriptor" for transferring the received data Dt from among a number of previously prepared descriptors Dc.

The communication control device 10 calculates the standard receiving area Rgo from the start address of the standard receiving area Rgo and the data size of the standard receiving area Rgo, which were previously acquired. For example, the communication control device 10 acquires the start address of the standard receiving area Rgo and the data size of the standard receiving area Rgo from the CPU 30 in advance.

According to the above configuration, the communication control device 10 acquires the start address of the standard receiving area Rgo and the data size of the standard receiving area Rgo in advance. Then, the communication control device 10 calculates the standard receiving area Rgo from the acquired start address of the standard receiving area Rgo and the data size of the standard receiving area Rgo.

Therefore, the communication control device 10 has the effect of being able to calculate the standard receiving area Rgo from the starting address of the standard receiving area Rgo and the data size of the standard receiving area Rgo, which are previously obtained.

The communication control device 10 further includes a first descriptor FIFO 125 (storage unit). The first descriptor FIFO 125 stores a normal descriptor Dco, which is a "descriptor Dc that is set in the main memory 20 before receiving data Dt each time data Dt is to be received (e.g., every control period Cc)."

The first descriptor Dc(X) that is read first by the reading unit 123 when transferring data Dt and that is first judged as to whether it is correct or not by the judgment unit 124 is the normal descriptor Dco stored in the first descriptor FIFO 125. For example, the first descriptor Dc(X) that is read first by the reading unit 123 when transferring data Dt and that is first judged as to whether it is correct or not by the judgment unit 124 is the normal descriptor Dco(X).

When DMAC121 (A) determines that normal descriptor Dco(X) is "unavailable" and (B) determines that another normal descriptor Dco(Y) is "available," it executes a transfer according to normal descriptor Dco(Y).

The other normal descriptor Dco(Y) is a normal descriptor Dco that is read by the reading unit 123 after the first descriptor Dc(X) (i.e., normal descriptor Dco(X)). In other words, the normal descriptor Dco(Y) is a normal descriptor Dco that follows the normal descriptor Dco(X) and is a succeeding descriptor Dc of the normal descriptor Dco(X).

When the determination unit 124 determines that the normal descriptor Dco(Y) is "available," the DMAC 121 performs a transfer according to the normal descriptor Dco(Y), treating the normal descriptor Dco(Y) as an "available descriptor." Specifically, the DMAC 121 transfers data Dt to an area whose top address is the start address As(Y) specified in the normal descriptor Dco(Y).

For example, if the normal descriptor Dco(P) is determined to be "unavailable" and the normal descriptor Dco(Q) read after the normal descriptor Dco(P) is determined to be "available," the DMAC 121 executes the following transfer. That is, the DMAC 121 transfers the data Dt according to the normal descriptor Dco(Q) that is read after the normal descriptor Dco(P) by the reading unit 123 and that is determined to be "available" by the determining unit 124.

For example, if normal descriptors Dco(P) and Dco(Q) are determined to be "unavailable" and normal descriptor Dco(R) read after normal descriptor Dco(Q) is determined to be "available," DMAC121 executes the following. That is, DMAC121 transfers data Dt according to normal descriptor Dco(R) that is read by reading unit 123 after normal descriptor Dco(Q) and that is determined by determination unit 124 to be "available."

According to the above configuration, when the communication control device 10 determines that the normal descriptor Dco(X) stored in the first descriptor FIFO 125 is "available," it executes a transfer according to the normal descriptor Dco(X). Specifically, the communication control device 10 transfers data Dt to an area whose leading address is the start address As(X) specified by the normal descriptor Dco(X) determined to be "available."

Furthermore, when the communication control device 10 determines that the normal descriptor Dco(X) is "unavailable" and determines that the normal descriptor Dco(Y) is "available," it executes a transfer according to the normal descriptor Dco(Y). For example, when the communication control device 10 determines that the normal descriptor Dco(X) is "unavailable," it further reads the normal descriptor Dco(Y), which is the following descriptor Dc stored in the first descriptor FIFO 125. Then, when the communication control device 10 determines that the read normal descriptor Dco(Y) is "available," it transfers the data Dt to an area whose leading address is the start address As(Y) specified by the normal descriptor Dco(Y).

Generally, the CPU or the like (software) does not calculate how many pieces of data Dt (more precisely, how many frames of data) a certain piece of information (e.g., image information of several megabytes (Mbytes)) will be transmitted as. For example, even if the data size of one piece of data Dt (frame data) is normally "1.5 kilobytes (Kbytes)," the CPU or the like does not calculate how many pieces of data Dt that piece of information will be transmitted as.

Instead, the CPU or the like generally sets a sufficient number (number) of normal descriptors Dco in the main memory 20 before receiving certain information so that the certain information can always be received (transferred to the main memory 20). In other words, the CPU 30 or the like sets a sufficient number of normal descriptors Dco in the main memory 20 in advance, before receiving the data Dt, in comparison with the number of data Dt to be received from the network 3.

The normal descriptor Dco set in the main memory 20 by the CPU 30 or the like is stored in the first descriptor FIFO 125. Therefore, the number of normal descriptors Dco stored in the first descriptor FIFO 125 is sufficiently large compared to the number of pieces of data Dt to be received from the network 3.

Therefore, the communication control device 10 has the effect of being able to select "available descriptors" for transferring data Dt from among a number of normal descriptors Dco that is sufficiently greater than the number of data Dt to be transferred.

The communication control device 10 further includes a second descriptor FIFO 126 different from the first descriptor FIFO 125. In the communication control device 10, when the number of errors Ct exceeds a preset reference number Nr, the reading unit 123 reads a save descriptor Dce, which is a descriptor Dc prestored in the second descriptor FIFO 126. The DMAC 121 regards the save descriptor Dce read by the reading unit 123 as an "available descriptor" for transferring data Dt, and transfers data Dt to an area whose leading address is the start address As specified in the save descriptor Dce.

The number of errors Ct is the number of normal descriptors Dco stored in the first descriptor FIFO 125 and read by the reading unit 123 that have been determined to be "unusable" by the determination unit 124.

According to the above configuration, when the number of errors Ct exceeds the reference number Nr, the communication control device 10 reads the save descriptor Dce that is pre-stored in the second descriptor FIFO 126. Then, the communication control device 10 treats the save descriptor Dce as an "available descriptor" for transferring data Dt, and transfers the data Dt to an area whose top address is the start address As specified in the save descriptor Dce.

If the number of errors Ct exceeds the reference number Nr, there is a possibility that an abnormality has occurred in all or most of the "normal descriptors Dco stored in the first descriptor FIFO 125." In that case, it is impossible or takes a great deal of time to select an "available descriptor" from the "normal descriptors Dco stored in the first descriptor FIFO 125."

Therefore, when the number of errors Ct exceeds the reference number Nr, the communication control device 10 transfers the data Dt according to the backup descriptor Dce instead of the "normal descriptor Dco stored in the first descriptor FIFO 125."

Therefore, the communication control device 10 has the effect of being able to reliably and quickly transfer data Dt even when an abnormality has occurred in all or most of the "normal descriptors Dco stored in the first descriptor FIFO 125."

In the communication control device 10, the start address As specified by the save descriptor Dce is an area in the main memory 20 where data Dt can be stored, and is within an area (the save receiving area Rge) that is different from the standard receiving area Rgo.

According to the above configuration, when the communication control device 10 transfers data Dt to the main memory 20 in accordance with the save descriptor Dce, the communication control device 10 transfers the data Dt to the following area. That is, the communication control device 10 transfers the data Dt to the save receiving area Rge, which is an area different from the standard receiving area Rgo, in accordance with the save descriptor Dce. In other words, the save receiving area Rge, which is the area to which the data Dt is transferred in accordance with the save descriptor Dce, is different from the standard receiving area Rgo.

When the start address As specified by the save descriptor Dce is within the standard receiving area Rgo, the following event may occur with respect to certain data Dt(X) transferred to the standard receiving area Rgo according to the save descriptor Dce. That is, the certain data Dt(X) may be overwritten by other data Dt(Y) transferred to the standard receiving area Rgo according to the normal descriptor Dco stored in the first descriptor FIFO 125.

To prevent the above situation, complex processing is required, such as determining whether the area to which a certain piece of data Dt (X) is transferred overlaps with the area to which another piece of data Dt (Y) is transferred.

In contrast, if the start address As specified by the save descriptor Dce is not within the standard receiving area Rgo, the above-mentioned certain data Dt(X) transferred in accordance with the save descriptor Dce will not be overwritten by the above-mentioned other data Dt(Y).

Therefore, the communication control device 10 has the effect of being able to avoid a situation in which "data Dt(X) transferred according to the backup descriptor Dce is overwritten with data Dt(Y) transferred according to the normal descriptor Dco" without requiring complicated processing.

§3. Operational example (Overview of the process implemented by the communication control device according to this embodiment)
6 is a diagram for explaining an outline of the process of identifying the standard receiving area Rgo (permitted area) and the judgment process. The communication control device 10 executes a process of identifying the standard receiving area Rgo before executing a data receiving process, which is a process of "determining the transfer destination (particularly, the start address As) of the received data Dt and transferring the data Dt to the determined transfer destination." In addition, the data receiving process executed by the communication control device 10 after identifying the standard receiving area Rgo includes two judgment processes, specifically, a first judgment process FJ and a second judgment process SJ.

Figure 6 (A) is a diagram explaining the standard receiving area Rgo that the communication control device 10 identifies before executing the data receiving process. The communication control device 10 acquires information indicating the "start address of the standard receiving area Rgo" and information indicating the "data size of the standard receiving area Rgo" from the CPU 30 in advance. The communication control device 10 identifies the standard receiving area Rgo from the "start address of the standard receiving area Rgo" and the "data size of the standard receiving area Rgo" acquired from the CPU 30, as shown in Figure 6 (A).

(A) in FIG. 6 is a diagram outlining the first determination process FJ and the second determination process SJ included in the data reception process executed by the communication control device 10.

In the first determination process FJ, the communication control device 10 (particularly, the determination unit 124) determines whether "the start address As defined in the descriptor Dc (particularly, the normal descriptor Dco) read by the reading unit 123 is within the standard receiving area Rgo." The determination unit 124 can execute the first determination process FJ after the normal descriptor Dco is set in the main memory 20 by the CPU 30. More precisely, the determination unit 124 can execute the first determination process FJ after the normal descriptor Dco set in the main memory 20 by the CPU 30 is stored in the first descriptor FIFO 125. In other words, the determination unit 124 can execute the first determination process FJ even before receiving the data Dt, as long as it is after the normal descriptor Dco is stored in the first descriptor FIFO 125.

In response to this, the second determination process SJ is executed by the communication control device 10 (particularly the determination unit 124) after the data Dt is received. When the PLC 1 receives the data Dt, or more precisely, when the data Dt received by the PLC 1 is stored in the data FIFO 127, the determination unit 124 measures the data size of the data Dt. From the measured data size of the data Dt and the start address As specified in the normal descriptor Dco, the determination unit 124 calculates the end address Ae of the "area after transfer when the data Dt is transferred according to the normal descriptor Dco". Then, in the second determination process SJ, the determination unit 124 determines whether the end address Ae is within the standard receiving area Rgo.

Here, the first determination process FJ can be executed even before the data Dt is received, but it is not necessary to execute the first determination process FJ before receiving the data Dt. For example, the first determination process FJ may be executed after the data Dt is received, or the first determination process FJ may be executed in parallel with the reception of the data Dt.

(Overview of data reception processing)
7 is a flow diagram showing an example of a data reception process executed by the communication control device 10. The address determination unit 122 sets the error count Ct, which is the number of normal descriptors Dco determined by the determination unit 124 to be "unavailable descriptors," to "0" (S110). The reading unit 123 refers to the first descriptor FIFO 125 and reads normal descriptors Dco whose validity has not yet been determined by the determination unit 124 (S120). The reading unit 123 notifies the determination unit 124 of the start address As defined in the read normal descriptor Dco. The determination unit 124 determines whether "the start address As notified by the reading unit 123 is within the standard reception area Rgo" (S130) (first determination process FJ).

When the determination unit 124 determines that "the start address As notified by the reading unit 123 is within the standard receiving area Rgo" (YES in S130), the communication control device 10 receives the data Dt (S140) and stores the received data Dt in the data FIFO 127.

When the data Dt is stored in the data FIFO 127, the determination unit 124 measures the data size of the data Dt stored in the data FIFO 127. The determination unit 124 calculates the end address Ae of the "area after transfer when the data Dt is transferred according to the normal descriptor Dco" from the measured data size of the data Dt and the start address As notified by the reading unit 123 (S150). Then, the determination unit 124 determines whether "the end address Ae calculated in S140 is within the standard receiving area Rgo" (S160) (second determination process SJ).

When the determination unit 124 determines that "the end address Ae calculated in S140 is within the standard receiving area Rgo" (YES in S160), the address determination unit 122 executes the following process. That is, the address determination unit 122 notifies the DMAC 121 of the start address As defined in the descriptor Dc last read by the reading unit 123.

The DMAC 121 transfers the data Dt according to the descriptor Dc last read by the reading unit 123 (S170). That is, the DMAC 121 transfers the data Dt to an area in the main memory 20 whose top address is the "start address As specified in the descriptor Dc last read by the reading unit 123" notified by the address determination unit 122.

When the determination unit 124 determines that "the start address As notified by the reading unit 123 is not within the standard receiving area Rgo" (NO in S130), the address determination unit 122 counts up the number of errors Ct by "1" (S180). The reading unit 123 determines whether the number of errors Ct counted up by "1" in S180 "exceeds the reference number Nr" (S190).

When it is determined that the number of errors Ct, which has been counted up by "1" in S180, exceeds the reference number Nr (YES in S190), the reading unit 123 reads the save descriptor Dce that is pre-stored in the second descriptor FIFO 126 (S200). Then, the address determination unit 122 notifies the DMAC 121 of the start address As defined in the descriptor Dc last read by the reading unit 123. In other words, the address determination unit 122 notifies the DMAC 121 of the start address As defined in the save descriptor Dce read by the reading unit 123 in S200.

When it is determined that the error count Ct counted up by "1" in S180 does not exceed the reference number Nr (YES in S190), the reading unit 123 reads the next normal descriptor Dco stored in the first descriptor FIFO 125 (S210). That is, the reading unit 123 reads the first normal descriptor Dco among the normal descriptors Dco stored in the first descriptor FIFO 125 and whose validity has not yet been determined by the determination unit 124. The reading unit 123 notifies the determination unit 124 of the start address As defined in the normal descriptor Dco that was read. When the determination unit 124 is notified of the start address As defined in the normal descriptor Dco that was read by the reading unit 123 from the reading unit 123, the determination unit 124 executes the process of S130.

Figure 7 shows an example in which the communication control device 10 receives data Dt after the determination unit 124 determines that "the start address As notified by the reading unit 123 is within the standard receiving area Rgo." However, it is not essential that the timing at which the communication control device 10 receives data Dt is after the determination unit 124 determines that "the start address As notified by the reading unit 123 is within the standard receiving area Rgo."

As mentioned above, it is not essential to execute the first determination process FJ before receiving the data Dt. For example, S140 (receiving the data Dt) may be executed before the determination of S130 (first determination process FJ).

In other words, it is not essential that the communication control device 10 receives data Dt after the determination unit 124 determines that "the start address As notified by the reading unit 123 is within the standard receiving area Rgo." In the first process FJ, it is sufficient for the determination unit 124 to find a normal descriptor Dco that determines that "the start address As is within the standard receiving area Rgo" from among the normal descriptors Dco read by the reading unit 123.

It does not matter which timing occurs before the normal descriptor Dco whose "start address As is within the standard receiving area Rgo" is found in the first process FJ and the communication control device 10 receives the data Dt. For example, the communication control device 10 may receive the data Dt before the normal descriptor Dco whose "start address As is within the standard receiving area Rgo" is found in the first process FJ. For example, after the determination in S130 is "NO" for a certain descriptor Dc, the communication control device 10 may receive the data Dt before another descriptor Dc is read or before the determination in S130 is performed for another descriptor Dc.

The process executed by the communication control device 10, which has been described using FIG. 7, can be summarized as follows. That is, the control method executed by the communication control device 10 is a communication control device control method for transferring data Dt received from the network 3 to the main memory 20. The control method includes a reading step (S120, S200, and S210), a determination step (S130 and S160), and a transfer step (S170).

The read step reads a descriptor Dc that specifies the starting address As of the area where data Dt should be stored.

In the determination step, if the start address As specified by the descriptor Dc read in the read step is within the standard receiving area Rgo (permitted area), the descriptor Dc read in the read step is determined to be "available." The standard receiving area Rgo is preset as an area in the main memory 20 where data Dt can be stored.

The transfer step transfers data Dt to an area whose top address is the start address As defined by the descriptor Dc read in the read step.

In the communication control device 10, multiple descriptors Dc are prepared in advance.

In the transfer step, (A) when the first descriptor Dc(X) read in the read step among the multiple descriptors Dc prepared in advance is determined to be "available" in the determination step, the following transfer is executed. That is, in the read step, data Dt is transferred to an area whose top address is the start address As(X) defined in the first descriptor Dc(X). For example, in the transfer step, when the first normal descriptor Dco(X) read in the read step among the multiple descriptors Dc prepared in advance is determined to be "available" in the determination step, the transfer is executed according to the first normal descriptor Dco(X).

In the transfer step (B), when the first descriptor Dc(X) is determined to be "unavailable" in the determination step, the following transfer is executed. That is, the transfer step transfers data Dt according to a second descriptor Dc(Y) that was read in the read step after the first descriptor Dc(X) from among a plurality of previously prepared descriptors Dc. As a specific example, the transfer step transfers data Dt to an area whose top address is the start address As(Y) defined in the second descriptor Dc(Y).

According to the above configuration, when the control method determines that a first descriptor Dc(X) read from among a plurality of previously prepared descriptors Dc is "available," the control method transfers data Dt according to the first descriptor Dc(X). As a specific example, the control method transfers data Dt to an area whose leading address is a start address As(X) defined by the first descriptor Dc(X).

When the control method determines that the first descriptor Dc(X) is "unavailable," the control method further reads a second descriptor Dc(Y) from among a plurality of previously prepared descriptors Dc. The control method then transfers data Dt to an area whose leading address is the start address As(Y) defined by the second descriptor Dc(Y).

In other words, even if the control method determines that the start address As(X) specified by the read first descriptor Dc(X) is not within the standard receiving area Rgo, it does not notify the CPU 30 or the like of the determination result. Even if the control method determines that the start address As(X) is not within the standard receiving area Rgo, it does not cause the CPU 30 or the like to reset the first descriptor Dc(X) to the correct one. When the control method determines that the start address As(X) specified by the first descriptor Dc(X) is not within the standard receiving area Rgo, it further reads the second descriptor Dc(Y) prepared in advance. Then, the control method transfers the data Dt to the main memory 20 according to the read second descriptor Dc(Y).

The control method involves selecting an "available descriptor" for transferring data Dt from among a number of previously prepared descriptors Dc, and transferring the data Dt according to the selected "available descriptor."

Therefore, the control method can prevent erroneous data transfer using the descriptor Dc. Furthermore, the control method can reduce the time required to transfer the data Dt compared to a case in which the CPU 30 or the like is caused to reset the "available descriptor" for the transfer of the data Dt.

In other words, the control method has the effect of preventing erroneous data transfer using the descriptor Dc while transferring data Dt received from the network 3 to the main memory 20 at high speed.

In particular, the determination of "whether the start address As defined in the read descriptor Dc is within the standard receiving area Rgo" can be performed even before the data Dt is received from the network 3. Therefore, the control method can perform processing to prevent "erroneous data transfer by the descriptor Dc" before the data Dt is received.

The control method has the effect of shortening the time from receiving the data Dt to transferring the data Dt to the main memory 20 by executing a process for preventing "erroneous data transfer by the descriptor Dc" before receiving the data Dt.

Here, it is preferable that the communication control device 10 is realized as a NIC (Network Interface Card). The communication control device 10 is typically configured with a hardware logic circuit such as an FPGA (Field-Programmable gate array) or an ASIC (Application Specific Integrated Circuit).

When the communication control device 10 that determines whether to reject the descriptor Dc is configured with a hardware logic circuit, the following effects can be achieved. That is, generally, if the processing content is the same, processing by hardware can be executed faster than processing by software (specifically, a CPU). Therefore, the communication control device 10 configured with a hardware logic circuit has the effect of being able to determine whether to reject the descriptor Dc faster than when the CPU 30 or the like is made to determine whether to reject the descriptor Dc.

In particular, the control method does not require the CPU 30 or the like to reset the descriptor Dc, but instead selects an "available descriptor" for transferring data Dt from among a plurality of descriptors Dc prepared in advance, and executes the transfer according to the selected descriptor Dc.

When configured with a hardware logic circuit, the communication control device 10 can extremely quickly execute the process of selecting an "available descriptor" for transferring data Dt from among a plurality of descriptors Dc prepared in advance. Also, when configured with a hardware logic circuit, the communication control device 10 can extremely quickly execute the transfer according to the descriptor Dc selected from a plurality of descriptors Dc prepared in advance.

Therefore, when the communication control device 10 is configured with a hardware logic circuit, the control method has the effect of preventing erroneous data transfer using the descriptor Dc while transferring data Dt received from the network 3 at extremely high speed.

§4. Modifications (Network Configuration Examples)
2, a plurality of networks 3 are connected to the PLC 1 via a network hub 2. However, in the control system 0, one network 3 may be connected to the PLC 1 without going through the network hub 2, and for example, the PLC 1 and one or more network devices may be connected to each other in a unicursal manner so as to be able to communicate with each other.

The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope of the claims. The technical scope of the present invention also includes embodiments obtained by appropriately combining the technical means disclosed in different embodiments.

3 network 10 communication control device 20 main memory 30 CPU
121 DMAC (transfer unit)
123 Reading unit 124 Determination unit 125 First descriptor FIFO (storage unit)
126 Second Descriptor FIFO (Second Storage Unit)
Ae End address As Start address Ct Number of errors Dc Descriptor Dce Descriptor for saving Dco Normal descriptor Dt Data Nr Reference number Rgo Standard receiving area (permitted area)
S120 Reading step S130 Judgment step S160 Judgment step S170 Transfer step S200 Reading step S210 Reading step

Claims (7)

A communication control device that transfers data received from a network to a main memory,
a reading unit that reads a descriptor that specifies a start address of an area in which the data is to be stored;
a determination unit that determines that the descriptor read by the reading unit is available when the start address defined in the descriptor read by the reading unit is within an allowed area that is a pre-defined area in the main memory in which the data can be stored;
a transfer unit that transfers the data to an area having a leading address equal to the start address defined in the descriptor read by the reading unit;
Equipped with
A plurality of the descriptors are prepared in advance,
The transfer unit is
(A) when the determination unit determines that a first descriptor read by the reading unit among the plurality of previously prepared descriptors is available, the data is transferred to an area having a starting address defined in the first descriptor as a top address;
(B) When the determination unit determines that the first descriptor is unavailable, the communication control device transfers the data to an area whose starting address is the start address specified in a second descriptor read by the reading unit after the first descriptor among the multiple descriptors prepared in advance. 2. The communication control device of claim 1, wherein the determination unit determines that the descriptor read by the reading unit is usable if (A) the starting address specified in the descriptor read by the reading unit is within the permitted area, and (B) the end address of the area after the data is transferred, calculated from the data size of the received data and the starting address specified in the descriptor read by the reading unit, is within the permitted area. 3. The communication control device according to claim 1, wherein the permission area is calculated from a start address of the permission area and a data size of the permission area, both of which are obtained in advance. a storage unit configured to store the descriptor set in the main memory before receiving the data each time the data is to be received;
the first descriptor is stored in the storage unit;
4. A communication control device as described in any one of claims 1 to 3, wherein when (A) the determination unit determines that the first descriptor is not available, and (B) the determination unit determines that a subsequent descriptor, which is different from the first descriptor stored in the storage unit and is the descriptor read by the reading unit after the first descriptor, is available, the transfer unit transfers the data to an area whose top address is the start address specified in the subsequent descriptor, with the subsequent descriptor as the second descriptor. When the number of the descriptors that are stored in the storage unit and read by the reading unit and that are determined to be unavailable by the determining unit exceeds a preset reference number,
The reading unit reads a save descriptor, which is the descriptor stored in advance in a second storage unit different from the storage unit;
5. The communication control device according to claim 4, wherein the transfer unit transfers the data to an area having the start address defined in the save descriptor as a top address, using the save descriptor read by the reading unit as the second descriptor. 6. The communication control device according to claim 5, wherein a start address defined by the save descriptor is within an area in the main memory capable of storing the data, the area being different from the permitted area. A method for controlling a communication control device that transfers data received from a network to a main memory, comprising the steps of:
a reading step of reading a descriptor defining a start address of an area in which the data is to be stored;
a determining step of determining that the descriptor read in the read step is available when the start address defined in the descriptor read in the read step is within an allowed area that is a pre-defined area in the main memory in which the data can be stored;
a transfer step of transferring the data to an area having a top address equal to the start address defined in the descriptor read in the read step;
Including,
A plurality of the descriptors are prepared in advance,
The transferring step includes:
(A) when it is determined in the determination step that a first descriptor read in the read step is available among the plurality of previously prepared descriptors, the data is transferred to an area having a start address defined in the first descriptor as a top address;
(B) A control method for transferring, when it is determined in the determination step that the first descriptor is unavailable, the data to an area having a starting address that is the start address specified in a second descriptor that was read in the reading step after the first descriptor among the plurality of descriptors prepared in advance.

Images