JP7443952B2 - Signal processing device, signal processing program, and signal processing method - Google Patents

Description

The present invention relates to a signal processing device, a signal processing program, and a signal processing method, and can be applied, for example, to a device that suppresses a predetermined component (such as a noise component) from collected sound.

There are two types of sound: pure tones and compound tones. A pure tone is a sound made up of one frequency, and a compound tone is a sound made up of multiple pure tones. Among complex sounds, sounds in which pure tones with frequency components that are integral multiples of each other are overlapped are called harmonic complex sounds.

Examples of such harmonic complex sounds include vocal vowels, howling sounds, and siren sounds. A siren sound is oscillated as a pure tone with only a fundamental frequency component, but due to the influence of nonlinearity of the oscillation device, etc., harmonic components that are integral multiples of the fundamental frequency component are generated.

An example of where such harmonic complex sounds pose a problem is voice calls using a telephone receiver. In a voice call (telephone call), not only the voice but also surrounding sounds are collected, so if noise such as a siren or received signals such as howling phenomenon are mixed, the call will be disturbed. Therefore, in order to suppress such harmonic complex sounds, it is necessary to suppress not only the fundamental frequency component but also the harmonic components.

Patent Document 1 describes a technique (so-called "adaptive notch filter") that suppresses howling by adaptively updating filter coefficients of a notch filter that removes one narrow frequency band. Furthermore, removing a plurality of frequency bands can be handled by using multi-stage notch filters.

Furthermore, a comb filter exists as a conventional technique capable of suppressing/extracting harmonic complex sounds. Since this comb filter outputs a suppression signal by subtracting an input signal delayed by a certain delay length from the input signal, it is possible to suppress or extract a set frequency band and frequency bands that are integral multiples thereof. As a conventional technique for suppressing/extracting a specific component using a comb filter, there is a technique described in Non-Patent Document 1. The technique described in Non-Patent Document 1 involves performing sound source separation to identify the input scale and the playing instrument by extracting harmonic complex tones from a mixed chord of multiple instruments using a comb filter in automatic music transcription. It has been realized.

Japanese Patent Application Publication No. 2013-183357

Taeko Miwa, Yoshiaki Tadokoro, and Tsutomu Saito, “Sound source separation for transcription using a comb filter,” IEICE technical research report. DSP, Digital Signal Processing 97 (167), 61-66, 1997-07-18, Institute of Electronics, Information and Communication Engineers

However, in the conventional suppression processing using a notch filter, although it is possible to suppress the fundamental frequency, there is a problem in that its harmonic components cannot be suppressed. Further, although conventional multi-stage notch filters can support multiple frequency bands, there is a problem in that it is not easy to design the number of stages.

On the other hand, conventional comb filters can suppress harmonic complex sounds, but because the values that can be set as delay lengths are integers, it is not possible to set delay lengths according to arbitrary removal frequencies. In other words, in the conventional comb filter, since the frequency to be suppressed can only be set discretely, there is a problem in that it is not possible to suppress a harmonic complex sound whose frequency changes continuously over time.

In view of the above problems, there is a need for a signal processing device, a signal processing program, and a signal processing method that can suppress harmonic complex sounds whose frequencies change continuously over time.

A first aspect of the present invention provides: (1) delayed signal acquisition means for performing delay processing using a fractional delay filter on an input signal to obtain a delayed signal; and (2) based on a difference between the input signal and the delayed signal. (3) determining a delay length of the delayed signal to be applied to the fractional delay filter of the delayed signal acquiring means, the output signal acquiring means acquiring an output signal from the input signal; (4) delay length determining means for determining the delay length at which the difference between the removal frequency, which is the frequency of the sound to be suppressed from the signal, and the frequency of the target sound to be suppressed is smaller; The means is characterized in that the delay length is determined corresponding to a cancellation frequency at which the power of the output signal is minimized .

A signal processing program according to a second aspect of the present invention provides a computer with: (1) delayed signal acquisition means for performing delay processing using a fractional delay filter on an input signal to obtain a delayed signal; (2) the input signal and the (3) output signal acquisition means for acquiring an output signal based on a difference from a delayed signal; and (3) determining a delay length of the delayed signal to be applied to the fractional delay filter of the delayed signal acquisition means, The output signal acquisition means functions as a delay length determining means for determining the delay length at which the difference between the removal frequency, which is the frequency of the sound to be suppressed from the input signal, and the frequency of the target sound to be suppressed becomes smaller ; 4) The delay length determining means is characterized in that the delay length determining means determines the delay length corresponding to a removal frequency that minimizes the power of the output signal .

A third aspect of the present invention is a signal processing method performed by a signal processing device, in which (1) the signal processing device has a delayed signal acquisition means, an output signal acquisition means, and a delay length determination means, and (2) the delay The signal acquisition means performs delay processing on the input signal using a fractional delay filter to acquire a delayed signal, and (3) the output signal acquisition means acquires an output signal based on the difference between the input signal and the delayed signal. (4) The delay length determining means determines the delay length of the delayed signal to be applied to the fractional delay filter of the delayed signal acquiring means, and the output signal acquiring means determines the delay length of the input signal. (5) the delay length determining means determines the delay length such that the difference between the removal frequency, which is the frequency of the sound to be suppressed, and the frequency of the target sound to be suppressed is smaller; The method is characterized in that the delay length corresponding to the minimum removal frequency is determined .

According to the present invention, it is possible to provide a signal processing device, a signal processing program, and a signal processing method that suppress harmonic complex sounds whose frequencies change continuously in accordance with time changes.

FIG. 1 is a block diagram showing a functional configuration of a signal processing device according to an embodiment. 1 is a block diagram illustrating an example of a hardware configuration of a signal processing device according to an embodiment. FIG. FIG. 3 is a diagram showing simulation results of the signal processing device according to the embodiment.

(A) Main Embodiment Hereinafter, one embodiment of a signal processing device, a signal processing program, and a signal processing method according to the present invention will be described in detail with reference to the drawings.

(A-1) Configuration of Embodiment FIG. 1 is a block diagram showing the functional configuration of a signal processing device 100 according to an embodiment.

The signal processing device 100 generates a signal that undergoes signal processing including processing to suppress a predetermined target sound component (hereinafter referred to as "suppression processing") from an input signal (acoustic signal), and outputs it as an output signal. It is a device. Furthermore, in this embodiment, the explanation will be made assuming that the signal processing device 100 itself does not include a microphone, but the explanation will be made assuming that the input signal is an acoustic signal picked up by a microphone (not shown).

Here, it is assumed that the input signal supplied to the signal processing device 100 is a digital audio signal (hereinafter also simply referred to as a "digital signal"). Further, here, it is assumed that the output signal output from the signal processing device 100 is also a digital signal. In the following, the input signal will be expressed as x(n), and the output signal will be expressed as y(n) (n is a sample number in time (time series) order).

Note that the formats of the input signal and output signal are not limited, and may be analog audio signals. In that case, the signal processing device 100 includes a conversion means (A/D conversion means) that converts an input signal in an analog format into a digital format, and a means (D/D conversion means) that converts a digital format signal subjected to suppression processing etc. into an analog format. A conversion means) may be provided separately.

Furthermore, the data format (source format) of the input signal supplied to the signal processing device 100 is not limited. For example, the input signal supplied to the signal processing device 100 may be an audio signal (audio stream data) collected in real time by a microphone (not shown), or may be an audio signal data file in any format. It's okay.

Next, the internal configuration of the signal processing device 100 will be explained.

As shown in FIG. 1, the signal processing device 100 includes an output signal calculation section 110, a delayed signal calculation section 120, and a delay length determination section 130. Furthermore, the delayed signal calculation section 120 includes a delay device 121.

The signal processing device 100 may be configured entirely by hardware (for example, a dedicated chip, etc.), or may be partially or entirely configured as software (program). The signal processing device 100 may be configured, for example, by installing a program (including the signal processing program of the embodiment) into a computer having a processor and a memory.

Next, an example of the hardware configuration of the signal processing device 100 will be described using FIG. 2.

FIG. 2 is a block diagram showing an example of the hardware configuration of the signal processing device 100.

FIG. 2 shows an example of a hardware configuration when the signal processing device 100 is configured using software (computer).

The signal processing device 100 shown in FIG. 2 includes a computer 200 in which a program (including the signal processing program of the embodiment) is installed as a hardware component. Note that the computer 200 may be separately equipped with means for mutually converting analog signals and digital signals (A/D conversion means and D/A conversion means). Further, the computer 200 may be a computer dedicated to a signal processing program, or may be configured to be shared with programs of other functions.

The computer 200 shown in FIG. 2 includes a processor 201, a primary storage section 202, and a secondary storage section 203. The primary storage unit 202 is a storage unit that functions as a working memory (work memory) of the processor 201, and for example, a memory that operates at high speed such as a DRAM (Dynamic Random Access Memory) can be used. The secondary storage unit 203 is a storage unit that records various data such as an OS (Operating System) and program data (including signal processing program data according to the embodiment), and is, for example, a non-volatile storage such as a FLASH memory or an HDD. sexual memory can be applied. In the computer 200 of this embodiment, when the processor 201 starts up, it reads the OS and programs (including the signal processing program according to the embodiment) recorded in the secondary storage unit 203 and expands them onto the primary storage unit 202. Execute.

Note that the specific configuration of the computer 200 is not limited to the configuration shown in FIG. 2, and various configurations can be applied. For example, if the primary storage section 202 is a nonvolatile memory (for example, a FLASH memory, etc.), the configuration may be such that the secondary storage section 203 is excluded.

(A-2) Operation of Embodiment Next, the operation of the signal processing device 100 of this embodiment having the above configuration (signal processing method according to the embodiment) will be described.

In the signal processing device 100, the delayed signal calculation unit 120 accumulates a delayed signal (hereinafter referred to as “u(n)”) obtained by delaying the input signal (delayed using the delay unit 121), and outputs the delayed signal to the output signal calculation unit 110. calculates and outputs an output signal from the input signal and the delayed signal, and the delay length determining unit 130 determines the delay length to be set for delay processing by the delay device 121 based on the output signal.

Next, details of the processing in the delayed signal calculation section 120 will be explained.

The delay device 121 included in the delayed signal calculation unit 120 applies a fractional delay filter to the input signal to obtain a delayed signal. In other words, the delay device 121 functions as a fractional delay filter. In the example of this embodiment, the filter coefficients will be determined (designed) using a sinc function in order to express a fractional delay.

Furthermore, the delay device 121 accumulates past L input signals x(n) (samples of the most recent L input signals x(n)) from the current time. For example, L may be the minimum necessary delay length calculated from the lowest frequency of the target sound set in the delay signal calculation unit 120 (delay device 121). For example, if the sampling frequency is 16000Hz and the fundamental frequency of the target sound component (harmonic complex sound) changes continuously from 200Hz to 800Hz, the required delay length is 20 (=16000/800) to 80 (=16000 /200) becomes. In this case, L may be set to 80 in the delayed signal calculation unit 120 so that even the lowest frequency can be suppressed.

Next, the delayed signal calculation unit 120 determines filter coefficients of a fractional delay filter to be applied to the delay device 121. A fractional delay filter is a filter that delays an input signal by a delay length d (real delay length). For example, the filter coefficient h(i;d) of the fractional delay filter applied to the delay device 121 may be calculated using a sinc function as shown in equation (1) below.

The delayed signal calculation unit 120 calculates a delayed signal (hereinafter referred to as "u(n)") from a convolution operation of the input signal accumulated by the delay device 121 and a filter coefficient. In this case, the delayed signal calculation unit 120 may calculate the delayed signal u(n) at time n according to the following equation (2).

Next, details of the processing in the output signal calculation section 110 will be explained.

The output signal calculation unit 110 calculates an output signal y(n) by subtracting the delayed signal u(n) from the input signal x(n). Specifically, the output signal calculation unit 110 calculates the output signal y(n) by subtracting the delayed signal u(n) from the input signal x(n), as shown in equation (3) below. It's okay. In this embodiment, the frequency of the sound that is suppressed by the output signal calculation unit 110 (the sound that is removed from the input signal) is referred to as a "removal frequency."

Next, details of the processing in the delay length determining section 130 will be explained.

The delay length determining section 130 determines (updates) a delay length d that reduces the error between the frequency of the target sound and the removal frequency, and sets it in the delayed signal calculating section 120 (delay device 121). For example, the delay length determination unit 130 may determine the delay length d corresponding to the removal frequency that minimizes the power of the output signal y(n). If the input signal x(n) contains a harmonic complex sound as the target sound, determine the delay length d corresponding to the removal frequency that minimizes the power of the output signal y(n). Therefore, the error between the frequency of the target sound (harmonic complex sound) and the removal frequency tends to decrease.

The specific means (calculation method) by which the delay length determination unit 130 determines the delay length corresponding to the removal frequency that minimizes the power of the output signal y(n) is not limited. In the example of this embodiment, the delay length determining unit 130 uses the gradient method based on the output signal y(n) calculated by the output signal calculating unit 110 to further reduce the error between the removal frequency and the frequency of the target sound. It shall be set so that it is small. Thereby, the delay length determining section 130 can set the delay length according to the removal frequency as described above. For example, in order to minimize the square error of the output signal y(n), the delay length determining unit 130 subtracts this differential result from the current delay length _dn , thereby determining the delay length at the next point in time. d _n+1 may be updated as shown in equation (4).

Equation (5) shows the result of substituting Equations (1) to (3) into Equation (4). Here, μ is the step width by which the differential value is multiplied to adjust the update speed. The value set for μ is not limited. For example, a suitable value of μ may be determined in advance through experimentation (simulation), design, etc., and may be set in the delay length determination unit 130.

(A-3) Effects of Embodiment According to this embodiment, the following effects can be achieved.

The delayed signal calculation section 120 can output a delayed signal according to the frequency of the target sound by utilizing the property that a delay length corresponding to an arbitrary removal frequency can be set in the delay device 121 (fractional delay filter). . As in conventional technology, in suppression processing using an integer delay filter (delay processing using a filter that allows only integer values to be set for the delay length), a real-valued delay length corresponding to an arbitrary removal frequency is expressed. Therefore, if the frequency of the target sound changes continuously over time, it can only be suppressed intermittently. However, in the signal processing device 100 of this embodiment, by using a fractional delay filter, it is possible to set a delay length corresponding to an arbitrary removal frequency. can be suppressed using the removal frequency).

In addition, since the delay length determination unit 130 can adaptively determine the delay length of the removal frequency according to time changes (temporal changes in the frequency of the target sound), the delay length determination unit 130 can The delay length can be determined accordingly.

Furthermore, in the delay length determination unit 130 of this embodiment, by using a gradient method based on the output signal, the delay length of the removal frequency can be adaptively determined according to time changes, so that the delay length of the removal frequency can be accurately determined. The delay length corresponding to the cancellation frequency can be determined according to the cancellation frequency.

As described above, the signal processing device 100 of this embodiment can provide a signal processing method that can suppress harmonic complex sounds whose frequencies change continuously.

Next, using the signal processing device 100 of this embodiment, a simulation (hereinafter referred to as "this simulation") of a process for suppressing the decoded sound component from a sample of an input signal containing a harmonic complex sound component is performed. ) results will be explained.

FIG. 3 is a diagram showing input signals and output signals (simulation results) in this simulation.

FIG. 3(a) is a diagram showing a spectrogram of a sample of an input signal used in this simulation, and FIG. 3(b) is a diagram showing a spectrogram of a sample of an input signal used in this simulation. FIG. 3 is a diagram showing a spectrogram (results of this simulation) of an output signal processed using the above method.

The input signal used in this simulation will be explained as including a component of a fire engine siren sound as a harmonic complex sound.

In each figure in FIG. 3, the horizontal axis represents time, and the vertical axis represents frequency. In each figure in FIG. 3, the magnitude (power) of the spectrum corresponding to each region (combination of time and frequency) is illustrated by a dotted sparse pattern (image). In other words, in each figure in Figure 3, the denser the dots are, the larger the spectrum (power) is, and the sparser the dots are, the smaller the spectrum (power) is. .

The input signal in Fig. 3(a) shows that harmonic complex sound components are included in a striped pattern, and the output signal in Fig. 3(b) shows that the components are contained in a striped pattern. It can be seen that the striped pattern has become thinner and the harmonic complex sound components have been suppressed.

As described above, the simulation results shown in FIG. 3 prove that the signal processing device 100 of this embodiment can suppress harmonic complex sounds whose frequencies change continuously.

(B) Other Embodiments The present invention is not limited to the above embodiments, and may include modified embodiments as exemplified below.

(B-1) In the above embodiment, an example was explained in which the signal processing device of the present invention is realized as a single device, but the hardware configuration of the signal processing device of the present invention and the signals to be processed are not limited. It is. For example, the signal processing device of the present invention may be used to transmit telephone communication signals (acoustic signals) to telephone devices (for example, information processing terminals that can be equipped with telephone communication software such as smartphones and tablets, and dedicated telephone devices). It may be installed in a relay device that relays (for example, a gateway that relays telephone communication signals/packets).

DESCRIPTION OF SYMBOLS 100... Signal processing device, 110... Output signal calculation part, 111... Delay device, 120... Delay signal calculation part, 130... Delay length determination part.

Claims (4)

Delayed signal acquisition means for performing delay processing using a fractional delay filter on an input signal to obtain a delayed signal;
output signal acquisition means for acquiring an output signal based on a difference between the input signal and the delayed signal;
Determines the delay length of the delayed signal to be applied to the fractional delay filter of the delayed signal acquisition means, the removal frequency being the frequency of the sound to be suppressed from the input signal by the output signal acquisition means and the suppression target. and delay length determining means for determining the delay length such that the difference from the frequency of the target sound becomes smaller ;
The delay length determining means determines the delay length corresponding to a removal frequency that minimizes the power of the output signal.
A signal processing device characterized by: The signal according to claim 1 , wherein the delay length determining means determines the delay length corresponding to a removal frequency at which the power of the output signal is minimized by a gradient method based on the output signal. Processing equipment. computer,
Delayed signal acquisition means for performing delay processing using a fractional delay filter on an input signal to obtain a delayed signal;
output signal acquisition means for acquiring an output signal based on a difference between the input signal and the delayed signal;
The delay length of the delayed signal to be applied to the quadrature fractional delay filter of the delayed signal acquisition means is determined, and the suppression frequency is the frequency of the sound to be suppressed from the input signal by the output signal acquisition means. Functioning as a delay length determining means for determining the delay length that has a smaller difference from the frequency of the target sound,
The delay length determining means determines the delay length corresponding to a removal frequency that minimizes the power of the output signal.
A signal processing program characterized by: In the signal processing method performed by the signal processing device,
The signal processing device includes a delayed signal acquisition means, an output signal acquisition means, and a delay length determination means,
The delayed signal acquisition means performs delay processing on the input signal using a fractional delay filter to obtain a delayed signal,
The output signal acquisition means acquires an output signal based on a difference between the input signal and the delayed signal,
The delay length determining means determines the delay length of the delayed signal to be applied to the fractional delay filter of the delayed signal acquiring means, and the delay length determining means determines the delay length of the delayed signal to be applied to the fractional delay filter of the delayed signal acquiring means, and the delay length determining means determines the delay length of the delayed signal to be applied to the fractional delay filter of the delayed signal acquiring means, and the delay length determining means determines the delay length of the delayed signal applied to the fractional delay filter of the delayed signal acquiring means, the frequency of the sound being suppressed from the input signal by the output signal acquiring means Determine the delay length at which the difference between the removal frequency and the frequency of the target sound to be suppressed is smaller;
The delay length determining means determines the delay length corresponding to a removal frequency that minimizes the power of the output signal.
A signal processing method characterized by:

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