JP7429625B2 - Train speed calculation system - Google Patents

Description

The present invention relates to a train speed calculation system using a speed generator.

Conventionally, train speed calculation systems have consisted of a speed generator that outputs a speed voltage that corresponds to the rotation speed, a matching circuit that matches the impedance of the circuit that includes the speed generator, and a speed voltage that outputs the speed voltage after passing through the matching circuit. The present invention includes a waveform shaping circuit that receives a matched speed voltage and outputs it as a speed signal, and a speed calculation device that calculates speed from the speed signal.
Further, the impedance of the matching circuit is designed to be a value that allows speed calculation to be realized according to the specifications of the speed generator and the waveform shaping circuit.
Furthermore, Patent Document 1 discloses that in a thermoacoustic power generation system, in order to deal with the problem of mismatch between the impedance of the thermoacoustic engine and the impedance of the linear generator, the value of the imaginary part of the impedance of the thermoacoustic engine is zero. A technique has been disclosed for changing the length of the branch pipe under conditions such that the length is equal to or close to the length of the branch pipe.

Patent No. 6611653

However, in the impedance design of a matching circuit, the output voltage amplitude according to the rotational speed of the speed generator, which is a consideration factor, varies greatly depending on the gap between the rotor and the magnetic poles of the speed generator (for example, in a certain speed generator , the maximum amplitude of the speed voltage in the gap of 0.5 mm to 1.7 mm is 1.8 Vrms to 40 Vrms), and it is difficult to calculate accurate impedance at the design stage.

In addition, speed generators have an error in the output voltage due to the gap, so even if the speed generator is of the same type, it cannot be said that they have the same characteristics. Therefore, the impedance is designed to be the optimum value, including the error. It is difficult to do so.

An object of the present invention is to provide a train speed calculation system with high maintainability that automatically adjusts the impedance of a matching circuit.

In order to solve the above problems, one of the typical train speed calculation systems according to the present invention is one that is connected to a speed generator attached to the axle, and the output of the speed generator according to the rotation of the axle. A matching circuit has a variable resistance value to match the impedance of the circuit that constitutes the train speed calculation system that inputs the voltage, and the output voltage of the speed generator that is input through the matching circuit is shaped into a waveform. A waveform shaping circuit that outputs as a speed signal, a monitoring circuit that measures the amplitude of the output voltage of the speed generator via a matching circuit and the duty ratio of the speed signal, and a monitoring circuit that calculates the rotational speed of the axle from the speed signal. an arithmetic circuit that generates instructions for adjusting the variable resistance value of the matching circuit according to the measurement results of the amplitude and duty ratio; and an arithmetic circuit that adjusts the variable resistance value of the matching circuit according to instructions from the arithmetic circuit to match the impedance. It consists of a resistance adjustment circuit that takes

According to the present invention, it is possible to provide a highly maintainable train speed calculation system that automatically adjusts the impedance of a matching circuit regardless of the type of speed generator or variations in its characteristics.
Problems, configurations, and effects other than those described above will be made clear by the description in the following detailed description.

BRIEF DESCRIPTION OF THE DRAWINGS It is a figure which shows the schematic structure and connection aspect of the train speed calculation system based on this invention. 1 is a diagram showing the configuration of a matching circuit according to Example 1, including its input and output connection modes; FIG. FIG. 3 is a diagram showing a processing procedure (flowchart) for adjusting the resistance value of the matching circuit according to the first embodiment. 4 is a diagram showing a processing procedure (flowchart) for narrowing down combinations of variable resistance values in the procedure shown in FIG. 3. FIG. FIG. 2 is a diagram showing a first example of the configuration of an equivalent circuit of the train speed calculation system according to Examples 1 to 4. FIG. FIG. 2 is a diagram showing a second example of the configuration of an equivalent circuit of the train speed calculation system according to Examples 1 to 4. FIG. It is a figure which shows the third example of the structure of the equivalent circuit of the train speed calculation system based on Examples 1-4. FIG. 4 is a diagram showing a fourth example of the configuration of an equivalent circuit of the train speed calculation system according to Examples 1 to 4; It is a figure which shows the fifth example of the structure of the equivalent circuit of the train speed calculation system based on Examples 1-4. FIG. 2 is a diagram showing the internal configurations of an arithmetic circuit and a monitoring circuit included in the train speed calculation system according to the first embodiment, including connection modes of inputs and outputs thereof. 3 is a diagram showing the internal configuration of a matching circuit included in the train speed calculation system according to Example 2. FIG. FIG. 7 is a diagram showing the internal configuration of an arithmetic circuit and a monitoring circuit included in a train speed calculation system according to a third embodiment, including connection modes of inputs and outputs of each. FIG. 7 is a diagram showing the internal configuration of an arithmetic circuit and a monitoring circuit included in a train speed calculation system according to a fourth embodiment, including connection modes of inputs and outputs of each.

Hereinafter, Examples 1 to 4 will be described as modes for carrying out the present invention with reference to the drawings. Note that the present invention is not limited to the following examples. In addition, in the description of the drawings, the same parts are denoted by the same reference numerals.

FIG. 1 is a diagram showing a schematic configuration and connection mode of a train speed calculation system 100 according to the present invention.
The train speed calculation system 100 according to the present invention is a system that calculates the rotational speed of an axle using the AC voltage output from the speed generator 200 as input, and outputs the calculation result to the equipment control device 210.

Here, the train speed calculation system 100 is used by being connected to a speed generator 200 that outputs a voltage containing axle speed information and an equipment control device 210 that controls equipment using the axle speed information, and a matching circuit. 101, a waveform shaping circuit 102, an arithmetic circuit 103, a monitoring circuit 104, and a resistance adjustment circuit 105.

Next, each component circuit will be explained.
The matching circuit 101 is a circuit for impedance matching between the speed generator 200 and a circuit within the train speed calculation system 100 to which the output voltage of the speed generator 200 is input.

The waveform shaping circuit 102 converts the AC output voltage of the speed generator 200 input via the matching circuit 101 into a pulse wave having the same frequency as this AC output voltage and at a signal level that can be received by the arithmetic circuit 103. This is a circuit for outputting to the arithmetic circuit 103.

The monitoring circuit 104 has a function of measuring the amplitude of the output voltage of the speed generator 200 that is input to the waveform shaping circuit 102 via the matching circuit 101, and a function of measuring the duty ratio of the signal output from the waveform shaping circuit 102. This is a circuit with

The arithmetic circuit 103 calculates the rotational speed of the axle from the signal output from the waveform shaping circuit 102, outputs the calculation result to the equipment control device 210, and also inputs it to the waveform shaping circuit 102 measured by the monitoring circuit 104. This circuit generates an instruction for adjusting the resistance value of the matching circuit 101 by inputting the amplitude of the output voltage of the speed generator 200 and the duty ratio of the signal output from the waveform shaping circuit 102.

The resistance adjustment circuit 105 is a circuit that has a function of changing the resistance value of the matching circuit 101 in response to instructions from the arithmetic circuit 103.

Next, the configuration and operational aspects of the first embodiment of the train speed calculation system 100 according to the present invention will be described.
FIG. 2 is a diagram showing the configuration (within the broken line frame) of the matching circuit 101 according to the first embodiment, including the connection mode of its inputs and outputs.

The matching circuit 101 is composed of variable resistors including at least a potentiometer and a programmable resistor, and in the configuration example shown in FIG. 2, it is composed of variable resistors R ₁ to R ₅ and switches S ₁ and S ₄ .
FIG. 3 is a diagram showing a processing procedure (flowchart) for adjusting the resistance value of the matching circuit 101 according to the first embodiment.
When the procedure shown in FIG. 3 is started, in step 301, the wheel diameter of the wheel to which the speed generator 200 is attached, the number of teeth of the gear of the speed generator 200, and the load impedance for bringing out the specified performance of the speed generator 200 are determined. and the detection range of the rotational speed of the axle are manually input by the user of the train speed calculation system 100.

Here, the wheel diameter, the number of teeth, and the range of load impedance are determined by the specifications of the speed generator 200, but the detection range of the rotation speed is determined by the train speed calculation system unless there is a restriction in the specifications of the speed generator 200. It is assumed that 100 users can arbitrarily decide.

In step 302, the arithmetic circuit 103 calculates a variable resistance value in the matching circuit 101 such that the load impedance, that is, the input impedance of the train speed calculation system 100 as seen from the speed generator 200 side, falls within the impedance range input in step 301. The combination is calculated and stored in the memory of the arithmetic circuit 103.

Here, when calculating the combination of variable resistance values, calculation is performed based on the equivalent circuit of the train speed calculation system 100. 5 to 9 are diagrams showing first to fifth examples of equivalent circuit configurations of the train speed calculation system 100. The five configurations shown in FIGS. 5 to 9 are due to differences in the configuration of the equivalent circuit of the waveform shaping circuit (as shown in the figure, differences in the connection manner of the resistor R _L and the capacitor C _L ). Further, these equivalent circuits are common to Examples 1 to 4.

For example, when considering the train speed calculation system 100 as the equivalent circuit (first example) shown in FIG. 5, the input impedance _ZL of the train speed calculation system 100 is expressed by the following equation (1).

Furthermore, when considering the equivalent circuits as shown in FIG. 6 (second example) to FIG. 9 (fifth example), the input impedance Z _L of the train speed calculation system 100 is calculated by the following equations (2) to (5th example), respectively. 5).

That is, in step 302, the arithmetic circuit 103 determines that the load impedance, that is, the input impedance _{ZL of the train speed calculation system 100 as seen from the speed generator 200 side, at the lower limit speed of the speed range input and set in step 301} , At step 301, a combination of variable resistance values constituting the matching circuit 101 is extracted so that the impedance falls within the input set impedance range.

However, if the input impedance _ZL varies depending on the frequency of the input signal as shown in FIGS. 6 to 9, ω in the calculation formulas (2) to (5) above When the frequency of the signal is f, it is expressed by the following equation (6).

Furthermore, the frequency f of the input signal can be calculated from the rotational speed of the axle and the number of teeth of the gear of the speed generator 200, and is expressed by the following equation (7), where r is the rotational speed and X is the number of teeth. .

Using the above formula, a combination of variable resistance values constituting the matching circuit 101 is extracted so that the load impedance in the speed range input and set in step 301 is within the impedance range input and set in step 301. At this time, the number of combinations of variable resistance values is assumed to be a finite number based on the minimum amount of change in the variable resistance values.

In step 303, the arithmetic circuit 103 determines whether to use the output signal of the actual machine (speed generator 200) or the simulated signal, and adjusts the matching circuit 101. If the matching circuit 101 is to be adjusted using the output signal of the actual device (Yes), proceed to step 304; if the matching circuit 101 is to be adjusted using the simulated signal (No), proceed to step 305. do.

In step 304, the arithmetic circuit 103 actually operates the speed generator 200 within the detected speed range input and set in step 301.

In step 306, the arithmetic circuit 103 sequentially reflects the combination of variable resistance values stored in step 302 to the variable resistance of the matching circuit 101, so that the signal amplitude input to the waveform shaping circuit 102 is The combinations of variable resistance values that satisfy the input voltage specifications are narrowed down, and then the combinations of variable resistances whose duty ratio of the signal input to the arithmetic circuit 103 satisfies an arbitrarily determined predetermined range are narrowed down. After completing these narrowdowns, move on to the next step.

Note that the combination of variable resistance values is reflected in the matching circuit 101 by the resistance adjustment circuit 105 in response to a command from the arithmetic circuit 103 (hereinafter, changes in the variable resistance values of the matching circuit 101 will not be mentioned. (as far as possible, the method described above shall be used).

Further, the monitoring circuit 104 compares the amplitude of the signal input to the waveform shaping circuit 102 and the input voltage specification of the waveform shaping circuit 102. Details of the monitoring circuit 104 and the resistance adjustment circuit 105 will be described later.

On the other hand, if the simulated signal is selected in step 303 and the process moves to step 305, the arithmetic circuit 103 executes step 306 based on the simulated signal input instead of the output signal of the speed generator 200.

In step 307, the arithmetic circuit 103 selects an optimal combination from among the combinations of variable resistance values narrowed down in step 306. At this time, the criteria for selecting the optimal combination of variable resistance values can be set arbitrarily. For example, by setting the input impedance of the train speed calculation system 100 as seen from the speed generator 200 to the combination of variable resistance values that is closest to the intermediate value of the set impedance range, one optimal combination of variable resistance values can be obtained. can be selected.

In step 308, the arithmetic circuit 103 outputs an instruction for the optimum combination of variable resistance values selected in step 307 to the resistance adjustment circuit 105 in order to reflect the combination to the variable resistance of the matching circuit 101.

Here, FIG. 4 shows a processing procedure (flowchart) for narrowing down the combinations of variable resistance values in step 306 of FIG. 3. In the process shown in FIG. 4, judgment step 3066 and judgment step 3067 are involved in narrowing down the combination of variable resistance values ("Zk" shown in FIG. 4) extracted in step 302 of FIG. Among them, for judgment step 3066, range conditions (Vmin and Vmax) for the signal amplitude (Vi) input to the waveform shaping circuit 102 are set, and for judgment step 3067, the range conditions (Vmin and Vmax) are set for the signal amplitude (Vi) input to the waveform shaping circuit 102. Range conditions (Dmin and Dmax) are set for the duty ratio (Di) of the input signal. However, depending on the usage conditions of the train speed calculation system 100, only the upper limit value (max) of the range condition or only the lower limit value (min) of the range condition can be set as the condition value.

With the above procedure, the resistance value of the variable resistor that constitutes the matching circuit 101 is adjusted. For the variable resistors R ₁ and R ₄ configuring _the matching circuit 101 _shown in FIG. Achieve that optimal value.

Next, the specific configuration and functions of the arithmetic circuit 103 and the monitoring circuit 104 will be explained.
FIG. 10 is a diagram showing the internal configuration of the arithmetic circuit 103 and the monitoring circuit 104 included in the train speed calculation system 100 according to the first embodiment, including the connection mode of their inputs and outputs.

The arithmetic circuit 103 includes a speed calculation circuit 103a, a variable resistance value combination calculation circuit 103b, a memory 103c, and a variable resistance adjustment command circuit 103d.

The speed calculation circuit 103a receives the speed signal output from the waveform shaping circuit 102 as input, and calculates the rotational speed of the axle from the frequency of this speed signal using the relationship shown in equation (7).

The variable resistance value combination calculation circuit 103b calculates the input impedance of the train speed calculation system 100 derived from the equivalent circuit of the train speed calculation system 100 using the circuits shown in FIGS. A combination of variable resistance values of the matching circuit 101 is calculated based on equation (5).

The memory 103c stores the variable resistance value combinations calculated by the variable resistance value combination calculation circuit 103b.

When adjusting the variable resistance value of the matching circuit 101, the variable resistance adjustment command circuit 103d appropriately extracts a combination of variable resistance values from among the combinations of variable resistance values stored in the memory 103c and sends the combination to the resistance adjustment circuit. Output to 105.

The monitoring circuit 104 includes a comparator circuit 104a, a reference power supply 104b, a reference voltage indicating circuit 104c, and a duty ratio comparison circuit 104d.

The comparator circuit 104a is constructed of an IC, a discrete semiconductor, or a combination of both.
The reference power supply 104b varies the voltage according to instructions from the reference voltage instruction circuit 104c.

When measuring the amplitude of the input signal to the waveform shaping circuit 102, the reference voltage instruction circuit 104c determines the lower limit voltage or upper limit voltage of the input voltage specification of the waveform shaping circuit 102, which is stored in the memory 103c in the arithmetic circuit 103. An instruction is given to the reference power source 104b.

The duty ratio comparison circuit 104d inputs the signal output from the waveform shaping circuit 102 to the arithmetic circuit 103, and compares the duty ratio of this signal with a preset reference value. The duty ratio comparison circuit 104d is configured with, for example, an FPGA and a clock, samples the input signal, calculates the duty ratio from the HIGH time and the LOW time of one cycle of the signal, and calculates the duty ratio from the reference value. Carry out a comparison.

As explained above, the train speed calculation system 100 according to the present invention includes the matching circuit 101 whose impedance can be adjusted. In conventional matching circuits, it was difficult to optimally design the impedance due to the large specification error of the speed generator, but in the train speed calculation system 100 according to the present invention, This makes it possible to optimally design the matching circuit 101.

The configuration and functions of the train speed calculation system 100 according to the second embodiment will be explained, focusing on the parts that are different from the train speed calculation system 100 according to the first embodiment.

FIG. 11 is a diagram showing the internal configuration of the matching circuit 101 included in the train speed calculation system 100 according to the second embodiment.
The train speed calculation system 100 according to the second embodiment has the same basic configuration as the train speed calculation system 100 according to the first embodiment, but the configuration of the matching circuit 101 has been changed from the configuration of the first embodiment shown in FIG. The difference is that the configuration is replaced with the configuration shown in 6.

The matching circuit 101 of the second embodiment is constructed by connecting fixed resistors (including zero resistance) and switches in series, as shown in FIG. 6, corresponding to the variable resistors R ₁ to R ₅ in the first embodiment shown in FIG. It is constructed by connecting multiple circuits in parallel (a series circuit of a resistor R _1N and a switch S _1N to a series circuit of a resistor R _5N and a switch S _5N , and switches S ₃₀ to S ₅₀ ). It is possible to change the impedance of the matching circuit 101 by turning on and off the switches of each part. That is, the impedance of the matching circuit 101 of the second embodiment having the above configuration can also be adjusted in accordance with the specifications of the speed generator 200.

According to the second embodiment, the impedance can be easily adjusted only by turning the switch ON and OFF.

The configuration and functions of the train speed calculation system 100 according to the third embodiment will also be explained, focusing on the parts that are different from the train speed calculation system 100 according to the first embodiment.
FIG. 12 is a diagram illustrating the internal configuration of the arithmetic circuit 103 and the monitoring circuit 104 included in the train speed calculation system 100 according to the third embodiment, including the connection mode of their inputs and outputs.

The train speed calculation system 100 according to the third embodiment has the same basic configuration as the train speed calculation system 100 according to the first embodiment, but the configuration of the monitoring circuit 104 is changed from the reference voltage indicating circuit of the first embodiment shown in FIG. The difference is that the duty ratio comparison circuit 104c and the duty ratio comparison circuit 104d are realized inside the arithmetic circuit 103, as shown in FIG.

That is, like the first embodiment, the monitoring circuit 104 of the third embodiment also has the function of comparing the amplitude of the signal input to the waveform shaping circuit 102 with the reference voltage, and the function of comparing the amplitude of the signal input to the waveform shaping circuit 102 to the arithmetic circuit 103. It has a function of comparing the duty ratio of the signal to be used with a reference value.

According to the third embodiment, the circuit configuration can be simplified by configuring the arithmetic circuit 103 including the reference voltage instruction circuit 104c and the duty ratio comparison circuit 104d using an FPGA.

The configuration and functions of the train speed calculation system 100 according to the fourth embodiment will also be explained, focusing on the parts that are different from the train speed calculation system 100 according to the first embodiment.
FIG. 13 is a diagram showing the internal configuration of the arithmetic circuit 103 and the monitoring circuit 104 of the train speed calculation system 100 according to the fourth embodiment, including the connection mode of their inputs and outputs.

The train speed calculation system 100 according to the fourth embodiment has the same basic configuration as the train speed calculation system 100 according to the first embodiment, but the configuration of the monitoring circuit 104 is the same as the comparator circuit 104a of the first embodiment shown in FIG. The difference is that a voltmeter 104e shown in FIG. 8 is provided in place of the reference power supply 104b and the reference voltage indicating circuit 104c.

That is, the monitoring circuit 104 of the fourth embodiment includes a voltmeter 104e in order to measure the signal voltage of the signal input to the waveform shaping circuit 102; It has a function of comparing the amplitude of an input signal with a reference voltage, and a function of comparing a duty ratio of a signal input from the waveform shaping circuit 102 to the arithmetic circuit 103 with a reference value.

Further, in the fourth embodiment as well, the duty ratio comparison circuit 104d may be implemented inside the arithmetic circuit 103 as in the third embodiment.

According to the fourth embodiment, although the use of the voltmeter 104e inevitably increases the circuit scale, since the signal voltage is directly detected by the voltmeter 104e, the number of comparison and determination steps can be reduced.

Although each embodiment according to the present invention has been described above, the present invention is not limited to each of the above-described embodiments, and various changes can be made without departing from the gist of the present invention.

100 Train speed calculation system, 101 Matching circuit, 102 Waveform shaping circuit,
103 arithmetic circuit, 103a speed calculation circuit,
103b variable resistance value combination calculation circuit, 103c memory,
103d variable resistance adjustment command circuit, 104 monitoring circuit, 104a comparator circuit,
104b reference power supply, 104c reference voltage indication circuit,
104d duty ratio comparison circuit, 104e voltmeter,
105 resistance adjustment circuit, 200 speed generator, 210 equipment control device

Claims (8)

In a train speed calculation system connected to a speed generator attached to the axle,
a matching circuit that receives the output voltage of the speed generator according to the rotation of the axle as an input and has a variable resistance value for matching with an impedance of a circuit constituting the train speed calculation system;
a waveform shaping circuit that shapes the output voltage of the speed generator input via the matching circuit and outputs it as a speed signal;
a monitoring circuit that measures the amplitude of the output voltage of the speed generator via the matching circuit and the duty ratio of the speed signal;
an arithmetic circuit that calculates the rotational speed of the axle from the speed signal and generates an instruction for adjusting the variable resistance value of the matching circuit according to the measurement results of the amplitude and the duty ratio by the monitoring circuit; ,
and a resistance adjustment circuit that adjusts the variable resistance value of the matching circuit according to the instruction from the arithmetic circuit to match the impedance. The train speed calculation system according to claim 1,
A train speed calculation system, wherein the matching circuit includes a plurality of variable resistors and a plurality of switches. The train speed calculation system according to claim 1,
A train speed calculation system, wherein the matching circuit includes a plurality of fixed resistors and a plurality of switches. The train speed calculation system according to claim 2 or 3,
The arithmetic circuit extracts a combination suitable for matching the impedance from the combinations of the plurality of variable resistors or the plurality of fixed resistors and the plurality of switches constituting the matching circuit and provides the instruction. A train speed calculation system that is characterized by generating. The train speed calculation system according to any one of claims 1 to 4,
The arithmetic circuit records the variable resistance value when the amplitude and the duty ratio measured by the monitoring circuit each satisfy a preset range of the amplitude and a preset range of the duty ratio. A train speed calculation system characterized by: The train speed calculation system according to any one of claims 1 to 5,
The monitoring circuit includes a comparator circuit for measuring the amplitude, and a reference power supply that can be adjusted according to the input voltage specifications of the waveform shaping circuit is connected to one input terminal of the comparator circuit. Train speed calculation system. The train speed calculation system according to any one of claims 1 to 5,
A train speed calculation system, wherein the monitoring circuit includes a voltmeter for measuring the amplitude. In a train speed calculation system connected to a speed generator attached to the axle,
A speed voltage corresponding to the rotation of the axle outputted by the speed generator is input, and the speed voltage is inputted through a matching circuit having a variable resistance value for matching the impedance of the circuit constituting the train speed calculation system. a first step of calculating the rotational speed of the axle from a speed signal obtained by waveform shaping the speed voltage;
a second step of generating instructions for adjusting the variable resistance value of the matching circuit in accordance with the measurement results of the amplitude of the speed voltage and the duty ratio of the speed signal via the matching circuit;
A third step of adjusting the variable resistance value of the matching circuit according to the instruction to match the impedance.

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