JP7379103B2 - DC voltage conversion circuit, its drive control method and drive control program - Google Patents

Description

The present invention relates to a DC voltage conversion circuit, a drive control method thereof, and a drive control program, and more particularly, to a DC voltage conversion circuit that controls an output voltage by single pulse control with a prefixed pulse width, a drive control method thereof, and a drive control program. .

The DC voltage conversion circuit converts an input voltage output from an external power source to a target voltage set as a power source for a load circuit to which power is supplied. An example of such a DC voltage conversion circuit is disclosed in Patent Document 1.

The DC-DC converter described in Patent Document 1 includes a DC-DC controller including a PFM comparator and a PWM comparator. The DC-DC converter of Patent Document 1 operates the switching element at a frequency of 20 Hz or less using a PFM comparator when the load is in a low load state and the load current becomes small, and operates the switching element at a frequency of 20 Hz or more when the load increases. When the situation arises, the switching elements are operated primarily by PWM comparators at frequencies above 20 kHz.

A PFM (Pulse Frequency Modulation) driving method has a feature of higher efficiency in a low load state than a PWM (Pulse Width Modulation) driving method. In the DC-DC converter described in Patent Document 1, when the switching frequency in PFM mode is 20Hz or less, the DC-DC converter operates in PFM mode, and when the switching frequency becomes higher than 20Hz, the DC-DC converter operates in PWM mode. - Improve conversion efficiency under low load conditions by controlling the DC converter.

Japanese Patent Application Publication No. 2013-51816

Here, in a DC voltage conversion circuit, if the voltage conversion efficiency is improved by adopting only the PFM method with a constant pulse width as the drive method, a problem will arise in the followability of the output voltage when the load fluctuates significantly. .

Other objects and novel features will become apparent from the description of this specification and the accompanying drawings.

One aspect of the DC voltage conversion circuit of the present invention includes an output stage circuit having a first switching transistor and a second switching transistor connected in series between an input terminal and a ground terminal, and the first switching transistor an inductor inserted between the output terminal and a connection node that connects the output terminal and the second switching transistor; a cathode of the inductor is connected to wiring on the output stage circuit side; a diode whose anode is connected to the connection wiring, a smoothing capacitor connected between the output terminal and the ground terminal, and a smoothing capacitor connected between the output terminal and the ground terminal, and output from the output terminal. a voltage divider circuit that outputs a divided voltage obtained by dividing an output voltage as a feedback voltage; a converter control circuit that generates a pulse signal to be applied to the output stage circuit based on the feedback voltage; and a converter control circuit that amplifies the pulse signal and outputs the output stage circuit. a drive circuit for supplying the output stage circuit to the output stage circuit, and the converter control circuit is configured to turn on the output stage circuit as the pulse signal when the feedback voltage is lower than a first threshold voltage corresponding to the output voltage. A one-shot pulse signal having a predetermined length of an on-period state is output, and the feedback voltage is lower than the first threshold voltage at a timing when the on-period state preset in the one-shot pulse signal ends. if the length of the on-period state of the one-shot pulse signal is extended, the feedback voltage is lower than the first threshold voltage after the on-period state of the one-shot pulse signal is extended; In response to the voltage exceeding the voltage, the one-shot pulse signal is switched to an off period state in which the output stage circuit is turned off.

Further, one aspect of the drive control method for a DC voltage conversion circuit of the present invention includes an output stage circuit having a first switching transistor and a second switching transistor connected in series between an input terminal and a ground terminal; an inductor inserted between a connection node connecting the first switching transistor and the second switching transistor and an output terminal; a cathode connected to wiring on the output stage circuit side of the inductor; a diode whose anode is connected to a connection wire connected to the ground terminal; a smoothing capacitor connected between the output terminal and the ground terminal; and a smoothing capacitor connected between the output terminal and the ground terminal; A method for controlling the drive of a DC voltage conversion circuit, comprising: a voltage dividing circuit that divides an output voltage output from an output terminal and outputs a divided voltage as a feedback voltage, the feedback voltage corresponding to the output voltage. outputting a one-shot pulse signal having a predetermined length of an on-period state that turns on the output-stage circuit as a pulse signal given to the output-stage circuit when the voltage falls below a first threshold voltage; If the feedback voltage is lower than the first threshold voltage at the timing when the preset on-period state of the pulse signal ends, the length of the on-period state of the one-shot pulse signal is extended, and the one-shot pulse The output stage circuit is turned off by the one-shot pulse signal in response to the feedback voltage exceeding a second threshold voltage lower than the first threshold voltage after the on-period state of the signal is extended. Switch to off period state.

One aspect of the drive control program for a DC voltage conversion circuit of the present invention includes an output stage circuit having a first switching transistor and a second switching transistor connected in series between an input terminal and a ground terminal; an inductor inserted between a connection node connecting the first switching transistor and the second switching transistor and the output terminal; a cathode connected to the wiring on the output stage circuit side of the inductor; a diode whose anode is connected to a connection wire connected to the terminal; a smoothing capacitor connected between the output terminal and the ground terminal; and an output terminal connected between the output terminal and the ground terminal. A drive control program executed by a calculation unit that controls a DC voltage conversion circuit having a voltage divider circuit that outputs a divided voltage obtained by dividing an output voltage output from the feedback voltage converter circuit as a feedback voltage. a one-shot pulse with a predetermined length of an on-period state that turns on the output stage circuit as a pulse signal given to the output stage circuit when the voltage falls below a first threshold voltage corresponding to the output voltage; If the feedback voltage is lower than the first threshold voltage at the timing when the preset on-period state of the one-shot pulse signal ends, the length of the on-period state of the one-shot pulse signal is determined. and extending the one-shot pulse signal in response to the feedback voltage exceeding a second threshold voltage that is lower than the first threshold voltage after the on-period state of the one-shot pulse signal is extended. The output stage circuit is switched to an off period state in which the output stage circuit is turned off.

According to the DC voltage conversion circuit and its driving method, it is possible to reduce response time and suppress overshoot voltage when load current suddenly increases.

1 is a block diagram of a DC voltage conversion circuit according to Embodiment 1. FIG. 3 is a flowchart illustrating the operation of the DC voltage conversion circuit according to the first embodiment. 5 is a timing chart illustrating the operation of a DC voltage conversion circuit according to a comparative example. 3 is a timing chart illustrating a first example of operation of the DC voltage conversion circuit according to the first embodiment. 7 is a timing chart illustrating a second operation example of the DC voltage conversion circuit according to the first embodiment.

For clarity of explanation, the following description and drawings are omitted and simplified as appropriate. In addition, each element shown in the drawing as a functional block that performs various processes can be configured from a CPU, memory, and other circuits in terms of hardware, and can be configured by a program loaded in memory in terms of software. It is realized by etc. Therefore, those skilled in the art will understand that these functional blocks can be implemented in various ways using only hardware, only software, or a combination thereof, and are not limited to either. Note that in each drawing, the same elements are designated by the same reference numerals, and redundant explanations will be omitted as necessary.

Additionally, the programs described above can be stored and provided to a computer using various types of non-transitory computer readable media. Non-transitory computer-readable media includes various types of tangible storage media. Examples of non-transitory computer-readable media include magnetic recording media (e.g., flexible disks, magnetic tape, hard disk drives), magneto-optical recording media (e.g., magneto-optical disks), CD-ROMs (Read Only Memory), CD-Rs, and CDs. - R/W, semiconductor memory (for example, mask ROM, PROM (Programmable ROM), EPROM (Erasable PROM), flash ROM, RAM (Random Access Memory)). The program may also be provided to the computer on various types of transitory computer readable media. Examples of transitory computer-readable media include electrical signals, optical signals, and electromagnetic waves. The temporary computer-readable medium can provide the program to the computer via wired communication channels, such as electrical wires and fiber optics, or wireless communication channels.

The DC voltage conversion circuit 1 according to the first embodiment will be explained. FIG. 1 shows a block diagram of a DC voltage conversion circuit according to the first embodiment. The DC voltage conversion circuit 1 according to the first embodiment converts an input voltage Vi into an output voltage Vo, which is another voltage, and supplies power to a load circuit.

As shown in FIG. 1, the DC voltage conversion circuit 1 according to the first embodiment includes a first switching transistor Q1, a second switching transistor Q2, an input capacitor Ci, a diode D1, an inductor L1, a smoothing capacitor Co, and an RC filter. 12, it has a converter control circuit 13. Then, the DC voltage conversion circuit 1 according to the first embodiment generates an output voltage Vo having a voltage value lower than the input voltage Vi. Further, as shown in FIG. 1, the DC voltage conversion circuit 1 according to the first embodiment includes a ripple injection circuit 11. Furthermore, in the DC voltage conversion circuit 1 according to the first embodiment, a voltage dividing circuit is configured by voltage dividing resistors Ro1 and Ro2 in order to generate the feedback voltage Vfb.

The input terminal Vin is a terminal to which an input voltage Vi is input. The ground terminal RTN is a terminal to which a ground voltage is input. The output terminal Vout is a terminal that outputs an output voltage Vo. Input capacitor Ci is provided between input terminal Vin and ground terminal RTN. The input capacitor Ci functions as a smoothing capacitor that suppresses fluctuations in the input voltage Vi.

The first switching transistor Q1 and the second switching transistor Q2 are connected in series between the input terminal Vin and the ground terminal RTN. Here, in the example shown in FIG. 1, the first switching transistor Q1 is arranged on the input terminal Vin side, and the second switching transistor Q2 is arranged on the ground terminal RTN side. Further, the first switching transistor Q1 and the second switching transistor Q2 constitute an output stage circuit.

The inductor L1 is inserted between the connection node connecting the first switching transistor Q1 and the second switching transistor Q2 and the output terminal Vout. The diode D1 has a cathode connected to the wiring on the output stage circuit side of the inductor L1, and an anode connected to the connection wiring connected to the ground terminal RTN. Smoothing capacitor Co is connected between output terminal Vout and ground terminal RTN. Voltage dividing resistors Ro1 and Ro2 are connected in series between the output terminal Vout and the ground terminal RTN. The voltage dividing resistors Ro1 and Ro2 output a divided voltage obtained by dividing the output voltage Vo output from the output terminal Vout as the feedback voltage Vfb.

Further, in the DC voltage conversion circuit 1 according to the first embodiment, a ripple injection circuit 11 is provided in parallel to the inductor L1. The ripple injection circuit 11 has a resistor R1 and capacitors C1 and C2. One end of the resistor R1 is connected to a terminal of the inductor L1 on the output stage circuit side. One end of a capacitor C1 and one end of a capacitor C2 are connected to the other end of the resistor R1. The other end of the capacitor C1 is connected to the terminal on the output terminal Vout side of the inductor L1. The other end of capacitor C2 is connected to a wiring to which feedback voltage Vfb is transmitted. In the DC voltage conversion circuit 1 according to the first embodiment, the ripple injection circuit 11 superimposes a voltage waveform similar to the current waveform flowing through the inductor L1 on the feedback voltage. Such ripple voltage prevents the DC voltage conversion circuit 1 according to the first embodiment from continuing feedback in which the pulse signal that drives the output stage circuit is not generated.

RC filter 12 reduces high frequency noise superimposed on feedback voltage Vfb. Converter control circuit 13 generates pulse signals (for example, ON pulse Pon and OFF pulse Poff) to be given to the output stage circuit based on feedback voltage Vfb. Further, the drive circuit 10 amplifies the pulse signal generated by the converter control circuit 13 and provides the amplified pulse signal to the output stage circuit.

Here, the converter control circuit 13 will be explained in more detail. Converter control circuit 13 turns on first switching transistor Q1 and turns on second switching transistor Q1 for a period predetermined as a pulse signal when feedback voltage Vfb falls below a first threshold voltage Vref_T corresponding to output voltage Vo. A one-shot pulse signal that turns off the switching transistor Q2 (for example, sets the ON pulse Pon to a high level and the OFF pulse Poff to a low level) is output. Here, in the DC voltage conversion circuit 1 according to the first embodiment, a state in which the output voltage Vo exceeds the target voltage by turning on the first switching transistor Q1 once is referred to as a steady state. Further, in the DC voltage conversion circuit 1 according to the first embodiment, the period in which the first switching transistor Q1 is turned on and the second switching transistor Q2 is turned off is an on period, and the period in which the first switching transistor Q1 is turned off and the second switching transistor Q2 is turned off is an on period. The period in which the second switching transistor Q2 is turned on is called an off period, and the period in which both the first switching transistor Q1 and the second switching transistor Q2 are turned off is called a dead time period.

In the following explanation, the term "one-shot pulse signal" is used, but in the DC voltage conversion circuit 1 according to the first embodiment, the one-shot pulse signal is the one-shot pulse signal of the first switching transistor Q1 and the second switching transistor Q2. It is assumed that the signal is composed of two signals given to the gate. In the example shown in FIG. 1, the signal applied to the gate of the first switching transistor Q1 has the same logic level change as the ON pulse Pon, and the signal applied to the gate of the second switching transistor Q2 has the same logic level change as the OFF pulse Poff. It is a change at the same logical level.

The converter control circuit 13 extends the time during which the one-shot pulse signal is in the on-period state when the load fluctuation is larger than in the steady state and the voltage cannot be sufficiently increased with just one one-shot pulse. Further, a one-shot pulse signal that turns the output stage circuit into an off state is referred to as an off period state. Specifically, the converter control circuit 13 performs the following operations.

The converter control circuit 13 generates a pulse signal having a predetermined length of an on-period state that turns on the output stage circuit as a pulse signal when the feedback voltage Vfb becomes lower than a first threshold voltage Vref_T corresponding to the output voltage Vo. Outputs shot pulse signal. In addition, if the feedback voltage is lower than the first threshold voltage Vref_T at the timing when the preset on-period state of the one-shot pulse signal ends, the converter control circuit 13 controls the length of the on-period state of the one-shot pulse signal. extend. Then, the converter control circuit 13 generates a one-shot pulse in response to the fact that the feedback voltage Vfb exceeds a second threshold voltage Vref_R, which is lower than the first threshold voltage Vref_T, after the on-period state of the one-shot pulse signal is extended. The signal is switched to an off period state in which the output stage circuit is turned off.

Further, when the on-period state of the one-shot pulse signal exceeds a preset upper limit time, the converter control circuit 13 fixes the one-shot pulse signal to the off-period state and stops the operation. Furthermore, after extending the on-period state of the one-shot pulse signal and switching the one-shot pulse signal to the off-period state, if the feedback voltage does not exceed the first threshold voltage, the converter control circuit 13 extends the on-period state of the one-shot pulse signal. Outputs a one-shot pulse signal having the length of the state.

The converter control circuit 13 includes a pulse generation circuit 14, a first digital-to-analog conversion circuit 15, a first comparator 16, a second digital-to-analog conversion circuit 17, and a second comparator 18 in order to perform the above operations.

The pulse generation circuit 14 is, for example, a semiconductor device configured with a logic circuit for performing the above operations, or an arithmetic unit capable of executing a program. Further, the pulse generation circuit 14 outputs digital values corresponding to the first threshold voltage Vref_T and the second threshold voltage Vref_R. The first threshold voltage Vref_T and the second threshold voltage Vref_R may be, for example, fixed values, or may be values that can be changed by an external device or a program. Then, the pulse generation circuit 14 switches the one-shot pulse signal between an on-period state and an off-period state based on the magnitude relationship of the feedback voltage Vfb, the first threshold voltage Vref_T, and the second threshold voltage Vref_R.

The first comparator 16 has an inverting input terminal supplied with the feedback voltage Vfb, and a non-inverting input terminal supplied with the first threshold voltage Vref_T. The first digital-to-analog conversion circuit 15 generates a first threshold voltage Vref_T based on an instruction value that can be given from the pulse generation circuit 14. The second digital-to-analog conversion circuit 17 generates a second threshold voltage Vref_R based on the instruction value that can be given from the pulse generation circuit 14. The second comparator 18 has an inverting input terminal supplied with a second threshold voltage Vref_R, and a non-inverting input terminal supplied with a feedback voltage Vfb.

Next, the operation of the DC voltage conversion circuit 1 according to the first embodiment will be explained. Therefore, FIG. 2 shows a flowchart illustrating the operation of the DC voltage conversion circuit 1 according to the first embodiment. This process is mainly performed by the pulse generation circuit 14. Further, the processing performed by the pulse generation circuit 14 may be realized in hardware, or may be realized by a program (for example, software) executed by the pulse generation circuit 14. As shown in FIG. 2, the DC voltage conversion circuit 1 according to the first embodiment first resets the number of extension pulses to 0 as an initialization process (step S1).

Subsequently, the DC voltage conversion circuit 1 according to the first embodiment monitors the output signal of the first comparator 16 until the output signal of the first comparator 16 becomes high level (step S2). The output signal of the first comparator 16 switches from low level to high level in response to feedback voltage Vfb falling below first threshold voltage Vref_T. Then, in step S2, when the output signal of the first comparator 16 switches to high level, the pulse generation circuit 14 switches the one-shot pulse signal from the off-period state to the on-period state (step S3). The on-period state of the one-shot pulse signal is maintained until the duration of the on-period state exceeds a specified value which is an initial setting value of the length of the high period of the one-shot pulse (step S4). If it is determined in step S4 that the duration of the on-period state exceeds the specified value, the feedback voltage Vfb and the first threshold voltage Vref_T are compared in magnitude (step S5).

When the first comparator 16 determines that the feedback voltage Vfb is greater than or equal to the first threshold voltage Vref_T, the output signal of the first comparator 16 becomes low level. When the pulse generation circuit 14 determines that the output signal of the first comparator 16 is at a low level, the pulse generation circuit 14 switches the one-shot pulse signal from the on-period state to the off-period state, and then initializes the number of extension pulses in step S1. The processing routine returns to the conversion processing (step S10). Note that a dead time is inserted when switching from the on-period state to the off-period state in step S10.

On the other hand, if it is determined in step S5 that the output signal of the first comparator 16 is at a high level, the pulse generation circuit 14 extends the on-period state of the one-shot pulse signal (step S6). Further, the pulse generation circuit 14 increases the count value of the number of extended pulses in response to extending the one-shot pulse signal (step S7). Thereafter, the pulse generation circuit 14 determines whether the number of extended pulses exceeds the upper limit (step S8). Then, in step S8, if the number of extended pulses has reached the upper limit value, the pulse generation circuit 14 notifies the host system that an error has occurred, and fixes the one-shot pulse signal in the off period state to The operation of the voltage conversion circuit 1 is stopped (step S9).

On the other hand, in step S8, if the number of extension pulses has not reached the upper limit value, the second comparator 18 determines whether the feedback voltage Vfb exceeds the second threshold voltage Vref_R (step S11). In this step S11, if the output voltage of the second comparator 18 is low level, the pulse generation circuit 14 determines that the feedback voltage Vfb is lower than the second threshold voltage, and performs the processing of steps S6 to S8. repeat. Further, in this step S11, if the output voltage of the second comparator 18 is at a high level, the pulse generation circuit 14 switches the one-shot pulse signal from the on-period state to the off-period state, and then extends the step S1. The processing routine returns to the pulse number initialization process (step S10).

Next, the operation of the DC voltage conversion circuit 1 according to the first embodiment will be explained using a timing chart. Here, as a comparative example, we will discuss the operation of a DC voltage conversion circuit that does not perform one-shot pulse signal extension processing (that is, performs only PFM mode control). Explain the characteristics of the operation. Note that in the following explanation, the output voltage Vo is compared with the first threshold voltage Vref_T and the second threshold voltage Vref_R, rather than the comparison of the feedback voltage Vfb with the first threshold voltage Vref_T and the second threshold voltage Vref_R. However, the actual processing is performed by comparing the feedback voltage Vfb with the first threshold voltage Vref_T and the second threshold voltage Vref_R.

First, the operation of the DC voltage conversion circuit according to the comparative example will be explained. Therefore, FIG. 3 shows a timing chart illustrating the operation of the DC voltage conversion circuit according to the comparative example. As shown in FIG. 3, in the DC voltage conversion circuit according to the comparative example, in the steady state, each time the output voltage Vo falls below the first threshold voltage Vref_T corresponding to the target voltage, a one-shot pulse signal (the first (gate pulse of the switching transistor Q1) enters the on-period state (timings T0, T1, T3, T7). Then, when the output current Io increases from timing T2 and the period during which the output voltage Vo continues to fall below the first threshold voltage Vref_T at timing T3 exceeds the length of one pulse width of the one-shot pulse signal, the minimum A one-shot pulse signal that is in an on-period state with an off-period state in between is continuously applied to the output stage circuit. In the DC voltage conversion circuit according to this comparative example, the end of the period in which the one-shot pulse signal is continuously output at the maximum frequency is the timing when the output voltage Vo exceeds the first threshold voltage Vref_T (timing T6 ). Therefore, the DC voltage conversion circuit according to the comparative example outputs a voltage value larger than that of the DC voltage conversion circuit 1 according to the first embodiment immediately after the end of the period in which the one-shot pulse signal is continuously output at the maximum frequency. overshoot occurs.

Next, the operation of the DC voltage conversion circuit 1 according to the first embodiment will be explained. In the DC voltage conversion circuit 1 according to the first embodiment, the operations differ depending on the degree of increase in the output voltage Vo after extending the on-period state of the one-shot pulse signal, so these will be explained by dividing them into two operation examples. do.

First, FIG. 4 shows a timing chart illustrating a first example of operation of the DC voltage conversion circuit according to the first embodiment. In this first operation example, the output voltage Vo immediately becomes equal to or higher than the first threshold voltage Vref_T after the on-period state of the one-shot pulse signal is extended.

As shown in FIG. 4, in the DC voltage conversion circuit 1 according to the first embodiment, in a steady state, each time the output voltage Vo falls below the first threshold voltage Vref_T corresponding to the target voltage, a one-shot pulse signal ( (gate pulse of the first switching transistor Q1) enters an on period state (timings T10, T11, T13, T18). Then, when the output current Io increases from timing T12 and the period after timing T13 in which the output voltage Vo continues to fall below the first threshold voltage Vref_T exceeds the length of one pulse width of the one-shot pulse signal. , the DC voltage conversion circuit 1 according to the first embodiment extends the on-period state of the one-shot pulse signal (timing T14). More specifically, the DC voltage conversion circuit 1 according to the first embodiment extends the on-period state of the one-shot pulse signal when the output voltage Vo becomes lower than the first threshold voltage Vref_T.

In the DC voltage conversion circuit 1 according to the first embodiment, when the output voltage Vo exceeds the second threshold voltage Vref_R when the on-period state is extended, the one-shot pulse signal is changed from the on-period state to the off-period state. state (timing T16). Thereafter, when the output voltage Vo exceeds the first threshold voltage Vref_T, the DC voltage conversion circuit 1 according to the first embodiment shifts to steady state operation.

Next, FIG. 5 shows a timing chart illustrating a second operation example of the DC voltage conversion circuit according to the first embodiment. In this second operation example, the output voltage Vo after extending the on-period state of the one-shot pulse signal does not immediately exceed the first threshold voltage Vref_T, and an additional one-shot pulse signal is output. be.

As shown in FIG. 5, in the DC voltage conversion circuit 1 according to the first embodiment, in a steady state, each time the output voltage Vo falls below the first threshold voltage Vref_T corresponding to the target voltage, a one-shot pulse signal ( (gate pulse of the first switching transistor Q1) enters an on period state (timings T20, T21, T23, T28). Then, when the output current Io increases from timing T22 and the period after timing T23 in which the output voltage Vo continues to be lower than the first threshold voltage Vref_T exceeds the length of one pulse width of the one-shot pulse signal. , the DC voltage conversion circuit 1 according to the first embodiment extends the on-period state of the one-shot pulse signal (timing T24). More specifically, the DC voltage conversion circuit 1 according to the first embodiment extends the on-period state of the one-shot pulse signal when the output voltage Vo becomes lower than the first threshold voltage Vref_T.

In the example shown in FIG. 5, when the output voltage Vo exceeds the second threshold voltage Vref_R, the one-shot pulse signal is switched from the on-period state to the off-period state (timing T26). However, in the example shown in FIG. 5, the output voltage Vo does not immediately exceed the first threshold voltage Vref_T, so in the period TM1, the DC voltage conversion circuit 1 according to the first embodiment converts the one-shot pulse signal into the shortest It is in an on period state at regular intervals. Then, when the output voltage Vo exceeds the first threshold voltage Vref_T (timing T27), the DC voltage conversion circuit 1 according to the first embodiment shifts to steady state operation.

In the DC voltage conversion circuit 1 according to the first embodiment, the period for extending the on-period state of the one-shot pulse signal ends at a timing before the output voltage Vo reaches the first threshold voltage Vref_T. As a result, as shown in FIGS. 4 and 5, the DC voltage conversion circuit 1 according to the first embodiment converts the overshoot voltage that occurs after extending the on-period state of the one-shot pulse signal into the DC voltage applied to the comparative example. The cost can be kept lower than that of a conversion circuit.

From the above description, the DC voltage conversion circuit 1 according to the first embodiment extends the on-period state of the one-shot pulse signal when the output voltage Vo is significantly lower than the voltage level determined by the first threshold voltage Vref_T. do. This makes it possible to achieve high followability for large load fluctuations in which the output current Io increases significantly. For example, in PFM mode control in which the on-period state of the one-shot pulse signal is not extended, or PWM mode control, even if load fluctuations become large, control must be performed with an off-period state in between. Naturally, the tracking performance is inferior to that of the DC voltage conversion circuit 1 according to the first embodiment.

Further, in the DC voltage conversion circuit 1 according to the first embodiment, the output voltage Vo has reached the voltage level determined by the second threshold voltage Vref_R, which is lower than the voltage level determined by the first threshold voltage Vref_T. At this point, the period for extending the on-period state of the one-shot pulse signal ends. Thereby, the DC voltage conversion circuit 1 according to the first embodiment suppresses overshoot of the output voltage Vo that occurs after extending the on-period state of the one-shot pulse signal.

Further, in the DC voltage conversion circuit 1 according to the first embodiment, after the extension period of the on-period state of the one-shot pulse signal ends, the output voltage Vo does not exceed the voltage level determined by the first threshold voltage Vref_T. In this case, the one-shot pulse signal is set to the on-period state with the shortest cycle. As a result, in the DC voltage conversion circuit 1 according to the first embodiment, after the extension period of the on-period state of the one-shot pulse signal ends, the voltage of the output voltage Vo does not rise sufficiently and the DC voltage conversion circuit 1 It is possible to prevent the system from entering a shutdown state.

Further, in the DC voltage conversion circuit 1 according to the first embodiment, an upper limit value is set for the length of the period in which the on-period state of the one-shot pulse signal is extended. In the DC voltage conversion circuit 1 according to the first embodiment, when the length of the period for extending the on-period state of the one-shot pulse signal reaches the upper limit, for example, the power supply destination of the DC voltage conversion circuit 1 The DC voltage conversion circuit 1 is shut down assuming a situation where a problem occurs in the load circuit. Thereby, the DC voltage conversion circuit 1 according to the first embodiment can avoid problems caused by abnormal heat generation of the first switching transistor Q1 due to overcurrent.

Although the invention made by the present inventor has been specifically explained based on the embodiments above, the present invention is not limited to the embodiments already described, and various changes can be made without departing from the gist thereof. It goes without saying that it is possible.

1 DC voltage conversion circuit 10 Drive circuit 11 Ripple injection circuit 12 RC filter 13 Converter control circuit 14 Pulse generation circuit 15 First digital-analog conversion circuit 16 First comparator 17 Second digital-analog conversion circuit 18 Second comparator Q1 First switching transistor Q2 Second switching transistor D1 Diode L1 Inductor R1 Resistor C1 Capacitor C2 Capacitor Ci Input capacitor Co Smoothing capacitor Ro1 Voltage dividing resistor Ro2 Voltage dividing resistor Pon ON pulse Poff OFF pulse Vin Input terminal Vout Output terminal Vfb Feedback voltage RTN Ground terminal Vref_T First threshold voltage Vref_R Second threshold voltage

Claims (7)

an output stage circuit having a first switching transistor and a second switching transistor connected in series between an input terminal and a ground terminal;
an inductor inserted between a connection node connecting the first switching transistor and the second switching transistor and an output terminal;
a diode whose cathode is connected to wiring on the output stage circuit side of the inductor, and whose anode is connected to a connection wiring connected to the ground terminal;
a smoothing capacitor connected between the output terminal and the ground terminal;
a voltage dividing circuit connected between the output terminal and the ground terminal and outputting a divided voltage obtained by dividing the output voltage output from the output terminal as a feedback voltage;
a converter control circuit that generates a pulse signal to be applied to the output stage circuit based on the feedback voltage;
a drive circuit that amplifies the pulse signal and supplies it to the output stage circuit;
The converter control circuit includes:
outputting a one-shot pulse signal having a predetermined length of an on-period state that turns on the output stage circuit as the pulse signal when the feedback voltage falls below a first threshold voltage corresponding to the output voltage; death,
If the feedback voltage is lower than the first threshold voltage at the timing when a preset on-period state of the one-shot pulse signal ends, extending the length of the on-period state of the one-shot pulse signal;
the predetermined on-period state of the one-shot pulse signal when the feedback voltage exceeds a second threshold voltage lower than the first threshold voltage after the on-period state of the one-shot pulse signal is extended; A DC voltage conversion circuit that switches the one-shot pulse signal to an off-period state in which the output stage circuit is turned off at a timing when the feedback voltage exceeds the second threshold voltage, regardless of the length of the feedback voltage. 2. The converter control circuit according to claim 1, wherein when the on-period state of the one-shot pulse signal exceeds a preset upper limit time, the converter control circuit fixes the one-shot pulse signal to an off-period state and stops the operation. The DC voltage conversion circuit described. If the converter control circuit extends the on-period state of the one-shot pulse signal and switches the one-shot pulse signal to an off-period state, if the feedback voltage does not exceed the first threshold voltage, The DC voltage conversion circuit according to claim 1 or 2, wherein the one-shot pulse signal having a predetermined on-period length is output. The converter control circuit includes:
a calculation unit that switches between an on-period state and an off-period state of the one-shot pulse signal based on the magnitude relationship of the feedback voltage, the first threshold voltage, and the second threshold voltage;
a first comparator to which the feedback voltage is applied to an inverting input terminal and the first threshold voltage is applied to a normal input terminal;
a first digital-to-analog conversion circuit that generates the first threshold voltage based on an instruction value that can be given from the calculation unit;
a second comparator whose inverting input terminal is provided with the second threshold voltage and whose normal input terminal is provided with the feedback voltage;
a second digital-to-analog conversion circuit that generates the second threshold voltage based on an instruction value that can be given from the calculation unit;
The DC voltage conversion circuit according to any one of claims 1 to 3. 5. The DC voltage conversion circuit according to claim 1, further comprising a ripple injection circuit that superimposes a ripple voltage matching the operation of the output stage circuit on the feedback voltage. an output stage circuit having a first switching transistor and a second switching transistor connected in series between an input terminal and a ground terminal;
an inductor inserted between a connection node connecting the first switching transistor and the second switching transistor and an output terminal;
a diode whose cathode is connected to wiring on the output stage circuit side of the inductor, and whose anode is connected to a connection wiring connected to the ground terminal;
a smoothing capacitor connected between the output terminal and the ground terminal;
a voltage dividing circuit connected between the output terminal and the ground terminal and outputting a divided voltage obtained by dividing the output voltage output from the output terminal as a feedback voltage; And,
A predetermined length of an on-period state for turning on the output stage circuit as a pulse signal given to the output stage circuit when the feedback voltage falls below a first threshold voltage corresponding to the output voltage. Outputs shot pulse signal,
If the feedback voltage is lower than the first threshold voltage at the timing when a preset on-period state of the one-shot pulse signal ends, extending the length of the on-period state of the one-shot pulse signal;
the predetermined on-period state of the one-shot pulse signal when the feedback voltage exceeds a second threshold voltage lower than the first threshold voltage after the on-period state of the one-shot pulse signal is extended; A drive control method for a DC voltage conversion circuit that switches the one-shot pulse signal to an off-period state in which the output stage circuit is turned off at the timing when the feedback voltage exceeds the second threshold voltage, regardless of the length of . an output stage circuit having a first switching transistor and a second switching transistor connected in series between an input terminal and a ground terminal;
an inductor inserted between a connection node connecting the first switching transistor and the second switching transistor and an output terminal;
a diode whose cathode is connected to wiring on the output stage circuit side of the inductor, and whose anode is connected to a connection wiring connected to the ground terminal;
a smoothing capacitor connected between the output terminal and the ground terminal;
A voltage dividing circuit connected between the output terminal and the ground terminal and outputting a divided voltage obtained by dividing the output voltage output from the output terminal as a feedback voltage, and controlling a DC voltage conversion circuit. A drive control program executed in a calculation unit,
A predetermined length of an on-period state for turning on the output stage circuit as a pulse signal given to the output stage circuit when the feedback voltage falls below a first threshold voltage corresponding to the output voltage. Outputs shot pulse signal,
If the feedback voltage is lower than the first threshold voltage at the timing when a preset on-period state of the one-shot pulse signal ends, extending the length of the on-period state of the one-shot pulse signal;
the predetermined on-period state of the one-shot pulse signal when the feedback voltage exceeds a second threshold voltage lower than the first threshold voltage after the on-period state of the one-shot pulse signal is extended; A drive control program that switches the one-shot pulse signal to an off-period state in which the output stage circuit is turned off at a timing when the feedback voltage exceeds the second threshold voltage, regardless of the length of the feedback voltage.

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