JP7336899B2 - Image reader - Google Patents

Description

The present invention relates to an image reading apparatus that conveys a document and reads an image, and startup control in a display device mounted thereon.

2. Description of the Related Art In recent years, as the functions of image reading apparatuses and document conveying apparatuses have become more sophisticated, control units have been divided (multi-core) as shown in Japanese Unexamined Patent Application Publication No. 2002-200012. For example, functions are distributed according to the control functions, such as a control unit A that controls document transport and a control unit B that performs communication control and user interface functions, and distributed control is performed to speed up processing. Further, an operating system (hereinafter referred to as an OS) operating in each control unit, for example, the control unit A often uses a real-time OS for embedded devices to control functions that require real-time performance. On the other hand, in the control unit B, real-time performance is not required as in the control unit A, such as communication control and user interface (screen display, etc.) control, but an OS for controlling highly functional functions, such as a general-purpose OS, is used. be. It is known that the OS used for the control unit B generally has high functionality and takes longer than the real-time OS used for the control unit A to complete booting.

JP 2018-139090 A

When the power supply of the device is started, the OS used in the control unit B, which is responsible for the display control of the display device such as the image reading device, is slow to start up, so the control unit B starts the display control of the display unit provided in the device. It takes time to do so. Since nothing is displayed on the display during this time, the user may suspect a failure of the display or device due to no display, and may turn off the power even though the device is starting up. There was gender.

In addition, if some data is written to non-volatile memory or the like during startup, the user suspects a malfunction and forcibly cuts off the power supply. In the worst case, if you pull it out, the data stored in the memory may be destroyed, and the device may not start up or operate normally.

In view of the above, the image reading device according to the present invention is
a control device in which a first control unit and a second control unit controlled by the first control unit are mounted on one semiconductor integrated circuit ;
a screen display unit whose display is controlled by the first control unit and the second control unit;
a control signal line to the screen display unit shared by the first control unit and the second control unit ;
An image reading unit that reads the image of the original
with
The first control unit operates with a program that starts earlier than the second control unit and executes image reading control by the image reading unit ,
The second control unit executes control with lower immediacy than the first control unit,
When the control device is activated from a dormant state, the first control unit acquires the right to use the control signal line after activation, and performs initial screen display control for displaying an initial screen on the screen display unit; executing an activation start instruction for the second control unit , and performing initialization processing for image reading in the image reading unit during activation processing for the second control unit;
After the program is activated based on the activation start instruction , the second control unit acquires the right to use the control signal line in a state in which the initial screen is displayed on the screen display unit. screen display control .

According to the above means, the display is made on the screen display part from the state where the power of the device is turned off, or at an early stage immediately after the device is started by returning from the power saving state or the start of recovery, and the device is started. The user can be notified that In addition, it is possible to shorten the start-up time by efficiently executing the necessary processes at the time of start-up.

1 is a partial cross-sectional view schematically showing the configuration of a document conveying device (image reading device) according to a first embodiment of the present invention; FIG. 3 is a block diagram of a control section of the image reading apparatus according to the first embodiment of the present invention; FIG. FIG. 2 is a front view of the image reading apparatus A according to the first embodiment of the present invention with the discharge tray unfolded; FIG. 4 is a sequence chart at startup according to the first embodiment of the present invention; FIG. FIG. 10 is a sequence chart at startup according to the second embodiment of the present invention; FIG. FIG. 11 is a sequence chart at startup according to the third embodiment of the present invention; FIG. The block diagram of the control part which concerns on the 4th Embodiment of this invention.

EMBODIMENT OF THE INVENTION Below, the form for implementing this invention is demonstrated in detail with reference to an accompanying drawing. The following embodiments are examples for carrying out the present invention, and the present invention is not limited to the following embodiments. It should be appropriately modified or changed according to the configuration of the device in which the present invention is used and various conditions without departing from the scope of the present invention.

[First embodiment]
First, a document conveying device according to a first embodiment of the present invention will be described.

FIG. 1 is a cross-sectional view schematically showing the configuration of a document conveying device (image reading device) according to the first embodiment of the invention.

<Device configuration>
The image reading apparatus A is a device that conveys one or a plurality of conveying media S stacked on a mounting table 1 one by one along a path RT, reads the images, and discharges the media onto a discharge tray 2 as a stacking member. is. The conveying medium S to be read is, for example, a sheet such as OA paper, a check, a check, a business card, a card, etc., and may be a thick sheet or a thin sheet. Examples of cards include insurance cards, driver's licenses, credit cards, and the like. The carrier medium S also includes a booklet such as a passport. For booklets, the holder 200 can be used. By storing a spread booklet in the transparent holder 200 and placing the booklet on the mounting table 1, the booklet is conveyed together with the holder 200, and its image can be read.

<Paper feed>
A first transport unit 10 is provided as a feeding mechanism that feeds the transport medium S along the route RT. In the case of this embodiment, the first conveying unit 10 includes a feed roller 11 and a separation roller 12 arranged opposite to the feed roller 11, and sequentially conveys the conveyed medium S on the mounting table 1 one by one in the conveying direction D1. transport. A driving force is transmitted from a drive unit 3 such as a motor to the feed roller 11 through a transmission unit 5, and the feed roller 11 is rotationally driven in the arrow direction in the figure (positive direction in which the transport medium S is transported along the path RT). The transmission unit 5 is, for example, an electromagnetic clutch, and interrupts the driving force from the drive unit 3 to the feed roller 11 .

<Drive unit>
For example, in this embodiment, the transmission unit 5 connecting the drive unit 3 and the feed roller 11 is in a state in which the driving force is transmitted during normal operation, and when the conveying medium S is to be reversed or stopped, the driving force is transmitted. Cut off. When the transmission of driving force is interrupted by the transmission portion 5, the feed roller 11 becomes freely rotatable. It should be noted that such a transmission section 5 may not be provided when the feed roller 11 is driven only in one direction.

<Separation structure>
A separation roller 12 arranged to face the feed roller 11 is a roller for separating the conveyed medium S one by one, and is in pressure contact with the feed roller 11 at a constant pressure. In order to ensure this press-contact state, the separation roller 12 is provided swingably and is configured to be biased toward the feed roller 11 . The separation roller 12 receives a driving force from the drive unit 3 via the torque limiter 12a, and is rotationally driven in the direction of the solid line arrow (the direction opposite to the forward direction of the feed roller 11).

Since the torque limiter 12a restricts the transmission of the driving force to the separation roller 12, the separation roller 12 rotates in the direction of the feed roller 11 (in the direction of the dashed arrow) when the separation roller 12 is in contact with the feed roller 11. FIG. As a result, when a plurality of conveyed media S are conveyed to the pressure contact portion between the feed roller 11 and the separation roller 12, two or more conveyed media S except one are blocked so as not to be conveyed downstream. .

In the present embodiment, the separation mechanism is composed of the separation roller 12 and the feed roller 11. However, such a separation mechanism may not necessarily be provided. Any transport mechanism may be used. When a separation mechanism is provided, instead of the separation roller 12, a separation pad that imparts a frictional force to the conveyed medium S is brought into pressure contact with the feed roller 11 to provide the same separation action. may

<Transport structure>
A second conveying unit 20 as a conveying mechanism located downstream of the first conveying unit 10 in the conveying direction includes a driving roller 21 and a driven roller 22 driven by the driving roller 21 . The conveyed medium S is conveyed downstream. Driving force is transmitted to the driving roller 21 from the driving unit 4 such as a motor, and the driving roller 21 is rotationally driven in the direction of the arrow in the figure. The driven roller 22 is pressed against the driving roller 21 with a constant pressure and rotates with the driving roller 21 . The driven roller 22 may be biased against the driving roller 21 by a biasing unit (not shown) such as a spring.

The third conveying section 30 located downstream of the second conveying section 20 in the conveying direction includes a driving roller 31 and a driven roller 32 driven by the driving roller 31 . The conveyed medium S is conveyed to the discharge tray 2 . In other words, the third conveying section 30 functions as a discharge mechanism.

Driving force is transmitted to the driving roller 31 from the driving unit 4 such as a motor, and the driving roller 31 is rotationally driven in the direction of the arrow in the figure. The driven roller 32 is pressed against the driving roller 31 with a constant pressure and rotates with the driving roller 31 . The driven roller 32 may be biased against the driving roller 31 by a biasing unit (not shown) such as a spring.

The discharge tray 2 on which documents are stacked is pivotally supported via a first hinge 101 provided below the image reading device A so as to be rotatable with respect to the image reading device A. As shown in FIG. Further, it is composed of a first discharge tray 2a on the first hinge 101 side and a first extension tray 2b, a second extension tray 2c, and a third extension tray 2d connected to the tip side thereof. The first extension tray 2b is slidably supported with respect to the first discharge tray 2a so as to be storable, and the second extension tray 2c is slidably supported with respect to the first extension tray 2b so as to be storable. The third extension tray 2d is slidably supported with respect to the second extension tray 2c.

<Image reading structure, control>
Here, in the image reading apparatus A of the present embodiment, the image reading unit 70, which is an image reading section arranged between the second conveying section 20 and the third conveying section 30, reads an image. The conveying unit 20 and the third conveying unit 30 convey the conveying medium S at a constant speed. By always setting the conveying speed to be equal to or higher than the conveying speed of the first conveying unit 10, it is possible to reliably avoid a situation in which the succeeding conveyed medium S catches up with the preceding conveyed medium S. For example, in the present embodiment, the transport speed of the transport medium S by the second transport unit 20 and the third transport unit 30 is controlled so as to be faster than the transport speed of the transport medium S by the first transport unit 10. did.

Note that even when the transport speed of the transport medium S by the second transport unit 20 and the third transport unit 30 and the transport speed of the transport medium S by the first transport unit 10 are set to the same condition, the driving unit 3 is controlled. By intermittently shifting the feeding start timing of the succeeding transport medium S, it is possible to form a minimum interval between the preceding transport medium S and the succeeding transport medium S.

<Double feed detection>
The multi-feed detection sensor 40 arranged between the first transport unit 10 and the second transport unit 20 detects when the transport media S such as paper are in close contact with each other due to static electricity or the like and pass through the first transport unit 10 ( In other words, it is an example of a detection sensor (sensor for detecting the behavior and state of sheets) for detecting a multi-feed state in which sheets are overlapped and conveyed. Various sensors can be used as the multi-feed detection sensor 40, but in the case of this embodiment, an ultrasonic sensor is provided, which includes an ultrasonic wave transmitting unit 41 and an ultrasonic wave receiving unit 42, and detects a conveying medium such as paper. Multi-feeding is detected based on the principle that the amount of attenuation of ultrasonic waves passing through the conveying medium S differs depending on whether the S are multi-fed or when they are conveyed one by one.

<Registration sensor>
The medium detection sensor 50 arranged on the downstream side in the conveying direction of the double feeding detection sensor 40 is arranged on the upstream side of the second conveying section 20 and on the downstream side of the first conveying section 10 on the conveying path RT. It is an example of an upstream detection sensor (a sensor that detects the behavior and state of a sheet), and is the position of the transport medium S transported by the first transport unit 10, more specifically transported to the detection position of the medium detection sensor 50. Detects whether the end of the medium S has reached or passed. Various sensors can be used as the medium detection sensor 50, but in the case of this embodiment, it is an optical sensor, which includes a light emitting section 51 and its light receiving section 52, and receives light when the conveyed medium S reaches or passes through. The conveyed medium S is detected based on the principle that the intensity (the amount of light received) changes.

In the case of the present embodiment, when the leading edge of the transported medium S is detected by the medium detection sensor 50, the transported medium S reaches a position where the double feeding detection sensor 40 can detect the double feeding. The medium detection sensor 50 is provided on the downstream side in the vicinity of the double feed detection sensor 40 . The medium detection sensor 50 is not limited to the optical sensor described above. For example, a sensor (such as an image sensor) capable of detecting the edge of the conveyed medium S may be used. A sensor may be used. Further, a plurality of sensors may be provided in a direction orthogonal to the transport direction to detect that the medium is skewed with respect to the transport path.

A medium detection sensor 60 different from the medium detection sensor 50 is arranged upstream of the image reading unit 70 . It is an example of a downstream detection sensor arranged downstream of the second transport unit 20 and detects the position of the transport medium S transported by the second transport unit 20 . Various sensors can be used as the medium detection sensor 60. In this embodiment, like the medium detection sensor 50, it is an optical sensor, which includes a light emitting unit 61 and a light receiving unit 62, and detects the medium S to be conveyed. The conveyance medium S is detected based on the principle that the intensity of received light (amount of received light) changes depending on arrival or passage. In this embodiment, the medium detection sensors 50 and 60 are arranged on the upstream side and the downstream side in the conveying direction of the second conveying section 20, respectively, but only one of them may be arranged.

<Placement of CIS>
The image reading unit 70 located downstream of the medium detection sensor 60, for example, optically scans, converts it into an electrical signal, and reads it as image data. etc. The image reading unit 70 is a contact image sensor (CIS) unit. Although the image reading unit 70 is a CIS unit here, it may be a unit using a CCD as an image sensor, and the type of image sensor is not limited. In this embodiment, the image reading units 70 (hereinafter synonymous with CIS) are arranged on both sides of the route RT (70a, 70b), and read the front and back surfaces of the medium S to be conveyed. However, a configuration may be adopted in which only one side of the transport medium S is read by arranging one on only one side of the path RT. Further, in the present embodiment, the image reading units 70 are arranged opposite to each other on both sides of the route RT, but they may be arranged at intervals in the direction of the route RT.

<Description of block diagram>
The controller 80 will be described with reference to FIG. FIG. 2 is a block diagram of the control section 80 of the image reading apparatus A. As shown in FIG.

The control unit 80 is composed of two control units, a control unit (a) 80a and a control unit (b) 80b, an interface unit (c) 85c, and an operation unit 83. FIG. The control section (a) 80a includes a CPU (a) 81a, a storage section (a) 82a, a communication section (a) 84a, and an interface section (a) 85a. The control section (b) 80b includes a CPU (b) 81b, a storage section (b) 82b, a communication section (b) 84b, and an interface section (b) 85b. The CPU (a) 81a executes the programs stored in the storage section (a) 82a, thereby controlling the reading control of the image reading apparatus A and the functions requiring immediacy such as medium transport. On the other hand, the CPU (b) 81b executes the program stored in the storage unit (b) 82b, thereby controlling the connection of the communication unit (b) 84b and the operation unit 83. It controls functions that do not require immediacy as compared to read control and medium transport control.

The storage unit (a) 82a is composed of, for example, a non-volatile memory or a volatile memory, and is connected to the CPU (a). The storage section (b) 82b is composed of, for example, a non-volatile memory or a volatile memory, and is connected to the CPU (b) 81b. The operation unit 83 includes, for example, a switch 83c as an operation unit, a touch panel 83a, a display device 83b as a screen display unit, and the like, and displays information to the operator and receives operations from the operator.

The CPU (a) 81a uses a real-time OS for built-in devices, such as ITRON (registered trademark), in order to perform transport control and reading control with high immediacy. The real-time OS is optimized for the image reading apparatus A, and is characterized in that it takes a very short time to start up and enables control with high immediacy. The real-time OS and its applications are stored in the non-volatile memory of the storage unit (a) 82a, and expanded on the volatile memory during operation, thereby shortening the access time during execution and executing functions at high speed. On the other hand, the CPU (b) 81b uses a general-purpose OS, such as Linux (registered trademark), in order to implement high-performance network communication functions and screen drawing functions, although immediacy is not required. Since the general-purpose OS is generalized rather than optimized for the image reading apparatus A, its startup time is significantly longer than that of the real-time OS. As an example, a real-time OS can be started in about several seconds, but a general-purpose OS requires about ten seconds to several tens of seconds. The general-purpose OS and its applications are stored in the non-volatile memory of the storage unit (b) 82b, and are developed and executed on the volatile memory during operation.

The communication unit (a) 84a is an interface that performs information communication with an external device connected to the CPU (a) 81a. If a PC (personal computer) is assumed as the external device, the communication unit (a) 84a can be, for example, a USB interface or a SCSI interface. The communication unit (b) 84b is an interface that performs information communication with an external device connected to the CPU (b) 81b. The representative wireless communication interface can be raised. Any of the communication units 84a, 84b may have multiple communication interfaces. Either the communication unit (a) 84a or the communication unit (b) 84b may not be included.

A communication unit (c) 84c is an input/output interface for mutual communication between the CPU (a) 81a and the CPU (b) 81b. This input/output interface is a control signal between the CPU(a) 81a and the CPU(b) 81b. A communication system using a shared memory (not shown). In addition, as an example of the communication unit (c) 84c, communication through a simple general-purpose IO port or a serial communication function may be used.

An interface unit (a) 85a is an I/O interface connected to a CPU (a) 81a that inputs and outputs data to and from an actuator 86 and a sensor 87. FIG. The actuator 86 includes the drive section 3, the drive section 4, the transmission section 5, and the like. The sensor 87 includes the double feed detection sensor 40, the medium detection sensors 50 and 60, the image reading unit 70, and the like. The interface section (b) 85 b is connected to the CPU (b) 81 b and performs data input/output with the touch panel 83 a of the operation section 83 . The interface section (c) 85c is connected to the CPU (a) 81a and the CPU (b) 81b and is exclusively used by each. The interface section (c) 85c is a control interface connected to the display device 83b of the operation section 83, for example.

<Display panel configuration>
FIG. 3 is a front view of the unfolded discharge tray 2 of the image reading apparatus A according to this embodiment. More precisely, it is a view seen from a direction perpendicular to the front panel 90 that is inclined on the front side of the image reading apparatus A, and is seen from slightly above the front when the apparatus is placed. Fig. 4 is a diagram of states;

A display panel 93 is provided on a front panel 90 on the upper part of the front surface, and a power button 122 as an example of a switch 83c as an example of the operation section 83 and a display section 94 are provided therein. Here, the display unit 94 is composed of a touch panel 83a, a display device 83b, and the like.

The display device 83b is, for example, a liquid crystal display or the like, and is capable of displaying a screen according to the state of the device and providing device information to the user. Examples of displayed screens include a start key for starting the operation of image reading apparatus A, reading operations registered in advance in image reading apparatus A (for example, reading resolution, output method and destination of read image data, etc.). ) is a screen composed of a list of jobs specifying Also, an icon or the like indicating the state of the apparatus may be displayed together.

The display device 83b incorporates a control IC (not shown). This control IC controls the display of the display device 83b. For this control IC, the CPU (a) 81a or CPU (b) 81b uses an interface such as an interface section (c) 85c described later to set the resolution and the number of colors of the display device 83b. Sends the display image data to be displayed on the Based on the received display image data, the control IC performs display control according to the instructed content. Here, an example has been described in which the display image data to be displayed on the display device 83b is transmitted to the control IC and displayed, but another display control may be performed. For example, the CPU (a) 81a or CPU (b) 81b transmits a display command to the control IC via an interface, and the received control IC stores an image stored in the control IC or in a storage area connected to the control IC. A display control method for displaying a combination of data may also be used.

Here, the control interface from the CPU 81a or 81b to the control IC built in the display device 83b is the interface section (c) 85c built in the control section 80. FIG. Here, it is a display I/F. This display I/F is a control interface shared by the CPU(a) 81a and the CPU(b) 81b, and specifically has a control signal line for the display device 83b. In other words, the CPU(a) 81a and CPU(b) 81b cannot use the display I/F at the same time, and are given exclusive use rights. As this display I/F, for example, SPI, USB interface, eDP, HDMI (registered trademark), etc. can be considered.

<How to start>
FIG. 4 is a sequence chart showing the sequence at the time of starting after the power button 122 of the image reading apparatus A is pressed. This sequence chart shows a relative sequence relationship, not an absolute time relationship.

When the user presses the power button 122 in the hibernation state, the image reading apparatus A is turned on (S100) and started. The CPU (a) 81a and the CPU (b) 81b read and execute programs including the OS from the non-volatile memories of the storage section (a) 82a and the storage section (b) 82b, respectively (S101, S102). At this time, even if the program is executed directly from the non-volatile memory, all the programs from the non-volatile memory are expanded to the volatile memory and the program in the volatile memory is executed, or a part of the program is executed from the non-volatile memory. It is also possible to develop the program on the volatile memory, execute the program on the volatile memory, and execute the program not on the volatile memory from the nonvolatile memory.

Here, the CPU (a) 81a and the CPU (b) 81b each start the OS (S105, S106) after hardware initialization (S103, S104). Here, as described above, the CPU (a) 81a uses a real-time OS with a short start-up time, while the CPU (b) 81b uses a general-purpose OS with a long start-up time. Therefore, the CPU (a) 81a is the first to complete the booting of the OS (S107).

Next, the CPU (a) 81a acquires the right to use the display I/F (S108). The display I/F is shared by the CPU (a) 81a and the CPU (b) 81b, but the right to use the display I/F in the initial state is assigned to the CPU (a) 81a. At this time, the CPU (b) 81b has not started the OS and is not controlling to acquire the right to use the display I/F, so the display I/F can be exclusively used by the CPU (a) 81a. .

Subsequently, the CPU (a) 81a starts applying power to the display device 83b (S109). As a result, the display device 83b is turned on (S110). The CPU (a) 81a uses a display I/F (not shown) included in the interface section (c) 85c for a control IC (not shown) incorporated in the display device 83b to display a screen on the display device 83b. Send initial settings such as resolution and number of colors.

The CPU (a) 81a also supplies power to the backlight of the display device 83b. In this embodiment, only the CPU (a) 81a controls the power supply to the display device 83b and the backlight. Display control on the display device 83b and brightness control of the backlight are performed by either the CPU (a) 81a or the CPU (b) 81b that has acquired the right to use the display I/F.

Subsequently, the image data information to be displayed on the initial screen is transmitted to the control IC (not shown) using the display I/F (not shown) to display the initial screen, and the initial screen is displayed on the display device 83b. Initial screen display control (S111) is performed as follows. As a result, the initial screen is displayed on the display device 83b (S112), and the user can recognize that the image reading device A is being activated.

Next, the CPU (a) 81a releases the right to use the display I/F since it is no longer necessary to control the display unit after completing the initial screen display control (S113). In addition, the CPU (a) 81a may continue to own the right to use the display I/F, and the display contents of the initial screen may be displayed in animation, for example, and the screen may be updated to indicate that the startup process is in progress. It is also possible to notify the user. On the other hand, the CPU (b) 81b is still booting the OS at this time.

Next, the CPU (a) 81a starts initialization processing of the connected control equipment. First, the communication section (a) 84a, the communication section (c) 84c, the interface section (a) 85a, and the control devices connected to the interface section (a) 85a, such as the actuator 86 and the sensor 87, are initialized (S114). ). Specifically, the CPU (a) 81a initializes the USB interface, the SCSI interface, or the wired/wireless network interface, which is the communication unit (a) 84a, to enable communication. Next, the actuator 86 and the sensor 87 connected to the interface section (a) 85a are initialized. Here, the initialization of the actuator 86 is the movement control of the drive units 3 and 4 to the initial positions. The initialization operation of the sensor 87 is the adjustment of the amount of emitted light from the medium detection sensors 50 and 60. If necessary, the ultrasonic wave transmitter and receiver of the double feed detection sensor 40 may be adjusted.

Next, the CPU (a) 81a adjusts the amount of light emitted from the image reading units (CIS units in this case) 70a and 70b (S115). Following the adjustment of the amount of emitted light, a color reference plate (not shown) provided on the opposite surface of the reading position of each of the CIS units 70a and 70b is read, and shading correction is performed to correct the output at that time to a predetermined value (S116). ). Here, the color reference plate may be placed on the facing surface in advance, or may be advanced to the facing surface during shading correction. Alternatively, the CIS units 70a and 70b may be moved to positions facing the color reference plate using a driving section.

On the other hand, the CPU (b) 81b completes the activation of the OS during or after the initialization processing (S114, S115, S116) of the control device of the CPU (a) 81a (S117). Next, the CPU (b) 81b acquires the right to use the display I/F for the display device 83b through arbitration in order to control the display on the display device 83b (S118). In other words, while the CPU (b) 81b is starting up, the CPU (a) 81a completes the initialization of the control device and the image reading unit used for image reading.

Here, the CPU (a) 81a arbitrates the right to use the display I/F. The CPU (a) 81a manages the usage right of the display I/F. pass the usage rights to

Conversely, when the CPU (a) 81a has obtained the right to use the display I/F, if the CPU (b) 81b requests the right to use the communication unit (c), the CPU ( a) 81a conducts arbitration; The arbitration is executed by suspending the use of the display I/F by the CPU (a) 81a and giving priority to the CPU (b) 81b to use the display I/F.

Here, the CPU (a) 81a performs the arbitration, but the CPU (b) 81b may perform the arbitration, or another arbitration unit (not shown) may perform the arbitration. is not particularly limited. Further, here, an example is shown in which the use of the display I/F of the CPU (a) 81a is interrupted and the right of use is preferentially transferred to the CPU (b) 81b. The right to use the display I/F may be handed over to the CPU (b) 81b after waiting for the end of use, and the arbitration method is not limited. In addition, the right to use the display I/F may be granted/denied at the hardware level to access the interface section (c) 85c, or at the software level to secure/refuse the right to use according to a pre-determined rule. I don't care if you release me.

Here, the CPU (a) 81a acquires the right to use the display I/F after confirming that it has released the right to use the display I/F after the completion of the initial screen display control. At this time, since it is decisive in the control sequence that the CPU (a) 81a has released the right to use the display I/F, the right to use the display I/F is directly acquired. Here, if the CPU (a) 81a holds the right to use the display I/F (as described above, if the CPU (a) 81a continues to update the screen), as described above, Using the communication unit (c), the CPU (b) 81b requests the CPU (a) 81a for the right to use the display I/F, and the CPU (a) 81a mediates the right to use the display I/F. , the CPU (a) 81a may transfer the usage right to the CPU (b) 81b, and the CPU (b) 81b may acquire the usage right of the display I/F.

After acquiring the right to use the display I/F, the CPU (b) 81b starts screen display control on the display device 83b (S119). As a result, the screen display on the display device 83b is executed according to the instruction from the CPU (b) 81b (S120). At this time, the screen display control may be started after the control IC included in the display device 83b is initialized again. Thereafter, the CPU (b) 81b performs screen display control in place of the CPU (a) 81a, and causes the display device 83b to perform necessary screen display as necessary.

The CPU (b) 81b then initializes uninitialized control devices such as the communication section (b) 84b and the interface section (b) 85b (S121). Here, a wired/wireless network communication unit or the like can be considered as the communication unit (b). A control interface for the touch panel 83a included in the operation unit 83 can be considered as the interface unit (b) 85b. After these initializations are completed, the start-up is completed.

<Display device>
After starting the device, the control section (b) 80b controls the touch panel 83a and the display device 83b. As described above, the CPU (b) 81b in the control section (b) 80b holds the right to use the display I/F to the display device 83b and controls the display screen. At this time, the information touched by the user on the screen is also acquired from the touch panel 83a, and screen display processing and device control processing are performed according to the acquired information.

<Drive by receiving start instruction from PC>
A basic operation of the image reading apparatus A will be described. When the controller (a) 80a receives an image reading start instruction from, for example, an external personal computer to which the image reading apparatus A is connected, the controller (a) 80a starts driving the first to third conveying units 10 to 30 . The transport media S stacked on the mounting table 1 are transported one by one starting with the transport media S positioned at the bottom. Here, connection with an external personal computer may be made using a communication section (a) 84a included in the control section (a) 80a, such as a USB interface or SCSI interface, or may be made using a communication section (a) 84a included in the control section (b) 80b. It may be done using a communication unit (b) 84b, such as a LAN or wireless LAN interface. Here, when the connection with the external personal computer is made using the communication unit (b) 84b included in the control unit (b) 80b, the connection with the external personal computer in the image reading apparatus A is performed by the control unit (b) 80b. This is done by the included CPU (b) 81b. The CPU (b) 81b transfers the contents of communication with the external personal computer to and from the CPU (a) 81a in the control section (a) 80a using the communication section (c) 84c. When the image reading start instruction from the external personal computer is finally passed to the CPU (a) 81a, the image reading operation is started. In this embodiment, the CPU (a) 81a controls the image reading unit 70 to read the image.

<Drive by receiving start instruction from device operation>
Further, instead of receiving an instruction to start reading from an external personal computer, an image reading instruction is received from a start key (not shown) provided on the operation unit 83 of the image reading apparatus A or an input from the touch panel 83a, and the image reading operation is started. You may

<Control during double feeding>
During the image reading operation, the multi-feeding detection sensor 40 determines whether or not the medium S is multi-fed. Note that when it is determined that there is a double feed, the transport is stopped, or the taking-in of the subsequent transported medium S by the first transport unit 10 is stopped, and the transported medium S in the double-fed state is discharged as it is. can be Further, the occurrence of double feeding may be displayed on an external personal computer or a display device 83b inside the apparatus. In addition, at this time, a return process, for example, an image reading operation is continued, or the read data of the transport medium S that has been multi-fed is discarded, and the transport medium for which the image read data including the transport medium S that has been multi-fed has not been obtained. The user may select from the operation unit 83 or the like to execute from reading of S, or the like.

<Reading start according to the output of the registration sensor and transmission/storage of the read image>
The control unit (a) 80a starts image reading by the image reading unit 70 of the conveyed medium S conveyed by the second conveying unit 20 at a timing based on the detection result of the medium detection sensor 60, and reads the read image. are temporarily stored and sequentially transmitted to the outside of the device. The temporarily stored image data is transmitted to a connected external personal computer or network device via either the communication section (a) 84a or the communication section (b) 84b. Here, the external personal computer may save the received read image after displaying it, or the external personal computer may directly save the received read image in a predetermined location. Alternatively, the data may be stored in a predetermined location in a device on the network, such as an external storage device or FTP server directly connected to the network.

The conveying medium S on which the image has been read is discharged to the discharge tray 2 by the third conveying section 30, and the image reading processing of the conveying medium S is completed. The discharge tray 2 is an example of a document table.

<Power off operation>
When the user presses the power button 122 and continues to press the power button 122 for two seconds or more, the image reading apparatus A starts to turn off the power. The time for which the user continues to press the power button 122 is not limited to 2 seconds, and may be, for example, 1.5 seconds or 3 seconds.

A signal indicating the state of the power button 122 is input to the CPU (a) 81a through the interface (a) 85a. The CPU (a) 81a monitors the state of the power button 122 with this signal, and when it recognizes that the power button 122 has been pressed by the user for two seconds or more, it starts power off operation. As a power-off operation, the CPU (a) 81a instructs the CPU (b) 81b to perform termination processing via the communication section (c) 84c. The CPU (a) 81a writes necessary information to the non-volatile memory connected to the storage section (a) 82a and waits for the completion of the writing. At the same time, the communication of the communication unit (a) 84a is terminated, the actuator 86 connected to the interface unit (a) 85a is safely stopped, and the general-purpose output connected to the interface unit (a) 85a outputs the display device 83b. stop applying power to

On the other hand, the CPU (b) 81b instructed to perform the termination process writes necessary information to the non-volatile memory of the storage part (b) 82b, and stops the communication part (b) 84b, the interface part 85b, etc. implement. When the stop process is completed, the end process completion notice is transmitted to the CPU (a) 81a via the communication section (c) 84c. At this time, the CPU (a) 81a periodically sends an end processing completion confirmation to the CPU (b) 81b via the communication section (c) 84c, and the CPU (b) 81b responds by sending a end processing completion notification to complete the end.・You may send an incomplete status. When the CPU (a) 81a receives the termination process completion notification from the CPU (b) 81b and has completed its own termination process, it controls the power supply control signal connected to the interface (a) 85a, thereby shutting down the entire apparatus. By stopping the power supply to the image reading apparatus, the image reading apparatus is powered off.

<Transition to power saving mode>
Image reading apparatus A shifts to power saving mode in order to reduce power consumption of the entire apparatus when there is no instruction from the user or an external control device for a certain period of time, or when there is an instruction to shift to power saving mode. do. The CPU (a) 81a switches to the power saving mode when there is no operation from the user for a certain period of time, or when a condition for switching to the power saving mode such as receiving an instruction from the user to switch to the power saving mode occurs. ) 81b via the communication unit (c) 84c to switch to the power saving mode. Upon receiving the instruction, the CPU (b) 81b stops controlling the interface section (b) 85b and the communication section (b) 84b. Also, the control of the touch panel 83a and the display device 83b is stopped via the interface section (c) 85c. At this time, when stopping the control to the display device 83b, the CPU (a) 81a is notified that the right to use the display I/F is released via the communication section (c) 84c. After that, the CPU (b) 81b enters a suspended state.

On the other hand, when the CPU (a) 81a instructs the CPU (b) 81b to switch to the power saving mode, some of the actuators 86 and sensors 87 connected to the interface section (a) 85a, such as the image reading units 70a and 70b, are activated. to stop Next, when receiving a notification of release of the right to use the display I/F from the CPU (b) 81b via the communication unit (c) 84c, the right to use the display I/F is secured. The CPU (a) 81a, which has secured the right to use the display I/F, controls the display device 83b to display something different from the normal operation screen, such as displaying "sleep", for example. Inform the user that the device is in power save mode. Further, during the power saving mode, the CPU (a) 81a may operate with an operation clock slower than that during normal operation, thereby further reducing power consumption.

<Operation in power saving mode>
During the power saving mode, the CPU (a) 81a monitors changes in the switch 83c and the sensor 87 connected to the operation unit 83. FIG. Also, an instruction from an external control device connected to the communication unit (a) 84a may be monitored. The CPU (a) 81a performs only these minimum operations. On the other hand, the CPU (b) 81b is in the suspended state as described above.

<Return from power saving mode>
When the CPU (a) 81a detects a condition for returning from the power saving mode, for example, the fact that the user has pressed the switch 83c, the CPU (a) 81a starts returning from the power saving mode. The CPU (a) 81a raises the operation clock dropped during the power saving mode to the operation clock during normal operation. Next, a return instruction is transmitted to the CPU (b) 81b via the communication section (c) 84c. Here, before transmitting the return instruction, the display device 83b is caused to display, for example, "returning" via the display I/F, in order to inform the user that the return from the power saving mode is being performed. display control may be performed. Next, the CPU (a) 81a releases the right to use the display I/F, and initializes the communication section (a) 84a, the interface section (a) 85a, etc. whose operations were stopped when transitioning to the power saving mode. to make it controllable again. Next, CIS light amount adjustment and shading correction are performed.

On the other hand, when the CPU (b) 81b receives the return instruction via the communication section (c), it acquires the right to use the display I/F for the display device 83b in order to control the display on the display device 83b. Here, the right to use the display I/F is requested to the CPU (a) 81a via the communication unit (c) 84c, and the CPU (a) 81a permits it, so that the CPU (b) 81b Obtain the right to use the display I/F. At this time, if it is decisive in the control sequence that the CPU (a) 81a releases the right to use the display I/F, the right to use the display I/F is released via the communication unit (c) 84c. It may be obtained directly without communication.

After acquiring the right to use the display I/F, the CPU (b) 81b starts screen display control on the display device 83b. As a result, the screen display on the display device 83b is executed according to an instruction from the CPU (b) 81b. At this time, the screen display control may be started after the control IC included in the display device 83b is initialized again. Thereafter, the CPU (b) 81b performs screen display control in place of the CPU (a) 81a, and causes the display device 83b to perform necessary screen display as necessary.

Next, the CPU (b) 81b initializes the control devices, for example, the communication section (b) 84b and the interface section (b) 85b, which were stopped during the transition to the power saving mode. Here, a wired/wireless network communication unit or the like can be considered as the communication unit (b). Further, as the interface section (b) 85b, a control interface for the touch panel 83a included in the operation section 83 can be considered. When these are completed, the power saving mode is restored. Note that in the return control in the CPU (b) 81b, prior to acquiring the right to use the display I/F, the control device whose control was stopped during transition to the power saving mode may be initialized.

According to the configuration of the present embodiment, it is possible to perform display on the display unit without waiting for the activation of the control unit (control unit (b) 80b) that performs display control during operation of the device, so that the user can be notified that the display is being activated. Since the notification can be made, it is possible to prevent the user from suspecting a malfunction of the device and accidentally turning off the power of the device.

<Second embodiment>
Next, an image reading apparatus according to a second embodiment will be described. Since the basic configuration of the device is the same as that of the first embodiment, only different parts will be described.

This embodiment differs from the first embodiment in the method of activating the image reading apparatus A. FIG. FIG. 5 is a sequence chart showing the sequence when the image reading apparatus A is activated according to the second embodiment. It should be noted that this sequence chart shows relative sequence relationships and does not show absolute time. The basic configuration of the control unit is the same as that of the first embodiment.

<Startup operation>
When the user presses the power button 122 (S200), the image reading apparatus A is powered on and starts booting. At this time, the CPU (a) 81a is reset (S200a) and starts operating. The CPU (a) 81a reads and executes a program including the OS from the non-volatile memory of the storage section (a) 82a (S201). At this time, even if the program is executed from the non-volatile memory, all the programs from the non-volatile memory are loaded onto the volatile memory and executed from the volatile memory, or part of the program is loaded onto the volatile memory from the non-volatile memory. , the program on the volatile memory may be executed, and the program not on the volatile memory may be executed directly from the nonvolatile memory or developed on the volatile memory. At this time, the CPU (b) 81b is maintained in the reset state and has not started operating (S202). A reset signal is input to the CPU(b) 81b from the outside in order to keep the CPU(b) 81b in the reset state. A reset signal input to the CPU (b) 81b is sent using a part of the communication section (c) 84c. is.

The CPU (a) 81a starts the OS (S204) after initializing the hardware (S203). Next, when the OS completes booting (S205), it acquires the right to use the display I/F of the display device 83b (S206). At this time, the CPU (b) 81b is not activated and it is impossible to acquire the right to use the display I/F. can acquire the right to use

Next, the CPU (a) 81a starts applying power to the display device 83b (S207). As a result, the display device 83b is turned on (S208). The CPU (a) 81a uses a display I/F (not shown) included in the interface section (c) 85c for a control IC (not shown) incorporated in the display device 83b to display a screen on the display device 83b. Send initial settings such as resolution and number of colors. Subsequently, the display image data information to be displayed on the initial screen is transmitted to the control IC (not shown) using the display I/F (not shown) for displaying the initial screen, and the initial screen is displayed on the display device 83b. Initial screen display control (S209) is carried out as follows. As a result, the initial screen is displayed on the display device 83b (S210), and the user can recognize that the image reading device A is being activated. Next, the CPU (a) 81a releases the right to use the display I/F by performing the initial screen display control (S211). After that, the CPU (a) 81a does not request the right to use the display I/F during activation.

Next, the CPU (a) 81a controls the general-purpose IO port, which is a part of the communication unit (c) 84c, and performs activation instruction control to transmit an activation start instruction to cancel the reset state of the CPU (b) 81b ( S212). Subsequently, the CPU (a) 81a starts initialization processing of the control device. First, the communication section (a) 84a, the communication section (c) 84c, the interface section (a) 85a, and the control devices (actuator 86, sensor 87) connected to the interface section (a) 85a are initialized (S213). . Next, the CPU (a) 81a adjusts the amount of light emitted from the image reading units (CIS units in this case) 70a and 70b (S214). Next, the color reference plates 72a and 72b provided on the facing surfaces of the CIS units 70a and 70b are read, and shading correction is performed so that the output at that time becomes a predetermined value (S215).

The CPU (b) 81b is released from the reset state by the activation instruction control (S212) from the CPU (a) 81a, and starts activation. As a result, the CPU (b) 81b reads and executes a program including the OS from the non-volatile memory of the storage section (b) 82b (S216). At this time, even if the program is executed directly from the non-volatile memory, all the programs from the non-volatile memory are expanded to the volatile memory and the program in the volatile memory is executed, or a part of the program is executed from the non-volatile memory. It is also possible to develop the program on the volatile memory, execute the program on the volatile memory, and execute the program not on the volatile memory from the nonvolatile memory. Subsequently, after hardware initialization (S217), the OS is started (S218). The CPU (b) 81b completes the booting of the OS in several tens of seconds (S219). This start-up completion may be performed at any timing during or after the initialization processing (S213, S214, S215) of the control device of the CPU (a) 81a. There are no particular timing restrictions.

When the OS is completely booted, the CPU (b) 81b acquires the right to use the display I/F for the display device 83b in order to control the display on the display device 83b (S220). Here, since the CPU (a) 81a releases the right to use the display I/F and then executes the activation instruction processing (S211) of the CPU (b) 81b, the use of the display I/F at this time point is prohibited. The right can be acquired exclusively by the CPU (b) 81b without mediation.

After acquiring the right to use the display I/F, the CPU (b) 81b starts screen display control on the display device 83b (S221). As a result, the display device 83b performs screen display according to an instruction from the CPU(b) 81b (S222). At this time, the screen display control may be started after the control IC included in the display device 83b is initialized again. Thereafter, the CPU (b) 81b performs screen display control in place of the CPU (a) 81a, and causes the display device 83b to perform necessary screen display as necessary.

The CPU (b) 81b then initializes the uninitialized control devices such as the communication section (b) 84a and the interface section (b) 85b (S223). Here, a wired/wireless network communication unit or the like can be considered as the communication unit (b) 84b. Further, as the interface section (b) 85b, a control interface for the touch panel 83a included in the operation section 83 can be considered. When these initialization processes are completed, the startup is completed.

In this embodiment, the CPU (b) 81b maintains the reset state until the CPU (a) 81a, which performs the initial screen display control, completes the initial screen display control and releases the right to use the display I/F. b) 81b is in a state where it is not activated; After that, after the CPU (a) 81a completes the initial screen display control and gives up the right to use the display I/F, the CPU (b) When the CPU (a) 81b starts screen display control, the CPU (a) 81a has surely given up the right to use the display I/F, and the initial screen control by the CPU (a) 81a and the screen display control by the CPU (b) 81b are performed simultaneously. Since conflicting operations for requesting the right to use the display I/F do not occur without fail, there is no need to use the communication unit (c) to arbitrate for the right to use the display I/F, and processing can be simplified.

Here, an example is shown in which the CPU (a) 81a relinquishes the right to use the display I/F and then performs activation instruction control. You don't have to wait until after you relinquish the right to use it. For example, the CPU (a) 81a may perform the activation instruction control immediately after the reset is released and the operation is started. , the CPU (b) 81b may be activated so that the CPU (a) 81a can complete the initial screen display control and relinquish the right to use the display I/F. As a result, the initial screen control of the CPU (a) 81a and the screen display control of the CPU (b) 81b do not simultaneously request the right to use the display I/F. Since there is no need to arbitrate the use right of F, the processing can be simplified and the time required for starting the device can be shortened.

<Third Embodiment>
Next, an image reading apparatus according to a third embodiment will be described. Since the basic configuration of the device is the same as that of the first embodiment, only different parts will be described.

This embodiment differs from the first embodiment in the method of activating the image reading apparatus A. FIG. FIG. 6 is a sequence chart showing the sequence when the image reading apparatus A is activated according to the third embodiment. It should be noted that this sequence chart shows relative sequence relationships and does not show absolute time. The basic configuration of the control unit is the same as that of the first embodiment.

<Startup operation>
When the user presses the power button 122 (S300), the image reading apparatus A is powered on and starts booting. At this time, the CPU (a) 81a is reset (S300a) and starts operating. The CPU (a) 81a reads and executes a program including the OS from the non-volatile memory of the storage section (a) 82a (S301). At this time, even if the program is executed from the non-volatile memory, all the programs from the non-volatile memory are loaded onto the volatile memory and executed from the volatile memory, or part of the program is loaded onto the volatile memory from the non-volatile memory. , the program on the volatile memory may be executed, and the program not on the volatile memory may be executed directly from the nonvolatile memory or developed on the volatile memory. On the other hand, at this time, the CPU (b) 81b is maintained in the reset state and has not started operating (S302). Here, a reset signal is input to the CPU(b) 81b from the outside in order to hold the CPU(b) 81b in the reset state. A reset signal input to the CPU (b) 81b is sent using a part of the communication section (c) 84c. is.

The CPU (a) 81a starts the OS (S304) after initializing the hardware (S303). Next, when the OS completes booting (S305), it immediately controls the general-purpose IO port, which is a part of the communication unit (c) 84c, and performs boot instruction control to release the reset state of the CPU (b) 81b (S306). ). Next, the CPU (a) 81a acquires the right to use the display I/F of the display device 83b (S307). At this point, the CPU (b) 81b has just released the reset, and the operation to acquire the right to use the display I/F is impossible due to the startup sequence. can acquire the right to use the display I/F.

Next, the CPU (a) 81a starts applying power to the display device 83b (S308). As a result, the display device 83b is turned on (S309). The CPU (a) 81a uses a display I/F (not shown) included in the interface section (c) 85c for a control IC (not shown) incorporated in the display device 83b to display a screen on the display device 83b. At the same time, the image data information to be displayed on the initial screen for the initial screen display is sent to the above control IC (not shown) using the display I / F (not shown) , and the control IC performs initial screen display control (S310) so that the display of the initial screen is started on the display device 83b. Since the initial screen is displayed on the display device 83b at this point (S311), the user can recognize that the image reading device A has started. Next, the CPU (a) 81a releases the right to use the display I/F by completing the initial screen display control (S312). After that, the CPU (a) 81a does not request the right to use the display I/F during startup.

Subsequently, the CPU (a) 81a starts initialization processing of the control device. First, the controller (actuator 86, sensor 87) connected to the communication unit (a) 84a and the interface unit (a) 85a is initialized (S313). Next, the CPU (a) 81a performs light intensity adjustment (S314) of the image reading units (CIS units in this case) 70a and 70b. Next, the color reference plates 72a and 72b provided on the facing surfaces of the CIS units 70a and 70b are read, and shading correction (a) is performed so that the output at that time becomes a predetermined value (S315).

Here, the shading correction occupies a large amount of time in the activation process of the CPU (a) 81a because the correction is performed by the averaging process. Further, shading correction requires individual correction according to reading conditions such as resolution setting and color setting. Generally, shading correction is performed under the scanning conditions of the default resolution setting and color setting at startup, and shading correction under other scanning conditions determines whether shading correction is completed under the specified scanning conditions before scanning starts. However, if it is incomplete, control is taken to implement shading correction. The shading correction (a) (S315) here in this embodiment is performed only for the default reading conditions.

By the way, when the CPU (a) 81a completes the shading correction (a) (S315), if the CPU (b) 81b has not completed booting, then the CPU (a) 81b continues to operate until the CPU (b) 81b completes booting. 81a will be in a waiting state. During this time, without putting the CPU (a) 81a in a waiting state, the shading correction (b) corresponding to the resolution and color setting, which is not performed in the shading correction (a) (S315), is performed (S316). This shading correction (b) may be performed under all reading conditions (resolution and color settings). Also, shading correction may be performed by selectively selecting predetermined reading conditions (resolution and color settings). Alternatively, based on the frequency information of the reading conditions (resolution and color settings) used by the user in the past, a predetermined number may be preferentially selected and the shading correction may be performed sequentially. Alternatively, shading correction may be performed in descending order of frequency based on frequency information of resolutions and color settings that the user has used in the past. In other words, the CPU (a) 81a performs reading conditions not performed in the shading correction (a) during the period from the completion of activation of itself (here, after execution of the shading correction (a)) to the completion of activation of the CPU (b) 81b. shading correction (b) (S316).

On the other hand, the CPU (b) 81b is activated by the activation instruction control (S306) of the CPU (a) 81a. The CPU (b) 81b reads and executes a program including the OS from the non-volatile memory of the storage section (b) 82b (S317). At this time, even if the program is executed from the non-volatile memory, all the programs from the non-volatile memory are loaded onto the volatile memory and executed from the volatile memory, or part of the program is loaded onto the volatile memory from the non-volatile memory. , the program on the volatile memory may be executed, and the program not on the volatile memory may be executed directly from the nonvolatile memory or developed on the volatile memory. Subsequently, after hardware initialization (S318), the OS is started (S319). The CPU (b) 81b completes the booting of the OS over several tens of seconds (S320).

When the OS is completely booted, the CPU (b) 81b acquires the right to use the display I/F for the display device 83b to control the display on the display device 83b (S321). Here, the right to use the display I/F for the display device 83b is acquired. In this case, since it is not certain that the CPU (a) 81a has released the right to use the display I/F, the CPU (b) 81b uses the communication unit (c) with the CPU (a) 81a. arbitrate the right of use, and transfer the right of use from the CPU (a) 81a to the CPU (b) 81b. At this time, the arbitration may be performed by the CPU (a) 81a, the CPU (b) 81b, or another arbitration unit (not shown).

After acquiring the right to use the display I/F, the CPU (b) 81b starts screen display control on the display device 83b (S322). At this time, the screen display control may be started after the control IC included in the display device 83b is initialized again. After that, the screen display control of the display device 83b is performed by the CPU (b) 81b. The CPU (b) 81b then initializes the control devices that have not been initialized and completes startup.

Here, as described above, the CPU (a) 81a executes shading for a plurality of reading conditions by the shading correction (b) (S316) until the CPU (b) 81b completes activation. When the CPU (b) 81b completes activation, the CPU (a) 81a completes the shading correction (b) (S316) at the completion of the shading correction under the reading conditions being executed at this time, thereby completing the activation. Alternatively, when the CPU (b) 81b completes startup, the shading correction (b) may be stopped at this point, and the CPU (a) 81a may complete startup.

In the present embodiment, the CPU (a) 81a issues a start-up instruction to the CPU (b) 81b at an early stage after the start-up operation of the CPU (b) 81b, which has a long start-up time. The activation time of 81b can be controlled to be the shortest from the time the power is turned on, and there is an advantage in that the time from when the power is turned on until the user can use the device can be minimized.

In addition, the CPU (a) 81a performs shading correction under a plurality of reading conditions so that the CPU (b) 81b does not wait for the CPU (b) 81b to start until the CPU (b) 81b starts. can be used. In other words, there is no need to wait for the start of the reading operation for shading correction when the user starts reading. In the present embodiment, an example has been described in which the CPU (a) 81a performs shading correction without entering a waiting state until the CPU (b) 81b completes activation. It is not limited, and may be a combination of some control processes.

<Fourth Embodiment>
Next, an image reading apparatus according to a fourth embodiment will be described. This embodiment differs from the above-described embodiments in that the control section (a) 80a and the control section (b) 80b are provided on the same semiconductor integrated circuit. Since other configurations are the same as those of the first embodiment, description thereof is omitted, and only differences will be described below.

FIG. 7 is a control configuration diagram when the control integrated circuit 181 is used. A portion surrounded by a dotted line in the drawing is the control integrated circuit 181 . A control integrated circuit (hereinafter referred to as SoC: System on Chip) 181 is an integrated circuit including a control section (a) 80a and a control section (b) 80b. Here, the control unit (a) 80a and the control unit (b) 80b generally include a CPU (a) 81a and a CPU (b) 81b, respectively, which are mounted on the same semiconductor integrated circuit. A CPU is an arithmetic unit, and includes a so-called CPU, MPU, DSP, or the like. Also, although the embodiment in which two CPUs are mounted has been shown here, a combination of a plurality of arithmetic units may be mounted.

SoC 181 includes communication unit 84 and interface unit 85 . Here, the communication section 84 and the interface section 85 are shared by the control section (a) 80a and the control section (b) 80b via an internal bus and a bus switch. The communication unit 84 and the interface unit 85 include a USB interface, a SCSI interface, an interface to a wired communication network controller (PCIe, MII (media independent interface), etc.), and a communication interface (SDIO, PCIe, etc.) to a wireless communication module. , serial communication interfaces (SPI, UART, I2C, etc.), analog output functions (DAC), analog input functions (ADC), PWM output functions, and so on. It also incorporates a display I/F connected to the display device 83b, such as SPI and DisplayPort.

The SoC 181 also has a memory controller 182 and a memory bus for connection with an external storage unit 82 . As the storage unit 82, for example, a high-speed SDRAM or the like can be considered, and is used as a memory area for the CPU (a) 81a and the CPU (b) 81b. Moreover, the memory controller 182 may have a plurality of memory buses, and as another usage, a non-volatile memory for holding a program storage area or non-volatile information may be connected. Also, the storage unit 82 may not be connected to the memory controller 182 on the memory bus, and may be connected to the separate interface unit 85 or the communication unit 84 described above.

SoC 181 may also have a dedicated interface for controlling image reading unit 70 and receiving read data from image reading unit 70 . The SoC 181 includes therein a reset control unit, a clock supply control unit, and a power supply control unit to the CPU (b) 81b (not shown), which are controlled by the CPU (a) 81a. It is obvious that the SoC 181 requires a smaller mounting area than the case where the control section (a) 80a and the control section (b) 80b are mounted as separate integrated circuits.

<Starting method of CPU (b)>
When the power is turned on by the user, power is supplied to the entire device, and a reset signal input to the SoC 181 from an external reset control circuit (not shown) is canceled. As a result, the reset of the CPU(a) 81a is released, and only the CPU(a) 81a starts booting. Here, the reset control circuit is a circuit in which, when the power supply voltage exceeds the threshold, the output becomes a logic level for resetting the SoC, maintains the output at this logic level for a predetermined time, and then reverses the output. A dedicated IC called a reset IC is generally used. At this point, the SoC 181 resets the reset control unit (not shown) to the built-in CPU (b) 81b, stops the output of the clock supply control unit, and stops the supply of the power supply control unit to the CPU (b) 81b. b) 81b is in a state where it cannot be activated.

The CPU (a) 81a reads a program including an OS from the non-volatile memory of the storage unit 82 and executes it. At this time, even if the program is executed directly from the non-volatile memory, all the programs from the non-volatile memory are expanded to the volatile memory and the program in the volatile memory is executed, or a part of the program is executed from the non-volatile memory. It is also possible to develop the program on the volatile memory, execute the program on the volatile memory, and execute the program not on the volatile memory from the nonvolatile memory.

The CPU (a) 81a executes start-up processing for starting up the CPU (b) 81b based on the program. Here, for example, the activation instruction process puts a reset control unit (not shown) built in the SoC 181 into a reset release state, cancels the reset signal for the CPU (b) 81b, and activates the clock control unit for the CPU (b) 81b. The output state is set to start clock input to the CPU(b) 81b, and the power supply control unit is set to the supply state to start power supply to the CPU(b) 81b. This enables the CPU (b) 81b to start the activation process.

When it becomes possible to start the boot process, the CPU (b) 81b executes an instruction from a predetermined address in the storage unit 82, reads out a program including the OS from the non-volatile memory, and executes it. At this time, even if the program is executed directly from the non-volatile memory, all the programs from the non-volatile memory are expanded to the volatile memory and the program in the volatile memory is executed, or a part of the program is executed from the non-volatile memory. It is also possible to develop the program on the volatile memory, execute the program on the volatile memory, and execute the program not on the volatile memory from the nonvolatile memory.

<Transition to power saving mode>
Image reading apparatus A shifts to power saving mode in order to reduce power consumption of the entire apparatus when there is no instruction from the user or an external control device for a certain period of time, or when there is an instruction to shift to power saving mode. do. The CPU (a) 81a receives no operation from the user for a certain period of time, or when a condition for shifting to the power saving mode occurs, such as receiving an instruction from the user to shift to the power saving mode. b) Instruct 81b to switch to the power saving mode via the communication unit (c). The CPU (b) 81b stops controlling devices connected to the interface section 85 and the communication section 84 and controlled by itself. Further, control of the touch panel 83a and the display device 83b through the interface section 85 is also stopped. At this time, the CPU (a) 81a is notified via the communication unit 84 that the right to use the display I/F is released when the control to the display device 83b is stopped. In addition, the information is saved in the non-volatile memory of the storage unit 82 as necessary. After that, the CPU (b) 81b notifies the CPU (a) 81a via the communication section 84 that it is possible to shift to the power saving mode.

On the other hand, when the CPU (a) 81a instructs the CPU (b) 81b to switch to the power saving mode, the part of the actuator 86 and the sensor 87 controlled by itself connected to the interface section 85, such as the image reading unit 70a, 70b is stopped. Next, when receiving a notification of release of the right to use the display I/F from the CPU (b) 81b via the communication unit (c) 84c, the right to use the display I/F is secured. The CPU (a) 81a, which has secured the right to use the display I/F, controls the display device 83b to display, for example, "sleeping", so as to make a display different from the normal operation screen, thereby allowing the user to to notify that the device is in power saving mode. At this time, the CPU (a) 81a performs display stop processing control on the display device 83b via the display I/F, stops applying power to the display device 83b, and stops display on the display unit. However, the power consumption may be further reduced. At this time, the CPU (a) 81a uses a light-emitting unit (not shown) (for example, it is always lit during normal operation and slowly blinks in power saving mode) to inform the user that the device is in power saving mode. may be reported.

Next, when the CPU (a) 81a receives from the CPU (b) 81b through the communication section 84 that the CPU (a) 81a can shift to the power saving mode, the CPU (a) 81a sends a notification (not shown) to the CPU (b) 81b. , the clock supply control unit is changed to the reset state, the power supply control unit is changed to the supply stop state, and the CPU (b) 81b is changed to the operation stop state. Further, during the power saving mode, the CPU (a) 81a may operate with an operation clock slower than that during normal operation, thereby further reducing power consumption.

<Operation in power saving mode>
During the power saving mode, the CPU (a) 81a monitors changes in the switch 83c and the sensor 87 connected to the operation unit 83. FIG. Also, an instruction from an external control device connected to the communication unit (a) 84a may be monitored. In addition, in order to inform the user that the device is in the power saving mode, blinking control of the light emitting unit may be performed. At this time, the CPU (b) 81b has completely stopped operating and is in a reset state.

<Return from power saving mode>
When the CPU (a) 81a detects a condition for returning from the power saving mode, for example, the fact that the user has pressed the switch 83c, the CPU (a) 81a starts returning from the power saving mode. The CPU (a) 81a restores the operation clock dropped during the power saving mode to the operation clock during normal operation. Next, the CPU (a) 81a executes start-up processing for starting up the CPU (b) 81b based on the program. Here, for example, the activation instruction process puts a reset control unit (not shown) built in the SoC 181 into a reset release state to release a reset signal to the CPU (b) 81b, and outputs a clock control unit to the CPU (b) 81b. state to start clock input to the CPU(b) 81b, and to set the power supply control section to the supply state to start power supply to the CPU(b) 81b. This enables the CPU (b) 81b to start the activation process.

When it becomes possible to start the boot process, the CPU (b) 81b executes an instruction from a predetermined address in the storage unit 82, reads out a program including the OS from the non-volatile memory, and executes it. At this time, the program can be executed directly from the non-volatile memory, all the programs from the non-volatile memory can be loaded onto the volatile memory and the program from the volatile memory can be executed, or a part of the program can be executed from the non-volatile memory. may be developed on the volatile memory, the program on the volatile memory may be executed, and the program not on the volatile memory may be executed from the nonvolatile memory.

At this time, the CPU (a) 81a controls the start of application of power to the display device 83b before or after the start-up process of the CPU (b) 81b, thereby energizing the display device 83b. Using the display I/F (not shown) included in the interface unit 85 for the control IC (not shown) built in the device 83b, initial settings such as the resolution and number of colors of the screen displayed on the display device 83b are performed. to send. Next, display control for informing the user that recovery from the power saving mode is in progress, such as displaying, for example, "recovering" on the display device 83b via the display I/F, may be performed. good. At the same time, the blinking control of the light emitting unit, which has been performed to notify the user that the device is in the power saving mode, is changed to constant lighting control. Next, the CPU (a) 81a releases the right to use the display I/F, stops the operation when transitioning to the power saving mode, and initializes the communication section (a) 82a, the interface section (a) 85a, etc. to make it controllable again. Next, CIS light amount adjustment and shading correction are performed.

On the other hand, the CPU (b) 81b, which has received the activation instruction process from the CPU (a) 81a, resumes starting the OS, and when the OS activation is completed, the CPU (b) 81b performs display control on the display device 83b. Obtain the right to use the display I/F. Here, the right to use the display I/F is requested to the CPU (a) 81a via the communication unit 84, and the CPU (a) 81a permits it, so that the CPU (b) 81b Acquire the right to use F. At this time, if it is decisive in the control sequence that the CPU (a) 81a releases the right to use the display I/F, the right to use the display I/F is communicated via the communication unit 84. You can get it directly.

After acquiring the right to use the display I/F, the CPU (b) 81b starts screen display control on the display device 83b. As a result, the screen display on the display device 83b is executed according to an instruction from the CPU (b) 81b. At this time, the screen display control may be started after the control IC included in the display device 83b is initialized again. Thereafter, the CPU (b) 81b performs screen display control in place of the CPU (a) 81a, and causes the display device 83b to perform necessary screen display as necessary.

The CPU (b) 81b then initializes the control devices it controls, such as the communication unit 84 and the interface unit 85, which have not been initialized. Here, a wired/wireless network communication unit or the like can be considered as the communication unit. Further, as the interface unit 85, a control interface of the touch panel 83a included in the operation unit 83, etc. can be considered. When these are completed, the recovery from the power saving mode is completed.

According to this embodiment, since a plurality of control units are mounted on one SoC 181, the mounting area can be reduced, and by combining with the above-described embodiments, these effects can be realized together. In addition, when returning from the power saving mode, it is possible to perform display on the display unit without waiting for the return of the control unit that performs display during operation of the device. This eliminates the possibility of mistakenly turning off the power due to suspicion of a malfunction.

Although the embodiments of the present invention have been described in detail above, it will be apparent to those skilled in the art that various modifications are possible within the scope of the present invention.

A image reading device S conveying medium 1 mounting table 2 discharge trays 80, 80a, 80b control units 81a, 81b CPU
82, 82a, 82b Storage unit 83 Operation unit 83b Display devices 84, 84a, 84b, 84c Communication units 85, 85a, 85b, 85c Interface unit 86 Actuator 87 Sensor 181 Integrated circuit for control

Claims (7)

a control device in which a first control unit and a second control unit controlled by the first control unit are mounted on one semiconductor integrated circuit ;
a screen display unit whose display is controlled by the first control unit and the second control unit;
a control signal line to the screen display unit shared by the first control unit and the second control unit ;
An image reading unit that reads the image of the original
with
The first control unit operates with a program that starts earlier than the second control unit and executes image reading control by the image reading unit ,
The second control unit executes control with lower immediacy than the first control unit,
When the control device is activated from a dormant state, the first control unit acquires the right to use the control signal line after activation, and performs initial screen display control for displaying an initial screen on the screen display unit; executing an activation start instruction for the second control unit , and performing initialization processing for image reading in the image reading unit during activation processing for the second control unit;
After the program is activated based on the activation start instruction , the second control unit acquires the right to use the control signal line in a state in which the initial screen is displayed on the screen display unit. 1. An image reading device characterized by performing screen display control of . 2. The image reading apparatus according to claim 1, wherein the initialization processing is adjustment of the amount of emitted light and shading correction of the image reading section. The first control unit and the second control unit have communication means for communicating with each other,
When the control device is activated from the hibernation state, only the first control unit starts activation processing, and the second control unit receives the activation start instruction from the first control unit and receives the activation start instruction from the communication means. 3. The image reading apparatus according to claim 1, wherein the image reading apparatus starts activation when the image reading apparatus receives the image data through the . 4. A right to use the control signal line is requested from the first control unit when the second control unit completes the start-up when the control device is activated from the hibernation state. The image reading device according to any one of . When the control device is activated from a dormant state, the first control unit performs the initial screen display control on the screen display unit, releases the right to use the control signal line, and then 5. The image reading apparatus according to claim 1, wherein an instruction to start activation of the second control unit is executed . The first control unit instructs the second control unit to start activation when the control device is activated from a hibernation state,
The first control unit completes the initial screen display control on the screen display unit before the second control unit starts display control on the screen display unit. 5. The image reading device according to any one of 1 to 4 . a table for placing the manuscript;
a transport unit for transporting the document along the transport path,
7. The image reading apparatus according to claim 1, wherein the first control section executes the image reading control on the document conveyed by the conveying section.

Images