JP7280206B2 - semiconductor equipment - Google Patents

Description

TECHNICAL FIELD Embodiments of the present invention relate to semiconductor devices.

For example, semiconductor devices such as transistors are desired to have improved characteristics.

JP 2017-55071 A

Embodiments of the present invention provide semiconductor devices with improved characteristics.

According to an embodiment of the invention, a semiconductor device includes a semiconductor member, a gate electrode, a source electrode, a drain electrode, a conductive member, a gate terminal and a first circuit. The semiconductor member includes a first semiconductor layer including a first partial region and containing _{Al x1} Ga _{1-x1 N} (0≦x1<1); ), and a second semiconductor layer including The first partial region is between at least a portion of the conductive member and the gate electrode in a first direction. The gate terminal is electrically connected to the gate electrode. The first circuit can apply a first voltage having a polarity opposite to the polarity of the gate voltage to the conductive member based on the gate voltage applied to the gate terminal.

FIG. 1 is a schematic diagram illustrating the semiconductor device according to the first embodiment. FIG. 2 is a schematic diagram illustrating the semiconductor device according to the second embodiment. FIG. 3 is a circuit diagram illustrating the semiconductor device according to the second embodiment. 4A and 4B are graphs illustrating the operation of the semiconductor device according to the second embodiment. FIG. 5 is a schematic diagram illustrating the semiconductor device according to the second embodiment. FIG. 6 is a circuit diagram illustrating the semiconductor device according to the second embodiment. FIG. 7 is a schematic diagram illustrating the semiconductor device according to the second embodiment. FIG. 8 is a schematic diagram illustrating the semiconductor device according to the third embodiment. FIG. 9 is a circuit diagram illustrating a semiconductor device according to a third embodiment; 10A and 10B are graphs illustrating the operation of the semiconductor device according to the third embodiment. FIG. 11 is a circuit diagram illustrating a semiconductor device according to the third embodiment; FIG. 12 is a circuit diagram illustrating a semiconductor device according to the third embodiment; FIG. 13 is a schematic diagram illustrating the semiconductor device according to the fourth embodiment. FIG. 14 is a schematic cross-sectional view illustrating the semiconductor device according to the fifth embodiment. FIG. 15 is a schematic plan view illustrating the semiconductor device according to the fifth embodiment. FIG. 16 is a schematic plan view illustrating the semiconductor device according to the fifth embodiment. FIG. 17 is a schematic cross-sectional view illustrating the semiconductor device according to the fifth embodiment. FIG. 18 is a schematic plan view illustrating the semiconductor device according to the fifth embodiment. FIG. 19 is a schematic plan view illustrating the semiconductor device according to the fifth embodiment. FIG. 20 is a schematic cross-sectional view illustrating the semiconductor device according to the fifth embodiment. FIG. 21 is a schematic plan view illustrating the semiconductor device according to the fifth embodiment. FIG. 22 is a schematic plan view illustrating the semiconductor device according to the fifth embodiment.

Each embodiment of the present invention will be described below with reference to the drawings.
The drawings are schematic or conceptual, and the relationship between the thickness and width of each portion, the size ratio between portions, and the like are not necessarily the same as the actual ones. Even when the same parts are shown, the dimensions and ratios may be different depending on the drawing.
In the present specification and each figure, the same reference numerals are given to the same elements as those described above with respect to the previous figures, and detailed description thereof will be omitted as appropriate.

(First embodiment)
FIG. 1 is a schematic diagram illustrating the semiconductor device according to the first embodiment.
As shown in FIG. 1, a semiconductor device 110 according to the embodiment includes a semiconductor member 25, a gate electrode 51, a source electrode 52, a drain electrode 53, a conductive member 15, a gate terminal Tg, and a first circuit 30. The semiconductor member 25, the gate electrode 51, the source electrode 52, the drain electrode 53, and the conductive member 15 are included in the transistor 10T. FIG. 1 illustrates a cross section of transistor 10T.

The semiconductor member 25 includes the first semiconductor layer 10 and the second semiconductor layer 20 . The first semiconductor layer 10 includes a first partial region 10a. The first semiconductor layer 10 contains Al _x1 Ga _1-x1 N (0≦x1<1). The composition ratio of Al in the first semiconductor layer 10 is, for example, 0.1 or less. The first semiconductor layer 10 contains GaN, for example.

The second semiconductor layer 20 includes Al _x2 Ga _1-x2 N (0<x2≦1, x1<x2). The composition ratio of Al in the second semiconductor layer 20 is, for example, 0.2 or more and 0.5 or less. The second semiconductor layer 20 contains AlGaN, for example.

In this example, a base 10s is provided. The base 10s is, for example, a silicon substrate. A buffer layer (for example, a buffer layer 10B illustrated in FIG. 14) may be provided between the base 10s and the first semiconductor layer 10 . For example, a buffer layer is provided on the substrate 10s. A first semiconductor layer 10 is provided over the buffer layer. A second semiconductor layer 20 is provided on the first semiconductor layer 10 .

For example, there is a first partial region 10a of the first semiconductor layer 10 between at least part of the conductive member 15 and the gate electrode 51 in the first direction.

The first direction corresponds to, for example, the stacking direction of the first semiconductor layer 10 and the second semiconductor layer 20 . Let the first direction be the Z-axis direction. One direction perpendicular to the Z-axis direction is defined as the X-axis direction. A direction perpendicular to the Z-axis direction and the X-axis direction is defined as the Y-axis direction.

In this example, the conductive member 15 is part of the base 10s (eg, silicon substrate). The conductive member 15 extends along a plane (XY plane) intersecting the first direction (Z-axis direction). There is a portion of the first semiconductor layer 10 between a portion of the conductive member 15 (substrate 10s) and the source electrode 52 in the first direction (Z-axis direction). There is another part of the first semiconductor layer 10 between another part of the conductive member 15 (substrate 10s) and the drain electrode 53 in the first direction.

As shown in FIG. 1, the second direction from the source electrode 52 to the drain electrode 53 intersects the first direction (Z-axis direction). For example, the second direction is the X-axis direction. The position of the gate electrode 51 in the second direction (for example, the X-axis direction) is between the position of the source electrode 52 in the second direction and the position of the drain electrode 53 in the second direction.

As shown in FIG. 1, for example, the first semiconductor layer 10 further includes a second partial region 10b, a third partial region 10c, a fourth partial region 10d and a fifth partial region 10e. The direction from the second partial region 10b to the source electrode 52 is along the first direction (Z-axis direction). The direction from the third partial region 10c to the drain electrode 53 is along the first direction.

The first partial region 10a is between the second partial region 10b and the third partial region 10c in the second direction (eg, X-axis direction). The fourth partial region 10d is between the second partial region 10b and the first partial region 10a in the second direction. The fifth partial region 10e is between the first partial region 10a and the third partial region 10c in the second direction.

The second semiconductor layer 20 includes a first semiconductor portion 21 and a second semiconductor portion 22 . The direction from the fourth partial region 10d to the first semiconductor portion 21 is along the first direction (Z-axis direction). The direction from the fifth partial region 10e to the second semiconductor portion 22 is along the first direction.

In this example, the semiconductor device 110 further includes a first insulating film 61 . A portion 61 p of the first insulating film 61 is between the first partial region 10 a and the gate electrode 51 . For example, at least part of the first insulating film 61 is between the first partial region 10 a and the gate electrode 51 . The first insulating film 61 functions as a gate insulating film. The first insulating film 61 contains, for example, silicon oxide.

For example, a carrier region 10E is formed in a portion of the first semiconductor layer 10 near the second semiconductor layer 20 . Carrier region 10E is, for example, a two-dimensional electron gas. The semiconductor device 110 is, for example, a HEMT (High Electron Mobility Transistor).

For example, a source terminal Ts and a drain terminal Td may be provided. Source terminal Ts is electrically connected to source electrode 52 . The drain terminal Td is electrically connected to the drain electrode 53 .

Gate terminal Tg is electrically connected to gate electrode 51 . The current flowing between the source terminal Ts and the drain terminal Td is controlled according to the voltage applied to the gate terminal Tg.

In this example, the direction from the portion 61p of the first insulating film 61 to the first semiconductor layer 10 is perpendicular to the first direction (Z-axis direction). For example, the direction from at least part of the gate electrode 51 to at least part of the second semiconductor layer 20 is perpendicular to the first direction (Z-axis direction) . The semiconductor device 110 may be capable of normally-off operation. In embodiments, the direction from at least part of the gate electrode 51 to at least part of the first semiconductor layer 10 may be perpendicular to the first direction.

As shown in FIG. 1, the semiconductor device 110 may include at least one of a field plate 52F, a field plate 54Fa, and a field plate 54Fb. At least one of these field plates is electrically connected to the source electrode 52, for example. For example, there is a gate electrode 51 between semiconductor member 25 and field plate 52F. For example, there is a field plate 54Fa between the gate electrode 51 and the field plate 52F. For example, the position of the field plate 54Fb in the Z-axis direction is between the position of the gate electrode 51 in the Z-axis direction and the position of the field plate 52F in the Z-axis direction.

For example, the semiconductor device 110 may further include an insulating member 80 . The insulating member 80 electrically insulates the gate electrode 51 and the source electrode 52 . The insulating member 80 electrically insulates the gate electrode 51 and the drain electrode 53 from each other. The insulating member 80 electrically insulates the drain electrode 53 and the source electrode 52 . The insulating member 80 may include, for example, a first insulating member 81 and a second insulating member 82 . The first insulating member 81 is between the gate electrode 51 and the field plate 54Fa. A second insulating member 82 is between field plate 54Fa and field plate 52F. The insulating member 80 contains at least one selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride and aluminum oxide.

The first circuit 30 can apply the first voltage V1 to the conductive member 15 based on the gate voltage Vg applied to the gate terminal Tg. The first voltage V1 has a polarity opposite to that of the gate voltage Vg.

For example, the first circuit 30 includes a first end 30a, a second end 30b and a third end 30c. The first end 30a is electrically connected to the gate terminal Tg. The second end 30 b is electrically connected to the conductive member 15 . The third end 30c is electrically connected to the source terminal Ts (that is, the source electrode 52).

The source electrode 52 is set to, for example, ground potential. For example, the negative first voltage V1 is generated from the positive gate voltage Vg. By applying the negative first voltage V1 to the conductive member 15 facing the gate electrode 51, the threshold voltage can be increased.

According to the embodiment, it becomes easier to stably obtain a high threshold voltage.

For example, when the first voltage V1 applied to the conductive member 15 is -10V, a threshold voltage about 1V higher than when the voltage of the conductive member 15 is 0V is obtained.

According to the embodiments, it is possible to provide a semiconductor device with improved characteristics.

(Second embodiment)
The second embodiment corresponds to one example of the first circuit 30 illustrated in FIG.
FIG. 2 is a schematic diagram illustrating the semiconductor device according to the second embodiment.
FIG. 3 is a circuit diagram illustrating the semiconductor device according to the second embodiment.
As shown in FIG. 2, in the semiconductor device 120 according to the embodiment, the configurations of the semiconductor member 25, the gate electrode 51, the source electrode 52, the drain electrode 53, the conductive member 15, the gate terminal Tg, and the like are different from those in the semiconductor device 110. It is the same. An example of the first circuit 30 in the semiconductor device 120 will be described below.

As shown in FIGS. 2 and 3, first circuit 30 includes first capacitance 41 and first diode 31 . The first capacitance 41 includes a first end 41a and a second end 41b. The first diode 31 includes a first anode 31a and a first cathode 31c.

The first end 41a is electrically connected to the gate terminal Tg. The second end 41b is electrically connected to the conductive member 15 and the first anode 31a. The first cathode 31 c is electrically connected to the source electrode 52 .

For example, the first end 41a corresponds to the first end 30a. The second end 41b corresponds to the second end 30b. A first cathode 31c corresponds to the third end 30c.

The first circuit 30 having such a configuration generates the first voltage V1 from the gate voltage Vg.

4A and 4B are graphs illustrating the operation of the semiconductor device according to the second embodiment.
The horizontal axis of these figures is time tm. The vertical axis of FIG. 4A is the gate voltage Vg applied to the gate terminal Tg. The vertical axis of FIG. 4(b) is the first voltage V1 applied to the conductive member 15. As shown in FIG.

As shown in FIG. 4A, the gate voltage Vg changes from the first potential E1 to the second potential E2 at the first time t1. The second potential E2 is lower than the first potential E1.

As shown in FIG. 4B, at the first time t1, the first voltage V1 changes from the third potential E3 to the fourth potential E4. This potential change is based on the charge stored in the first capacitance 41 . The fourth potential E4 is lower than the third potential E3. The second potential E2 and the third potential E3 are, for example, ground potentials. When the gate voltage Vg changes from the positive first potential E1 to the ground potential, the first voltage V1 output from the first circuit 30 becomes the negative fourth potential E4.

Thus, when the gate voltage Vg changes from the first potential E1 (high potential) to the second potential E2 (low potential), the first voltage V1 changes from the third potential E3 to the fourth potential E4. A high threshold voltage is obtained by setting the conductive member 15 to the negative fourth potential E4.

In an embodiment, the first circuit 30 generates the first voltage V1 from the gate voltage Vg. For example, the configuration is simpler than the reference example in which a control device or the like is provided separately. In the embodiment, a high threshold can be stably obtained with a simple configuration.

As shown in FIGS. 4A and 4B, in this example, after the first time t1, the polarity of the first voltage V1 is inverted with respect to the polarity of the gate voltage Vg. For example, at the second time t2, the gate voltage Vg changes from the second potential E2 to the first potential E1. At the second time t2, the first voltage V1 changes from the fourth potential E4 to the third potential E3. For example, when the gate voltage Vg is in the ON state, the threshold returns and a low ON resistance is obtained.

Thus, in one example according to the embodiment, when the gate voltage Vg changes from the second potential E2 to the first potential E1, the first voltage V1 may change from the fourth potential E4 to the third potential E3. .

In embodiments, a capacitance is created between the conductive member 15 and the gate electrode 51 . This capacitance corresponds to, for example, the capacitance between the base 10s (silicon substrate) and the carrier region 10E.

In embodiments, the first capacitance of the first capacitance 41 is preferably ten times or more the capacitance between the conductive member 15 (eg, the substrate 10 s) and the gate electrode 51 . As a result, the fourth potential E4 can be further lowered, and a high threshold voltage can be obtained.

FIG. 5 is a schematic diagram illustrating the semiconductor device according to the second embodiment.
FIG. 6 is a circuit diagram illustrating the semiconductor device according to the second embodiment.
As shown in FIG. 5, in the semiconductor device 121, the configurations of the semiconductor member 25, the gate electrode 51, the source electrode 52, the drain electrode 53, the gate terminal Tg, the first circuit 30, and the like are the same as those in the semiconductor device 120. . Examples of the conductive member 15 in the semiconductor device 121 will be described below.

As shown in FIG. 5, in the semiconductor device 121, the conductive member 15 is separated from the base 10s (eg, silicon substrate). For example, the conductive member 15 separated from the base 10s can be obtained by removing the region between the portion corresponding to the gate electrode 51 and other portions of the base 10s by etching or the like.

Alternatively, a conductive member 15 separated from the base 10s can be obtained by removing a portion of the base 10s corresponding to the gate electrode 51 and providing another conductive layer (such as a metal layer) on the removed portion. .

In the semiconductor device 121, since the conductive member 15 is separated from the base 10s, the capacitance Cx (see FIG. 6) between the conductive member 15 and the gate electrode 51 can be reduced. Thereby, the potential of the capacitance Cx can be changed in a short time. Even if the capacitance of the first capacitance 41 is small, the delay in raising the threshold voltage with respect to the change in the gate voltage Vg can be suppressed.

FIG. 7 is a schematic diagram illustrating the semiconductor device according to the second embodiment.
As shown in FIG. 7, in the semiconductor device 122, the configurations of the semiconductor member 25, the gate electrode 51, the source electrode 52, the drain electrode 53, the gate terminal Tg, the first circuit 30, and the like are the same as those in the semiconductor device 120. . Also in the semiconductor device 122, the conductive member 15 is separated from the base 10s (eg, silicon substrate).

In the semiconductor device 122, the thickness of the conductive member 15 (the length along the Z-axis direction) is different from the thickness of the base 10s. In this example, the thickness of the conductive member 15 is thinner than the thickness of the base 10s. Such a semiconductor device 122 is formed by, for example, removing a portion corresponding to the gate electrode 51 in the base 10s and providing another conductive layer (such as a metal layer) on the removed portion so that the conductive member 15 is can get.

In the semiconductor devices 121 and 122 , the first capacitance of the first capacitance 41 is preferably ten times or more the capacitance Cx between the conductive member 15 and the gate electrode 51 . In the semiconductor devices 121 and 122, since the conductive member 15 is separated from the base 10s, it is easy to reduce the capacitance Cx. Even if the first capacitance is small, the delay in raising the threshold voltage can be suppressed.

(Third Embodiment)
The third embodiment corresponds to one example of the first circuit 30 illustrated in FIG.
FIG. 8 is a schematic diagram illustrating the semiconductor device according to the third embodiment.
FIG. 9 is a circuit diagram illustrating a semiconductor device according to a third embodiment;
As shown in FIG. 8, in the semiconductor device 130 according to the embodiment, the configuration of the semiconductor member 25, the gate electrode 51, the source electrode 52, the drain electrode 53, the conductive member 15, the gate terminal Tg, etc. is different from that in the semiconductor device 110. It is the same. An example of the first circuit 30 in the semiconductor device 130 will be described below.

As shown in FIGS. 8 and 9, the first circuit 30 includes a first capacitance 41, a second capacitance 42, a first diode 31 and a second diode 32. FIG.

The first capacitance 41 includes a first end 41a and a second end 41b. The second capacitance 42 includes a third end 42c and a fourth end 42d. The first diode 31 includes a first anode 31a and a first cathode 31c. The second diode 32 includes a second anode 32a and a second cathode 32c.

The first end 41a is electrically connected to the gate terminal Tg. The second end 41b is electrically connected to the first anode 31a and the second cathode 32c. The first cathode 31 c is electrically connected to the source electrode 52 . The second anode 32a is electrically connected to the conductive member 15 and the third end 42c. The fourth end 42 d is electrically connected to the source electrode 52 .

In such a first circuit 30 as well, the first voltage V1 is generated from the gate voltage Vg.

10A and 10B are graphs illustrating the operation of the semiconductor device according to the third embodiment.
The horizontal axis of these figures is time tm. The vertical axis of FIG. 10(a) is the gate voltage Vg applied to the gate terminal Tg. The vertical axis of FIG. 10(b) is the first voltage V1 applied to the conductive member 15. As shown in FIG.

As shown in FIG. 10(a), the gate voltage Vg changes from the first potential E1 to the second potential E2 at the first time t1. The second potential E2 is lower than the first potential E1.

As shown in FIG. 10B, at the first time t1, the first voltage V1 changes from the third potential E3 to the fourth potential E4. The fourth potential E4 is lower than the third potential E3. The second potential E2 and the third potential E3 are, for example, ground potentials. When the gate voltage Vg changes from the positive first potential E1 to the ground potential, the first voltage V1 output from the first circuit 30 becomes the negative fourth potential E4.

Thus, at the first time t1 when the gate voltage Vg changes from the first potential E1 (high potential) to the second potential E2 (low potential), the first voltage V1 changes from the third potential E3 to the fourth potential E4. This provides a high threshold voltage.

In the semiconductor device 130, after the first time t1, the first voltage V1 maintains the fourth potential E4. When the gate voltage Vg changes from the second potential E2 to the first potential E1, the first voltage V1 maintains the fourth potential E4. Also at the second time t2, the first voltage V1 maintains the negative fourth potential E4. In the semiconductor device 130, there is no influence of delay in change of the first voltage V1 with respect to change of the gate voltage Vg. A high threshold voltage can be obtained more stably.

The second capacitance of the second capacitance 42 may be substantially the same as the first capacitance of the first capacitance 41 . For example, the second capacitance is 0.7 to 1.3 times the first capacitance.

In embodiments, the second capacitance of the second capacitance 42 is preferably ten times or more the capacitance between the conductive member 15 (eg, the substrate 10 s) and the gate electrode 51 . As a result, the fourth potential E4 can be further lowered, and a high threshold voltage can be obtained.

FIG. 11 is a circuit diagram illustrating a semiconductor device according to the third embodiment;
As shown in FIG. 11, in a semiconductor device 131 according to the embodiment, a first circuit 30 includes a voltage amplifier circuit 35 in addition to a first capacitance 41, a second capacitance 42, a first diode 31 and a second diode 32. include. The voltage amplifier circuit 35 includes an input terminal 35a and an output terminal 35b. The input terminal 35a is electrically connected to the gate terminal Tg. The output end 35b is electrically connected to the first end 41a. In the semiconductor device 131 , the amplified first voltage V1 can be applied to the conductive member 15 . A stable high threshold is obtained.

FIG. 12 is a circuit diagram illustrating a semiconductor device according to the third embodiment;
FIG. 12 shows an example of the voltage amplifier circuit 35. As shown in FIG. As shown in FIG. 12, a voltage amplifier circuit is obtained by combining diodes D1 to D4 and capacitances C01 to C04. Based on the input voltage Vi, an amplified output voltage Vo is obtained.

(Fourth embodiment)
FIG. 13 is a schematic diagram illustrating the semiconductor device according to the fourth embodiment.
FIG. 13 is a schematic plan view. As shown in FIG. 13, in the semiconductor device 140, the first circuit 30 is provided on the mounting substrate 78e. In this example, first circuit 30 includes first diode 31 and first capacitance 41 . For example, a conductive layer 78c is provided on the mounting board 78e. A first diode 31, a first capacitance 41 and a transistor 10T are provided on the conductive layer 78c. The transistor 10T includes a semiconductor member 25, a gate electrode 51, a source electrode 52 and a drain electrode 53 (see FIG. 1). A gate pad 51P, a source pad 52P and a drain pad 53P are provided in the transistor 10T. Gate pad 51P is electrically connected to gate electrode 51 . Source pad 52P is electrically connected to source electrode 52 . Drain pad 53P is electrically connected to drain electrode 53 .

For example, the gate pad 51P and the first capacitance 41 are electrically connected by the connection member 78a. For example, the source pad 52P and the first diode 31 are electrically connected by the connection member 78b. The first capacitance 41 and the first diode 31 are electrically connected by the conductive layer 78c.

For example, these electrical components may be surrounded by the mold resin 78f. For example, the gate terminal Tg, the source terminal Ts and the drain terminal Td may be exposed from the molding resin 78f.

(Fifth embodiment)
In the fifth embodiment, the diode and capacitance are formed by the material included in transistor 10T.

FIG. 14 is a schematic cross-sectional view illustrating the semiconductor device according to the fifth embodiment.
15 and 16 are schematic plan views illustrating the semiconductor device according to the fifth embodiment. 14 exemplifies the A1-A2 line cross section and the A3-A4 line cross section in FIG. In FIG. 15, a plane at the position of line Z1-Z2 in FIG. 14 is illustrated. In FIG. 16, the plane at the position of line Z3-Z4 in FIG. 14 is illustrated.

In a semiconductor device 151 illustrated in FIG. 14 , a first diode 31 and a first capacitance 41 are provided as the first circuit 30 . Semiconductor device 151 corresponds to one example of semiconductor device 120 .

As shown in FIG. 15, the semiconductor member 25 is provided with an active region 10A and a peripheral region 10P. A peripheral region 10P is provided around the active region 10A. In this example, a plurality of gate electrodes 51, a plurality of source electrodes 52, and a plurality of drain electrodes 53 are provided. These regions extend in the Y-axis direction over the active region 10A. A gate pad 51P, a source pad 52P and a drain pad 53P are provided in the peripheral region 10P. Gate pad 51</b>P is electrically connected to multiple gate electrodes 51 . Electrical connection is made by the gate wiring 71, for example. The source pad 52P is electrically connected to the multiple source electrodes 52 . Electrical connection is made by, for example, the source wiring 72 . The drain pad 53P is electrically connected to the multiple drain electrodes 53 . Electrical connection is made by, for example, the drain wiring 73 . For example, gate terminal Tg is electrically connected to gate pad 51P. For example, the source terminal Ts is electrically connected to the source pad 52P. For example, the drain terminal Td is electrically connected to the drain pad 53P.

As shown in FIG. 15, the wiring 71c is electrically connected to the gate wiring 71 by the connection member 71v. Wiring 72 c is electrically connected to source wiring 72 .

As shown in FIG. 14, a first insulating member 81 is provided between the wiring 71c and the wiring 72c. A first capacitance 41 is formed by the first insulating member 81, the wiring 71c and the wiring 72c.

As shown in FIGS. 14 and 16, part of the wiring 72c is electrically connected to the base 10s (the conductive member 15) by a connecting member 75v. The connecting member 75v corresponds to the second end 41b of the first capacitance 41. As shown in FIG. As shown in FIGS. 14 and 16, in this example, the conductive member 15 corresponds to the base 10s.

As shown in FIG. 14, part of the wiring 72c is electrically connected to the semiconductor member 25 by a connecting member 72v. A first diode 31 is formed by the connecting member 72v, the semiconductor member 25, and the source wiring 72. As shown in FIG. A connection member 72v corresponds to the first anode 31a. A source wiring 72 corresponds to the first cathode 31c.

Thus, the first diode 31 may include a semiconductor layer 25 s included in the semiconductor member 25 .

A portion 80p of the insulating member 80 (in this example, the first insulating member 81) electrically insulates the gate electrode 51 and the source electrode 52 from each other. The first capacitance 41 may include another portion 80q of such an insulating member 80 (eg, first insulating member 81).

As shown in FIG. 14, the transistor 10T of the semiconductor device 151 may further include a second insulating film 62. As shown in FIG. The second insulating film 62 is provided between part of the first insulating film 61 and the second semiconductor layer 20 in the Z-axis direction. The second insulating film 62 may function as a protective film for the semiconductor member 25, for example. The second insulating film 62 contains, for example, silicon nitride.

FIG. 17 is a schematic cross-sectional view illustrating the semiconductor device according to the fifth embodiment.
18 and 19 are schematic plan views illustrating the semiconductor device according to the fifth embodiment. 17 exemplifies the A1-A2 line cross section and the A3-A4 line cross section in FIG. In FIG. 18, a plane at the position of line Z1-Z2 in FIG. 17 is illustrated. In FIG. 19, the plane at the position of line Z3-Z4 in FIG. 17 is illustrated.

In the semiconductor device 152 illustrated in FIG. 17, a first diode 31 and a first capacitance 41 are provided as the first circuit 30 . A semiconductor device 152 corresponds to one example of the semiconductor device 121 . An example of a portion of the semiconductor device 152 that is different from the semiconductor device 151 will be described below.

As shown in FIG. 17, in the semiconductor device 152, the conductive member 15 is separated from the base 10s. For example, as shown in FIGS. 17 and 19, a gap 15g is provided between the conductive member 15 and the base 10s.

As shown in FIGS. 17 and 19, the conductive member 15 below the connecting member 75v is also separated from the base 10s by a gap 15h. In the semiconductor device 152, the capacitance Cx (see FIG. 6) can be reduced.

Also in the semiconductor device 152, the first capacitance 41 is formed by the portion 80q of the first insulating member 81, the wiring 71c and the wiring 72c. A first diode 31 is formed by the connecting member 72v, the semiconductor member 25, and the source wiring 72. As shown in FIG.

FIG. 20 is a schematic cross-sectional view illustrating the semiconductor device according to the fifth embodiment.
21 and 22 are schematic plan views illustrating the semiconductor device according to the fifth embodiment. In FIG. 20, A1-A2 line cross section, A3-A4 line cross section, and A5-A6 line cross section in FIG. 21 are illustrated. In FIG. 21, a plane at the position of line Z1-Z2 in FIG. 20 is illustrated. In FIG. 22, the plane at the position of line Z3-Z4 in FIG. 20 is illustrated.

In the semiconductor device 153 illustrated in FIG. 20, a first diode 31, a second diode 32, a first capacitance 41, and a second capacitance 42 are provided as the first circuit 30. As shown in FIG. Semiconductor device 153 corresponds to one example of semiconductor device 130 .

As shown in FIG. 20, a portion 80r of the first insulating member 81 is provided between the wiring 72c and the wiring 71c. The wiring 72d is electrically connected to the base 10s (the conductive member 15) by a connecting member 75v. A portion 80q of the insulating member 80 is provided between the source wiring 72 and the wiring 72d.

As shown in FIG. 20, the first capacitance 41 includes a portion 80r of the first insulating member 81. As shown in FIG. Second capacitance 42 includes portion 80q of first insulating member 81 . The first diode 31 includes part of the semiconductor layer 25s. The second diode 32 includes another portion of the semiconductor layer 25s.

According to the embodiments, it is possible to provide a semiconductor device with improved characteristics.

The embodiments of the present invention have been described above with reference to specific examples. However, the invention is not limited to these specific examples. For example, specific configurations of elements such as semiconductor members, semiconductor layers, electrodes, conductive members, substrates, terminals, insulating members, insulating films, and circuits included in semiconductor devices are appropriately selected from ranges known to those skilled in the art. It is included in the scope of the present invention as long as the present invention can be implemented in the same manner and the same effect can be obtained by doing so.

Any combination of two or more elements of each specific example within the technically possible range is also included in the scope of the present invention as long as it includes the gist of the present invention.

In addition, based on the semiconductor device described above as an embodiment of the present invention, all semiconductor devices that can be implemented by those skilled in the art by appropriately modifying the design also belong to the scope of the present invention as long as they include the gist of the present invention. .

In addition, within the scope of the idea of the present invention, those skilled in the art can conceive of various modifications and modifications, and it is understood that these modifications and modifications also belong to the scope of the present invention. .

While several embodiments of the invention have been described, these embodiments have been presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and modifications can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the scope of the invention described in the claims and equivalents thereof.

Reference Signs List 10 First semiconductor layer 10A Active region 10B Buffer layer 10E Carrier region 10P Peripheral region 10T Transistor 10a to 10e First to fifth partial regions 10s Substrate 15 Conductivity Members 15g, 15h Gap 20 Second semiconductor layer 21, 22 First and second semiconductor portions 25 Semiconductor member 25s Semiconductor layer 30 First circuit 30a to 30c First to Third terminal 31, 32 First and second diodes 31a, 32a First and second anodes 31c, 32c First and second cathodes 35 Voltage amplifier circuit 35a Input terminal 35b Output terminals 41, 42 First and second capacitances 41a, 41b First and second ends 42c, 42d Third and fourth ends 51 Gate electrode 51P Gate pad 52 Source electrode 52F Field plate 52P Source pad 53 Drain electrode 53P Drain pad 54Fa, 54Fb Field plate 61, 62 First and second insulating films 61p Partial 71 Gate Wiring 71c Wiring 71v Connection member 72 Source wiring 72c, 72d Wiring 72v Connection member 73 Drain wiring 75v Connection member 78a, 78b Connection member 78c Conductive layer 78e Mounting substrate 78f Mold resin 80 Insulating member 80p, 80q, 80r Partially 81, 82 First and second insulating members 110, 120 to 122, 130, 131, 140, 151 to 153 Semiconductor device C01 to C04 Capacitance Cx Electrostatic capacity D1 to D4 Diode E1 to E4 First to fourth potentials Td Drain terminal Tg Gate terminal Ts Source terminal V1 First voltage Vg... Gate voltage Vi... Input voltage Vo... Output voltage t1, t2... First and second time tm... Time

Claims (20)

A first semiconductor layer including a first partial region and including Al _x1 Ga _1-x1 N (0≦x1<1) and a second semiconductor layer including Al _x2 Ga _1-x2 N (0<x2≦1, x1<x2) a semiconductor member including a semiconductor layer;
a gate electrode;
a source electrode;
a drain electrode;
a conductive member, wherein the first partial region is between at least a portion of the conductive member and the gate electrode in a first direction;
a gate terminal electrically connected to the gate electrode;
a first circuit capable of applying a first voltage to the conductive member based on a gate voltage applied to the gate terminal;
with
The semiconductor device according to claim 1, wherein when the gate voltage changes from a positive first potential to a second potential lower than the first potential, the first voltage changes from a third potential of ground potential to a fourth negative potential. 2. The semiconductor device according to claim 1, wherein said first circuit generates said first voltage from said gate voltage. 3. The semiconductor device according to claim 1, wherein said second potential is said ground potential . 4. The semiconductor device according to claim 3, wherein said first voltage changes from said fourth potential to said third potential when said gate voltage changes from said second potential to said first potential. 4. The semiconductor device according to claim 3, wherein said first voltage maintains said fourth potential when said gate voltage changes from said second potential to said first potential. The first circuit is
a first capacitance including a first end and a second end;
a first diode comprising a first anode and a first cathode;
including
the first end is electrically connected to the gate terminal;
the second end is electrically connected to the conductive member and the first anode;
5. The semiconductor device according to claim 1, wherein said first cathode is electrically connected to said source electrode. 7. The semiconductor device according to claim 6, wherein the first capacitance of said first capacitance is ten times or more the capacitance between said conductive member and said gate electrode. 8. The semiconductor device according to claim 6, wherein said first diode includes a semiconductor layer included in said semiconductor member. further comprising an insulating member,
a part of the insulating member electrically insulates the gate electrode and the source electrode;
9. The semiconductor device according to claim 6, wherein said first capacitance includes another portion of said insulating member. The first circuit is
a first capacitance including a first end and a second end;
a second capacitance including a third end and a fourth end;
a first diode comprising a first anode and a first cathode;
a second diode comprising a second anode and a second cathode;
including
the first end is electrically connected to the gate terminal;
the second end is electrically connected to the first anode and the second cathode;
the first cathode is electrically connected to the source electrode;
the second anode is electrically connected to the conductive member and the third end;
6. The semiconductor device according to claim 1, wherein said fourth end is electrically connected to said source electrode. The first circuit is
a first capacitance including a first end and a second end;
a second capacitance including a third end and a fourth end;
a first diode comprising a first anode and a first cathode;
a second diode comprising a second anode and a second cathode;
a voltage amplifier circuit including an input end and an output end;
including
the input terminal is electrically connected to the gate terminal;
the output end is electrically connected to the first end;
the second end is electrically connected to the first anode and the second cathode;
the first cathode is electrically connected to the source electrode;
the second anode is electrically connected to the conductive member and the third end;
6. The semiconductor device according to claim 1, wherein said fourth end is electrically connected to said source electrode. 12. The semiconductor device according to claim 11, wherein the second capacitance of said second capacitance is ten times or more the capacitance between said conductive member and said gate electrode. the conductive member extends along a plane intersecting the first direction;
a portion of the first semiconductor layer is between a portion of the conductive member and the source electrode in the first direction;
13. The semiconductor device according to claim 1, wherein another part of said first semiconductor layer is between another part of said conductive member and said drain electrode in said first direction. 14. The semiconductor device according to claim 13, wherein said conductive member is at least part of a silicon substrate. further comprising a base;
a portion of the first semiconductor layer is between a portion of the substrate and the source electrode in the first direction;
another portion of the first semiconductor layer between another portion of the substrate and the drain electrode in the first direction;
15. The semiconductor device according to claim 1, wherein said conductive member is separated from said base. a second direction from the source electrode to the drain electrode intersects the first direction;
16. The position of the gate electrode in the second direction is between the position of the source electrode in the second direction and the position of the drain electrode in the second direction. 1. The semiconductor device according to 1. the first semiconductor layer includes a second partial region, a third partial region, a fourth partial region and a fifth partial region;
a direction from the second partial region to the source electrode along the first direction,
a direction from the third partial region to the drain electrode is along the first direction,
the first partial region is between the second partial region and the third partial region in the second direction;
the fourth partial region is between the second partial region and the first partial region in the second direction;
the fifth partial region is between the first partial region and the third partial region in the second direction;
the second semiconductor layer includes a first semiconductor portion and a second semiconductor portion;
a direction from the fourth partial region to the first semiconductor portion along the first direction,
17. The semiconductor device according to claim 16, wherein a direction from said fifth partial region to said second semiconductor portion is along said first direction. further comprising a first insulating film;
18. The semiconductor device according to claim 17, wherein at least part of said first insulating film is between said first partial region and said gate electrode. 19. The semiconductor device according to claim 1, wherein a direction from at least part of said gate electrode to at least part of said second semiconductor layer is perpendicular to said first direction. 15. The semiconductor device according to claim 1, wherein said semiconductor device is normally off.

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