[go: up one dir, main page]

JP7011806B2 - Dielectric material evaluation device - Google Patents

Dielectric material evaluation device Download PDF

Info

Publication number
JP7011806B2
JP7011806B2 JP2017195997A JP2017195997A JP7011806B2 JP 7011806 B2 JP7011806 B2 JP 7011806B2 JP 2017195997 A JP2017195997 A JP 2017195997A JP 2017195997 A JP2017195997 A JP 2017195997A JP 7011806 B2 JP7011806 B2 JP 7011806B2
Authority
JP
Japan
Prior art keywords
dielectric material
evaluation device
relative permittivity
support substrate
side port
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2017195997A
Other languages
Japanese (ja)
Other versions
JP2019070549A (en
Inventor
亮 坂巻
雅弘 堀部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
National Institute of Advanced Industrial Science and Technology AIST
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Institute of Advanced Industrial Science and Technology AIST filed Critical National Institute of Advanced Industrial Science and Technology AIST
Priority to JP2017195997A priority Critical patent/JP7011806B2/en
Publication of JP2019070549A publication Critical patent/JP2019070549A/en
Application granted granted Critical
Publication of JP7011806B2 publication Critical patent/JP7011806B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Measurement Of Resistance Or Impedance (AREA)
  • Control Of Motors That Do Not Use Commutators (AREA)
  • Waveguides (AREA)

Description

本発明は、チタン酸バリウムに代表される半導体セラミックス等、誘電体材料の誘電特性を計測するための誘電体材料評価装置に関する。 The present invention relates to a dielectric material evaluation device for measuring the dielectric properties of a dielectric material such as semiconductor ceramics represented by barium titanate.

スマートフォンのような移動体通信機器の小型化、高性能化に伴い、マイクロ波回路構成用の誘電体基板の物性値、特に比誘電率といった誘電定数の高精度な計測の必要性が急速に高まっている。
特許文献1には、第1、第2の誘電体基板にリング状の共振器を一体的に形成し、両者の共振周波数、無負荷Q値を計測することにより、誘導体基板の電磁気的物性値を求めることが記載されている。
特許文献2には、誘導体支持基板上にリング状の間隙により内側導体と外側導体に分割された導体膜と、この導体膜の上面、下面に積層された誘導体薄膜を設け、内側導体、外側導体の一方から他方に向けて電界を発生する共振モードを得ることにより比誘電率や誘導正接の計測を高精度化することが記載されている。
With the miniaturization and higher performance of mobile communication devices such as smartphones, the need for highly accurate measurement of the physical characteristics of dielectric substrates for microwave circuit configurations, especially the dielectric constants such as the relative permittivity, has rapidly increased. ing.
In Patent Document 1, a ring-shaped resonator is integrally formed on the first and second dielectric substrates, and the resonance frequency and no-load Q value of both are measured to obtain the electromagnetic property values of the derivative substrate. It is stated that the request is made.
In Patent Document 2, a conductor film divided into an inner conductor and an outer conductor by a ring-shaped gap and a derivative thin film laminated on the upper surface and the lower surface of the conductor film are provided on a derivative support substrate, and the inner conductor and the outer conductor are provided. It is described that the measurement of the relative permittivity and the induced tangent is made more accurate by obtaining the resonance mode in which an electric field is generated from one to the other.

特許第4373902号公報Japanese Patent No. 4373902 特許第4540596号公報Japanese Patent No. 4540596

しかし、特許文献1、2の計測装置では、予め、専用のリング状共振器を備えた計測対象を作成し、リング共振を発生させるための実験条件を模索する必要があり、時間やコストを要するばかりでなく、高精度な計測結果を得ることができないといった問題があった。 However, in the measuring devices of Patent Documents 1 and 2, it is necessary to prepare a measurement target equipped with a dedicated ring-shaped resonator in advance and search for experimental conditions for generating the ring resonance, which requires time and cost. Not only that, there was a problem that it was not possible to obtain highly accurate measurement results.

これに対する解決手段として、図1に示すように、リング共振器aの上に計測対象物である誘電体材料(DUT)を設置することで、実効比誘電率を変化させ、共振周波数の変化をみる手法が考えられる。
しかしながら、計測対象物の誘電率が高い場合、特に比誘電率が20以上の場合には、リング共振器aのリング回路における実効比誘電率が大きく変化するため、特性インピーダンスのずれによって、式(1)に従って回路での反射の影響が大きくなり、精度の高い計測ができず、比誘電率の評価値に50%程度の誤差が発生する場合もあった。

Figure 0007011806000001
なお、Γは反射係数、Z0は線路の特性インピーダンス(通常50Ω)、Zは誘電体設置部の特性インピーダンスである。 As a solution to this, as shown in FIG. 1, by installing a dielectric material (DUT) as a measurement target on the ring resonator a, the effective relative permittivity is changed and the resonance frequency is changed. A method of seeing is conceivable.
However, when the permittivity of the object to be measured is high, especially when the relative permittivity is 20 or more, the effective relative permittivity in the ring circuit of the ring resonator a changes significantly. According to 1), the influence of reflection in the circuit becomes large, high-precision measurement cannot be performed, and an error of about 50% may occur in the evaluation value of the relative permittivity.
Figure 0007011806000001
Γ is the reflection coefficient, Z 0 is the characteristic impedance of the line (usually 50 Ω), and Z is the characteristic impedance of the dielectric installation portion.

そこで、本発明の目的は、小型で、しかも比誘電率が高い計測対象物であっても、その実効比誘電率、比誘電率を正確に簡便に計測可能とすることにある。 Therefore, an object of the present invention is to make it possible to accurately and easily measure the effective relative permittivity and the relative permittivity even for a measurement object having a small size and a high relative permittivity.

上記の課題を解決するため、本発明の比誘電率計測装置は、支持基板と、支持基板上に形成された少なくともの2本の導線路であって、互いに交差し、一方に計測対象の基板が載置されるとともに、他方が計測対象の基板から隔離されている少なくともの2本の導線路と、他方の導線路の両端に設けられた、プローブが接続される入力側ポート及び出力側ポートとから構成される。 In order to solve the above problems, the relative permittivity measuring device of the present invention is a support substrate and at least two conductors formed on the support substrate, which intersect with each other and one of which is a substrate to be measured. At least two conductors, the other of which is isolated from the board to be measured, and the input and output ports provided at both ends of the other conductor to which the probe is connected. It is composed of and.

本発明によれば、小型で誘電率が高い計測対象物であっても、支持基板上に形成された導線路の一方に、他方の導線路から隔離されるよう配置するだけで、比誘電率を正確かつ簡便に計測・評価することが可能となる。 According to the present invention, even if the object is small and has a high dielectric constant, the relative permittivity is simply arranged on one of the conductors formed on the support substrate so as to be separated from the other conductor. Can be measured and evaluated accurately and easily.

図1は、リング共振器a上にDUTを設置することで、実効比誘電率を変化させ、共振周波数の変化を計測する場合の問題点を示す図である。FIG. 1 is a diagram showing a problem in measuring a change in resonance frequency by changing an effective relative permittivity by installing a DUT on a ring resonator a. 図2は、実施例1の基本構成を示す図である。FIG. 2 is a diagram showing a basic configuration of the first embodiment. 図3は、入力側ポート3aから出力側ポート3bに到る高周波信号のルートを示す図である。FIG. 3 is a diagram showing a route of a high frequency signal from the input side port 3a to the output side port 3b. 図4は、実施例2によるDUT4の支持構造を示す図である。FIG. 4 is a diagram showing a support structure of the DUT 4 according to the second embodiment. 図5は、実施例3に基づいてコプレーナ線路を採用した場合の利点を示す図である。FIG. 5 is a diagram showing advantages when a coplanar line is adopted based on the third embodiment. 図6は、実施例4に基づく回路構造を示す図である。FIG. 6 is a diagram showing a circuit structure based on the fourth embodiment. 図7は、本発明に基づく実験装置の概要を示す図である。FIG. 7 is a diagram showing an outline of an experimental device based on the present invention. 図8は、その実験結果を示す図である。FIG. 8 is a diagram showing the experimental results.

以下、図面を用いて本発明の実施例を説明する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[実施例1]
図2を用いて、実施例の基本構成を説明する。
支持基板1の表面には、水平線路部2aと、その中央部から垂直方向に延びる垂直線路部2bとからなるT字型導線路2が形成されている。なお、支持基板1は、例えばアルミナからなり、T字型線路2は金メッキなどにより形成されている。
水平線路部2aの両端にはプローブが電気的に接続される入力側ポート3a、出力側ポート3bが設けられており、垂直線路部2bには水平線路部2aに接触しないよう、計測対象物DUT4が載置される。
ここで、DUT4がない状態(大気が誘電体)と比べて、誘電体材料であるDUT4がT字型導線線路2の水平線路部2a上に載置されることによって、回路の実効比誘電率が変化する。これにより、波長短縮効果により高周波信号の波長が変化する。
すなわち、図3に示すように、入力側ポート3aから入力された高周波信号は、水平線路部2aを通って直接出力側ポート3bに到るものと、一部DUT4が載置され、波長短縮効果を受ける領域を含む垂直線路部2bを経由して出力側ポート3bに到るものとに分断される。
そこで、出力側ポート3bから出力される高周波を計測してDUT4の有無による共振周波数の変化量を評価することにより、下記の式(2)、(3)を用いて、DUTの実効比誘電率を算出することができる。
L=(2n-1)λ/4 ・・・・・・(2)
λ=λ0/(εeff) 1/2 ・・・・・・(3)
ただし、Lは垂直部線路長、λは誘電体による波長短縮後の波長、λ0は入射信号の波長、εeffは実効比誘電率である。
[Example 1]
The basic configuration of the embodiment will be described with reference to FIG.
On the surface of the support substrate 1, a T-shaped conductor line 2 including a horizontal line portion 2a and a vertical line portion 2b extending in the vertical direction from the central portion thereof is formed. The support substrate 1 is made of, for example, alumina, and the T-shaped line 2 is formed by gold plating or the like.
An input side port 3a and an output side port 3b to which a probe is electrically connected are provided at both ends of the horizontal line portion 2a, and the vertical line portion 2b is provided with a measurement object DUT4 so as not to come into contact with the horizontal line portion 2a. Is placed.
Here, as compared with the state without DUT4 (the atmosphere is a dielectric), the DUT4, which is a dielectric material, is placed on the horizontal line portion 2a of the T-shaped conductor line 2, so that the effective relative permittivity of the circuit is increased. Changes. As a result, the wavelength of the high-frequency signal changes due to the wavelength shortening effect.
That is, as shown in FIG. 3, the high-frequency signal input from the input-side port 3a directly reaches the output-side port 3b through the horizontal line portion 2a, and a part of the DUT4 is mounted, which has a wavelength shortening effect. It is divided into those reaching the output side port 3b via the vertical line portion 2b including the receiving region.
Therefore, by measuring the high frequency output from the output side port 3b and evaluating the amount of change in the resonance frequency depending on the presence or absence of the DUT 4, the effective relative permittivity of the DUT is used using the following equations (2) and (3). Can be calculated.
L = (2n-1) λ / 4 ... (2)
λ = λ 0 / (ε eff) 1/2・ ・ ・ ・ ・ ・ (3)
However, L is the vertical line length, λ is the wavelength after the wavelength is shortened by the dielectric, λ 0 is the wavelength of the incident signal, and ε eff is the effective relative permittivity.

一般的には、T字型導線路2により構成されるT型フィルター回路の共振は、式(2)を満たす波長(周波数)で発生するが、T字型導線路2とDUT4間の隙間、T字型導線路2におけるDUT4の配置のずれなどの外乱があるため、必ずしも式(2)により正確な実効比誘電率εeffを得ることができない場合がある。
そこで本実施例では、比誘電率が既知の標準試料を用いて得られた検量線と共振周波数の計測結果に基づいて比誘電率の評価値を算出し、その結果が既知の比誘電率とどの程度ズレているかに基づいて評価を行うようにしている。
Generally, the resonance of the T-type filter circuit composed of the T-shaped conductor 2 occurs at a wavelength (frequency) satisfying the equation (2), but the gap between the T-shaped conductor 2 and the DUT 4 Since there is a disturbance such as a deviation in the arrangement of the DUT 4 in the T-shaped conductor line 2, it may not always be possible to obtain an accurate effective relative permittivity ε eff by the equation (2).
Therefore, in this embodiment, the evaluation value of the relative permittivity is calculated based on the measurement result of the calibration line and the resonance frequency obtained by using the standard sample having the known relative permittivity, and the result is the known relative permittivity. The evaluation is based on how much the deviation is.

なお、水平線路部2aと垂直線路部2bに載置されたDUT4との間隙dは、相互作用による寄生インピーダンスの影響を防止するため、最小でも1mm程度の間隙が必要である。
また、この実施例では、DUT4の中心線を垂直線路部2bに合わせるとともに、上辺が水平線路部2aと平行になるように載置しているが、DUT4が垂直線路部2bを覆っており、上記のとおり、水平線路部2aとの間隙が所定値以上であれば、DUT4の中心線が垂直線路部2bに対して多少傾斜していても計測精度に大きな影響はない。ただし、上述のように検量線を用いた補正を行う場合には、計測精度を一定に維持するため、水平線路部2a、垂直線路部2bに対する標準試料と計測対象のDUT4の配置は常時同一とし、一定に維持する必要がある。
The gap d between the horizontal line portion 2a and the DUT 4 placed on the vertical line portion 2b needs to have a gap of at least about 1 mm in order to prevent the influence of the parasitic impedance due to the interaction.
Further, in this embodiment, the center line of the DUT 4 is aligned with the vertical line portion 2b and placed so that the upper side is parallel to the horizontal line portion 2a, but the DUT 4 covers the vertical line portion 2b. As described above, as long as the gap with the horizontal line portion 2a is equal to or greater than a predetermined value, even if the center line of the DUT 4 is slightly inclined with respect to the vertical line portion 2b, the measurement accuracy is not significantly affected. However, when the correction using the calibration curve is performed as described above, the arrangement of the standard sample and the DUT4 to be measured is always the same for the horizontal line portion 2a and the vertical line portion 2b in order to maintain the measurement accuracy constant. , Need to be kept constant.

[実施例2]
DUT4と、支持基板1上のT字型導線路2との間に、T字型導線路2の厚さ、設置時の押し付け圧、両者の表面粗さなどに起因した空隙(エアギャップ)は計測誤差の原因となる。
そこで、本実施例では、図4に示すように、台座5に支持基板1を支持する治具6を設け、支持基板1に貫通孔7a、7bを形成する。DUT4を、貫通孔7a、7bを覆うように載置し、治具6により形成される空間を真空引きし、その吸引圧を一定にすることで、DUT4が支持基板1に密着した状態としてエアギャップを限りなく零に近い一定の値に維持することで計測誤差を最小限にすることができる。
[Example 2]
There is a gap (air gap) between the DUT 4 and the T-shaped conductor 2 on the support substrate 1 due to the thickness of the T-shaped conductor 2, the pressing pressure at the time of installation, the surface roughness of both, and the like. It causes measurement error.
Therefore, in this embodiment, as shown in FIG. 4, a jig 6 for supporting the support substrate 1 is provided on the pedestal 5, and through holes 7a and 7b are formed in the support substrate 1. The DUT 4 is placed so as to cover the through holes 7a and 7b, the space formed by the jig 6 is evacuated, and the suction pressure thereof is kept constant so that the DUT 4 is in close contact with the support substrate 1 and air is applied. Measurement error can be minimized by maintaining the gap at a constant value as close to zero as possible.

[実施例3]
本実施例では実施例2に加え、T字型導線路2に2本のスロットを備えたコプレーナ線路を採用することで、より高精度な実効比誘電率の解析を可能とする。
すなわち、図5に示すように、実施例1や実施例2のように、T字型導線路2にマイクロストリップ線路を採用した場合の実効比誘電率εeffは、下記の式(4)により算出する必要がある。なお、式中、εrは計測対象の誘電体材料である基板の比誘電率、hは基板の厚さ、WはT字型導線路2の線路幅である。

Figure 0007011806000002
これに対し、コプレーナ線路を採用すると、図5に示したとおり電界は上部誘電体と基板に均一に分布する。そのため、下記の式(5)に基づき、誤差の原因となるパラメータが少ない、シンプルな演算式により実効比誘電率を高精度に解析することが可能となる。
Figure 0007011806000003
また、マイクロストリップ線路では線路の厚み分だけ支持基板1とDUT4の間に隙間ができるため、実施例2において貫通孔を設けて真空引きした場合もよりDUT4とT字型導線路2との間に空隙ができやすくなる。コプレーナ線路ならばより安定的に吸着をさせることができるため、マイクロストリップ線路よりも安定的な空隙を得ることが可能となる。 [Example 3]
In this embodiment, in addition to the second embodiment, by adopting a coplanar line having two slots in the T-shaped conductor line 2, it is possible to analyze the effective relative permittivity with higher accuracy.
That is, as shown in FIG. 5, the effective relative permittivity ε eff when the microstrip line is adopted for the T-shaped conductor line 2 as in the first and second embodiments is calculated by the following equation (4). Need to calculate. In the equation, ε r is the relative permittivity of the substrate which is the dielectric material to be measured, h is the thickness of the substrate, and W is the line width of the T-shaped conductor line 2.
Figure 0007011806000002
On the other hand, when the coplanar line is adopted, the electric field is uniformly distributed on the upper dielectric and the substrate as shown in FIG. Therefore, based on the following equation (5), it is possible to analyze the effective relative permittivity with high accuracy by a simple arithmetic expression with few parameters that cause an error.
Figure 0007011806000003
Further, in the microstrip line, a gap is created between the support substrate 1 and the DUT 4 by the thickness of the line. Therefore, even when a through hole is provided and a vacuum is drawn in the second embodiment, the space between the DUT 4 and the T-shaped conductor line 2 It becomes easy to create a gap in the railroad track. Since the coplanar line can be adsorbed more stably, it is possible to obtain a more stable void than the microstrip line.

[実施例4]
本実施例では、図6に示すように、実施例3に示したコプレーナ線路構造において、線路2bの先にインダクタンスを接続した回路構造をしている。線路のキャパシタンスC1と、インダクタンスLとその先に直列接続したキャパシタンスC2の並列接続した等価回路を想定する。この等価回路においては2つの共振が得られ、それぞれの共振周波数をωr1、ωr2とする。この時、ωr1はC1を含まない。線路のキャパシタンスC1はその上に設置されるDUT4の設置位置によって変化してしまう。すなわち、線路2b中でDUT4によって覆われる線路長によってC1の値は変化する。したがって、C1を含まないωr1を用いることによって、支持基板1におけるDUT4の位置依存性を低減できる。
[Example 4]
In this embodiment, as shown in FIG. 6, the coplanar line structure shown in the third embodiment has a circuit structure in which an inductance is connected to the tip of the line 2b. Assume an equivalent circuit in which the capacitance C 1 of the line and the capacitance C 2 connected in series to the inductance L and the inductance L are connected in parallel. In this equivalent circuit, two resonances are obtained, and the resonance frequencies are ω r1 and ω r2 , respectively. At this time, ω r 1 does not include C 1 . The capacitance C 1 of the line changes depending on the installation position of the DUT 4 installed on the line capacitance C 1. That is, the value of C 1 changes depending on the line length covered by the DUT 4 in the line 2b. Therefore, by using ω r1 that does not contain C 1 , the position dependence of DUT 4 on the support substrate 1 can be reduced.

[実施例5]
本実施例では、入力信号を入力側ポート3aから入射してから同ポートに戻る信号(反射係数)の大きさを時間領域で解析する、時間領域(TD)解析を採用する。各時間における信号量を解析することで、回路上のどの位置に反射点があるか解析することができ、DUT4直下の回路を通った信号が小さければ、共振周波数のシフトが小さくなるので、本実施例では、T字垂直部の奥まで通った信号(実際にDUT直下の回路を通った信号)の大きさを用いて、共振周波数を補正する。
[Example 5]
In this embodiment, a time domain (TD) analysis is adopted in which the magnitude of the signal (reflection coefficient) that is incident from the input side port 3a and then returns to the same port is analyzed in the time domain. By analyzing the signal amount at each time, it is possible to analyze at which position on the circuit the reflection point is located, and if the signal passing through the circuit directly under DUT4 is small, the shift of the resonance frequency becomes small. In the embodiment, the resonance frequency is corrected by using the magnitude of the signal that has passed through the depth of the T-shaped vertical portion (the signal that has actually passed through the circuit directly under the DUT).

ここで、本発明を用いた比誘電率についての実験およびその評価結果を図7、図8を用いて説明する。本実験では、図7に示すようにベクトルネットワークアナライザE8361Aと1mm周波数拡張ユニットを用いた。測定周波数は10MHz~110GHz、IFバンドワイドは100Hz、ソースパワーは-17dBmとした。
公称比誘電率εr,normが9.8,38,110の材料をDUT4として設置し、透過係数を計測し得られる複数の共振のうち、最も低周波帯における共振周波数を第一共振周波数fr,1st,εrとした。
次に反射係数のTD解析を行ない、0.1-0.3nsecの範囲で得られる極大値Aεrを得る。また、DUT4を設置しない場合のfr,1st,1及びA1も得る。空気の比誘電率は1であるため、比誘電率1の評価結果に相当する。
そして、式(6)に基づいて修正した共振周波数fr,1st,εr,modを得る。
r,1st,εr,mod=fr,1st,εr×Aεr/A1 (6)
得られたfr,1st,εr,modを公称比誘電率の平方根√εr,normに対してプロットし線形近似により検量線(y=Ax+B)を得る。
そして、下記の式(7)によって比誘電率の評価値εr、evalを得る。
εr,eval=((fr,1st,εr,mod‐b)/a)2 (7)
εr,evalとεr,normの差分を評価誤差として取り扱ったところ、図8に示すように比誘電率38のDUTでも±1の範囲で評価が可能であった。
Here, an experiment on a relative permittivity using the present invention and an evaluation result thereof will be described with reference to FIGS. 7 and 8. In this experiment, as shown in FIG. 7, a vector network analyzer E8631A and a 1 mm frequency expansion unit were used. The measurement frequency was 10 MHz to 110 GHz, the IF bandwidth was 100 Hz, and the source power was -17 dBm.
A material having a nominal relative permittivity ε r, norm of 9.8, 38, 110 is installed as DUT4, and among a plurality of resonances obtained by measuring the transmission coefficient, the resonance frequency in the lowest frequency band is the first resonance frequency f. It was set to r, 1st, and εr .
Next, the TD analysis of the reflectance coefficient is performed to obtain the maximum value A εr obtained in the range of 0.1-0.3 nsec. In addition, fr , 1st, 1 and A 1 when DUT 4 is not installed are also obtained. Since the relative permittivity of air is 1, it corresponds to the evaluation result of the relative permittivity 1.
Then, the resonance frequencies fr, 1st, εr, and mod modified based on the equation (6) are obtained.
fr, 1st, εr, mod = fr , 1st, εr × A εr / A 1 (6)
The obtained fr , 1st, εr, mod are plotted against the square root √ε r, norm of the nominal relative permittivity, and a calibration curve (y = Ax + B) is obtained by linear approximation.
Then, the evaluation values ε r and eval of the relative permittivity are obtained by the following equation (7).
ε r, eval = ((f r, 1st, εr, mod −b) / a) 2 (7)
When the difference between ε r, eval and ε r, norm was treated as an evaluation error, evaluation was possible within a range of ± 1 even with a DUT having a relative permittivity of 38 as shown in FIG.

以上説明したように、本発明によれば、小型で誘電率が高い計測対象物であっても、支持基板上に形成された導線路の一方に、他方の導線路から隔離されるよう配置するという簡便な操作で基板の比誘電率を正確に計測することができるので、半導体製造工程などで広く採用されることが期待できる。 As described above, according to the present invention, even a small object to be measured having a high dielectric constant is arranged on one of the conductors formed on the support substrate so as to be isolated from the other conductor. Since the relative permittivity of the substrate can be accurately measured by such a simple operation, it can be expected to be widely adopted in the semiconductor manufacturing process and the like.

1・・・支持基板
2・・・T字型導線路
2a・・・水平線路部
2b・・・垂直線路部
3a・・・入力側ポート
3b・・・出力側ポート
4・・・DUT
5・・・台座
6・・・治具
7a、7b・・・貫通孔
1 ... Support board 2 ... T-shaped lead line 2a ... Horizontal line part 2b ... Vertical line part 3a ... Input side port 3b ... Output side port 4 ... DUT
5 ... Pedestal 6 ... Jigs 7a, 7b ... Through holes

Claims (6)

支持基板と、
前記支持基板上に形成された2本の導線路であって、互いに交差し、一方に計測対象の誘電体材料が載置されるとともに、他方が前記誘電体材料から隔離されている導線路と、
前記他方の導線路の両端に設けられた、プローブが接続される入力側ポート及び出力側ポートとを備えていることを特徴とする誘電体材料評価装置。
Support board and
Two conductors formed on the support substrate, which intersect with each other, on which a dielectric material to be measured is placed, and on the other, which is isolated from the dielectric material. ,
A dielectric material evaluation device provided at both ends of the other conductor, comprising an input side port and an output side port to which a probe is connected.
前記導線路に対し、予め比誘電率が既知である誘電体材料を載置して求めた検量線に基づいて、計測対象の誘電体材料に対する計測結果の評価値を算出する算出手段を備えていることを特徴とする請求項1に記載された誘電体材料評価装置。 A calculation means for calculating the evaluation value of the measurement result for the dielectric material to be measured is provided based on the calibration curve obtained by placing a dielectric material having a known relative permittivity on the conductor. The dielectric material evaluation device according to claim 1, wherein the dielectric material is evaluated. 台座上に配置した治具により前記支持基板を支持させ、該支持基板に形成した貫通孔を介して計測対象の誘電体材料を吸着することにより、前記支持基板との間隙を均一化することを特徴とする請求項1または請求項2に記載された誘電体材料評価装置。 The support substrate is supported by a jig arranged on the pedestal, and the dielectric material to be measured is adsorbed through the through hole formed in the support substrate to make the gap with the support substrate uniform. The dielectric material evaluation apparatus according to claim 1 or 2. 前記導線路を2本のスロットを備えたコプレーナ線路としたことを特徴とする請求項1から請求項3のいずれか1項に記載された誘電体材料評価装置。 The dielectric material evaluation device according to any one of claims 1 to 3, wherein the conductor is a coplanar line having two slots. 前記コプレーナ線路のキャパシタンスC1を、インダクタンスLとその先に直列接続したキャパシタンスC2に対し並列接続した等価回路としたことを特徴とする請求項4に記載された誘電体材料評価装置。 The dielectric material evaluation device according to claim 4, wherein the capacitance C1 of the coplanar line is an equivalent circuit connected in parallel to the inductance L and the capacitance C2 connected in series to the inductance L. 前記入力側ポートから入射し、この入力側ポートに戻る信号の大きさを時間領域で解析し、計測対象の誘電体材料に対する計測結果の評価値を算出する算出を補正する補正手段を備えていることを特徴とする請求項1から請求項5のいずれか1項に記載された誘電体材料評価装置。 It is provided with a correction means for correcting the calculation of calculating the evaluation value of the measurement result for the dielectric material to be measured by analyzing the magnitude of the signal incident from the input side port and returning to the input side port in the time domain. The dielectric material evaluation device according to any one of claims 1 to 5, wherein the dielectric material evaluation device is characterized by the above.
JP2017195997A 2017-10-06 2017-10-06 Dielectric material evaluation device Active JP7011806B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2017195997A JP7011806B2 (en) 2017-10-06 2017-10-06 Dielectric material evaluation device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2017195997A JP7011806B2 (en) 2017-10-06 2017-10-06 Dielectric material evaluation device

Publications (2)

Publication Number Publication Date
JP2019070549A JP2019070549A (en) 2019-05-09
JP7011806B2 true JP7011806B2 (en) 2022-01-27

Family

ID=66441169

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017195997A Active JP7011806B2 (en) 2017-10-06 2017-10-06 Dielectric material evaluation device

Country Status (1)

Country Link
JP (1) JP7011806B2 (en)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000101301A (en) 1998-07-24 2000-04-07 Murata Mfg Co Ltd High frequency circuit device and communication equipment
JP2004536287A (en) 2001-04-11 2004-12-02 キョウセラ ワイヤレス コーポレイション Low loss tunable ferroelectric device and method of characterization
JP2004349342A (en) 2003-05-20 2004-12-09 Shin Etsu Handotai Co Ltd Method for measuring capacitance of depletion layer
JP2005308716A (en) 2004-03-24 2005-11-04 Kyocera Corp Method for measuring electromagnetic properties
JP2006311491A (en) 2005-03-29 2006-11-09 Kyocera Corp Ring resonator and dielectric property measurement method of dielectric thin film using the same
JP2007198975A (en) 2006-01-27 2007-08-09 Kyocera Corp Open-ended half-wave resonator and dielectric constant measurement method using the same
JP2009068864A (en) 2007-09-10 2009-04-02 Sony Corp Transmission line for dielectric measurement, and dielectric measuring device equipped with the transmission line
JP2014174156A (en) 2013-03-11 2014-09-22 Keycom Corp Dielectric property measuring device

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000101301A (en) 1998-07-24 2000-04-07 Murata Mfg Co Ltd High frequency circuit device and communication equipment
JP2004536287A (en) 2001-04-11 2004-12-02 キョウセラ ワイヤレス コーポレイション Low loss tunable ferroelectric device and method of characterization
JP2004349342A (en) 2003-05-20 2004-12-09 Shin Etsu Handotai Co Ltd Method for measuring capacitance of depletion layer
JP2005308716A (en) 2004-03-24 2005-11-04 Kyocera Corp Method for measuring electromagnetic properties
JP2006311491A (en) 2005-03-29 2006-11-09 Kyocera Corp Ring resonator and dielectric property measurement method of dielectric thin film using the same
JP2007198975A (en) 2006-01-27 2007-08-09 Kyocera Corp Open-ended half-wave resonator and dielectric constant measurement method using the same
JP2009068864A (en) 2007-09-10 2009-04-02 Sony Corp Transmission line for dielectric measurement, and dielectric measuring device equipped with the transmission line
JP2014174156A (en) 2013-03-11 2014-09-22 Keycom Corp Dielectric property measuring device

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Daniel I.Amey, et al.,Microwave Properties of Ceramic Materials,1991 Proceedings 41st Electronic Components and Technology Conference ,1991年,p.267-p.272
Ryo Sakamaki,Demonstration of in-situ dielectric permittivity measurement using precision probing technique,Japanese Journal of Applied Physics,Vol.57 Number115,2018年08月28日,11UE01-1 - 11UE01-6

Also Published As

Publication number Publication date
JP2019070549A (en) 2019-05-09

Similar Documents

Publication Publication Date Title
EP1377839A1 (en) Low-loss tunable ferro-electric device and method of characterization
US8975988B1 (en) Impedance tuner using dielectrically filled airline
Podstrigaev et al. Technique for tuning microwave strip devices
JP7011806B2 (en) Dielectric material evaluation device
JP6510263B2 (en) Complex permittivity measurement method
JP6288447B2 (en) High frequency conductivity measuring apparatus and high frequency conductivity measuring method
US2534437A (en) Ultra high frequency transmission line system
JP7065502B2 (en) Dielectric material evaluation device
JP7370060B2 (en) Evaluation method, evaluation device, and evaluation system for dielectric materials
JP2004117220A (en) Dielectric constant measurement method
JP4373902B2 (en) Method for measuring electromagnetic properties
JP2008241468A (en) Measuring method of electromagnetic characteristics
JP4157387B2 (en) Electrical property measurement method
JP4530951B2 (en) Dielectric constant measurement method and open-ended half-wavelength coplanar line resonator
JP4776382B2 (en) Dielectric constant measurement method
JP4467418B2 (en) Dielectric constant measurement method
JP7650749B2 (en) Microstrip line, exposure mask, and method for evaluating microstrip line
JP4485985B2 (en) Dielectric property measuring method and conductivity measuring method
JP5451509B2 (en) Thickness measurement method
US9410997B2 (en) Crystal unit and method of measuring characteristics of the crystal unit
KR101541527B1 (en) Apparatus for Measurement of Permittivity Capable of Measuring for Permittivity of high temperature liquid Material
JP2007010522A (en) Through standard board and line standard board
JP4698244B2 (en) Method for measuring electromagnetic properties
US12265109B2 (en) Device and method for measuring microwave surface resistance of dielectric conductor deposition interface
RU2796206C1 (en) Method for measuring frequency dependence of phase velocities of in-phase and anti-phase waves in coupled lines with unbalanced electromagnetic coupling

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20200622

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20210428

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20210609

RD03 Notification of appointment of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7423

Effective date: 20210618

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20210728

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A821

Effective date: 20210618

RD03 Notification of appointment of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7423

Effective date: 20210618

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20211221

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20220107

R150 Certificate of patent or registration of utility model

Ref document number: 7011806

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250