JP6972212B2 - Display panel - Google Patents

Description

Embodiments of the present invention relate to display panels.

As a display panel, for example, a liquid crystal display panel is known. Liquid crystal display panels are used in the field of information equipment centered on computers and the field of video equipment centered on television receivers and the like. Generally, a liquid crystal display panel has an array substrate, a facing substrate, and a liquid crystal layer sandwiched between the two substrates. The array substrate has an organic insulating film and the like.

The array substrate and the facing substrate have a display area. As a plurality of spacers, for example, a plurality of columnar spacers are arranged between the array substrate and the facing substrate, and the gap between the two substrates is kept constant. The array substrate and the facing substrate are joined by a rectangular frame-shaped sealing material arranged in a frame region outside the display region of both substrates.

Japanese Unexamined Patent Publication No. 2001-337334

By the way, the organic insulating film of the array substrate has a property of permeating moisture. Therefore, the organic insulating film outside the wiring in the frame region of the array substrate is removed over the entire circumference with a width of 200 to 300 μm, and the sealing material is formed in the removed region. Since the sealing material has a property of blocking moisture, it is possible to block the infiltration of moisture into the wiring inside the liquid crystal display panel. This eliminates the concern that the wiring will corrode.

When the organic insulating film is removed as described above, the narrowing of the frame is hindered. Therefore, in order to narrow the frame, it is conceivable to remove the organic insulating film on the wiring in the frame region instead of the organic insulating film outside the wiring in the frame region. However, in this case, the wiring in the frame region is not protected by the organic insulating film and is exposed. Therefore, there is a high possibility that static electricity will enter the wiring and destroy the peripheral circuits of the wiring. That is, the withstand voltage of ESD (Electro Static Discharge) decreases, and the possibility that the insulating film causes ESD destruction increases.
The present invention has been made in view of the above points, and an object of the present invention is to provide a display panel capable of suppressing electrostatic breakdown of a drive circuit.

The display panel according to one embodiment is
A display area surrounds the display area, a peripheral area which the driver circuit is formed, an inorganic insulating film located in the peripheral region, located in the peripheral region, the clock distribution you supply a clock signal to the driving circuit and line, located in the peripheral region, and a power supply wiring for supplying a power signal to the drive circuit, in contact with the front-inorganic insulating film, an organic insulating film, wherein provided in the display region and the peripheral region, the organic An array substrate having a slit formed through the insulating film, an opposed substrate arranged to face the array substrate, and a sealing material for joining the array substrate and the opposed substrate are provided. wherein the clock signal and the power signal through the pads provided on the peripheral region located between the display area and the first end of the array substrate, supplied to the clock line and the power line, respectively is, the slit, the first slit provided in a position overlapping the sealing material has a second slit and a third slit, the first slit is extended in the extending direction of the front Symbol supply wiring It has a first portion and a second portion existing, and a third portion and a fourth portion extending in a direction intersecting the first portion and the second portion, and the first portion is the wiring. The second portion is provided between the display area and the second end portion of the array substrate, and the second portion is with the third end portion of the array substrate facing the second end portion. The third portion is located between the display area and the fourth end portion of the array substrate facing the first end portion and the display region. The portion is located between the first end and the display area, and the second slit is located between the display area and the second end and along the first portion. Provided and spaced apart from the first portion, the third slit is located between the display area and the third end and is provided along the second portion and the second. The first portion, the second portion, the second slit, and the third slit do not overlap with the clock wiring and the power supply wiring in a plan view and are arranged at intervals from the portions, and the power supply is not overlapped with the clock wiring and the power supply wiring. The wiring is located closer to the display area than the first slit.

FIG. 1 is a perspective view showing a liquid crystal display panel according to the first embodiment. FIG. 2 is a schematic cross-sectional view showing the liquid crystal display panel. FIG. 3 is a schematic plan view showing the liquid crystal display panel, and is a diagram showing a wiring structure. FIG. 4 is a schematic plan view showing a part of the array substrate shown in FIGS. 1 to 3. FIG. 5 is an enlarged plan view showing the array board, and is a diagram showing a wiring structure of the array board. FIG. 6 is an enlarged cross-sectional view showing the liquid crystal display panel, and is a diagram showing the structure of the liquid crystal display panel. FIG. 7 is an enlarged cross-sectional view schematically showing a peripheral portion of the liquid crystal display panel along the line VII-VII of FIG. FIG. 8 is a schematic plan view showing the liquid crystal display panel, and is a diagram showing the structure of the slit. FIG. 9 is a plan view showing a state in which an array pattern is formed on the mother glass in the manufacturing process of the liquid crystal display panel. FIG. 10 is a plan view showing a state in which a receiving pattern or the like is formed on the mother glass to form six array substrates, following FIG. 9. FIG. 11 is a plan view showing a state in which six facing substrates are formed on the mother glass in the manufacturing process of the liquid crystal display panel. FIG. 12 is a plan view showing a state in which a sealing material is applied to the mother glass, following FIG. 10. FIG. 13 is a plan view showing a state in which the two mother glasses shown in FIGS. 11 and 12 are bonded together via a sealing material. FIG. 14 is a cross-sectional view showing a state in which the two mother glasses along the line XIV-XIV of FIG. 13 are bonded together via a sealing material. FIG. 15 is a schematic plan view showing the liquid crystal display panel according to the second embodiment, and is a diagram showing the structure of the slit. FIG. 16 is an enlarged cross-sectional view schematically showing a peripheral portion of the liquid crystal display panel along the line XVI-XVI of FIG. FIG. 17 is an enlarged cross-sectional view schematically showing a peripheral edge portion of the liquid crystal display panel according to the third embodiment. FIG. 18 is an enlarged cross-sectional view schematically showing a peripheral portion of the liquid crystal display panel according to the fourth embodiment.

Hereinafter, the liquid crystal display panel and the method for manufacturing the liquid crystal display panel according to the first embodiment will be described in detail with reference to the drawings. First, the configuration of the liquid crystal display panel will be described. In this embodiment, the liquid crystal display panel is a facing CF type, and a color filter is formed on the facing substrate side.

As shown in FIGS. 1 to 6, the liquid crystal display panel includes an array substrate 1, a facing substrate 2 arranged to face each other with a predetermined gap between the array substrates, and a liquid crystal layer 3 sandwiched between the two substrates. , And a color filter 4. Polarizing plates (not shown) are arranged on the outer surfaces of the array substrate 1 and the facing substrate 2, respectively. A backlight unit (not shown) is arranged on the outer surface side of the array substrate 1. The array substrate 1 and the facing substrate 2 have a rectangular display area R1. The color filter 4 is provided in the display area R1 of the array substrate 1.

The array substrate 1 has a glass substrate 11 as a transparent insulating substrate. In the display area R1, a plurality of scanning lines 15 extending in the row direction X and arranged at intervals in the column direction Y orthogonal to the row direction X and a plurality of scanning lines 15 intersect on the glass substrate 11. A plurality of signal lines 21 extending in the column direction Y and arranged at intervals in the row direction X are arranged in a grid pattern.

On the glass substrate 11, a plurality of auxiliary capacitance lines 17 constituting the auxiliary capacitance element 24, intersecting the plurality of signal lines 21 and extending in the row direction X and arranged at intervals in the column direction Y. Is formed. The auxiliary capacitance line 17 extends parallel to the scanning line 15.

Here, the array substrate 1 and the facing substrate 2 have a plurality of matrix-shaped pixels 20 provided so as to overlap with a region surrounded by a plurality of signal lines 21 and a plurality of auxiliary capacitance lines 17. That is, each pixel 20 is provided so as to overlap with a region surrounded by two adjacent signal lines 21 and two adjacent auxiliary capacitance lines 17. Each pixel 20 of the array substrate 1 is provided with a TFT (thin film transistor) 19 as a switching element. More specifically, the TFT 19 is provided in the vicinity of each intersection of the scanning line 15 and the signal line 21.

The TFT 19 has a semiconductor layer 12 made of amorphous silicon (a—Si) or polysilicon (p—Si) as a semiconductor, and a gate electrode 16 formed by extending a part of a scanning line 15. In the present embodiment, the semiconductor layer 12 and the auxiliary capacitance electrode 13 described later are formed of p—Si.

More specifically, in the display region R1, a semiconductor layer 12 and an auxiliary capacitance electrode 13 are formed on the glass substrate 11, and a gate insulating film 14 is formed on the glass substrate including the semiconductor layer and the auxiliary capacitance electrode. It is a film. A scanning line 15, a gate electrode 16, and an auxiliary capacitance line 17 are arranged on the gate insulating film 14. The auxiliary capacitance line 17 and the auxiliary capacitance electrode 13 are arranged to face each other via the gate insulating film 14. An interlayer insulating film 18 is formed on the gate insulating film 14 including the scanning line 15, the gate electrode 16, and the auxiliary capacitance line 17. In this embodiment, the interlayer insulating film 18 is an inorganic insulating film.

A signal line 21 and a contact electrode 22 are formed on the interlayer insulating film 18. Each contact electrode 22 is connected to the drain region of the semiconductor layer 12 and the pixel electrode 26 described later, respectively, through the contact holes formed in the gate insulating film 14 and the interlayer insulating film 18. Further, the contact electrode 22 is connected to the auxiliary capacitance electrode 13 through other contact holes formed in the gate insulating film 14 and the interlayer insulating film 18. Here, the auxiliary capacitance line 17 is formed except for the connection portion between the auxiliary capacitance electrode 13 and the contact electrode 22.

The signal line 21 is connected to the source region of the semiconductor layer 12 through contact holes formed in the gate insulating film 14 and the interlayer insulating film 18. A protective insulating film 23 is formed on the interlayer insulating film 18, the signal line 21, and the contact electrode 22. The protective insulating film 23 also serves as a flattening film for flattening irregularities generated by wiring or the like on the substrate. In this embodiment, the protective insulating film 23 is an organic insulating film. The protective insulating film 23 covers not only the display area R1 but also the frame area R2 surrounding the display area R1.

Pixel electrodes 26 are formed on the protective insulating film 23 by a transparent conductive film such as ITO (indium tin oxide). A plurality of contact holes 25 are formed in the protective insulating film 23 and the colored layers 30R, 30G, and 30B overlapping the auxiliary capacitance line 17. These contact holes 25 are provided in a plurality of pixels 20.

Each pixel electrode 26 is connected to the contact electrode 22 through the contact hole 25. The peripheral edge of each pixel electrode 26 overlaps the auxiliary capacitance line 17 and the signal line 21. Each of the pixel electrodes 26 forms a pixel 20.

As described above, the array pattern 1p is formed on the glass substrate 11. In the display region R1, the array pattern 1p is laminated between the glass substrate 11 and the pixel electrode 26. A plurality of columnar spacers 27 as a plurality of spacers are formed on the array pattern 1p. An alignment film 28 is formed on the array pattern 1p (pixel electrode 26 or the like) on which the columnar spacer 27 is formed.

On the other hand, as shown in FIGS. 3 and 7, in the frame region R2, the array pattern 1p and the receiving pattern 60 are formed on the glass substrate 11. In the frame region R2, the array pattern 1p includes drive circuits 6a and 6b, a gate insulating film 14, an interlayer insulating film 18, wirings w1, w2, w3, w4, w7, w8, and a protective insulating film 23. Have.

The drive circuits 6a and 6b are arranged so as to face each other in the row direction X with the display area R1 interposed therebetween. The drive circuits 6a and 6b are made of the same material at the same time when the TFT 19 and the like are formed. The drive circuits 6a and 6b are Y drivers connected to the scanning line 15 and the auxiliary capacitance line 17.

The wirings w1, w2, w3, w4, w7, and w8 are provided on the left side and the right side of the frame region R2, respectively, and form the drive circuits 6a and 6b, respectively. The wirings w1, w2, w3, w4, w7, and w8 extend in the column direction Y and are provided at intervals in the row direction X. The wirings w1, w2, w3, w4, w7, and w8 are formed on the interlayer insulating film 18 and covered with the protective insulating film 23. The wirings w1, w2, w3, and w4 are extended to the end of the glass substrate 11 and connected to the outer lead bonding pad.

Wiring w1 and w2 are control signal wirings as the first wiring, respectively, and wirings w3 and w4 are power supply wirings as the second wiring, respectively. A start pulse signal ST is given to the wiring w1 via the pad. A clock signal CLK is given to the wiring w2 via the pad. A voltage V1 (VDD) is applied to the wiring w3 from a high-potential power source (not shown) via a pad. A voltage V2 (VSS) is applied to the wiring w4 from a low potential power source (not shown) via a pad. The wiring w3 and the wiring w4 are power supply wirings having different potentials from each other. For example, the voltage V1 is + 10V and the voltage V2 is −5V.

The wirings w5 and w6 are connection wirings and extend in a direction intersecting the slit 23h1 described later. In this embodiment, the wirings w5 and w6 extend in the row direction X. The wirings w5 and w6 are formed on at least the gate insulating film 14 of the frame region R2. The wirings w5 and w6 are covered with the interlayer insulating film 18. In this embodiment, the wirings w5 and w6 are formed so as to extend to the display area R1. In the frame region R2, the interlayer insulating film 18 has a through hole facing the wiring w5 and a through hole facing the wiring w6. The wiring w3 is electrically connected to the wiring w5 through the through hole, and the wiring w4 is electrically connected to the wiring w6 through the through hole.

As shown in FIGS. 3, 7, and 8, the protective insulating film 23 has a slit 23h1. The slit 23h1 is formed through the slit 23h1. The slit 23h1 is formed so that the wiring is not exposed, and the interlayer insulating film 18 is formed so as to be exposed. The slits 23h1 are formed in a frame shape, and here, they are continuously formed in a rectangular frame shape. On the left side or the right side of the frame region R2, the slit 23h1 is formed so as to extend along the extending direction of the wiring w2 and the wiring w3. Here, the slit 23h1 has a width of 5 to 10 μm.

The wirings w1 and w2 are located on the outer edge side of the array substrate 1 from the slit 23h1. The wirings w3, w4, w7, and w8 are located on the display area R1 side of the slit 23h1. The slit 23h1 is located at the uppermost portion of the array pattern 1p. The slit is filled with a moisture-proof member 29a and is in contact with the interlayer insulating film 18.

As shown in FIGS. 3 and 7, the receiving pattern 60 is provided on at least one of the array substrate 1 and the facing substrate 2 at the corresponding portion of the resin film located at intervals on the peripheral edge of the display region R1. It has wall-shaped protrusions formed with a gap on at least one of the substrate 1 and the facing substrate 2.

In this embodiment, the receiving pattern 60 has wall-shaped protrusions 61 and 62 provided on the array substrate 1 at intervals on the peripheral edge of the display region R1 and formed with a gap on the facing substrate 2. There is.

The protrusions 61 and 62 are formed on the protective insulating film 23. The protrusions 61 and 62 extend in the row direction Y. The protrusion 61 is located on the opposite side of the display region R1 with respect to the drive circuit 6a, at intervals on the peripheral edges of the array substrate 1 and the facing substrate 2. The protrusions 62 are located on the opposite side of the display region R1 with respect to the drive circuit 6b, at intervals from the peripheral edges of the array substrate 1 and the facing substrate 2.

The protrusions 61 and 62 suppress the spread of the sealing material 51, which will be described later, toward the peripheral edges of the array substrate 1 and the facing substrate 2. The protrusions 61 and 62 are simultaneously formed on the array substrate 1 with the same material as the columnar spacer 27. The protrusions 61 and 62 are formed lower than the columnar spacer 27. However, the protrusions 61 and 62 may have the same height as the columnar spacer 27. The receiving pattern 60 is formed except for a region facing the liquid crystal injection port 52, which will be described later.

As shown in FIGS. 1, 2, 3, 6, and 7, the facing substrate 2 includes a glass substrate 41 as a transparent insulating substrate. A color filter 4 is provided on the glass substrate 41. The color filter 4 has a light-shielding portion 31, a peripheral light-shielding portion 32, and a plurality of colored layers. The plurality of colored layers include, for example, a red colored layer 30R, a green colored layer 30G, and a blue colored layer 30B.

The light-shielding portion 31 is formed in a grid pattern. The light-shielding portion 31 is formed so as to face the auxiliary capacitance line 17 and the signal line 21. The peripheral light-shielding portion 32 is formed in a rectangular frame shape, and is formed in the entire frame region R2. The peripheral light-shielding unit 32 contributes to light-shielding light (backlight) leaking from the outside of the display area R1.

The colored layers 30R, 30G, and 30B are formed on the glass substrate 41 and the light-shielding portion 31. The colored layers 30R, 30G, and 30B extend in a band shape along the column direction Y. The colored layers 30R, 30G, and 30B are adjacent to each other in the row direction X and are arranged alternately. The peripheral edges of the colored layers 30R, 30G, and 30B overlap the light-shielding portion 31.
An overcoat layer (not shown) may be arranged on the color filter 4. As a result, the influence of the unevenness on the surface of the light-shielding portion 31 and the color filter 4 can be alleviated.

A counter electrode 42 is formed on the color filter 4 (overcoat layer) by a transparent conductive film such as ITO. An alignment film 43 is formed on the counter electrode 42. As described above, the facing pattern 2p is formed on the glass substrate 41. The facing pattern 2p has a color filter 4, a facing electrode 42, and an alignment film 43. The facing pattern 2p may further have an overcoat layer.

The array substrate 1 and the facing substrate 2 are arranged to face each other with a predetermined gap between the plurality of columnar spacers 27. The sealing material 51 faces the frame region R2, is provided between the array substrate 1 and the facing substrate 2, is located between the peripheral edge of the display region R1 and the protrusions 61, 62, and is continuously formed in a rectangular frame shape. .. The sealing material 51 is located at intervals on the peripheral edges of the array substrate 1 and the opposed substrate 2 over the entire peripheral edge of the array substrate 1 and the opposed substrate 2.

The array substrate 1 and the facing substrate 2 are joined to each other by a sealing material 51. The sealing material 51 is formed on the moisture-proof member 29a. In this embodiment, the moisture-proof member 29a is formed of a part of the sealing material 51 that is filled in the slit 23h1 and is in contact with the interlayer insulating film 18. The sealing material 51 has a property of blocking moisture. The sealing material 51 can be formed by using a resin such as acrylic. Therefore, it is possible to block the infiltration of water into the wirings w3, w4, w7, w8, etc. on the display region R1 side from the slit 23h1 along the surface (interface) of the protective insulating film 23 and the protective insulating film 23.

The sealing material 51 covers the entire drive circuits 6a and 6b. In the sealing material 51, the protrusions 61 and 62 (reception pattern 60) suppress the spread of the array substrate 1 and the facing substrate 2 toward the peripheral edge side (spread in the row direction X). The protrusions 61 and 62 are in contact with each other on the side surface of the sealing material 51, but since the protrusions 61 and 62 are for suppressing the spread of the sealing material 51, they are not always in contact with each other. In some cases, the shape is in contact with the target.

The liquid crystal layer 3 is formed in a space surrounded by the array substrate 1, the facing substrate 2, and the sealing material 51.
The liquid crystal display panel is formed as described above.

Next, a more detailed configuration of the liquid crystal display panel will be described together with a manufacturing method thereof.
As shown in FIGS. 1 to 8 and 9, first, a mother glass 101 as a first mother substrate having a size larger than that of the array substrate 1 is prepared as a transparent insulating substrate. According to this embodiment, the mother glass 101 has six rectangular array substrate forming regions R6 for forming the array substrate 1 and an ineffective region R7 deviating from the array substrate forming region R6. The mother glass 101 has a first planned division line e1 that overlaps the peripheral edge of the array substrate forming region R6.

An array pattern including a TFT 19, an auxiliary capacitance element 24, drive circuits 6a and 6b, a protective insulating film 23 having a slit 23h1 and the like on the prepared mother glass 101 by a normal manufacturing process such as repeating film formation and patterning. Form 1p.

Next, using a spinner, for example, a photosensitive acrylic transparent resin is applied to the entire surface of the mother glass 101. Then, the transparent resin is dried. Next, the patterning is exposed on the transparent resin using a predetermined photomask. Next, the exposed transparent resin is developed and then fired and cured.

As shown in FIGS. 1 to 8 and 10, this causes the columnar spacer 27 and the protrusions 61 and 62 to be formed at the same time. Since the protrusions 61 and 62 and the columnar spacer 27 can be formed at the same time, they can be formed without increasing the number of manufacturing steps.

After that, the alignment film material is applied to the entire surface of the mother glass 101 including the display region R1 and patterned to form the alignment film 28. The alignment film 28 is subjected to a predetermined alignment treatment (rubbing) as necessary.
As a result, six array substrates 1 are completed with one mother glass 101.

As shown in FIGS. 1, 2, 3, 6, 7, 8 and 11, on the other hand, in the method of manufacturing the facing substrate 2, first, as a transparent insulating substrate, the dimensions are larger than those of the facing substrate 2. A mother glass 102 as a second mother substrate having a large size is prepared. According to this embodiment, the mother glass 102 has six rectangular facing substrate forming regions R8 for forming the facing substrate 2 and an ineffective region R9 deviating from the facing substrate forming region R8. The mother glass 102 has a second planned division line e2 that overlaps the peripheral edge of the facing substrate forming region R8.

The facing pattern 2p is formed on the prepared mother glass 102 by a normal manufacturing process. The alignment film 43 is subjected to a predetermined alignment treatment (rubbing) as necessary.
As a result, six opposed substrates 2 are completed with one mother glass 102.

Next, as shown in FIGS. 7, 8 and 12, as a material for forming the sealing material 51 over the entire circumference of the frame region R2 of the array substrate 1, for example, an ultraviolet curable resin is applied by a printing method. .. As a result, the frame-shaped sealing material 51 is formed. Further, when forming the sealing material 51, an electrode transition material for applying a voltage from the array substrate 1 to the facing substrate 2 can be formed on an electrode transition electrode (not shown) around the sealing material 51.

As shown in FIGS. 11 to 14, the liquid crystal material is then dropped onto the region surrounded by the sealing material 51. Subsequently, the mother glass 101 and the mother glass 102 are arranged to face each other so that the alignment film 28 and the alignment film 43 face each other, and the array substrate 1 and the facing substrate 2 are arranged to face each other while holding a predetermined gap by a plurality of columnar spacers 27. Then, the peripheral edges of the array substrate 1 and the facing substrate 2 are bonded to each other by the sealing material 51. At this time, the sealing material 51 is filled in the slit 23h1. Further, the protrusions 61 and 62 suppress the spread of the sealing material 51.

Next, the sealing material 51 is irradiated with ultraviolet rays from the outside to cure the sealing material 51, and further subjected to a thermosetting treatment to be main-cured. As a result, the mother glass 101 and the mother glass 102 are joined via the sealing material 51.

Subsequently, the mother glass 101 is divided along the first planned division line e1, and the mother glass 102 is divided along the second planned division line e2. At the time of division, for example, a scribe line is drawn along the first planned division line e1 and the second planned division line e2 to divide. As a result, the array substrate 1 is cut out from the mother glass 101, and the facing substrate 2 is cut out from the mother glass 102.
As a result, as shown in FIG. 3, six liquid crystal display panels are taken out from the divided mother glass 101 and mother glass 102. Then, each of the six liquid crystal display panels is completed.

According to the method for manufacturing a liquid crystal display panel and a liquid crystal display panel according to the first embodiment configured as described above, the liquid crystal display panel includes an array substrate 1, a facing substrate 2, a liquid crystal layer 3, and a sealing material 51. And have. The array substrate 1 has wirings w1 to w8, an interlayer insulating film 18, a protective insulating film 23, and a moisture-proof member 29a. The protective insulating film 23 is formed on the display region R1 and the frame region R2, and covers the wirings w1 to w4, w7, and w8. The protective insulating film 23 has a slit 23h1 formed so as to penetrate between the wiring w2 and the wiring w3. The moisture-proof member 29a is formed of a part of the sealing material 51 that is filled in the slit 23h1 and is in contact with the interlayer insulating film 18.

The sealing material 51 has a property of blocking moisture. Therefore, the protective insulating film 23, which is an organic insulating film, and the moisture transmitted through the interface between the protective insulating film 23 and the interlayer insulating film 18 are blocked from entering the display region R1 side by the slit 23h1 and the moisture-proof member 29a. The interlayer insulating film (inorganic insulating film) 18 has a property of blocking moisture. In this embodiment, it is possible to block the infiltration of water into the wiring w3, w4, w7, w8 and the like. In particular, if the slit 23h1 and the moisture-proof member 29a are arranged between the wirings having a large potential difference with the adjacent wirings, it is possible to prevent the wiring from being corroded due to the moisture and the potential difference. In the present embodiment, it is possible to block the infiltration of water into the wirings w3 and w4, which are prone to corrosion. This makes it possible to eliminate the concern that the wiring w3, w4, w7, w8 and the like will be corroded.

In this embodiment, since the slit 23h1 is formed in a frame shape and the entire area of the slit 23h1 is filled with the sealing material 51, it is possible to further block the intrusion of moisture into the inside of the liquid crystal display panel, and the wiring is corroded. The adverse effect of moisture can be further eliminated.

The slit 23h1 has a width of 5 to 10 μm. Thereby, the slit 23h1 can be formed in the vacant space (unused space such as wiring). The width of the slit 23h1 may be less than 5 μm as long as the protective insulating film 23 can be patterned. In this case as well, the above-mentioned moisture-proof effect can be obtained. Further, when there is a margin in unused space such as wiring, the width of the slit 23h1 may be 10 μm or more. Further, a slit 23h1 may be formed along the wiring between the wirings. For example, a slit 23h1 may be formed in parallel along at least one of the wirings between the wiring having a common potential and the power supply wiring that gives a high level potential.

A slit 23h1 can be formed between the wiring w2 and the wiring w3. The protective insulating film 23 on the outer edge side of the array substrate 1 is removed from the wirings w1 to w4, w7 and w8 over the entire circumference with a width of 200 to 300 μm, and it is not necessary to form a sealing material in the removed space. Therefore, the frame can be narrowed.

Since the width of the slit 23h1 is narrow, the slit 23h1 can be formed without exposing the wirings w1 to w4, w7, w8 and the like. Since it is possible to prevent static electricity from entering the wirings w1 to w4, w7 and w8, it is possible to prevent the peripheral circuits (drive circuits 6a and 6b) of the wiring from being destroyed. Therefore, it is possible to prevent a decrease in ESD (Electro Static Discharge) withstand voltage.
Since the slit 23h1 can be formed at the same time when the contact hole 25 is formed, it can be formed without increasing the number of manufacturing steps.

The protrusions 61 and 62 are provided on the array substrate 1 at intervals on the peripheral edge of the display region R1, and are formed with a gap on the facing substrate 2. The sealing material 51 is located between the peripheral edge of the display area R1 and the protrusion 61, and between the peripheral edge of the display area R1 and the protrusion 62. The sealing material 51 is prevented from spreading toward the peripheral edges of the array substrate 1 and the facing substrate 2 by the protrusions 61 and 62.

The sealing material 51 can be applied to a region near the peripheral edge of the array substrate 1 (opposing substrate 2). Therefore, even in a liquid crystal display panel having a narrow frame width, it is possible to suppress the spread of the sealing material 51 in the display area R1 and prevent display abnormalities. The spread of the sealing material 51 toward the peripheral edge side of the array substrate 1 and the facing substrate 2 is suppressed by the protrusions 61 and 62, and the sealing material 51 spreads until it overlaps the first planned dividing line e1 (second scheduled cutting line e2). Therefore, the array substrate 1 and the facing substrate 2 can be satisfactorily separated from the mother glasses 101 and 102.

Further, when cutting out the liquid crystal display panel from the mother glasses 101 and 102, the blade for cutting the glass corresponds between the protrusions 61 and 62, that is, the planned division lines e1 and e2. When the blade comes into contact with the glass surface, the wall-shaped protrusions 61 and 62 support the glass, so that the pressure of the blade applied to the glass surface is evenly distributed on the glass surface. Therefore, it is possible to cut the glass without causing problems such as chipping or breaking of the glass.

In the present embodiment, protrusions 61 and 62 are arranged on both the left and right sides around the display area R1 of the liquid crystal display panel. That is, the protrusions 61 and 62 are arranged along the edge perpendicular to the edge on which the outer lead bonding pad is arranged. Further, the slit 23h1 and the moisture-proof member 29a are arranged along the end edge perpendicularly intersecting the end edge where the pad is also arranged. Further, the protrusions may be arranged on the upper side and / or the lower side of the periphery of the display area R1, that is, on the end side on the side where the pad is arranged and on the side of the end side facing the end side.
By arranging the receiving pattern 60 in this way, it is possible to cut the glass satisfactorily without causing problems such as chipping of the glass when cutting the glass as described above.
From the above, it is possible to obtain a method for manufacturing a liquid crystal display panel and a liquid crystal display device having a high product yield, which can reduce the frame size.

Next, the liquid crystal display panel according to the second embodiment will be described. The liquid crystal display panel according to the present embodiment can be formed by using the same method as the method for manufacturing the liquid crystal display panel according to the first embodiment. In the present embodiment, the same functional parts as those in the first embodiment described above are designated by the same reference numerals, and detailed description thereof will be omitted.

As shown in FIGS. 3, 15 and 16, the protective insulating film 23 has a slit 23h2 and a slit 23h3 in addition to the slit 23h1. Like the slit 23h1, the slit 23h2 and the slit 23h3 are also formed so as to penetrate the protective insulating film 23. Further, the slits 23h2 and 23h3 are formed so that the wiring is not exposed and the interlayer insulating film 18 is exposed. The slits 23h2 and 23h3 are formed in a band shape and are formed so as to extend in a frame shape in the row direction Y. The slits 23h2 and 23h3 are formed so as to extend along the extending direction of the wiring w3 and the wiring w4, respectively. The slits 23h2 and 23h3 have a width of, for example, 5 to 10 μm, respectively.

On the left side of the frame region R2, the slit 23h2 is formed between the wiring w3 and the wiring w4. On the right side of the frame region R2, the slit 23h3 is formed between the wiring w3 and the wiring w4. The slits 23h1, 23h2, and 23h3 are located at the uppermost part of the array pattern 1p. The slit 23h1 is filled with a moisture-proof member 29a and is in contact with the interlayer insulating film 18. The slit 23h2 is filled with a moisture-proof member 29b and is in contact with the interlayer insulating film 18. The slit 23h3 is filled with a moisture-proof member 29c and is in contact with the interlayer insulating film 18. The sealing material 51 is formed on the moisture-proof members 29a, 29b, and 29c. In this embodiment, the slits 23h1, 23h2, and 23h3 are filled with a part of the sealing material 51 to form the moisture-proof members 29a, 29b, and 29c, respectively.

According to the method for manufacturing a liquid crystal display panel and a liquid crystal display panel according to the second embodiment configured as described above, the liquid crystal display panel includes an array substrate 1, a facing substrate 2, a liquid crystal layer 3, and a sealing material 51. And have. The protective insulating film 23 has slits 23h2 and 23h3 formed so as to penetrate between the wiring w3 and the wiring w4. That is, the slit is doubly formed. The slits 23h2 and 23h3 are filled with a part of the sealing material 51 and are in contact with the interlayer insulating film 18, respectively, to form the moisture-proof members 29b and 29c.

In this embodiment, the moisture-proof member 29a (sealing material 51) formed in the slit 23h1 can block the infiltration of moisture into the wirings w3, w4, w7, w8, etc., and the moisture-proof member formed in the slits 23h2, 23h3. The members 29b and 29c (sealing material 51) can further block the infiltration of water into the wirings w4, w7, w8 and the like. This makes it possible to eliminate the concern that the wiring w3, w4, w7, w8 and the like will be corroded. As described above, since it is possible to further block the infiltration of water into the wiring w4, it is possible to further reduce the corrosion of the wirings w3 and w4 having a large potential difference between the adjacent wirings.

The slits 23h2 and 23h3 can be formed between the wiring w3 and the wiring w4. Similar to the slit 23h1, the slits 23h2 and 23h3 can also be formed in an empty space (unused space such as wiring), so that the frame can be narrowed. In addition, the same effect as that of the first embodiment can be obtained.
From the above, it is possible to obtain a method for manufacturing a liquid crystal display panel and a liquid crystal display device having a high product yield, which can reduce the frame size.

Next, the liquid crystal display panel according to the third embodiment will be described. The liquid crystal display panel according to the present embodiment can be formed by using the same method as the method for manufacturing the liquid crystal display panel according to the first embodiment. In the present embodiment, the same functional parts as those in the first embodiment described above are designated by the same reference numerals, and detailed description thereof will be omitted.

As shown in FIG. 17, the alignment film 28 is made of an inorganic material having a lower water permeability than the protective insulating film 23. The alignment film 28 has a property of blocking water. The moisture-proof member 29a is made of the same material as the alignment film 28. The alignment film 28 is formed so as to extend to a position facing the slit 23h1 of the frame region R2. Preferably, the alignment film 28 is formed so as to extend beyond the slit 23h1 of the frame region R2. The moisture-proof member 29a is formed of a part of the alignment film 28 that is filled in the slit 23h1 and is in contact with the interlayer insulating film 18. As described above, in the present embodiment, the alignment film 28 of the display region R1 and the moisture-proof member 29a are integrally formed, but the moisture-proof member 29a is formed separately from the alignment film 28 of the display region R1. May be good.

According to the method for manufacturing a liquid crystal display panel and a liquid crystal display panel according to a third embodiment configured as described above, the liquid crystal display panel includes an array substrate 1, a facing substrate 2, a liquid crystal layer 3, and a sealing material 51. And have. The protective insulating film 23 has a slit 23h1 formed so as to penetrate between the wiring w2 and the wiring w2. When the alignment film 28 has a property of blocking water, a part of the alignment film 28 may be filled in the slit 23h1 to form a moisture-proof member 29a.

In this embodiment, the moisture-proof member 29a formed in the slit 23h1 can block the infiltration of water into the wirings w3, w4, w7, w8 and the like. This makes it possible to eliminate the concern that the wiring w3, w4, w7, w8 and the like will be corroded. As described above, since it is possible to further block the infiltration of water into the wiring w4, it is possible to further reduce the corrosion of the wirings w3 and w4 having a large potential difference between the adjacent wirings.

If the material forming the alignment film 28 can be filled in the slit 23h1, the above effect can be obtained. When the width of the slit 23h1 is 5 to 10 μm, the slit 23h1 can be filled with a material for forming the alignment film 28. If the material forming the alignment film 28 can be filled in the slit 23h1, the width of the slit 23h1 may exceed 10 μm.

In addition, the same effect as that of the first embodiment can be obtained.
From the above, it is possible to obtain a method for manufacturing a liquid crystal display panel and a liquid crystal display device having a high product yield, which can reduce the frame size.

Next, the liquid crystal display panel according to the fourth embodiment will be described. The liquid crystal display panel according to the present embodiment can be formed by using the same method as the method for manufacturing the liquid crystal display panel according to the first embodiment. In the present embodiment, the same functional parts as those in the first embodiment described above are designated by the same reference numerals, and detailed description thereof will be omitted.

As shown in FIG. 18, the columnar spacer 27 is made of a material having a lower water permeability than the protective insulating film 23. The material forming the columnar spacer 27 has a property of blocking moisture. The moisture-proof member 29a is made of the same material as the columnar spacer 27. The material forming the columnar spacer 27 is filled in the slit 23h1 and is in contact with the interlayer insulating film 18 to form the moisture-proof member 29a. The columnar spacer 27, the protrusions 61 and 62, and the moisture-proof member 29a are simultaneously formed of the same material.

According to the method for manufacturing a liquid crystal display panel and a liquid crystal display panel according to a fourth embodiment configured as described above, the liquid crystal display panel includes an array substrate 1, a facing substrate 2, a liquid crystal layer 3, and a sealing material 51. And have. The protective insulating film 23 has a slit 23h1 formed so as to penetrate between the wiring w2 and the wiring w2. When the material forming the columnar spacer 27 has a property of blocking moisture, the slit 23h1 may be filled with the material forming the columnar spacer 27 to form the moisture-proof member 29a.

In this embodiment, the moisture-proof member 29a formed in the slit 23h1 can block the infiltration of water into the wirings w3, w4, w7, w8 and the like. This makes it possible to eliminate the concern that the wiring w3, w4, w7, w8 and the like will be corroded. As described above, since it is possible to further block the infiltration of water into the wiring w4, it is possible to further reduce the corrosion of the wirings w3 and w4 having a large potential difference between the adjacent wirings. In addition, the same effect as that of the first embodiment can be obtained.
From the above, it is possible to obtain a method for manufacturing a liquid crystal display panel and a liquid crystal display device having a high product yield, which can reduce the frame size.

Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other embodiments, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are also included in the scope of the invention described in the claims and the equivalent scope thereof.

For example, among the plurality of wirings, the wiring located on the outer edge side of the array board 1 is defined as the outermost wiring. Then, the outermost wiring may be located on the display area R1 side from the slit. As a result, it is possible to further block the infiltration of moisture into a plurality of wirings including the outermost wiring.

The moisture-proof members 29a, 29b, and 29c may be made of a material other than the material forming the sealing material 51, the material forming the alignment film 28, and the material forming the columnar spacer 27. The material forming the moisture-proof members 29a, 29b, and 29c is not limited to the inorganic material, and the above-mentioned effect can be obtained if the material has a lower water permeability than the protective insulating film 23 (organic insulating film). Can be done.

The technique of the above-described embodiment is not limited to the liquid crystal display panel, and can be applied to various liquid crystal display panels. The liquid crystal injection method is not limited to the use of the drop injection method, and the vacuum injection method can also be used. Further, the technique of the above-described embodiment can be applied to a display panel other than the liquid crystal display panel.

The inventions described in the original application of the present application are described below.
[1] An inorganic insulating film formed on a substrate and located in a display area and a frame area surrounding the display area, and a first wiring and a first wiring formed on the inorganic insulating film at intervals and located in the frame area. The organic insulation between the two wirings, the organic insulating film formed on the inorganic insulating film and located in the display area and the frame area and covering the first wiring and the second wiring, and the first wiring and the second wiring. An array substrate having a slit formed through the film and a moisture-proof member filled in the slit and in contact with the inorganic insulating film.
A display panel comprising facing boards arranged opposite to each other with a gap between the array boards.
[2] The display panel according to [1], wherein the first wiring and the second wiring are wirings having different potentials from each other.
[3] The first wiring is a power supply wiring located on the display area side of the slit.
The display panel according to [1], wherein the second wiring is a control signal wiring located on the outer edge side of the array substrate from the slit.
[4] Further provided with a connection wiring covered with the inorganic insulating film formed on at least the frame region of the substrate and intersecting with the slit.
The first wiring is located on the display area side of the slit.
The display panel according to [1], wherein the second wiring is located on the outer edge side of the array substrate from the slit and is electrically connected to the connection wiring.
[5] The display panel according to [1], wherein the slit extends along the extending direction of the first wiring and the second wiring.
[6] The organic insulating film is located on the outer edge side of the array substrate from the first wiring and the second wiring, and has other frame-shaped slits formed through the organic insulating film.
The display panel according to [1], wherein the array substrate has another moisture-proof member that is filled in the other slit and is in contact with the inorganic insulating film.
[7] An inorganic insulating film formed on a substrate and located in a display area and a frame area surrounding the display area, and an outermost peripheral wiring formed on the inorganic insulating film at intervals and located in the frame area. An organic insulating film formed on the inorganic insulating film, located in the display area and the frame area and covering the outermost peripheral wiring, a slit formed through the organic insulating film, and the inorganic insulating film filled in the slit. An array substrate having a moisture-proof member in contact with the film, and
The array board is provided with a facing board arranged so as to face each other with a gap.
The outermost wiring is a display panel located on the display area side of the slit.
[8] The display panel according to [7], wherein the slit extends along the extending direction of the outermost peripheral wiring.
[9] The display panel according to [7], wherein the slit is formed in a frame shape.
[10] Further provided with a sealing material facing the frame region and joining the array substrate and the facing substrate.
The display panel according to [1] or [7], wherein the moisture-proof member is formed of a part of the sealing material filled in the slit.
[11] Further provided with a sealing material facing the frame region, joining the array substrate and the facing substrate, and contacting the moisture-proof member.
The display panel according to [1] or [7], wherein the moisture-proof member is made of a material different from the sealing material.
[12] Further, a liquid crystal layer formed in a space surrounded by the array substrate, the facing substrate, and the sealing material is further provided.
The array substrate further has an inorganic alignment film formed in at least the display region and extending to a position facing the slit in the frame region.
The display panel according to [11], wherein the moisture-proof member is formed of a part of the alignment film filled in the slit.
[13] The array substrate further has a columnar spacer that holds the gap between the array substrate and the facing substrate.
The display panel according to [11], wherein the moisture-proof member is made of a material forming the columnar spacer.
[14] The display panel according to [1] or [7], wherein the slit has a width of 5 to 10 μm.

1 ... Array substrate, 2 ... Opposing substrate, 3 ... Liquid crystal layer, 6a, 6b ... Drive circuit, 11 ... Glass substrate, 18 ... Interlayer insulating film, 23 ... Protective insulating film, 23h1, 23h2, 23h3 ... Slit, 27 ... Columnar Spacer, 28 ... alignment film, 29a, 29b, 29c ... moisture-proof member, 51 ... sealing material, w1, w2, w3, w4, w5, w6, w7, w8 ... wiring, R1 ... display area, R2 ... frame area, X ... row direction, Y ... column direction.

Claims (16)

Display area and
Surrounding the display area, the peripheral area where the drive circuit is formed, and
The inorganic insulating film located in the peripheral region and
Located in the peripheral region, and the clock distribution lines that to supply the clock signal to the drive circuit,
The power supply wiring located in the peripheral area and supplying the power supply signal to the drive circuit,
An organic insulating film that comes into contact with the inorganic insulating film and is provided in the display area and the peripheral area.
A slit formed through the organic insulating film and
Array board with
A facing board arranged to face the array board and a facing board.
A sealing material for joining the array substrate and the facing substrate is provided.
Wherein the clock signal and the power signal through the pads provided on the peripheral region located between the display area and the first end of the array substrate, supplied to the clock line and the power line, respectively Being done
The slit has a first slit, a second slit, and a third slit provided at positions overlapping with the sealing material.
Wherein the first slit has a first portion and a second portion extending in the extending direction of the front Symbol supply wiring, the third portion and the fourth extending in a direction intersecting with the first portion and the second portion Has a part, and
The first portion is provided along the wiring and is located between the display area and the second end portion of the array substrate.
The second portion is located between the third end portion of the array substrate facing the second end portion and the display area.
The third portion is located between the fourth end portion of the array substrate facing the first end portion and the display area.
The fourth portion is located between the first end portion and the display area.
The second slit is located between the display area and the second end portion, is provided along the first portion, and is arranged at a distance from the first portion.
The third slit is located between the display area and the third end portion, is provided along the second portion, and is arranged at a distance from the second portion .
In a plan view, the first portion, the second portion, the second slit, and the third slit do not overlap with the clock wiring and the power supply wiring.
The power supply wiring is located on the display area side of the first slit.
Table display panel. The sealing material is filled in the first slit, the second slit and the third slit.
The display panel according to claim 1. The inorganic insulating film is exposed from the organic insulating film by the first slit, the second slit and the third slit.
The display panel according to claim 1. The sealing material is in contact with the inorganic insulating film in the first slit, the second slit and the third slit.
The display panel according to claim 3. The second slit is located closer to the display area than the first portion.
The third slit is located closer to the display area than the second portion.
The display panel according to claim 1. The sealing material is a moisture-proof member.
The display panel according to any one of claims 1 to 5. Further provided with a liquid crystal layer formed in the space surrounded by the sealing material,
The array substrate further has an alignment film formed in at least the display region.
A part of the alignment film is formed in at least one of a slit group including the second slit and the third slit, and the first slit.
The display panel according to claim 1. The alignment film is a moisture-proof member.
The display panel according to claim 7. The array substrate further comprises a spacer that holds a gap between the array substrate and the facing substrate.
The spacer is located closer to the display area than the first slit, the second slit, and the third slit.
The display panel according to claim 1. Further, it has a protrusion provided between the array substrate and the facing substrate, and has a protrusion.
The protrusion is in contact with only one of the array substrate and the facing substrate.
The display panel according to claim 1. The first slit, the second slit, and the third slit are located on the display area side of the protrusion.
The display panel according to claim 10. The drive circuit is a peripheral circuit directly formed on the array substrate.
The display panel according to claim 1. The third portion is connected to one end of the first portion and one end of the second portion.
The fourth portion is connected to the other end of the first portion and the other end of the second portion.
The display panel according to claim 1. The display area is surrounded by the first portion, the second portion, the third portion, and the fourth portion.
Display panel according to any one of claims 1乃optimum 13. The display panel according to claim 1, wherein the power supply wiring is located between the first portion and the second slit, and between the second portion and the third slit. The display panel according to claim 1, wherein the first slit is located on the display area side of the clock wiring.

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