JP6956666B2 - Imaging device, flying object and image sensor driving method - Google Patents

Description

The present invention relates to an image pickup device, a flying object, and an image sensor driving method.

Many image sensors have been developed in which a large number of photodetectors are arranged in an array on a semiconductor substrate and a signal charge reading circuit and an output amplifier are provided on the same substrate. In remote sensing, a linear image sensor in which optical detectors are arranged in a one-dimensional array in the CT direction, which is the horizontal direction, is mounted on the artificial satellite, and the direction perpendicular to the array matches the AT direction, which is the traveling direction of the satellite. A two-dimensional image of the ground surface is taken by letting it. "CT" is an abbreviation for Cross Truck. "AT" is an abbreviation for Along Truck. In order to improve the image resolution, it is desirable to make the pixel pitch as small as possible, but there is a problem that the amount of incident light is reduced by the amount that the area of the photodetector is reduced and the S / N is deteriorated. "S / N" is an abbreviation for Signal-to-Noise ratio.

A TDI type image sensor has been developed as a means for improving S / N. "TDI" is an abbreviation for Time Delivery and Integration. The TDI method is a reading method of a CCD image sensor that uses an FFT type CCD which is a two-dimensional image sensor and improves the S / N by synchronizing the charge transfer timing with the movement timing of the subject image. "FFT" is an abbreviation for Full Frame Transform. "CCD" is an abbreviation for Charge Coupled Device. In the case of remote sensing, TDI operation can be realized by matching the vertical charge transfer with the moving speed of the satellite. When the K-stage TDI operation is performed on the vertical CCD, the accumulation time is effectively K times, so that the sensitivity is improved K times and the S / N is improved √K times.

In the case of a general two-dimensional image sensor, the charge transfer in the vertical direction is performed during the horizontal blanking period, and one step of vertical transfer is performed for each signal read in one horizontal line. However, when this driving method is applied to the TDI linear image sensor used for remote sensing, there arises a problem that the obtained image is blurred in the AT direction, that is, the MTF is deteriorated. This is because the movement of the subject image projected on the incident surface of the image sensor is continuous and smooth, whereas the charge transfer of the vertical CCD is stepwise, so that it is the maximum between the subject image and the CCD potential well. This is due to the deviation of one line. As a countermeasure, if the horizontal transfer period is divided into multiple times and vertical transfer is performed, the above deviation becomes smaller and MTF deterioration is suppressed, but spike-like coupling noise is superimposed on the signal output due to the interference of the vertical transfer clock. The problem arises. "MTF" is an abbreviation for Modulation Transfer Function.

Patent Document 1 discloses a method of canceling a noise component caused by each drive signal by driving two of a plurality of vertical transfer clocks in opposite phases to each other.

As a method of improving the image resolution without reducing the pixel pitch, Patent Document 2 uses two linear image sensors having the same pixel pitch, and oversampling detection in which they are arranged so as to be shifted by 1/2 pixel pitch from each other. The vessel chip is disclosed. An image with high resolution can be obtained by image processing the output signals obtained from the two image sensors. Compared with the case of simply reducing the pixel pitch, there is an advantage that the sensitivity does not decrease because the area of the photodetector is maintained. Since the relative positional relationship between the two image sensors is important in image processing by oversampling, the position accuracy is insufficient in the method of mounting different chips side by side. Therefore, a method of creating a layout pattern on a mask on a single chip is used.

Japanese Unexamined Patent Publication No. 2007-097018 Special Table No. 10-508172

According to the driving method described in Patent Document 1, although the coupling noise due to the interference of the vertical transfer clock is reduced, the maximum amount of charge that can be transferred by the vertical CCD, that is, the pixel saturation charge amount is reduced, and the dynamic range is increased. There is a problem of becoming smaller.

In the oversampling detector chip described in Patent Document 2, since two CCDs are arranged, there is a problem that the influence of the interference of the vertical transfer clock is doubled and the coupling noise is further increased.

An object of the present invention is to reduce coupling noise generated by the influence of transfer clock interference without reducing the amount of pixel saturation charge in a configuration using two TDI type image sensors.

The imaging device according to one aspect of the present invention is
A transfer clock in which the period from the rising edge to the falling edge is longer than the period from the falling edge to the rising edge is given, and the time-delayed integral of the charge obtained by photoelectric conversion in the pixel group and the transfer of the charge between the pixels are given. Two image sensors that generate individual image signals by performing according to the transferred transfer clock,
A first clock is given to one of the two image sensors as the transfer clock, and a second clock whose falling timing coincides with the rising timing of the first clock is given to one of the two image sensors as the transfer clock. A drive unit for driving the two image sensors is provided.

In the present invention, the two image sensors are provided with a transfer clock in which the period from the rising edge to the falling edge is longer than the period from the falling edge to the rising edge. The rising timing of the clock given to one of the two image sensors coincides with the falling timing of the clock given to the other of the two image sensors. Therefore, according to the present invention, in a configuration using two TDI type image sensors, it is possible to reduce the coupling noise generated due to the influence of the interference of the transfer clock without reducing the pixel saturation charge amount.

The block diagram which shows the structure of the image pickup apparatus which concerns on Embodiment 1. FIG. The element plan view which shows the structure of the TDI type linear image sensor which concerns on Embodiment 1. FIG. The element plan view which shows the arrangement of the pixel array of two CCDs of the TDI system linear image sensor which concerns on Embodiment 1. FIG. FIG. 6 is a timing diagram schematically showing the timing of the vertical transfer clock of the TDI system linear image sensor according to the first embodiment. The timing diagram which shows the timing of the drive clock of the TDI system linear image sensor which concerns on Embodiment 1. FIG. The figure which shows the formation position of the potential well on the pixel array of two CCDs of the TDI type linear image sensor which concerns on Embodiment 1. FIG. The figure for demonstrating the method of increasing the resolution by oversampling which concerns on Embodiment 1. FIG. FIG. 6 is a timing diagram schematically showing the timing of the vertical transfer clock of the TDI type linear image sensor according to the second embodiment. The element plan view which shows the arrangement of the pixel array of two CCDs of the TDI system linear image sensor which concerns on Embodiment 3. FIG. The layout diagram which shows the planar structure of the whole element of the TDI system linear image sensor which concerns on a comparative example. The layout diagram which enlarged a part of the pixel area of the TDI system linear image sensor which concerns on a comparative example. The figure which showed the schematic diagram of the cross-sectional structure along the transfer direction of the 4-phase drive CCD of the TDI system linear image sensor which concerns on a comparative example, and the state of the potential change of a transfer channel in time series. The figure which shows the waveform of the clock given to the 4-phase drive CCD of the TDI system linear image sensor which concerns on a comparative example. FIG. 12 is an enlarged view showing the period from time t1 to time t3 in the transfer clock corresponding to FIG. FIG. 13 is an enlarged view showing a period from time t1 to time t3 in the transfer clock corresponding to FIG. The figure which shows the relationship between the vertical transfer clock and the maximum transfer charge amount different from FIG. The figure which shows the relationship between the vertical transfer clock and the maximum transfer charge amount different from FIG.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In each figure, the same or corresponding parts are designated by the same reference numerals. In the description of the embodiment, the description will be omitted or simplified as appropriate for the same or corresponding parts. The present invention is not limited to the embodiments described below, and various modifications can be made as needed. For example, among the embodiments described below, two or more embodiments may be combined and implemented. Alternatively, of the embodiments described below, one embodiment or a combination of two or more embodiments may be partially implemented.

Embodiment 1.
In order to facilitate the understanding of the present embodiment, first, the configuration and the driving method of the TDI type image sensor according to the comparative example will be described with reference to FIGS. 10 to 17.

FIG. 10 is a layout diagram showing a planar structure of the entire element of the TDI type image sensor of the comparative example using a 4-phase drive CCD as the vertical CCD. FIG. 11 is a layout diagram in which a part of the pixel area of the TDI type image sensor shown in FIG. 10 is enlarged.

In the layout of FIG. 10, pixel groups are arranged in a two-dimensional array on the surface of the Si substrate to form the pixel array 21. The signal charge integrated with a time delay by the TDI method is transferred in the vertical direction toward the horizontal CCD 22, and further transferred in the horizontal direction by the horizontal CCD 22, and is read out from the output circuit 26. A charge storage unit 24 is provided between the pixel array 21 and the horizontal CCD 22. A charge discharge drain 25 for discharging unnecessary charges is provided on the side of the pixel array 21 opposite to the horizontal CCD 22. In the example of FIG. 10, a 4-phase drive CCD is used for vertical TDI transfer. In FIG. 10, the lower part is the vertical direction and the right side is the horizontal direction.

As shown in FIG. 11, a set of four transfer electrodes 29 made of polysilicon, that is, transfer electrodes 29a, 29b, 29c, and 29d are arranged on the Si substrate, and a transfer (not shown) is below the transfer electrodes 29a, 29b, 29c, and 29d. Channels are formed. This transfer channel is formed of a conductive type impurity region opposite to the Si substrate, and is further electrically separated by a separation region 30 composed of a conductive type impurity region opposite to the transfer channel. In the 4-phase drive CCD, the pixel array 21 is formed by the transfer electrodes 29a, 29b, 29c, and 29d. The transfer electrodes 29a, 29b, 29c, and 29d are provided with CCD transfer clocks φV1, φV2, φV3, and φV4 from the four input pins 28 via the metal wiring 27.

The transfer operation of the image sensor configured in this way will be described.

FIG. 12 is a diagram showing a schematic view of the cross-sectional structure of the 4-phase driven CCD along the transfer direction and the state of the potential change of the transfer channel in chronological order. FIG. 13 shows the waveform of the clock given to the 4-phase drive CCD.

When the transfer clocks φV1, φV2, φV3, φV4 shown in FIG. 13 are given to the transfer electrodes 29a, 29b, 29c, 29d of the 4-phase drive CCD from the four input pins 28, the potential of the transfer channel from time t1 to time t5. The distribution is as shown in FIG. Here, the High voltage of the CCD transfer clock is set to "H" and the Low voltage is set to "L". As shown in FIG. 12, a potential well 31 is formed under the transfer electrode 29 to which the H voltage is applied among the transfer electrodes 29. The signal charge 32 generated by the light incident on the image sensor is transferred to the right side of the drawing as the potential well 31 moves to the right side of the drawing due to the transfer operation of the CCD. At this time, the time delay integration operation, that is, the TDI operation can be realized by matching the moving speed of the subject image with the CCD transfer speed, and the signal charge 32 generated by the light incident by the subject image corresponds to the image position. It is vertically transferred while being accumulated in the potential well 31.

In the case of a general two-dimensional image sensor, the charge transfer in the vertical direction is performed during the horizontal blanking period, and one step of vertical transfer is performed for each signal read in one horizontal line. When this general transfer method is applied to the TDI linear image sensor used for remote sensing, the maximum positional relationship between the subject image projected on the detector surface and the potential well 31 to be vertically transferred is maximum. A deviation of one line occurs, and the MTF along the traveling direction of the artificial satellite is deteriorated, that is, the image is blurred. This is because the movement of the subject image is continuous and smooth, whereas the movement of the potential well 31 by the CCD transfer is gradual.

In order to minimize the deviation between the subject image and the potential well 31 and suppress the deterioration of the MTF, for example, in a 4-phase drive CCD, the effective electrode length of each phase, that is, the transfer direction length of the transfer electrode 29 Of these, the electrode lengths excluding the gate overlap and the like may be equal to each other, and the transfer clock shown in FIG. 13 may be set so that the time t1 to the time t5 are evenly spaced. At this time, by performing the vertical transfer in a plurality of times during the signal reading period, that is, the imaging cycle, the dissociation between the subject image and the potential well 31 can be reduced, and the MTF deterioration is suppressed. In this example, the vertical transfer is performed in four steps during the imaging cycle.

If the charge is transferred in the vertical direction during the signal reading period, there arises a problem that coupling noise is superimposed on the signal output. This is because when the H voltage and the L voltage given to the transfer clock are switched, a large charge / discharge current flows through the MOS capacitance composed of the transfer electrode 29 and the Si substrate, and the substrate potential of the output circuit 26 fluctuates. It occurs in. "MOS" is an abbreviation for Metal-Oxide-Semiconductor. As a countermeasure, as described in Patent Document 1, a method is used in which two of a plurality of vertical transfer clocks are driven in opposite phases to cancel out noise components caused by the respective drive signals. Can be considered. 12 and 13 show an example in which this method is applied to a 4-phase drive CCD. By making φV1 and φV3 out of phase with each other and φV2 and φV4 out of phase with each other, coupling noise is reduced. Will be done.

The maximum value of the signal charge amount that can be transferred by the CCD, that is, the pixel saturation charge amount will be described.

14 and 15 are equivalent to FIGS. 12 and 13, and show an enlarged period from time t1 to time t3 in the transfer clock shown in FIG. The signal charge 32 shown in FIG. 14 schematically represents the maximum amount of charge that can be accumulated in the potential well 31 during the transfer operation.

The maximum charge transfer amount of the CCD is determined by the minimum value of the capacity of the potential well 31 during the transfer operation. In FIG. 15, for example, at time t1 and time t2, two adjacent transfer clocks are H voltages, and potential wells 31 for two transfer gates are formed. On the other hand, in the transition period in which H and L of the transfer clock are switched, only one of the transfer clocks is the H voltage, and the two on both sides thereof are at intermediate levels between H and L. For example, at time tA, the φV2 gate is H, the φV1 gate and the φV3 gate are at an intermediate level between H and L, and the capacity of the potential well 31 formed at this time is smaller than that at time t1 and time t2. As a result, the maximum transfer charge amount in the drive clock of FIG. 15 is smaller than the capacity of two transfer gates.

If two transfer gates are to be secured as the maximum charge transfer amount of the CCD, a drive method may be adopted in which two adjacent transfer clocks always have an H voltage. 16 and 17 show examples of such a driving method. In this example, the maximum transfer charge amount can be secured by lengthening the H period of each transfer clock as compared with the L period. However, in this case, the charge / discharge current generated by switching the transfer clock is not canceled, so that the coupling noise is not reduced.

The present embodiment will be described with reference to FIGS. 1 to 7.

*** Explanation of configuration ***
The configuration of the image pickup apparatus 10 according to the present embodiment will be described with reference to FIG.

The imaging device 10 is used in fields such as remote sensing. Although not shown, the image pickup device 10 is provided in a flying object such as an artificial satellite or an aircraft in the present embodiment. The image pickup device 10 may be provided in factory equipment or the like.

The image pickup apparatus 10 includes an optical unit 11, a drive unit 12, a TDI linear image sensor 13, and a signal processing unit 14.

The optical unit 11 is, for example, a lens.

The drive unit 12 and the signal processing unit 14 are electronic circuits such as, for example, a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, a logic IC, a GA, an FPGA or an ASIC. "IC" is an abbreviation for Integrated Circuit. "GA" is an abbreviation for Gate Array. "FPGA" is an abbreviation for Field-Programmable Gate Array. "ASIC" is an abbreviation for Application Special Integrated Circuit.

The configuration of the TDI type linear image sensor 13 according to the present embodiment will be described with reference to FIGS. 2 and 3.

As shown in FIG. 2, in the TDI system linear image sensor 13, two image sensors 15 are arranged on the same substrate 16. Each image sensor 15 is a CCD, and is the same as the TDI type linear image sensor of the comparative example shown in FIG. Hereinafter, the first image sensor 15a, which is one of the two image sensors 15, may be referred to as "CCD-A", and the second image sensor 15b, which is the other of the two image sensors 15, may be referred to as "CCD-B".

The first image sensor 15a includes a pixel array 21a formed by arranging pixel groups in a two-dimensional array in the horizontal direction and the vertical direction. Similarly, the second image sensor 15b includes a pixel array 21b formed by arranging pixel groups in a two-dimensional array in the horizontal direction and the vertical direction.

In the figure, the horizontal CCD 22a, the charge storage unit 24a, and the output circuit 26a of the first image sensor 15a are the same as the horizontal CCD 22, the charge storage unit 24, and the output circuit 26 of the comparative example shown in FIG. The horizontal CCD 22b, the charge storage unit 24b, and the output circuit 26b of the second image sensor 15b are also the same as the horizontal CCD 22, the charge storage unit 24, and the output circuit 26 of the comparative example shown in FIG.

FIG. 3 is a plan view showing the relative positional relationship between the pixel array 21a of the first image sensor 15a and the pixel array 21b of the second image sensor 15b in the TDI linear image sensor 13 shown in FIG. As shown in FIG. 3, in the TDI linear image sensor 13, the pixel array 21a of the first image sensor 15a and the pixel array 21b of the second image sensor 15b are arranged so as to be displaced by 1/2 pixel pitch in the horizontal direction. , Consists of an oversampling detector. In the vertical direction, the pixel array 21a of the first image sensor 15a and the pixel array 21b of the second image sensor 15b are arranged so as to be separated by a pixel pitch (M + 1 / 2-1 / 8). M is an integer.

*** Explanation of operation ***
The operation of the image pickup apparatus 10 according to the present embodiment will be described with reference to FIGS. 4 to 7. The operation of the image pickup apparatus 10 corresponds to the image sensor driving method according to the present embodiment.

FIG. 4 is a timing diagram schematically showing the timing of the vertical transfer clock and the signal output period for explaining the driving method of the TDI type linear image sensor 13.

The vertical transfer clock for driving the first image sensor 15a, that is, the transfer clocks φV1, φV2, φV3, φV4 of the CCD-A are vertical when driving the four-phase drive CCD in the examples of FIGS. 16 and 17. Similar to the transfer clock, the H period is longer than the L period. In the present embodiment, the H period of each vertical transfer clock is 5/8 times the imaging cycle, and the L period of each vertical transfer clock is 3/8 times the imaging cycle. By making the H period longer than the L period in this way, the maximum transfer charge amount of the first image sensor 15a can be secured.

Further, the vertical transfer clock for driving the second image sensor 15b, that is, the transfer clocks φV1, φV2, φV3, φV4 of the CCD-B sets the vertical transfer clock for driving the first image sensor 15a in the imaging cycle. It is delayed by 1/8. By making the H period longer than the L period in this way, the maximum transfer charge amount of the second image sensor 15b can be secured.

Further, the vertical transfer clock for driving the first image sensor 15a, that is, the transfer clocks φV1, φV2, φV3, φV4 of the CCD-A, and the vertical transfer clock for driving the second image sensor 15b, that is, the CCD. The transfer clocks φV1, φV2, φV3, and φV4 of −B are combined so that two of the eight vertical transfer clocks in total coincide with the rising timing and the falling timing of the clocks. For example, at time t0, the φV1 clock of the CCD-A rises, and at the same time, the φV2 clock of the CCD-B falls. As a result, at all the φV clock switching timings, the charge / discharge current generated by the transfer clock switching is canceled out, and the coupling noise is reduced.

As described above, in the present embodiment, the two image sensors 15 are provided with a transfer clock in which the period from the rising edge to the falling edge is longer than the period from the falling edge to the rising edge. Then, these two image sensors 15 perform individual image signals by performing time delay integration of electric charge obtained by photoelectric conversion in a pixel group and electric charge transfer between pixels according to a given transfer clock. To generate.

The drive unit 12 gives the first clock to the first image sensor 15a as the transfer clock, and gives the second image sensor 15b a second clock whose falling timing coincides with the rising timing of the first clock as the transfer clock. This drives the two image sensors 15. Specifically, the drive unit 12 drives the two image sensors 15 in 2N phases by giving 2N clocks as the first clock and the second clock to the two image sensors 15. N is a natural number. In this embodiment, N is 2.

The 2N clocks given as the first clock have a one-to-one correspondence with the 2N clocks given as the second clock. The rising timing of each clock given as the first clock coincides with the falling timing of the corresponding clock given as the second clock. Therefore, according to the present embodiment, it is possible to reduce the coupling noise generated due to the influence of the interference of the transfer clock.

Each of 2N clock applied to two image sensors 15 is made by 2/8 cycle longer than the period from the falling period from the rising to the falling to the rising. Therefore, according to the present embodiment, a sufficient amount of pixel saturation charge can be secured.

The transfer clocks such as the first clock and the second clock are clocks for controlling the timing of charge transfer in the vertical direction. As shown in FIG. 3, in the present embodiment, the pixel array 21a provided in the first image sensor 15a is halved in the horizontal direction with respect to the pixel array 21b provided in the second image sensor 15b. They are arranged so as to be shifted by the pixel pitch, and are arranged so as to be separated by the pixel pitch in the vertical direction (M + 1 / 2-1 / 8). As will be described later, the vertical interval may be a (M + 1/2 + 1/8 ) pixel pitch.

In most general oversampling detectors, the two pixel arrays are arranged vertically apart by (M + 1/2) pixel pitch, and the TDI linear image sensor 13 according to the present embodiment is used. Is different in the interval by 1/8 pixel pitch. The difference will be explained.

FIG. 5 is a diagram similar to FIG. 4, and is a timing diagram schematically showing the vertical transfer clock and the timing of the signal output period of the TDI system linear image sensor 13. FIG. 6 shows a comparison of the schematic arrangements of the potential wells formed in the pixel arrays 21a and 21b at the time tX and the time tY in FIG. Here, in FIG. 6, among the transfer gates V1, V2, V3, and V4 in the pixel arrays 21a and 21b, the portions where the potential wells are formed are shown by hatching.

As shown in FIG. 5, the vertical transfer clock of the second image sensor 15b is delayed by 1/8 of the vertical transfer clock of the first image sensor 15a. Therefore, as shown in FIG. 6, the pixel array 21a The potential wells formed at 21b are formed in the second image sensor 15b with a delay of 1/8 pixel pitch as compared with the first image sensor 15a. However, in the TDI linear image sensor 13, as shown in FIG. 3, the vertical distance between the two pixel arrays 21a and 21b is set to the (M + 1 / 2-1 / 8) pixel pitch, and 1/8 pixel is used. Only the pitch has been shortened. As a result, the two captured images obtained by the TDI linear image sensor 13 become image data of lattice points shifted by 1/2 pixel pitch from each other in the vertical and horizontal directions as shown in FIG. 7, and oversampling. Provides a good high resolution image. The image processing by this oversampling is executed by the signal processing unit 14.

Specifically, in the example of FIG. 7, the two images obtained by the main sensor and the sub sensor are imaged with a deviation of 1/2 pixel pitch from each other. As shown in FIG. 7, the images in the vertical and horizontal directions are obtained by image processing such as synthesizing the two images by shifting them in the horizontal direction and the vertical direction, and further obtaining the image data of the lattice points by a method such as interpolation. A double high resolution image can be obtained. In FIG. 7, the grid points are represented by triangular marks. Of the image sensors 15, the first image sensor 15a corresponds to the main sensor and the second image sensor 15b corresponds to the sub sensor. Alternatively, the second image sensor 15b corresponds to the main sensor, and the first image sensor 15a corresponds to the sub sensor.

*** Explanation of the effect of the embodiment ***
In the present embodiment, the two image sensors 15 are provided with a transfer clock in which the period from the rising edge to the falling edge is longer than the period from the falling edge to the rising edge. The rising timing of the clock given to one of the two image sensors 15 coincides with the falling timing of the clock given to the other of the two image sensors 15. Therefore, according to the present embodiment, in the configuration using two TDI type image sensors 15, the coupling noise generated due to the influence of the interference of the transfer clock can be reduced without reducing the pixel saturation charge amount. can.

In the present embodiment, the transfer clock for driving the TDI linear image sensor 13 in which two 4-phase driven vertical CCDs are arranged in parallel on the same substrate 16 is set as follows.
-The H voltage period of the vertical transfer clock is longer than the L voltage period.
-For each vertical transfer clock given to the two CCDs, the rising timing of each transfer clock of one CCD coincides with the falling timing of one of the transfer clocks of the other CCD.

According to this embodiment, an oversampling detector in which two CCDs are formed on the same substrate 16 can be configured to improve the resolution. Then, in this oversampling detector, it is possible to provide the TDI type linear image sensor 13 and its driving method in which the coupling noise due to the vertical transfer clock is reduced without reducing the pixel saturation charge amount. That is, according to the present embodiment, it is possible to provide a TDI type linear image sensor 13 having high resolution, excellent MTF, a large pixel saturation charge amount, and reduced influence of coupling noise due to a vertical transfer clock. can.

*** Other configurations ***
In the present embodiment, the vertical spacing of the pixel arrays 21a and 21b is shortened by 1/8 pixel pitch as the (M + 1 / 2-1 / 8) pixel pitch, and the vertical transfer clock of the second image sensor 15b is set to the first. Although the image sensor 15a is delayed by 1/8 of the vertical transfer clock, the same effect can be obtained even if this is reversed. That is, the vertical spacing of the pixel arrays 21a and 21b is widened by 1/8 pixel pitch as the (M + 1/2 + 1/8) pixel pitch, and the vertical transfer clock of the second image sensor 15b is changed to the vertical transfer clock of the first image sensor 15a. It may be preceded by 1/8 imaging cycle.

Embodiment 2.
The difference between the present embodiment and the first embodiment will be mainly described with reference to FIG.

*** Explanation of configuration ***
Since the configuration of the image pickup apparatus 10 according to the present embodiment is the same as that of the first embodiment shown in FIG. 1, the description thereof will be omitted.

Since the configuration of the TDI type linear image sensor 13 according to the present embodiment is the same as that of the first embodiment shown in FIGS. 2 and 3, the description thereof will be omitted.

*** Explanation of operation ***
The operation of the image pickup apparatus 10 according to the present embodiment will be described with reference to FIG. The operation of the image pickup apparatus 10 corresponds to the image sensor driving method according to the present embodiment.

FIG. 8 is a timing diagram schematically showing the timing of the vertical transfer clock and the signal output period for explaining the driving method of the TDI type linear image sensor 13.

The vertical transfer clock shown in FIG. 8 is obtained by lengthening the rise time and the fall time of each clock with respect to the vertical transfer clock of the TDI system linear image sensor 13 according to the first embodiment shown in FIG. ..

*** Explanation of the effect of the embodiment ***
According to the present embodiment, the rising and falling edges of the vertical CCD transfer clock become gentle, so that the transfer efficiency of the CCD is improved. At the same time, since the charge / discharge time of the gate capacitance at the time of switching the transfer clock becomes long, the charge / discharge current per unit time is reduced, and the influence of coupling noise is reduced. Further, the vertical transfer clock of the TDI system linear image sensor 13 according to the present embodiment shown in FIG. 8 is the same as the vertical transfer clock of the TDI system linear image sensor 13 according to the first embodiment shown in FIG. Two of the eight vertical transfer clocks in total are combined so that the rising and falling timings of the clocks match. As a result, the charge / discharge current generated by the switching of the transfer clock is canceled out, and the coupling noise is further reduced.

Further, according to the present embodiment, since the image sensor 15 is driven so that at least two of the vertical transfer clocks φV1, φV2, φV3, and φV4 are always H voltage, the maximum transfer charge amount, that is, pixel saturation. The amount of charge is secured.

Further, in the present embodiment, the vertical transfer clock of the second image sensor 15b is delayed by 1/8 of the vertical transfer clock of the first image sensor 15a by 1/8 imaging cycle. Therefore, as in the first embodiment, the vertical spacing of the pixel arrays 21a and 21b is set to the (M + 1 / 2-1 / 8) pixel pitch, and the two captured images are shortened by the 1/8 pixel pitch. Is the image data of the lattice points shifted by 1/2 pixel pitch from each other in the vertical and horizontal directions, and a good high-resolution image can be obtained by oversampling.

*** Other configurations ***
In the present embodiment, as in the first embodiment, the vertical spacing of the pixel arrays 21a and 21b is shortened by 1/8 pixel pitch as the (M + 1 / 2-1 / 8) pixel pitch, and the second image sensor is used. The vertical transfer clock of 15b is delayed by 1/8 of the vertical transfer clock of the first image sensor 15a, but the same effect can be obtained even if this is reversed. That is, the vertical spacing of the pixel arrays 21a and 21b is widened by 1/8 pixel pitch as the (M + 1/2 + 1/8) pixel pitch, and the vertical transfer clock of the second image sensor 15b is changed to the vertical transfer clock of the first image sensor 15a. It may be preceded by 1/8 imaging cycle.

Embodiment 3.
The difference between the present embodiment and the first embodiment will be mainly described with reference to FIG.

*** Explanation of configuration ***
Since the configuration of the image pickup apparatus 10 according to the present embodiment is the same as that of the first embodiment shown in FIG. 1, the description thereof will be omitted.

The configuration of the TDI type linear image sensor 13 according to the present embodiment will be described with reference to FIG.

FIG. 9 is a plan view showing the relative positional relationship between the pixel array 21a of the first image sensor 15a and the pixel array 21b of the second image sensor 15b in the TDI system linear image sensor 13 according to the present embodiment. .. As shown in FIG. 9, in the TDI system linear image sensor 13 according to the present embodiment, the pixel array 21a of the first image sensor 15a and the pixel array 21b of the second image sensor 15b are vertically (M-1 /). 8) Arranged so as to be separated by the pixel pitch. In the horizontal direction, the pixel array 21a of the first image sensor 15a and the pixel array 21b of the second image sensor 15b are arranged so as not to be displaced.

As described above, in the present embodiment, the pixel array 21a provided in the first image sensor 15a is arranged so as to be aligned in the horizontal direction with respect to the pixel array 21b provided in the second image sensor 15b. They are arranged vertically apart by the pixel pitch (M-1 / 8). As will be described later, the vertical interval may be a (M + 1/8 ) pixel pitch.

*** Explanation of operation ***
Since the operation of the image pickup apparatus 10 according to the present embodiment is the same as that of the first embodiment shown in FIGS. 4 to 6, the description thereof will be omitted.

In this embodiment, the oversampling detector is not configured. When the TDI linear image sensor 13 is driven by the vertical transfer clock shown in FIG. 4 or 8, the vertical transfer clock of the second image sensor 15b has a 1/8 imaging cycle with respect to the vertical transfer clock of the first image sensor 15a. In the end, the two captured images have the same grid points as the image data.

*** Explanation of the effect of the embodiment ***
In the present embodiment, for example, if the number of TDI stages of the two image sensors 15 is set to different values, one image sensor 15 has high sensitivity and the other image sensor 15 has low sensitivity but a wide dynamic range. The configuration is obtained. Since image data of the same grid point can be obtained from the two image sensors 15, by performing image processing on the two captured images, it is possible to acquire a captured image having high sensitivity and a wide dynamic range.

Further, in the present embodiment, if the spectral sensitivity characteristics of the two image sensors 15 are made different by, for example, forming a spectral filter on the incident surface side, 2 of the same lattice points for light of different wavelengths are used. Three captured images are obtained. Further, by combining two of these and configuring the four image sensors 15 using a color filter such as R / G / B / IR, a color captured image can be acquired. "IR" is an abbreviation for Infrared.

According to the present embodiment, as in the first and second embodiments, the TDI linear image sensor 13 in which the coupling noise due to the vertical transfer clock is reduced without reducing the pixel saturation charge amount can be obtained. ..

*** Other configurations ***
In the present embodiment, the vertical spacing of the pixel arrays 21a and 21b is shortened by 1/8 pixel pitch as the (M-1 / 8) pixel pitch, and the vertical transfer clock of the second image sensor 15b is set to the first image sensor. Although the imaging cycle is delayed by 1/8 with respect to the vertical transfer clock of 15a, the same effect can be obtained even if this is reversed. That is, the vertical spacing of the pixel arrays 21a and 21b is widened by 1/8 pixel pitch as the (M + 1/8) pixel pitch, and the vertical transfer clock of the second image sensor 15b is set with respect to the vertical transfer clock of the first image sensor 15a. It is also possible to precede by the 1/8 imaging cycle.

10 Imaging device, 11 Optical unit, 12 Drive unit, 13 TDI linear image sensor, 14 Signal processing unit, 15 Image sensor, 15a 1st image sensor, 15b 2nd image sensor, 16 substrate, 21 pixel array, 21a pixel array , 21b pixel array, 22 horizontal CCD, 22a horizontal CCD, 22b horizontal CCD, 24 charge storage unit, 24a charge storage unit, 24b charge storage unit, 25 charge discharge drain, 26 output circuit, 26a output circuit, 26b output circuit, 27 Metal wiring, 28 input pins, 29 transfer electrodes, 29a transfer electrodes, 29b transfer electrodes, 29c transfer electrodes, 29d transfer electrodes, 30 separation regions, 31 potential wells, 32 signal charges.

Claims (8)

A transfer clock in which the period from the rising edge to the falling edge is longer than the period from the falling edge to the rising edge is given, and the time-delayed integral of the charge obtained by photoelectric conversion in the pixel group and the transfer of the charge between the pixels are given. Two image sensors that generate individual image signals by performing according to the transferred transfer clock,
A first clock is given to one of the two image sensors as the transfer clock, and a second clock whose falling timing coincides with the rising timing of the first clock is given to one of the two image sensors as the transfer clock. By giving to, a drive unit for driving the two image sensors is provided .
The two image sensors include a pixel array formed by arranging the pixel groups in a two-dimensional array in the horizontal direction and the vertical direction, respectively.
The transfer clock is a clock for controlling the timing of transfer of the electric charge in the vertical direction.
When M is an integer, the pixel array provided in one of the two image sensors is horizontally shifted by 1/2 pixel pitch with respect to the pixel array provided in the other of the two image sensors. placed, in the vertical direction (M + 1 / 2-1 / 8 ) pixel pitch or (M + 1/2 + 1 /8) the imaging apparatus that is arranged apart by a pixel pitch. A transfer clock in which the period from the rising edge to the falling edge is longer than the period from the falling edge to the rising edge is given, and the time-delayed integral of the charge obtained by photoelectric conversion in the pixel group and the transfer of the charge between the pixels are given. Two image sensors that generate individual image signals by performing according to the transferred transfer clock,
A first clock is given to one of the two image sensors as the transfer clock, and a second clock whose falling timing coincides with the rising timing of the first clock is given to one of the two image sensors as the transfer clock. By giving to, a drive unit for driving the two image sensors is provided .
The two image sensors include a pixel array formed by arranging the pixel groups in a two-dimensional array in the horizontal direction and the vertical direction, respectively.
The transfer clock is a clock for controlling the timing of transfer of the electric charge in the vertical direction.
When M is an integer, the pixel array provided in one of the two image sensors is vertically aligned with the pixel array provided in the other of the two image sensors. direction (M-1/8) pixel pitch or (M + 1/8) the imaging apparatus that is arranged apart by a pixel pitch. When N is a natural number, the drive unit drives the two image sensors in 2N phases by giving 2N clocks each as the first clock and the second clock to the two image sensors.
The 2N clocks given as the first clock have a one-to-one correspondence with the 2N clocks given as the second clock, and the rising timing is among the 2N clocks given as the second clock. The imaging device according to claim 1 or 2 , which matches the timing of the falling edge of the corresponding clock. Wherein each of the two 2N-number of clock applied to the image sensor, an imaging device according to falling period from the rising to the falling to 2/8 cycle for a longer claim 3 than time to rise. The imaging device according to claim 3 or 4 , wherein N is 2. A flying object including the imaging device according to any one of claims 1 to 5. A transfer clock in which the period from the rising edge to the falling edge is longer than the period from the falling edge to the rising edge is given, and the time delay integration of the charge obtained by photoelectric conversion in the pixel group and the transfer of the charge between the pixels are given. It is an image sensor driving method that drives two image sensors that generate individual image signals by performing according to the transferred transfer clock.
The two image sensors are provided with a pixel array formed by arranging the pixel groups in a two-dimensional array in the horizontal direction and the vertical direction, respectively.
The transfer clock controls the timing of transfer of the charge in the vertical direction.
When M is an integer in the pixel array provided in one of the two image sensors, the pixel array provided in the other of the two image sensors is shifted horizontally by 1/2 pixel pitch. Arrange them vertically by (M + 1 / 2-1 / 8) pixel pitch or (M + 1/2 + 1/8) pixel pitch.
A first clock is given to one of the two image sensors as the transfer clock, and a second clock whose falling timing coincides with the rising timing of the first clock is given to one of the two image sensors as the transfer clock. An image sensor driving method for driving the two image sensors by giving to. A transfer clock in which the period from the rising edge to the falling edge is longer than the period from the falling edge to the rising edge is given, and the time delay integration of the charge obtained by photoelectric conversion in the pixel group and the transfer of the charge between the pixels are given. It is an image sensor driving method that drives two image sensors that generate individual image signals by performing according to the transferred transfer clock.
The two image sensors are provided with a pixel array formed by arranging the pixel groups in a two-dimensional array in the horizontal direction and the vertical direction, respectively.
The transfer clock controls the timing of transfer of the charge in the vertical direction.
When the pixel array provided in one of the two image sensors is an integer M, the pixel array provided in the other of the two image sensors is arranged so as to be vertically aligned with respect to the pixel array provided in the other of the two image sensors. Place them apart by (M-1 / 8) pixel pitch or (M + 1/8) pixel pitch in the direction.
A first clock is given to one of the two image sensors as the transfer clock, and a second clock whose falling timing coincides with the rising timing of the first clock is given to one of the two image sensors as the transfer clock. An image sensor driving method for driving the two image sensors by giving to.

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