JP6951228B2 - Power converter - Google Patents

Description

The present invention relates to a power converter.

In high-voltage or large-capacity power conversion, a power conversion device in which a plurality of power conversion cells (hereinafter, abbreviated as cells) are connected in series or in parallel is used. As such a power converter, there is a multiplex power converter described in Patent Document 1. In this multiplex power converter, the outputs of a plurality of inverter units (corresponding to cells) are connected in series to obtain high-voltage output.

Patent Document 1 describes PWM (Pulse Width Modulation) of a plurality of inverter units.

Specifically, the on / off state of the semiconductor element (switching element) included in each inverter unit is controlled by using a plurality of carrier signals according to the number of inverter units. As a result, a multi-stage (multi-level) output voltage can be obtained.

As described in Patent Document 1, the plurality of carrier signals are in phase with each other. Synchronizing the phases of a plurality of carrier signals is considered to be effective in suppressing harmonic components contained in the output voltage. It is also considered to be effective in suppressing the output voltage from changing by a plurality of levels at a time and adversely affecting a load such as a motor.

Such a configuration of the power conversion device is effective when directly driving the high voltage motor.

In addition, the introduction of renewable energy power generation such as solar power generation and wind power generation is expanding worldwide, but PCS (Power Conditioning System) is a power conversion device for converting the power obtained from natural energy and outputting it to the power system. ). It is considered that a configuration using a plurality of cells is also effective for increasing the voltage and capacity of the PCS.

JP-A-2002-58257

Here, in the following description, synchronizing the phases of a plurality of carrier signals used for PWM of a plurality of cells is defined as PWM synchronization.

Realization of PWM synchronization is considered to have the following problems.

When a central control device is provided for integrated control of a plurality of cells, it is conceivable that the central control device performs PWM processing for all cells and transmits the generated gate signal of the switching element to the control circuit of each cell.

However, since the cell often has a plurality of switching elements instead of one, a plurality of gate signal wirings are provided according to the number of switching elements, which causes a problem of complicated power conversion device and high cost. It becomes.

An object of the present invention is to realize a low-cost power conversion device that performs PWM synchronization.

In order to achieve the above object, the present invention is configured as follows.

The power conversion device includes a plurality of power conversion cells that convert a power supply voltage into a voltage supplied to a load, and a central control device that controls the plurality of power conversion cells, and each of the plurality of power conversion cells has a plurality of power conversion cells. The first converter that converts the power supply voltage, the first control circuit that controls the first converter, the second converter that converts the voltage converted by the first converter, and the second converter. The central control device has a second control circuit for controlling the voltage by pulse width modulation and a transformer connected between the first converter and the second converter, and the central control device is a power conversion cell for each of the plurality of power conversion cells. The first control circuit of each of the plurality of power conversion cells has a control signal transmission unit for transmitting the first control signal to the first control circuit of the above-mentioned first control circuit. It has a synchronization signal transmission unit that controls one converter and transmits a synchronization signal to the first control circuit of each of the plurality of power conversion cells, and the first control circuit receives the synchronization signal. The second control signal is transmitted to the second control circuit, and when the second control circuit receives the second control signal, the carrier signal of the pulse width modulation is reset and transmitted to the first control circuit. The first control signal includes information on the duty ratio of the pulse width modulation, and the information on the duty ratio is transmitted to the second control circuit via the first control circuit, and the information of the plurality of power conversion cells is transmitted. Each of the second control circuits performs pulse width modulation based on the duty ratio to drive the second converter .

According to the present invention, it is possible to realize a low-cost power conversion device that performs PWM synchronization.

It is a schematic block diagram of the power conversion apparatus in Example 1. FIG. It is a figure which shows the circuit structure example of a cell. It is a figure which shows the PWM operation waveform of a cell when the output voltage is controlled to a positive value. It is a figure which shows the PWM operation waveform of a cell when the output voltage is controlled to a negative value. It is a figure which shows an example of the composite output voltage waveform. It is a timing chart which shows the principle of PWM synchronization of Example 1. FIG. It is a figure which shows the specific data structure example of the 1st control signal. It is a figure which shows the specific data structure example of the 2nd control signal. It is a figure which shows the structural example of the 1st control circuit of a cell. It is a figure which shows the structural example of the 2nd control circuit of a cell. It is a timing chart which shows another example of PWM synchronization of Example 1. FIG. It is a timing chart which shows the principle of PWM synchronization in Example 2. It is a timing chart which shows the principle of PWM synchronization in Example 3. It is a schematic block diagram of the power conversion apparatus in Example 4. FIG. It is a timing chart which shows the principle of PWM synchronization in Example 4. It is a schematic block diagram of the power conversion apparatus in Example 5. It is a schematic block diagram of the power conversion apparatus 4 in Example 6.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

(Example 1)
FIG. 1 is a schematic configuration diagram of a power conversion device according to a first embodiment of the present invention.

In FIG. 1, the power conversion device 1 converts the power input from the external power supply 300 and outputs it to the external load 400. Further, the power conversion device 1 includes a plurality of cells 101 to 104 and a central control device 200 for controlling them. In FIG. 1, an example in which four cells are used is shown, but the number of cells is arbitrary.

In cells 101 to 104, the first converters 141 to 144 and the first control circuits 211 to 214 for controlling them, the second converters 151 to 154 and the second control circuits 221 to 224 for controlling them, and the first Each of the transformers 131 to 134 is provided between the converters 141 to 144 and the second converters 151 to 154.

In the following, the first converters 141 to 144 and the first control circuits 211 to 214 are collectively defined as the primary side circuits 111 to 114, respectively. Further, the second converters 151 to 154 and the second control circuits 221 to 224 are collectively defined as the secondary side circuits 121 to 124, respectively. The transformers 131 to 134 electrically insulate the primary side circuits 111 to 114 and the secondary side circuits 121 to 124, respectively. A more detailed configuration of the cell will be described later.

The input terminals (input side) of cells 101 to 104 are connected in parallel with the power supply 300. Therefore, the input voltages of cells 101 to 104 are all equal. Cells 101 to 104, converts the voltage of the power source 300 respectively generate output voltages _V O1 _{~V O4.}

The procedure in which the cell 101 _{generates the output voltage VO1 will be described.}

First, the first converter 141 of the primary circuit 111 converts the voltage of the power supply 300 into an AC voltage and applies it to the primary winding of the transformer 131. The first control circuit 211 of the primary side circuit 111 performs calculations and processes related to this operation and drives the first converter 141.

Next, the second converter 151 of the secondary circuit 121 converts the voltage generated in the secondary winding of the transformer 131 to generate the voltage _VO1 . The second control circuit 221 of the secondary circuit 121 performs calculations and processing related to this operation and drives the second converter 151. The cells 102 to 104 are also respectively generate voltages _V O2 _{~V O4} in the same manner.

The output terminals (output side) of cells 101 to 104 are connected in series with each other. The output voltage of the power converter 1 is a voltage obtained by combining the voltage _V O1 _{~V O4,} in the following, this is defined as the combined output voltage _{V OS (= V O1 + V} O2 + V O3 + V O4). With the above configuration, the power converter 1 can output a voltage higher than the rated output voltage of each cell.

Here, the secondary circuit 121 to 124, respectively control PWM (pulse width modulation) output voltage _V O1 _{~V O4} utilizing as described below. The second control circuit 221 performs PWM processing using a carrier signal generated internally and a duty ratio (hereinafter, abbreviated as duty) transmitted from the outside, and drives the second converter 151 according to the result. The duty is a numerical value for setting the on-period ratio of the switching element in PWM. The duty is generated by the central controller 200 to control the _{voltage VO1 to the desired value.}

The second control circuits 222 to 224 also perform PWM processing in the same manner to drive the second converters 152 to 154, respectively. Although the carrier signal generation by the second control circuits 221 to 224 is independent, PWM synchronization is realized by the method described later.

Here, although it is an example different from the present invention, in the PWM of the secondary side circuits 121 to 124, the central control device 200 performs all the PWM processing of the secondary side circuits 121 to 124, and the switching element generated is A configuration in which the gate signal is transmitted to the secondary side circuits 121 to 124 is also conceivable.

However, since there are a plurality of switching elements of the second converter as described later, a plurality of gate signal wirings are required for that amount, which causes problems of complicated power conversion device and high cost.

On the other hand, as in the first embodiment of the present invention, if the central control device 200 transmits the duty to the second control circuits 221 to 224 and the second control circuits 221 to 224 independently perform the PWM process. , It is possible to suppress the complexity and cost increase of wiring related to the control signal from the central control device 200 to each cell.

Central controller 200, the combined output voltage _{V OS} to be controlled to a desired value, and controls the output voltage _V O1 _{~V O4} of each cell 101-104.

When the power conversion device 1 is applied to a PCS for photovoltaic power generation, it is required to control the output current of the power conversion device 1 to a desired value. In FIG. 1, assuming such a case, the current detector 230 is arranged on the output current path.

Control arithmetic unit 201 provided in the central control unit 200 performs calculation of the feedback control using the detection value of the output current detected by the current detector 230, a target value of the output voltage V _OS, thus each output cell 101 to 104 to product the target value of the voltage _V O1 _{~V O4.}

Further, the control arithmetic unit 201 performs calculation and processing for the voltage _V O1 _{~V O4} the target value, the first control circuit 211 to 214 of each cell 101 to 104 and the second control circuit 221 to 224 On the other hand, a control command is generated. The control command is a control target value (command value) or a state instruction such as start or stop, and the above-mentioned duty is also included in the control command.

The control calculation unit 201 outputs the generated control command to the control signal transmission unit 202. In FIG. 1, four arrows are shown as control commands to indicate that individual control commands are output for each of the four cells 101 to 104. The control signal transmission unit 202 generates a first control signal for each cell 101 to 104 based on a control command, and transmits the first control signal to the first control circuits 211 to 214 of each cell 1101 to 104.

The first control signal transmitted by the control signal transmission unit 202 includes a control command for the second control circuits 221 to 224, such as duty. As described above, even the control command directed to the second control circuits 221 to 224 is once transmitted to the first control circuits 211 to 214 of the cells 101 to 104 to which the second control circuits 221 to 224 belong.

That is, the relay is performed using the first control circuits 211 to 214, and the control command is transmitted to the second control circuits 221 to 224.

The primary side circuits 111 to 114 of the cells 101 to 104 are connected in parallel to the external power supply 300. Therefore, the ground potentials (reference potentials at which the circuits operate) of the first control circuits 211 to 214 are all common. Further, the ground potentials of the central control device 200 and the first control circuits 211 to 214 can also be shared. Therefore, insulation is not required for communication from the central control device 200 to the first control circuits 211 to 214, and communication using electric wires can be applied.

In the first embodiment, serial communication is assumed as a communication method from the control signal transmission unit 202 of the central control device 200 to the first control circuits 211 to 214. Therefore, the first control signal is a serial communication signal of about several bytes.

Further, in the first embodiment, a communication bus is shared between the control signal transmission unit 202 of the central control device 200 and all the first control circuits 211 to 214, and the communication bus shares the communication bus with the control signal transmission unit 202. The first control circuits 211 to 214 of the above are connected. Therefore, FIG. 1 shows a configuration in which one arrow is shown as the first control signal output from the control signal transmission unit 202, and the arrow is input in parallel to the first control circuits 211 to 214 of each cell. As will be described later, the first control signal includes an address for identifying cells 101 to 104. Therefore, the control signal transmission unit 202 encodes the control command and further assigns an address to generate a serial communication signal.

In the central control device 200, the control signal transmission unit 202 outputs a synchronization command to the synchronization signal transmission unit 203. The synchronization signal transmission unit 203 generates a synchronization signal based on the synchronization command output from the synchronization signal transmission unit 202, and outputs the synchronization signal to the first control circuits 211 to 214. The synchronization signals output to the first control circuits 211 to 214 are digital signals used for PWM synchronization, and the details will be described later.

Even in the transmission of the synchronization signal from the synchronization signal transmission unit 203 of the central control device 200 to the first control circuits 211 to 214, the ground potential can be shared, so that insulation is not required and signal transmission using electric wires can be applied. ..

In the first embodiment, a common synchronization signal is output from the synchronization signal transmission unit 203 of the central control device 200 to all the first control circuits 211 to 214. In FIG. 1, one arrow is shown as a synchronization signal output from the synchronization signal transmission unit 203, and a configuration is shown in which it is input to the first control circuits 211 to 214 in parallel.

This is an example different from the first embodiment of the present invention, and when insulation is required for signal transmission from the central control device 200 to each cell 101 to 104, a method using an expensive optical fiber can be considered. In that case, since the wiring from the central control device 200 to each cell can be a long distance, the total length of the optical fibers used becomes long, and the cost of the power conversion device becomes high.

On the other hand, in the first embodiment, since the ground potential can be shared, insulation is not required for all signal transmissions from the central control device 200 to each cell 101 to 104, and it is not an expensive optical fiber but an inexpensive one. Since electric wires can be used, a low-cost power conversion device can be realized.

Further, if the communication bus is shared among all the cells 101 to 104 as shown in FIG. 1, the number of output ports of the central control device 200 can be reduced, and a lower cost power conversion device can be realized. In addition, there is an advantage in suppressing the complexity of wiring.

The first control circuit 211 extracts a control command regarding the first converter 141 from the received first control signal, and drives the first converter 141 accordingly. Further, the first control circuit 211 extracts a control command (duty, etc.) relating to the second converter 151 from the first control signal, generates a second control signal based on the extracted control command, and generates a second control. The signal is transmitted to the second control circuit 221. The communication from the first control circuit 211 to the second control circuit 221 is triggered by the rise (or fall) of the synchronization signal transmitted from the synchronization signal transmission unit 203 of the central control device 200.

Regarding the first control circuits 212 to 214, the first converters 142 to 144 are driven in the same manner as the first control circuit 211 described above, and the second control signals are transmitted to the second control circuits 222 to 224, respectively. ..

Here, in order to output a common synchronization signal from the synchronization signal transmission unit 203 of the central control device 200 to the first control circuits 211 to 214 of all cells 101 to 104, the first control circuits 211 to 214 second control. Communication to circuits 221-224 takes place simultaneously in all cells 101-104. As will be described later, the second control circuits 221 to 224 of each cell 101 to 104 reset the carrier signal triggered by the reception of the second control signal. With the above, PWM synchronization can be realized.

In the first embodiment, serial communication is used as a communication means from the first control circuits 211 to 214 of each cell 101 to 104 to the second control circuits 221 to 224. Therefore, the second control signal is a serial communication signal of about several bytes.

Since the secondary side circuits 121 to 124 of the cells 101 to 104 are connected in series with each other, the ground potentials of the second control circuits 221 to 224 are different from each other. Further, the ground potentials of the first control circuits 211 to 214 and the second control circuits 221 to 224 are also different from each other. Therefore, insulation is required for communication from the first control circuits 211 to 214 of each cell 101 to 104 to the second control circuits 221 to 224. Therefore, for example, communication using an optical fiber can be considered. However, since the communication is performed inside the cells 101 to 104, the total length of the optical fibers is relatively short, and the cost of the optical fibers can be kept low.

Further, since the communication from the first control circuits 211 to 214 of each cell 101 to 104 to the second control circuits 221 to 224 is a relatively short distance, in addition to the optical fiber, it is similar to IrDA (Infrared Data Association). A method using infrared communication, ultrasonic waves, or the like is also conceivable. In the case of infrared communication or ultrasonic communication, even if the ground potentials of the first control circuits 211 to 214 and the second control circuits 221 to 224 are significantly different, the distance between the transmitter and receiver of infrared communication and ultrasonic communication can be increased. Communication can be performed while ensuring insulation by structural measures such as keeping it properly.

Here, supplementary matters will be described in the example shown in FIG. The external power supply 300 may be either a DC power supply or an AC power supply. As an example, when the power conversion device 1 is applied to a PCS for photovoltaic power generation, the external power supply 300 is a solar cell. Further, as an example of the external load 400, there are a high voltage motor and other electric power devices.

The external load 400 may be a power system, as in the case of applying the power conversion device 1 to a PCS for photovoltaic power generation. In addition to the configurations shown above, the power conversion device 1 may include elements such as protective parts (relays, fuses, etc.) and filter parts (reactors, capacitors).

FIG. 2 is a diagram showing a circuit configuration example of the cell 101. In the example shown in FIG. 2, it is assumed that the external power supply 300 is a DC power supply and the power conversion device outputs AC power to the external load 400. The same configuration as that of cell 101 shown in FIG. 2 can be applied to the other cells 102 to 104.

In FIG. 2, the first converter 141 includes a first inverter composed of four switching elements (MOSFETs in the example of FIG. 2) 11-14. The DC input terminal of the first inverter serves as an input terminal of the first converter 141. Further, a filter capacitor 10 is connected between the DC input terminals of the first inverter. A series resonant circuit in which the coil 15, the capacitor 16, and the primary winding of the transformer 131 are connected in series is connected between the AC output terminals of the first inverter.

The second converter 151 includes a diode bridge composed of diodes 21 to 24, and a secondary winding of the transformer 131 is connected between the AC input terminals of the diode bridge. The first inverter, the series resonance circuit, and the diode bridge described above constitute a resonance type converter which is a kind of isolated DC-DC converter.

A smoothing capacitor 20 is connected between the DC output terminals of the diode bridge in the second converter 151. Further, the second converter 151 includes a second inverter composed of four switching elements (MOSFETs in FIG. 2) 31 to 34. The AC output terminal of the second inverter serves as the output terminal of the second converter 151 of the cell 101.

From the above configuration, it can be said that each cell 101 to 104 is composed of a resonance type converter (hereinafter, converter) and a second inverter (hereinafter, inverter).

The converter converts the voltage input to the cell 101 to generate a _{DC link voltage V dc1. Although details are omitted, the DC link voltage Vdc1} can be controlled to a desired value by the on / off operation of the switching element. In order for the converter to control the DC link voltage V _dc1 , a voltage detector 25 for detecting the _{voltage V dc1 is arranged in FIG.} Further, although omitted in FIG. 1, the detected voltage V _dc1 is once taken into the second control circuit 221 and then transmitted from the second control circuit 221 to the first control circuit 211. The first control circuit 211 _{performs feedback control of the voltage V dc1} and drives the converter based on the result.

_{The cells 102} to 104 also include a converter like the converter shown in FIG. 2, and _{generate DC link voltages V dc2 to} V dc4, respectively.

Here, the DC link voltages V _{dc1 to} V _dc4 may all be controlled to the same value, or may be controlled to different values. However, in the following, it is assumed that the DC link voltages V _{dc1 to} V _dc4 are all controlled to the same _{value V dc.}

Although the resonance type converter is shown in FIG. 2, any isolated DC-DC converter can be applied regardless of the specific circuit method.

When the external power supply 300 is an AC power supply, a rectifier circuit (AC-DC converter) may be added in front of the converter shown in FIG.

The inverter converts the voltage V _dc1 to generate the output voltage V _{01 of the cell 101. The cells 102} to 104 are similarly provided with an inverter, and the voltages V _{dc2 to} V dc4 are converted to _{generate voltages V 02 to} V ₀₄ , respectively.

The inverters of the secondary side circuits 121 to 124 of each cell 101 to 104 _{control the output voltages V 01 to} V ₀₄ to desired values by PWM.

3 and 4 are diagrams showing an example of the PWM operation waveform of the secondary circuit 121 in the cell 101. FIG. 3 is _{a PWM operation waveform when the voltage V 01} is controlled to a positive value. Specifically, as the PWM operation waveform, a carrier signal, a duty D ₁ , a gate signal of switching elements 31 to 34, and a V ₀₁ waveform are shown. In FIG. 3, the dead time of the switching element is omitted for simplification of the drawings and description.

In the example shown in FIG. 3, a triangular wave signal is shown as the PWM carrier signal. The instantaneous value of the carrier signal varies in the range from 0 (0%) to 1 (100%). FIG. 3 shows PWM operation waveforms for three cycles of the carrier signal. In FIG. 3, the resetting of the carrier signal, which will be described later, is omitted.

The duty D ₁ is a control command for controlling the voltage V ₀₁ to a desired value, and is transmitted from the control signal transmission unit 202 of the central control device 200 to the second control circuit 221 via the first control circuit 211. Included in the control signal. Duty D ₁ is a value from -1 (-100%) to +1 (+ 100%). When the voltage V ₀₁ is controlled to a positive value, the duty D ₁ is a value from 0 to +1. In Figure 3, between each period of the carrier signal, it was assumed that the duty D ₁ is constant. Further, the case where _{the duty D 1} gradually increases over three cycles of the carrier signal is shown.

When the voltage V ₀₁ is controlled to a positive value, the switching elements 33 and 34 shown in FIG. 2 are controlled to be off and on, respectively. The switching elements 31 and 32 are on / off controlled according to the comparison result _{of the duty D 1 and the carrier signal.} During the period when the duty D ₁ is larger than the carrier signal, the switching elements 31 and 32 are controlled on and off, respectively, and the voltage V ₀₁ (instantaneous value) becomes + V _dc . During the period when the duty D ₁ is smaller than the carrier signal, the switching elements 31 and 32 are controlled to be off and on, respectively, and V ₀₁ (instantaneous value) becomes 0.

The average value of the voltage V _{01 in the carrier cycle is (D 1} V _dc ). If the duty D ₁ is changed in the range of 0 to +1 the inverter can output a desired voltage in the range of _{0 ≦ V 01} ≦ + V _{dc as an average value in the carrier cycle.} As in the example shown in FIG. 3, as the duty D ₁ increases, the voltage V ₀₁ (the average value in the carrier cycle) also increases.

FIG. 4 is a PWM operation waveform diagram when the _{voltage V 01 is controlled to a negative value.} In the case of the example shown in FIG. 4, the duty D ₁ takes a value from -1 (-100%) to 0. In Figure 4, the absolute value of the duty _{D 1} instead of the duty _{D 1} shown in FIG. 3 | showed | _{D 1.} Further, the case where the absolute value | D ₁ | gradually increases over three cycles of the carrier signal, that is, the duty D ₁ gradually decreases is shown.

When the voltage V ₀₁ is controlled to a negative value, the switching elements 31 and 32 are controlled to be off and on, respectively. The switching elements 33 and 34 are on / off controlled according to the comparison result between the absolute value | D _{1 | of the duty D 1 and the carrier signal.} During the period when | D ₁ | is larger than the carrier signal, the switching elements 33 and 34 are controlled on and off, respectively, and the voltage V ₀₁ (instantaneous value) becomes −V _dc . During the period when | D ₁ | is smaller than the carrier signal, the switching elements 33 and 34 are controlled to be off and on, respectively, and the voltage V ₀₁ (instantaneous value) becomes 0.

The average value of the voltage V _{01 in the carrier cycle is (D 1} V _dc ). Note that duty D ₁ is a negative value. If the duty D ₁ is changed in the range of -1 to 0, the inverter can output a desired voltage in the range of _{−V dc} ≦ V _{01 ≦ 0 as an average value in the carrier cycle.} As in the example shown in FIG. 4, as | D ₁ | increases, that is, as duty D ₁ decreases, the voltage V ₀₁ (the average value in the carrier cycle) decreases.

If the central control unit 200 is controlled to the target value _{V a} with a voltage _{V 01,} the target value _{V dc} of the DC link voltage may be the duty and _(V a _{/ V dc).} Here, −V _dc ≦ V _a ≦ + V _dc . In the central control device 200, the control calculation unit 201 _{generates target values V dc} and duty (V _a / V _dc ) as control commands, and the control signal transmission unit 202 generates a first control signal based on these control commands. do. Here, it is assumed that V _dc is a fixed value and is recorded in both the central controller 200 and the first control circuit 211.

In this case, the control calculation unit 201 of the central control device 200 may generate data (symbol) indicating the activation or continuation of operation of the converter as a control command instead of the _{target value Vdc.} In cells 102 to 104 (secondary side circuits 122 to 124), the PWM process is performed in the same manner.

FIG. 5 is a diagram showing an example of a _{combined output voltage VOS waveform.} 5, the sine wave indicated by a broken line is a basic wave component contained in the combined output voltage V _OS, may be considered as a target value of the combined output voltage V _OS.

The instantaneous value of the combined output voltage _{V OS is, -4V dc, -3V dc, ···} , 0, ···, + 3V dc, made with any of the + _{4V dc.} Assuming PMW synchronization, the power converter 1 can output a desired voltage in the range of _{-4V dc} ≤ V _OS ≤ + 4V _{dc as an average value within the carrier cycle.} As shown in FIG. 5, it is changed to a target value of the combined output voltage V _OS sinusoidally, the combined output voltage V _OS of multilevel pseudo sine wave is generated.

Next, the above-mentioned PWM synchronization method will be specifically described.

FIG. 6 is a timing chart showing the principle of PWM synchronization. Specifically, in FIG. 6, the synchronous signal waveform, the first control signal directed from the control signal transmission unit 202 of the central control device 200 to the first control circuits 211 to 214 of each cell 101 to 104, and each cell 101 to 104. The second control signals transmitted from the first control circuits 211 to 214 to the second control circuits 221 to 224, respectively, and the PWM operation waveforms performed by the second control circuits 221 to 224 of each cell 101 to 104 are shown. ..

Here, the first control signal directed from the control signal transmission unit 202 of the central control device 200 to the first control circuit 211 is the first control circuit 211 among the first control signals transmitted from the control signal transmission unit 202. It means the one to which the address indicating is given.

Further, as the PWM operation waveforms of the cells 101 to 104, the carrier signals generated by the second control circuits 221 to 224 and the duties D _{1 to} D ₄ are shown.

Duties D _{2 to} D ₄ are _{control commands for controlling V 02 to} V ₀₄ to a desired value, and are the first from the control signal transmission unit 202 of the central control device 200 via the first control circuits 212 to 214, respectively. 2 Included in the control signals transmitted to the control circuits 222 to 224, respectively.

The specific values of the duties D _{1 to} D ₄ in FIG. 6 are not the values assuming that the waveform of FIG. 5 is obtained. Further, the gate signal of the switching element obtained by the PWM process and the output voltage waveform are not shown.

In FIG. 6, _{T S} represents a control cycle of the central control unit 200. Specifically, it is a cycle in which the control calculation unit 201 performs a control calculation and the control signal transmission unit 202 transmits the first control signal to the cells 101 to 104. In Figure 6, the time when the transmission of the first control signal is started as a starting point for each control cycle, and indicates the time, such as t = kT _S in FIG. Note that k is an integer representing a discrete-time step.

Examples of control cycle starting at time t = kT _S, described PWM synchronization.

At time t = kT _S shown in FIG. 6 starts transmitting the first control signal from the control signal transmitting unit 202 of the central controller 200 to the first control circuit 211 to 214 of each cell 101 to 104.

Here, since the communication bus is shared between the central control device 200 and the first control circuits 211 to 214 of all cells 101 to 104 as described above, the control signal transmission unit 202 of the central control device 200 is the first. The first control signal 1014 directed to the control circuit 214 is first transmitted. Hereinafter, the first control signal 1013 directed to the first control circuit 213, the first control signal 1012 directed to the first control circuit 212, and the first control signal 1011 directed to the first control circuit 211 are sequentially transmitted. The first control signal 1011 to 1014, the time t = kT duty _D 1 (k) _{to D} information about 4 (k) to the control operation unit 201 has generated just before _S are contained, respectively.

The control signal transmission unit 202 of the central control device 200 transmits a first control signal 1011 directed to the first control circuit 211, and then outputs a synchronization command to the synchronization signal transmission unit 203. The synchronization signal transmission unit 203 sets the synchronization signal, which is a digital signal, to the H level in accordance with the reception of the synchronization command from the control signal transmission unit 202, and generates a rising edge of the synchronization signal. However, in FIG. 6, it is assumed that the synchronization signal rises at the same time as the transmission of the first control signal 1011 is completed, ignoring the processing delay during this period. The rising edge of the synchronization signal is output to the first control circuits 211 to 214 of all cells 101 to 104.

The first control circuits 211 to 214 of the cells 101 to 104 transmit the second control signals 1021 to 1024 to the second control circuits 221 to 224, respectively, with the rising edge of the synchronization signal as a trigger. As described above, these communications are carried out simultaneously in all cells 101 to 104. The second control signals 1021 to 1024 _{include information regarding duties D 1} (k) to D ₄ (k), respectively.

The second control circuits 221 to 224 of the cells 101 to 104 reset the carrier signal by using the reception of the second control signal as a trigger. As shown in FIG. 6, the value of the carrier signal generated by the second control circuit of each cell is initialized to 0 at the same time as the reception of the second control signal is completed at the time points t1, t2, and t3, and then increases to 1. Start (the horizontal dashed line in FIG. 6 indicates "1").

As shown in FIG. 6, since the reception of the second control signal is completed simultaneously in all cells 101 to 104, the carrier signal is also reset simultaneously in all cells 101 to 104. _{The received D 1} (k) to D ₄ (k) are reflected in the duties of the cells 101 to 104 after the reset.

Time t = (k + 1) T S, t = (k + 2) for also controlling period starting T _S, similarly to the above, the reset of the first control signal and the communication and the carrier signal using the same of the second control signal line It is said. Cycle rise occurs in the synchronization signal is also T _S and Control period.

Carrier period of each cell 101 to 104 are set at the same time as the control period _{T S} of the central control unit 200. However, in reality, the carrier cycles of the cells 101 to 104 are not exactly the same as each other. Moreover, not exactly the same value as the rising period T _S of the synchronization signal.

Here, for example, consider a case where the central control device 200 and the second control circuits 221 to 224 perform calculation, communication, PWM processing, and the like by a digital control device (microcomputer, digital signal processor, etc.).

In this case, a slight error existing in the clock period of each digital control device causes the above-mentioned period error. In Figure 6, the carrier period of the second control circuit 221 is slightly shorter than T _S, the carrier period of the second control circuit 222 shows the case slightly longer than T _S of the central control unit 200.

Even in such a case, the carrier signals of the cells 101 to 104 can be substantially synchronized by resetting the carrier signals at the same time by all the cells 101 to 104 as in the first embodiment. That is, as shown in FIG. 6, immediately before the time point t1, the carrier signals of the second control circuits 221 to 224 are gradually delayed as they go from the second control circuits 221 to 224. Therefore, by simultaneously resetting the carrier signals of the second control circuits 221 to 224 at the time point t1, the carrier signals of the cells 101 to 104 can be substantially synchronized.

Further, as the process progresses from the time point t1 to the time point t2, a periodic error of the carrier signal of the second control circuits 221 to 224 occurs. , Carrier signals of each cell 101-104 can be substantially synchronized. The time point t3 is the same as the time point t1 and t2.

FIG. 7 is a diagram showing a specific data configuration example of the first control signal 1011 shown in FIG. As described above, the first control signal 1011 is a serial communication signal of about several bytes. Specifically, it is composed of a start bit, an address part, a duty part, another data part (Other data), and an end bit (stop bit).

The address portion following the start bit is configured as digital data for identifying the first control circuit 211 of the cell 101. The duty unit (PWM duty) is configured as digital data for showing the value of _{duty D 1 (k) shown in FIG.} The other data unit (Other data) is composed of digital data for indicating the contents of control commands other than duty, parity bits, and the like. The existence and contents of other data units can be set arbitrarily.

FIG. 8 is a diagram showing a specific data configuration example of the second control signal 1021 shown in FIG. As described above, the second control signal 1021 is a serial communication signal of about several bytes. Specifically, it is composed of a start bit, a duty part (PWM duty), another data part, and an end bit (stop bit). Since the communication is inside the cell, the address part is unnecessary.

_{The duty section is configured as digital data for showing the value of duty D 1} (k) shown in FIG. 6, and may have the same contents as the duty section of the first control signal 1011 shown in FIG. 7. The other data unit is composed of digital data for indicating the contents of control commands other than duty, parity bits, and the like. The existence and contents of other data units can be set arbitrarily.

FIG. 9 is a diagram showing a configuration example of the first control circuit 211 of the cell 101. The same configuration can be applied to the first control circuits 212 to 214 of the other cells 102 to 104.

In FIG. 9, the first control circuit 211 includes a control signal receiving unit 2111, a synchronization signal receiving unit 2112, a control signal transmitting unit 2113, and a drive control unit 2114.

The control signal receiving unit 2111 receives the first control signal transmitted from the control signal transmitting unit 202 of the central control device 200, and confirms the address of the first control signal. Then, when it is determined that the first control signal is directed to the first control circuit 211, the control command included in the first control signal is extracted and the following processing is performed.

First, a control command to the second control circuit 221 is output to the control signal transmission unit 2113 like the duty. Next, a control command regarding the first converter 141 of the primary circuit 111 is output to the drive control unit 2114.

The synchronization signal receiving unit 2112 detects the rising edge of the synchronization signal transmitted from the synchronization signal transmitting unit 203 of the central control device 200, and outputs a transmission command to the control signal transmitting unit 2113.

The control signal transmitting unit 2113 generates a second control signal based on a control command to the second control circuit 221 output by the control signal receiving unit 2111. After that, it is transmitted to the second control circuit 221 according to the transmission command output by the synchronization signal receiving unit 2112.

The drive control unit 2114 drives and controls the first converter 141 in accordance with a control command regarding the first converter 141 output by the control signal receiving unit 2111.

FIG. 10 is a diagram showing a configuration example of the second control circuit 221 of the cell 101. The same configuration as that of the second control circuit 221 can be applied to the second control circuits 222 to 224 of the other cells 102 to 104.

In FIG. 10, the second control circuit 221 includes a control signal receiving unit 2211, a carrier signal generating unit 2212, and a drive control unit 2213.

The control signal receiving unit 2211 receives the second control signal transmitted from the first control circuit 211, extracts the duty which is a control command, and outputs the extracted duty to the drive control unit 2213. Further, the control signal receiving unit 2211 outputs a reset command to the carrier signal generating unit 2212 at the same time when the reception of the second control signal is completed.

The carrier signal generation unit 2212 generates a carrier signal in a set carrier cycle, and outputs the carrier signal to the drive control unit 2213. Further, the carrier signal is reset at the same time when the reset command is received from the control signal receiving unit 2211.

The drive control unit 2213 compares the duty from the signal receiving unit 2211 with the carrier signal from the carrier signal generation unit 2212, and drives and controls the second converter 151 based on the result.

FIG. 11 is a timing chart showing another example of PWM synchronization. Only the difference from the PWM synchronization described with reference to FIG. 6 will be described below.

Examples of control cycle starting at time t = kT _S, the PWM synchronization will be described as shown in FIG. 11. The second control circuit 221 to 224, after receiving the second control signal 1021 to 1024 respectively, each reset the carrier signal from a predetermined time _{T W} has elapsed. Other points are the same as the PWM synchronization described with reference to FIG.

Shown in FIG. 11, PWM synchronization, configuration in which the second control circuit 221 to 224 resets the carrier signal after a predetermined time T _W has elapsed from the reception of the second control signal, Betsurei in all embodiments of the following Can be applied as.

As described above, according to the first embodiment, the central control device 200 transmits the duty to the second control circuits 221 to 224, and the second control circuits 221 to 224 independently perform the PWM process. , It is not necessary to transmit the control signal from the central control device 200 to the switching element of the secondary side circuits 121 to 124, and it is possible to suppress the complexity and cost increase of the wiring related to the control signal from the central control device 200 to each cell. It is possible to reduce the cost.

Further, according to the first embodiment, the primary side circuits 111 to 114 of the cells 101 to 104 are connected in parallel to the external power supply 300, and the ground potentials of the first control circuits 211 to 214 are all common. , The ground potential of the central control device 200 and the first control circuits 211 to 214 can also be shared. Therefore, insulation is not required for communication from the central control device 200 to the first control circuits 211 to 214, communication using electric wires can be applied, and the cost for insulation processing can be omitted.

In particular, when the power conversion device is used for an inverter for driving a high-voltage motor or a PCS for a high-voltage distribution system, a withstand voltage exceeding 5 kV is required unless Example 1 of the present invention is applied, and the insulation treatment is required. It will be a high price.

According to the first embodiment of the present invention, it is possible to realize a low-cost power conversion device that performs PWM synchronization.

(Example 2)
Next, Example 2 of the present invention will be described.

FIG. 12 is a timing chart showing the principle of PWM synchronization in the second embodiment. Since the configuration of the power conversion device in the second embodiment is the same as the configuration of the first embodiment shown in FIG. 1, illustration and detailed description thereof will be omitted.

In the following, only the difference from the PWM synchronization in the first embodiment described with reference to FIG. 6 will be described.

The first control signal directed from the control signal transmission unit 202 of the central control device 200 to the first control circuits 211 to 214 of each cell 101 to 104, and the first control circuits 211 to 214 to the second in each cell 101 to 104. The second control signals transmitted to the control circuits 221 to 224 include information on the reset command in addition to the duty as the control command. The reset command is a 1-bit control command that is information indicating whether or not the second control circuits 221 to 224 reset the carrier signal after receiving the control signal (on or off).

In the example shown in FIG. 12, “on” related to the reset command is described for some control signals (for example, the first control signal 1311). This means that the reset command is on, that is, it is a control command for the second control circuits 221 to 224 to reset the carrier signal after receiving the second control signal.

12, (the period for transmitting a first control instruction, the synchronization signal period) control cycle starting at time t = kT _S at Ts, the the control signal transmitting unit 202 of the central controller 200 for the first control circuit 211 1 The control signal 1311 is transmitted, but the reset command of the first control signal 1311 is turned on as described above.

After receiving the first control signal 1311, the first control circuit 211 of the cell 101 transmits the second control signal 1321 to the second control circuit 221 with the rising edge of the synchronization signal as a trigger. At this time, in response to the fact that the reset command of the first control signal 1311 is on (on), the reset command of the second control signal 1321 is also turned on (on).

The second control circuit 221 resets the carrier signal with the reception of the second control signal 1321 as a trigger in response to the fact that the reset command of the second control signal 1321 is on.

On the other hand, in the control cycle starting at time _{t = (k + 1) T} S, the first control signal 1411 directed from the control signal transmitting unit 202 of the central controller 200 to the first control circuit 211 does not turn on the reset command (Although not shown, the reset command is set to off). Therefore, the reset command is also set to off for the second control signal 1421 from the first control circuit 211 to the second control circuit 221.

In response to the fact that the reset command of the second control signal 1421 is off, the second control circuit 221 does not reset the carrier signal even if the second control signal 1421 is received.

In the control cycle starting at time t = (k + 2) T S, similarly to the control period starting t = kT _S, since the reset command of the control signal is set to ON, the second control circuit 221 resets the carrier signal ..

In the above description, the operation has been described centering on the cells 101 (first control circuit 211 and second control circuit 221), but other cells 102 to 104 (first control circuits 212 to 214 and second control circuit 222 to 22) have been described. 224) operates in the same manner.

In the second embodiment, there are some changes in the configurations and operations of the first control circuits 211 to 214 and the second control circuits 221 to 224 as compared with the first embodiment. The illustration of the block diagram such as 10 will be omitted.

In Example 1, is configured so as to reset the carrier signal in every control cycle, as in Example 2, the carrier period of the cells 101 to 104, and a control period T _S of the central controller 200 If the error between them is small enough, the carrier signals of each cell can be substantially synchronized even if the carrier signals are not reset in all control cycles.

Therefore, the second embodiment can be applied to a control unit such as a microcomputer having a lower operation level than the first embodiment. However, it is necessary to be able to properly manage the oscillation of the clock.

In Example 2, the same effect as in Example 1 can be obtained.

(Example 3)
Next, Example 3 of the present invention will be described.

FIG. 13 is a timing chart showing the principle of PWM synchronization in the third embodiment. Since the configuration of the power conversion device in the third embodiment is the same as the configuration of the first embodiment shown in FIG. 1, illustration and detailed description thereof will be omitted.

In the following, only the difference from the PWM synchronization in the first embodiment described with reference to FIG. 6 will be described.

Given the control cycle starting from time t = kT _S. As shown in FIG. 13, in the second control circuit 223 of the cell 103 and the second control circuit 224 of the cell 104, the duty does not change from the control cycle one step before. That is, D ₃ (k) = D ₃ (k-1) and D ₄ (k) = D ₄ (k-1). Therefore, the control signal transmission unit 202 of the central control device 200 sequentially transmits only the first control signal 1012 directed to the first control circuit 212 and the first control signal 1011 directed to the first control circuit 211.

After receiving the first control signal, the first control circuits 211 and 212 transmit the second control signals 1021 and 1022 to the second control circuits 221 and 222, respectively, with the rising edge of the synchronization signal as a trigger. Therefore, in the control cycle starting at time t = kT _S, a reset of the carrier signal, the cell 101 (the second control circuit 221) and the cell 102 (the second control circuit 222) is performed only.

In the control period starting next time _{t = (k + 1) T} S, the duty does not change from the control period of one step before for the second control circuit 221 and 222. That is, D ₁ (k + 1) = D ₁ (k), D ₂ (k + 1) = D ₂ (k). Therefore, the control signal transmission unit 202 of the central control device 200 sequentially transmits only the first control signal 1114 directed to the first control circuit 214 and the first control signal 1113 directed toward the first control circuit 213.

After receiving the first control signal, the first control circuit 213 of the cell 103 and the first control circuit 214 of the cell 104 trigger the rise of the synchronization signal to cause the second control circuits 223 and 224 to receive the second control signal 1123. Each 1124 is transmitted. Therefore, in the control cycle starting at time _{t = (k + 1) T} S, the reset of the carrier signal is performed in only the second control circuit 224 of the second control circuit 223 and the cell 104 of the cell 103.

When it is known that the maximum number of cells whose duty is changed in each control cycle is two, the central control device 200 completes the duty calculation by communicating the control signal and resetting the carrier signal as shown in FIG. The time from when the duty is reflected in the second control circuit, that is, the delay time due to communication can be shortened.

In Example 3, the same effect as in Example 1 can be obtained, and the above-mentioned effect can also be obtained.

(Example 4)
Next, Example 4 of the present invention will be described.

FIG. 14 is a schematic configuration diagram of the power conversion device according to the fourth embodiment. In the following, only the difference from the power conversion device 1 in the first embodiment described with reference to FIG. 1 will be described.

The power conversion device 2 shown in FIG. 14 includes a central control device 204 instead of the central control device 200 of FIG. Compared to the central control device 200 of the first embodiment, the central control device 204 of FIG. 14 does not include the synchronization signal transmission unit 203, and sends a synchronization signal to the first control circuits 211 to 214 of 101 to 104 of each cell. It is configured not to output.

FIG. 15 is a timing chart showing the principle of PWM synchronization in the fourth embodiment. In the fourth embodiment, the control signal includes a reset command as in the second embodiment described with reference to FIG. In the following, only the difference from the PWM synchronization in the second embodiment described with reference to FIG. 12 will be described.

In FIG. 15, at each control cycle, the control signal transmission unit 202 of the central control device 204 transmits the first control signal directed to the first control circuits 211 to 214. The control signal transmission unit 202 outputs the first control signal four times (for four frames) in the control cycle, and is the fourth first control signal in time (first control signals 1311, 1412, 1513 in FIG. 15). Set the reset command to ON.

Further, the address in the fourth first control signal is rotated between the first control circuits 211 to 214 in the cells 101 to 104. In the example shown in FIG. 15, the address in the fourth first control signal changes to cell 101 (first control circuit 211), cell 102 (first control circuit 212), and cell 103 (first control circuit 213). .. Although not shown in FIG. 15, in the control cycle starting at time _{t = (k + 3) T} S, it is sufficient to address the 4 th first control signal to the cell 104 (first control circuit 214).

The first control circuits 211 to 214 of the cells 101 to 104 send the second control signal to the second control circuits 221 to 224 immediately after receiving the first control signal transmitted by the control signal transmission unit 202 of the central control device 200. To send. After receiving the second control signal, the second control circuits 221 to 224 of the cells 101 to 104 reset the carrier signal if the reset command is on.

With the above configuration, the time from the start point of the control cycle (the time when the communication of the first control signal by the control signal transmission unit 202 starts) to the reset of the carrier signal can be kept constant, and the PWM synchronization can be performed as shown in FIG. realizable.

In the fourth embodiment, the configuration of the central control device 204 and the wiring from the central control device 204 to the cells 101 to 104 can be simplified by the amount that the synchronization signal is not used.

In Example 4, the same effect as in Example 1 can be obtained, and the above-mentioned effect can also be obtained.

(Example 5)
Next, Example 5 of the present invention will be described.

FIG. 16 is a schematic configuration diagram of the power conversion device according to the fifth embodiment of the present invention.

The power conversion device 3 of FIG. 16 includes four cells 105 to 108. The difference between the first embodiment and the fifth embodiment shown in FIG. 1 is that the input terminals (input side) of the cells 105 to 108 are connected in series, and the combined input terminals are connected to the external power supply 301. On the other hand, the output terminals (output side) of cells 105 to 108 are connected in parallel with the load 401.

Cells 105-108 include primary side circuits 115-118, secondary side circuits 125-128, and transformers 135-138, respectively.

Here, the primary side circuits 115 to 118 include the second converters 155 to 158 and the second control circuits 225 to 228 for controlling them, respectively, and the secondary side circuits 125 to 128 include the first converters 145 to 148 and the first converters 145 to 148. The first control circuits 215 to 218 for controlling these are provided respectively, and the internal configuration of the cells 105 to 108 has the same configuration as that of the cells 101 to 104 of the first embodiment, and thus will be described in the first embodiment. The PWM synchronization performed can be applied to the fifth embodiment as it is.

In the fifth embodiment, the primary side is set to, for example, 66 kv by configuring as described above.
It can be applied to a power conversion device that converts the secondary side to a low voltage of, for example, 100v.

In Example 5 of the present invention, the same effects as those in Example 1 can be obtained, and the above-mentioned effects can also be obtained.

(Example 6)
Next, Example 6 of the present invention will be described.

Example 6 of the present invention is an example of configuring a three-phase AC output power conversion device by using three power conversion devices 1 described in the first embodiment.

FIG. 17 is a schematic configuration diagram of the power conversion device 4 according to the sixth embodiment. The power conversion device 4 shown in FIG. 17 includes three power conversion devices 1 described in the first embodiment.

As shown in FIG. 17, one of the output terminals included in the three power conversion devices 1 constitutes a three-phase output terminal and is connected to the three-phase load 401. The other (the other) of the output terminals of the three power converters 1 is connected to each other to form a neutral point in a Y-connected three-phase AC circuit.

The input terminals included in the three power conversion devices 1 are connected in parallel with each other and are connected to the power supply 300.

As described in the first embodiment, the power conversion device 1 includes a central control device 200 inside. Therefore, the power conversion device 4 of FIG. 17 is provided with three central control devices 200, but the three central control devices 200 may be combined into one.

With the above configuration, Example 6 of the present invention can be applied to, for example, an inverter for driving a three-phase high-voltage motor or a PCS for a three-phase AC power system, and is also an embodiment in a power conversion device that outputs three-phase AC. The same effect as in 1 can be obtained.

In the above-described Examples 1 to 4, a plurality of cells 101 to 104 are connected in parallel to the external power supply 300 and connected in series with the external load 400, and in the fifth embodiment, the plurality of cells 105 are connected. ~ 108 are examples in which they are connected in series with the external power supply 301 and connected in parallel with the load 401, but in an example in which a plurality of cells are connected in series with the external power supply and also connected in series with the load. Even if there is, the present invention is applicable.

1, 2, 3, 4 ... Power converter, 10, 16, 20 ... Condenser, 11, 12, 13, 14, 31, 32, 33, 34 ... Switching element, 15 ... Coil , 21, 22, 23, 24 ... Diode, 25 ... Voltage detector, 101, 102, 103, 104, 105, 106, 107, 108 ... Power conversion cell, 111, 112, 113, 114 ... Primary circuit, 121, 122, 123, 124 ... Secondary circuit, 131, 132, 133, 134 ... Transformer, 141, 142, 142, 144 ... First converter, 151, 152, 152, 154 ... 2nd converter, 200, 204 ... Central controller, 211, 212, 213, 214 ... 1st control circuit, 221 222, 223, 224 ... 2nd control circuit, 230 ... current detector, 300, 301 ... power supply, 400, 401 ... load

Claims (9)

Multiple power conversion cells that convert the power supply voltage to the voltage supplied to the load,
It is equipped with a central control device that controls the plurality of power conversion cells.
Each of the plurality of power conversion cells has a first converter that converts the power supply voltage, a first control circuit that controls the first converter, and a first converter that converts the voltage converted by the first converter. It has two converters, a second control circuit that controls this second converter by pulse width modulation, and a transformer connected between the first converter and the second converter.
The central control device has a control signal transmission unit that transmits a first control signal to the first control circuit of each of the plurality of power conversion cells.
Based on the first control signal, the first control circuit of each of the plurality of power conversion cells controls the first converter.
Each of the plurality of power conversion cells has a synchronization signal transmission unit that transmits a synchronization signal to the first control circuit, and when the first control circuit receives the synchronization signal, the second control circuit has a second unit. 2 The control signal is transmitted, and when the second control circuit receives the second control signal, the carrier signal of the pulse width modulation is reset.
The first control signal transmitted to the first control circuit includes information on the duty ratio of the pulse width modulation, and the duty ratio information is transmitted to the second control circuit via the first control circuit. The second control circuit of each of the plurality of power conversion cells performs pulse width modulation based on the duty ratio to drive the second converter . In the power conversion device according to claim 1,
The central control device is connected to the first control circuit of the plurality of power conversion cells by a communication bus that performs wired serial communication, and performs wired serial communication with the first control circuit of the plurality of power conversion cells. The first control signal is transmitted, and the first control signal includes address information for identifying the plurality of power conversion cells. In the power conversion device according to claim 1 or 2.
A power conversion device characterized in that the input sides of a plurality of power conversion cells are connected in parallel to an external power source, and the output sides of the plurality of power conversion cells are connected in series with each other. In the power conversion device according to claim 1 or 2.
A power conversion device characterized in that the output sides of the plurality of power conversion cells are connected in parallel to an external load, and the input sides of the plurality of power conversion cells are connected in series. In the power conversion device according to any one of claims 1 to 4.
The first control circuit included in the plurality of power conversion cells is a power conversion device characterized in that the second control signal is transmitted to the second control circuit by wireless communication to the second control circuit. In the power conversion device according to claim 5,
The wireless communication is a power conversion device characterized by infrared communication. In the power conversion device according to claim 1,
The first control signal includes information on a reset command as to whether or not to reset the carrier signal, and the first control circuit transmits a second control signal including information on the reset command to the second control circuit. The second control circuit is characterized in that, when the second control signal is received and the reset command is information for resetting the carrier signal, the carrier signal of the pulse width modulation is reset. Power converter. In the power conversion device according to claim 7,
From the start of the control cycle for transmitting the first control signal of the central control device, the second control circuit of any one of the plurality of power conversion cells includes information for resetting the carrier signal. A power conversion device characterized in that the time until a reset command is received is substantially constant. In the power conversion device according to any one of claims 1 to 8.
It is composed of three power conversion devices, and one of the output terminals of the three power conversion devices constitutes a three-phase output terminal and is connected to a three-phase load. The other one of the output terminals of the device is connected to each other to form a neutral point of Y connection, and the input terminals of the above three power conversion devices are connected to each other in parallel and connected to a power supply. Power conversion device.

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