JP6868349B2 - Reference voltage generation circuit and semiconductor device - Google Patents

Description

The present invention relates to a reference voltage generation circuit and a semiconductor device including the reference voltage generation circuit.

As a circuit for generating a reference voltage to be supplied to a semiconductor device such as an LSI (large-scale integrated circuit), a reference voltage source circuit capable of generating a constant reference voltage without depending on temperature has been proposed (Patented). Reference 1).

In this reference voltage source circuit, first, the bandgap voltage of the semiconductor element, specifically, the base-emitter voltage of the PNP bipolar transistor is obtained as a voltage having a constant voltage value. However, the bandgap voltage of a semiconductor element has a so-called negative temperature characteristic that its voltage value decreases as the environmental temperature rises. Therefore, by applying an additional voltage having a positive temperature characteristic to the band gap voltage having a negative temperature characteristic in the reference voltage source circuit, the fluctuation of the voltage value corresponding to each other's temperature change is canceled out. A voltage characteristic control circuit is provided. The voltage characteristic control circuit includes a differential pair constructed so as to have positive temperature characteristics (see, for example, FIG. 3 of Patent Document 1) and a current mirror circuit that supplies a current to each transistor of the differential pair. And are provided. The base-emitter voltage of the PNP bipolar transistor as a bandgap voltage is supplied to the gate end of one of the transistors of this differential pair. The gate end and source end of the other transistor of the differential pair are connected to each other, and the voltage obtained by canceling the negative temperature characteristic of the bandgap voltage with the positive temperature characteristic of the differential pair is obtained from the connection point. It is output.

Japanese Unexamined Patent Publication No. 2012-99065

By the way, in order to generate a temperature-independent reference voltage in the above-mentioned reference voltage source circuit, the temperature gradient of the positive temperature characteristic added by the differential pair is set to the temperature gradient due to the negative temperature characteristic of the band gap voltage. Must be in inverse proportion.

However, since the temperature gradient depends on the thermal voltage, it is difficult to control the gradient itself.

Further, in generating an additional voltage having a positive temperature characteristic by the differential pair, in order to increase the rate of increase of the voltage with the temperature rise, the size of the transistor constituting the differential pair is increased, or Patent Document 1 It is conceivable to connect a plurality of differential pairs in series as shown in FIG. However, increasing the size of the transistor causes a problem that the area of the reference voltage source circuit increases. Further, when a configuration in which a plurality of differential pairs are connected in series is adopted, the number of paths through which current flows increases as the number of differential pairs increases, which causes a problem of increasing power consumption.

Therefore, an object of the present invention is to provide a reference voltage generation circuit and a semiconductor device capable of generating a reference voltage having a temperature characteristic of a desired temperature gradient without increasing the circuit scale and power consumption. ..

The reference voltage generation circuit according to the present invention is a reference voltage generation circuit that generates a reference voltage, and has a voltage generating unit that generates a provisional reference voltage having a negative temperature characteristic and a correction voltage having a positive temperature characteristic. It has a temperature characteristic control unit that generates a voltage applied to the provisional reference voltage as the reference voltage, and the temperature characteristic control unit sends a current having a magnitude corresponding to the provisional reference voltage to the first line. The first transistor and one end of the drain end and the source end are connected to the gate end, and a current having a magnitude corresponding to the current transmitted from the first transistor is transmitted to the second line. A differential pair including a second transistor that outputs the voltage at one end as the reference voltage, one end is connected to the second line, and the other end is connected to the first line. a resistor section, was closed, the resistor unit includes a plurality of transistors connected in series, each of the plurality of transistors has a gate terminal connected to said gate terminal of said second transistor.

Further, the semiconductor device according to the present invention is a semiconductor device in which a reference voltage generation circuit for generating a reference voltage is formed, and the reference voltage generation circuit is a voltage for generating a provisional reference voltage having a negative temperature characteristic. It has a generating unit and a temperature characteristic control unit that generates a voltage obtained by applying a correction voltage having a positive temperature characteristic to the provisional reference voltage as the reference voltage, and the temperature characteristic control unit uses the provisional reference voltage as the reference voltage. A first transistor that sends a corresponding magnitude of current to the first line and one end of the drain end and source end are connected to the gate end, depending on the current sent from the first transistor. A differential pair including a second transistor that sends a large amount of current to the second line and outputs the voltage at one end as the reference voltage, and one end is connected to the second line. , possess a resistance portion and the other end is connected to the first line, wherein the resistance section includes a plurality of transistors connected in series, each of said plurality of transistors, a gate terminal is the first It is connected to the gate end of the 2 transistors .

In the present invention, the following differential pair and resistance portion are used to generate a voltage obtained by adding a correction voltage having a positive temperature characteristic to a provisional reference voltage having a negative temperature characteristic as a reference voltage. That is, the first transistor of the first and second transistors forming the differential pair sends a current having a magnitude corresponding to the provisional reference voltage to the first line. Then, the second transistor in which one end of the drain end and the source end is connected to the gate end transmits a current having a magnitude corresponding to the current transmitted by the first transistor via the second line. At the same time, the voltage at the end of its own gate is output as a reference voltage.

According to this configuration, the voltage obtained by adding the voltage having the second positive temperature characteristic obtained by the resistance portion to the voltage having the first positive temperature characteristic obtained by the differential pair is the third positive temperature characteristic. As a voltage having a negative temperature characteristic, it is applied to a provisional reference voltage having a negative temperature characteristic. That is, it is possible to generate a voltage having various temperature gradients by combining the first positive temperature characteristic obtained by the differential pair and the second positive temperature characteristic obtained by the resistance portion. As a result, it becomes possible to set the gradient of the temperature characteristic of the reference voltage to an arbitrary gradient.

In the resistance section, a voltage having a size smaller than that of the transistor of the differential pair and higher than the voltage obtained by the differential pair can be obtained as a voltage having a second positive temperature characteristic. Further, by providing the resistance portion, it is possible to generate a voltage having a positive temperature characteristic with a steep temperature gradient even with a single differential pair, so a configuration in which a plurality of differential pairs are connected in series is adopted. Compared to the case, it is possible to reduce the power consumption.

Therefore, according to the present invention, it is possible to generate a reference voltage having a desired temperature characteristic without increasing the circuit scale and power consumption.

It is a block diagram which shows the structure of the power supply apparatus 400 including the reference voltage generation circuit 100 which concerns on this invention. It is a temperature characteristic figure which shows an example of the temperature characteristic of each of a provisional reference voltage Vm and a reference voltage Vref. It is a temperature characteristic figure which shows the temperature characteristic of the reference voltage Vref for each of the 1st to 3rd size setting. It is a temperature frequency characteristic diagram which shows the change of the oscillation frequency of the ring oscillation circuit with respect to the temperature change when the ring oscillation circuit is operated by the power supply voltage generated by the conventional circuit. It is a temperature frequency characteristic diagram which shows the change of the oscillation frequency of the ring oscillation circuit with respect to the temperature change when the ring oscillation circuit is operated by the power supply voltage VL generated by the reference voltage generation circuit 100.

Hereinafter, examples of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing a configuration of a power supply device 400 including a reference voltage generation circuit 100 according to the present invention. The reference voltage generation circuit 100 is formed on a semiconductor chip as a semiconductor device. The power supply device 400 has a power supply voltage VL corrected for PVT (process voltage temperature) variation of the logic circuit as a power supply voltage for operating a logic circuit network composed of MOS (metal oxide semiconductor) transistors formed on the semiconductor chip. To generate.

As shown in FIG. 1, the power supply device 400 includes a reference voltage generation circuit 100 including a current source 10, a voltage generation unit 20, and a temperature characteristic control unit 30, and an amplifier 200.

The current source 10 receives the power supply voltage Vdd to generate a minute current at the nanoampere level, and supplies it to each of the voltage generation unit 20 and the temperature characteristic control unit 30.

The voltage generation unit 20 includes a p-channel MOS type transistor MP1 that receives a minute current supplied from the current source 10 at its own gate end, and a manufacturing variation monitor unit PVM. A power supply potential Vdd is applied to the source end of the transistor MP1, and the drain end thereof is connected to the manufacturing variation monitor unit PVM via the line LQ. The transistor MP1 supplies a nanoampere level operating current Ib corresponding to a minute current supplied from the current source 10 to the manufacturing variation monitor unit PVM via the line LQ.

Manufacturing variations monitor PVM includes transistors MP _L and n-channel MOS transistor MN _L of p-channel MOS type. A line LQ is connected to the source end and the back gate of the transistor MP _{L, and a ground potential GND is applied to the gate end.} The source of transistor MN _L are applied ground potential GND, and a drain terminal connected to the drain terminal of the transistor MP _L. The gate end of the transistor MN _L is connected to the line LQ.

The manufacturing variation monitor unit PVM supplies the voltage of the line LQ to the temperature characteristic control unit 30 as a provisional reference voltage Vm. The current flowing through the line LQ is because an operating current Ib of nanoampere level, the transistors MN _L and MP _L will operate together in a weak inversion region. Here, the MOS-type transistors such as transistors MN _L and MP _L, when the gate voltage is higher than the threshold voltage, flow the drain current of magnitude proportional to the gate voltage, operating in the so-called strong inversion region .. On the other hand, when the gate voltage is lower than the threshold voltage, the MOS transistor operates in the weak inversion region, and at this time, the drain current hardly flows.
Therefore, the line LQ of voltage, i.e. the voltage values of the provisional reference voltage Vm, of the transistor MN _L and MP _L, the gate-source voltage of the transistor with the higher threshold voltage. As a result, the manufacturing variation monitoring unit PVM supplies the gate-source voltage of the transistor having a negative temperature characteristic to the temperature characteristic control unit 30 as a provisional reference voltage Vm.

The temperature characteristic control unit 30 includes a current mirror unit 301, a differential pair 302, a resistance unit 303, and a current source 304.

The current mirror unit 301 includes p-channel MOS type transistors MP2 and MP3. A power supply potential Vdd is applied to the source ends of each of the transistors MP2 and MP3. The gate end of the transistor MP2 is connected to its own drain end and the gate end of the transistor MP3.

The differential pair 302 includes a pair of n-channel MOS transistors MNi and MNo. Of the transistors MNi and MNo, MNi is an input-side transistor that receives a provisional reference voltage Vm at its own gate end. The drain end of the transistor MNi is connected to the line L1, and the source end is connected to the drain end and the gate end of the transistor MP2. The transistor MNo is a transistor on the output side that generates a voltage corresponding to the input provisional reference voltage Vm at its own source end. The source end of the transistor MNo is connected to the drain end of the transistor MP3 together with its own gate end. Further, the source end and the gate end of the transistor MNo are connected to the line LO. With this configuration, the differential pair 302 generates a voltage obtained by adding a voltage having a voltage value determined by the size (channel W / channel length L) of each of the transistors MNi and MNo to the provisional reference voltage Vm.

_{The resistor portion 303 has transistors MN r1 to MN rn} (n is a natural number), each of which is an n-channel MOS type transistor connected in series. The gate ends of the transistors MN _{r1 to MN rn} are both connected to the line LO. The head of the transistor MN of the transistors MN _r1 to MN _{rn r1} is the source end of it is connected to the drain terminal of the transistor MNo differential pair 302 via a line L2. Further, the drain end of the _{transistor MN r1} is connected to the source end of _{the transistor MN r2 in the next stage.} Hereinafter, in the same manner, _{the drain ends of the transistors MN r2 to MN r (n-1)} are connected to the source ends of the transistors in the next stage. The drain end of the last transistor MN _rn is connected to the line L1 and the current source 304. With this configuration, the transistors MN _{r1 to MN rn} function as a ladder resistor in which n resistance elements are connected in series.

The current source 304 includes an n-channel MOS type transistor MN1. The drain end of the transistor MN _{rn at} the end of the resistance portion 303 is connected to the drain end of the transistor MN1. Further, a ground potential GND is applied to the source end of the transistor MN1, and a minute current supplied from the current source 10 is supplied to the gate end. Therefore, the transistor MN1 causes a nanoampere level operating current Ib corresponding to the minute current to flow between the drain and the source.

With the above configuration, in the temperature characteristic control unit 30, the transistor MNi of the differential pair 302 sends a current having a magnitude corresponding to the provisional reference voltage Vm to the line L1. The transistor MNo of the differential pair 302 has its own source end connected to the gate end, and while transmitting a current of a magnitude corresponding to the current transmitted from the transistor MNi to the resistance portion 303 via the line L2, The voltage at the drain end and the gate end is output as the reference voltage Vref. As a result, a voltage obtained by adding a correction voltage having a positive temperature characteristic (hereinafter referred to as a correction voltage Vpv) to the provisional reference voltage Vm having a negative temperature characteristic is generated and supplied to the amplifier 200 as a reference voltage Vref.

The correction voltage Vpv is a voltage (hereinafter referred to as voltage V1) applied to the provisional reference voltage Vm by the differential pair 302, and a voltage corresponding to the voltage drop in the resistor portion 303 (hereinafter referred to as voltage V2). The applied voltage.

Here, the voltage value of the voltage V1 is the size of each pair of transistors forming the differential pair 302, that is, the size of the transistor MNi (hereinafter, referred to as size Ki) because the differential pair 302 operates in the weak inversion region. The size of the transistor MNo (hereinafter referred to as size Ko) and the ambient temperature determine the size, and the larger the size, the higher the size.

On the other hand, the voltage value of the voltage V2 is determined by the size of each of _{the transistors MN r1 to MN rn of the resistance portion 303 (hereinafter, referred to as sizes K r1 to} K _rn). The voltage V2 increases as the resistance value of the resistance portion 303, that is, the combined resistance value of the _{transistors MN r1 to MN rn} decreases. That is, the smaller the respective sizes K _{r1 to} K _{rn of the transistors MN r1 to MN rn,} the higher the voltage value of the voltage V2.

Therefore, according to the resistance unit 303, it is possible to obtain a voltage V2 having a high voltage value with a smaller element area than the differential pair 302.

Here, since each of the voltages V1 and V2 is based on the on-resistance of the MOS transistor, it has a so-called positive temperature characteristic in which the voltage value increases as the temperature rises. The rate of increase of the voltage value with the temperature rise increases as the voltage value of the voltage V1 (V2) increases.

Therefore, for example, when the transistors MNi, MNo, and MN _{r1 to MN rn} have the same size, the voltage V2 is more positive than the positive temperature characteristic of the voltage V1 (hereinafter referred to as the first positive temperature characteristic). The temperature characteristic (hereinafter referred to as the second positive temperature characteristic) has a temperature gradient in which the rate of increase of the voltage value with the temperature increase is higher.

That is, the temperature characteristic control unit 30 is different from the first and second positive temperature characteristics by applying the voltage V2 to the voltage V1 each having the first and second positive temperature characteristics having different temperature gradients. A correction voltage Vpv having a positive temperature characteristic of 3 is generated.

Then, the temperature characteristic control unit 30 applies the correction voltage Vpv having the third positive temperature characteristic to the provisional reference voltage Vm having the negative temperature characteristic as described below to make the temperature gradient gentle. A reference voltage Vref having characteristics is generated and supplied to the amplifier 200.
Vref = Vm + Vpv
The amplifier 200 is a so-called voltage follower in which its own output terminal is connected to its own inverting input terminal, and is a logic circuit that amplifies _{the reference voltage V ref supplied from the temperature characteristic control unit 30 with a gain of 1.} Is output as the power supply voltage VL for operating.

The temperature characteristics of the reference voltage Vref generated by the reference voltage generation circuit 100 shown in FIG. 1 will be described below.

FIG. 2 shows that the number of transistors in the resistance unit 303 is limited to seven, that is, the resistance unit 303 is _{composed of the transistors MN r1 to MN r7} , and is generated when the reference voltage generation circuit 100 is operated under the following conditions. It is a temperature characteristic figure which shows an example of the temperature characteristic of each of a provisional reference voltage Vm and a reference voltage Vref.
Vdd = 3.0 Volts Ib = 10 Nanoamps Ko, Ki = 1
Kr1 to Kr7 = 0.1
As described above, in the reference voltage generation circuit 100, by adopting a configuration in which the resistor portion 303 is connected to the transistor MNo on the output side of the differential pair 302, as shown in FIG. 2, the voltage value of the provisional reference voltage Vm is set. An increased reference voltage Vref is obtained. _{At this time, the sizes of the transistors MN r1 to MN r7} constituting the resistance portion 303 are smaller than those of the transistors MNi and MNo of the differential pair 302.

From the above, according to the reference voltage generation circuit 100, it is possible to increase the voltage value of the reference voltage without significantly increasing the circuit area.

Further, according to the reference voltage generation circuit 100, by adding the correction voltage Vpv having the positive temperature characteristic to the provisional reference voltage Vm having the negative temperature characteristic, the decrease in the voltage value of the provisional reference voltage Vm which decreases as the temperature increases. A reference voltage Vref having a gentle temperature gradient can be obtained. For example, as shown in FIG. 2, the amount of fluctuation of the voltage in the temperature range of -20 to 80 degrees is the amount of fluctuation G1 at the provisional reference voltage Vm, whereas it is more than the amount of fluctuation G1 at the reference voltage Vref. Is also a small fluctuation amount G2.

In the reference voltage generation circuit 100, the temperature characteristics of the reference voltage Vref can be changed by changing the sizes of the transistors (MNi, MNo) of the differential pair 302 and the transistors (MN _{r1 to MN rn) of the resistor portion 303.} It is possible to change the characteristics.

FIG. 3 is a temperature characteristic diagram showing the temperature characteristics of the reference voltage Vref for each of the following first to third size settings. In FIG. 3, the temperature characteristic in the first size setting is represented by a solid line, the temperature characteristic in the second size setting is represented by a broken line, and the temperature characteristic in the third size setting is represented by a dashed line.

[First size setting]
Ko = 1
Ki = 1
MN _r1 ~ _{MN rn} = 0.1
[Second size setting]
Ko = 1
Ki = 8
MN _{r1 to MN rn} = 0.165
[Third size setting]
Ko = 1
Ki = 16
MN _r1 ~ _{MN rn} = 0.2
As shown in FIG. 3, according to the reference voltage generation circuit 100, the reference voltage is changed by changing the size of _{each transistor (MNi, MNo, MN r1 to MN rn) constituting the differential pair 302 and the resistance portion 303.} It is possible to change the gradient of the temperature characteristics of the Vref.

Next, when the actual logic circuit is operated with the power supply voltage VL based on the reference voltage Vref generated by the reference voltage generation circuit 100, an evaluation for evaluating whether or not the manufacturing variation and temperature characteristics in the logic circuit can be corrected is evaluated. The test will be described.

In such an evaluation test, first, as a logic circuit, for example, a ring oscillation circuit in which nine stages of inverters are connected in series is assumed. Next, a plurality of semiconductor devices in which the ring oscillator circuit is manufactured by different manufacturing processes, for example, a high-speed device operating at a high speed, a low-speed device operating at a low speed, and a medium-speed device operating at a medium speed are prepared. Then, the ring oscillation circuit is operated by the power supply voltage VL while changing the environmental temperature for each semiconductor device, and the fluctuation of the oscillation frequency of the ring oscillation circuit is measured. From this measurement, it can be confirmed that the smaller the fluctuation amount of the oscillation frequency with respect to the temperature change, the higher the accuracy of the correction for the manufacturing variation and the temperature change.

FIG. 4 is a temperature-frequency characteristic diagram showing a change in the oscillation frequency of the ring oscillation circuit with respect to a temperature change when the above-mentioned ring oscillation circuit is operated by a voltage generated by the conventional circuit shown in FIG. 2 of Patent Document 1. Is. Further, FIG. 5 is a temperature-frequency characteristic diagram showing a change in the oscillation frequency of the ring oscillation circuit with respect to a temperature change when the above-mentioned ring oscillation circuit is operated by the power supply voltage VL generated by the reference voltage generation circuit 100.

In FIGS. 4 and 5, the environmental temperature changes at three points of −20 ° C., 25 ° C., and 80 ° C. for each of the high-speed device, medium-speed device, and low-speed device in which the ring oscillation circuit is formed. It represents the oscillation frequency of the ring oscillation circuit obtained at each temperature when the ring was made. At this time, the plots marked with triangles represent the temperature-frequency characteristics of the high-speed device, the plots marked with squares represent the temperature-frequency characteristics of the medium-speed device, and the plots marked with circles represent the temperature-frequency characteristics of the low-speed device. In order to make the initial values of the oscillation frequencies of the ring oscillation circuit uniform, the power supply potential VL in the initial state (medium speed device, 25 ° C.) is the reference voltage generation circuit 100 and the circuit shown in FIG. 4 of Patent Document 1. The size of the transistors contained in each circuit is set so that they are equal to each other.

As shown in FIG. 4, in the conventional circuit described in Patent Document 1, the amount of frequency fluctuation in the range of the environmental temperature in the range of −20 ° C. to 80 ° C. is H1. On the other hand, in the reference voltage generation circuit 100 according to the present invention, as shown in FIG. 5, the amount of frequency fluctuation in the range of the environmental temperature in the range of −20 ° C. to 80 ° C. is smaller than the amount of fluctuation H1 shown in FIG. It becomes H2.

As described above, in the reference voltage generation circuit 100, the provisional reference voltage Vm is obtained by combining the first positive temperature characteristic obtained by the differential pair 302 and the second positive temperature characteristic obtained by the resistance portion 303. The temperature gradient of the correction voltage Vpv to be applied can be adjusted. Further, according to the resistance portion 303, a voltage smaller than the transistors MNi and MNo of the differential pair 302 and higher than the voltage obtained by the differential pair 302 is provisionally set as a voltage having a second positive temperature characteristic. It can be applied to the reference voltage Vm. Therefore, according to the present invention, it is possible to generate a reference voltage in which the amount of temperature fluctuation of the voltage value is suppressed as compared with the conventional circuit without increasing the circuit scale and the power consumption.

In the embodiment shown in FIG. 1, n-channel MOS type transistors MN _{r1 to MN rn} are connected longitudinally as the resistance portion 303, and the gate ends of the _{transistors MN r1 to MN rn} are separated via the line LO. It is commonly connected to the gate end of the transistor MNo of the dynamic pair 302. However, as the resistance portion 303, a configuration in which n resistance elements are connected in series may be adopted instead _{of the transistors MN r1 to MN rn.} Further, one end of the resistor portion 303 is connected to the drain end of the transistor MNo of the differential pair 302 via the line L2, and the other end is connected to the drain end of the transistor MNi of the differential pair 302 via the line L1. It may be a single resistance element connected to.

Further, in the embodiment shown in FIG. 1, the source end of the transistor MMo as the second transistor of the differential pair 302 is connected to the gate end, and the drain end is connected to one end of the resistance portion 303. The drain end of the above may be connected to the gate end, and the source end may be connected to the resistance portion 303. Further, in the embodiment shown in FIG. 1, a provisional reference voltage Vm is received at the gate end of the transistor MNi as the first transistor of the differential pair 302, and the drain end thereof is connected to the other end of the resistance portion 303 via the line L1. Although it is connected, the source end of the transistor MNi may be connected to the other end of the resistance portion 303 via the line L1.

In short, the reference voltage generation circuit 100 is based on a voltage generating unit (20) that generates a provisional reference voltage (Vm) having a negative temperature characteristic and a voltage obtained by adding a correction voltage having a positive temperature characteristic to the provisional reference voltage. It may have a temperature characteristic control unit (30) generated as a voltage (Vref), and the temperature characteristic control unit may include the following differential pair and resistance unit. That is, the differential pair (302) has a first transistor (MNi) that sends a current having a magnitude corresponding to the provisional reference voltage to the first line (L1), and one end of the drain end and the source end. A second transistor connected to the gate end that sends a current of a magnitude corresponding to the current sent from the first transistor to the second line (L2) and outputs the voltage at one end as a reference voltage. (MNo) and. Then, one end of the resistance portion (303) is connected to the second line, and the other end is connected to the first line.

According to this configuration, a reference voltage having a desired temperature characteristic can be generated, so that the reference voltage generation circuit 100 can also be used as a temperature sensor.

10 Current source 20 Voltage generator 30 Temperature characteristic control unit 100 Reference voltage generation circuit 302 Differential pair 303 Resistance unit MNi, MNo Transistor

Claims (9)

A reference voltage generation circuit that generates a reference voltage.
A voltage generator that generates a provisional reference voltage with negative temperature characteristics,
It has a temperature characteristic control unit that generates a voltage obtained by applying a correction voltage having a positive temperature characteristic to the provisional reference voltage as the reference voltage.
The temperature characteristic control unit
A first transistor that sends a current of a magnitude corresponding to the provisional reference voltage to the first line, and one end of a drain end and a source end are connected to the gate end and sent from the first transistor. A differential pair including a second transistor that sends a current of a magnitude corresponding to the generated current to the second line and outputs the voltage at one end as the reference voltage.
One end is connected to the second line, and the other end has a resistance portion connected to the first line.
The resistor portion includes a plurality of transistors connected in series.
A reference voltage generation circuit, wherein each of the plurality of transistors has a gate end connected to the gate end of the second transistor. The reference voltage generation circuit according to claim 1, wherein the plurality of transistors function as a ladder resistor in which a plurality of resistance elements are connected in cascade. The voltage generating unit includes a p-channel MOS transistor and an n-channel MOS transistor.
The reference voltage generation circuit according to claim 1 or 2, wherein the gate-source voltage having the higher threshold voltage among the p-channel MOS transistor and the n-channel MOS transistor is generated as the provisional reference voltage. The voltage generating part is
Including a current source that sends a predetermined current to the first line,
The p-channel MOS transistor has its own source end connected to the first line and its gate end grounded.
The n-channel MOS transistor has its own source end connected to the drain end of the p-channel MOS transistor, its own gate end connected to the first line, and its own drain end grounded. ,
The reference voltage generation circuit according to claim 3, wherein the voltage of the first line is obtained as the provisional reference voltage. A reference voltage generation circuit that generates a reference voltage.
A first circuit part that produces a voltage with negative temperature characteristics,
A second circuit portion that includes a differential pair of transistors and produces a voltage with a first positive temperature characteristic.
A second positive temperature characteristic different from the first positive temperature characteristic , which includes a plurality of transistors connected in series with each other and whose gate end is connected to the gate end of one of the transistors of the differential pair. It has a third circuit part that produces the voltage it has, and
A reference characterized in that a voltage obtained by adding a voltage generated in the second circuit portion and a voltage generated in the third circuit portion to the voltage generated in the first circuit portion is generated as the reference voltage. Voltage generation circuit. A semiconductor device in which a reference voltage generation circuit that generates a reference voltage is formed.
The reference voltage generation circuit is
A voltage generator that generates a provisional reference voltage with negative temperature characteristics,
It has a temperature characteristic control unit that generates a voltage obtained by applying a correction voltage having a positive temperature characteristic to the provisional reference voltage as the reference voltage.
The temperature characteristic control unit
A first transistor that sends a current of a magnitude corresponding to the provisional reference voltage to the first line, and one end of a drain end and a source end are connected to the gate end and sent from the first transistor. A differential pair including a second transistor that sends a current of a magnitude corresponding to the generated current to the second line and outputs the voltage at one end as the reference voltage.
One end is connected to the second line, and the other end has a resistance portion connected to the first line.
The resistor portion includes a plurality of transistors connected in series.
A semiconductor device, wherein each of the plurality of transistors has a gate end connected to the gate end of the second transistor. The semiconductor device according to claim 6, wherein the plurality of transistors function as a ladder resistor in which a plurality of resistance elements are connected in a longitudinal manner. The voltage generating unit includes a p-channel MOS transistor and an n-channel MOS transistor.
The semiconductor device according to claim 6 or 7, wherein the gate-source voltage having the higher threshold voltage among the p-channel MOS transistor and the n-channel MOS transistor is generated as the provisional reference voltage. The voltage generating part is
Including a current source that sends a predetermined current to the first line,
The p-channel MOS transistor has its own source end connected to the first line and its gate end grounded.
The n-channel MOS transistor has its own source end connected to the drain end of the p-channel MOS transistor, its own gate end connected to the first line, and its own drain end grounded. ,
The semiconductor device according to claim 8, wherein the voltage of the first line is obtained as the provisional reference voltage.

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