JP6862760B2 - Transmitter / receiver control method - Google Patents

Description

The present invention relates to a transmitter / receiver and a method for controlling a transmitter / receiver.

In a time division duplex (hereinafter abbreviated as "TDD") type wireless communication device, the communication time is divided into fixed times and transmission and reception are alternately performed. In the TDD method, transmission and reception using the same carrier frequency are possible, so the utilization efficiency of the frequency band is high, asymmetric communication is possible, and information from terminals using the same carrier frequency is used. There are advantages such as easy beamforming.

The asymmetric communication means a communication in which the ratio of the transmission time to the length of the reception time is not 1: 1. As a specific example, in mobile communication, there is a communication mode in which the length of the uplink communication time from the terminal to the base station and the length of the downlink communication time from the base station to the terminal are different.

Wireless communication services using the TDD system include PHS (Personal Handy-phone System), TD-CDMA (Time Division-Code Division Multiple Access), Mobile WiMAX (Worldwide Interoperability for Microwave Access), and TD-LTE (Time Division-). Long Term Evolution) and so on.

In the TDD system wireless communication device, since the transmission operation and the reception operation are performed exclusively, an antenna or the like can be shared as a transmission / reception unit.

An example of a wireless communication device related to the present invention is described in Patent Document 1. The wireless communication device described in Patent Document 1 includes a transmitting unit, a receiving unit, a switching unit for switching between the transmitting unit and the receiving unit, and a transmission / reception shared antenna connected to the transmitting unit or the receiving unit via the switching unit. The switching unit includes a plurality of field effect transistors (FETs).

Japanese Unexamined Patent Publication No. 2011-41315

A problem in the related technology is that when the wireless communication device is mounted, the power consumption of the entire wireless communication device increases due to the resistance component of the FET in the switching unit.

The reason is that the output power of the transmitter occupies most of the power consumption of the entire device, so even if the power loss of the output of the transmitter is small, if there is a loss in the FET in the subsequent stage, the entire device This is because the power consumption increases.

An object of the present invention is to provide a transmitter / receiver that suppresses an increase in power consumption.

The transmitter / receiver in the present invention receives a digital PA (Power Amplifier) that outputs a digital RF signal, a matching circuit in which one end is connected to the output terminal of the digital PA and the other end is connected to an antenna, and the antenna receives the signal. When a receiving circuit in which a received signal is input via the matching circuit, one end is connected to the output terminal of the digital PA, and the other end is connected to the input terminal of the receiving circuit and controlled by CLOSE, the received signal is transmitted. The matching circuit includes an RF (Radio Frequency) switch for inputting to a receiving circuit, and when the RF switch is controlled to OPEN, the first impedance regulator is provided. , The output impedance of the digital PA is set so as to match the impedance that anticipates the antenna from the input terminal of the matching circuit.

In the control method of the transmitter / receiver in the present invention, a digital RF signal is output to an antenna via a first impedance regulator included in the matching circuit, and the received signal received by the antenna is controlled by the matching circuit and CLOSE. When input is input via a switch and the RF switch is controlled to OPEN, the first impedance adjuster connects the antenna to the output impedance of the digital PA that outputs the digital RF signal and the input terminal of the matching circuit. It is set to match the expected impedance.

The effect in the present invention is that an increase in power consumption of the transmitter / receiver can be suppressed.

FIG. 1 is a block diagram showing a configuration of a transmitter / receiver 100 according to the first embodiment of the present invention. FIG. 2 is a block diagram showing an example of a configuration of a switch element included in the digital PA101 according to the first embodiment of the present invention. FIG. 3 is a block diagram showing an example of the configuration of the first impedance regulator 1022 according to the first embodiment of the present invention. FIG. 4 is a block diagram showing the configuration of the transmitter / receiver 200 according to the second embodiment of the present invention. FIG. 5 is a block diagram showing an example of the configuration of the second impedance regulator 205 according to the second embodiment of the present invention. FIG. 6 is a block diagram showing the configuration of the transmitter / receiver 300 according to the third embodiment of the present invention. FIG. 7 is a block diagram showing the configuration of the transmitter / receiver 400 according to the fourth embodiment of the present invention.

A mode for carrying out the present invention will be described in detail with reference to the drawings. In each of the drawings and the embodiments described in the specification, the same reference numerals are given to the components having the same functions.

[First Embodiment]
FIG. 1 is a block diagram showing a configuration of a transmitter / receiver 100 according to the first embodiment of the present invention. Referring to FIG. 1, the transmitter / receiver 100 according to the first embodiment of the present invention includes a digital power amplifier (PA: Power Amplifier) 101, a matching circuit 102, an RF (Radio Frequency) switch 103, and a receiving circuit 104.

The digital PA101 outputs a digital RF signal. As shown in FIG. 1, the digital PA101 has at least two switch elements. One end of the first switch element is connected to the ground node, and the other end is connected to the output terminal of the digital PA101. One end of the second switch element is connected to the power supply, and the other end is connected to the output terminal of the digital PA101. In the digital PA 101, one of the plurality of switch elements is controlled by CLOSE and the remaining switch elements are controlled by OPEN during operation. By controlling the switch element in this way, the digital PA101 outputs a potential equal to either the power source to which the switch element is connected or the ground potential. FIG. 2 is a block diagram showing an example of a plurality of switch elements included in the digital PA101. A rectangular signal is generated by operating the OPEN or CLOSE of each switch element at high speed. By passing the rectangular signal through the filter 1021 in the antenna end matching circuit 102, a sinusoidal radio signal is generated.

The matching circuit 102 is configured by connecting the filter 1021 and the first impedance regulator 1022 in series. One end of the matching circuit 102 is connected to the output terminal of the digital PA101, and the other end is connected to the antenna. The matching circuit 102 inputs the RF signal output by the digital PA 101 to the antenna via the filter 1021 and the first impedance regulator 1022. The RF signal output by the digital PA 101 passes through the filter 1021, so that a sinusoidal radio signal is generated. The first impedance regulator 1022 matches the output impedance of the filter 1021 (or the output impedance of the digital PA101) with the impedance expected from the input terminal of the first impedance regulator 1022 (that is, complex conjugate). (To have a relationship of). In FIG. 1, the first impedance regulator 1022 is arranged closer to the antenna than the filter 1021, but the positional relationship between the first impedance regulator 1022 and the filter 1021 may be reversed.

The RF switch 103 connects the output terminal of the digital PA 101 and the input terminal of the receiving circuit 104.

When the transmitter / receiver 100 is in the transmission mode, the RF switch 103 is controlled to the OPEN state. The transmission mode refers to a situation in which the transmitter / receiver 100 operates as a transmitter, that is, a situation in which the digital PA 101 operates and the reception circuit 104 does not operate. In this case, since the digital PA 101 and the receiving circuit 104 are isolated, the transmission power output from the digital PA 101 is completely supplied to the antenna via the matching circuit 102 without leaking to the receiving circuit 104. ..

When the transmitter / receiver 100 is in the reception mode, the RF switch 103 is controlled to the CLOSE state, and all the switch elements of the digital PA 101 are controlled to the OPEN state. The reception mode refers to a situation in which the transmitter / receiver 100 operates as a receiver, that is, a situation in which the reception circuit 104 operates and the digital PA 101 does not operate.

Here, the output power of the digital PA 101 is determined by the voltage applied to the digital PA 101 and the load impedance in anticipation of the antenna from the output terminal of the digital PA 101 via the matching circuit 102. Assuming that the voltage applied to the digital PA 101 is V _sup and the load impedance connected to the digital PA 101 is R _load , the following relational expression holds between _{the output powers P out} , V _sup , and R _load of the digital PA 101. ..

Here, α is a constant depending on the digital code input to the digital PA101. ^{α is 2 / π 2} in the case of a periodic rectangular signal having a duty ratio of 50%. From Equation 1, the smaller the load impedance R _load , the larger the power output from the digital PA101.

Generally, the input impedance Z _sys of the antenna is 50Ω. The matching circuit 102 provides a value represented below as an input impedance in which one end is connected to the antenna and the antenna is expected from the other end. Here, D is an impedance conversion ratio.

On the other hand, _{the upper limit of V sup} is determined depending on the withstand voltage of the switch element constituting the digital PA101. This upper limit is V _{sup_up} . Assuming that the predetermined output power of _{the digital PA101 is P des} and the applied voltage of the digital PA101 is V _{sup_up} , it is necessary to design the first impedance regulator 1022 so that D has the following values.

For example, if the voltage that can be applied to the digital PA101 is several V (volts), the predetermined output power is several W (watts), Z _sys is 50, and α is about 0.9, D is calculated to be about several tens. ..

An example of the first impedance regulator 1022 is shown in FIG. In the first impedance regulator 1022, a series inductor (hereinafter, L) and a ground-parallel capacitor (hereinafter, C) are generally arranged alternately from the terminal connected to the digital PA101 (hereinafter, C). FIG. 3 (a)).

The first impedance regulator 1022 can be configured with one parallel C and one series L (FIG. 3B). When the input impedance of the antenna is 50Ω, C is 16pF, and L is 1.4nH, the load impedance R _load of the digital PA101 is about 2Ω in the 1GHz band. The impedance conversion ratio D is about 25 times.

The first impedance regulator 1022 can be configured by alternately arranging the series C and the ground parallel L, or can be configured by combining the series L, the series C, the ground parallel L, and the ground parallel C. However, other circuits using L and C can also be configured.

According to the above configuration, since the transmission signal does not pass through the RF switch 103 in the transmission mode, the transmitter / receiver 100 of the present invention can suppress an increase in power consumption. Further, the transmitter / receiver 100 is provided with the matching circuit 102, so that the reduction of the transmission power can be suppressed.

[Second Embodiment]
FIG. 4 is a block diagram showing the configuration of the transmitter / receiver 200 according to the second embodiment of the present invention. Referring to FIG. 4, the transmitter / receiver 200 includes a digital PA 101, a matching circuit 102, an RF switch 103, a receiving circuit 104, and a second impedance regulator 205. The transmitter / receiver 200 in the second embodiment differs from the transmitter / receiver 100 in the first embodiment in that it further includes a second impedance regulator 205.

The second impedance regulator 205 connects the RF switch 103 and the receiving circuit 104. _{The second impedance regulator 205 has an input impedance Z in_res} of the receiving circuit 104, and a second impedance regulator 205 and a matching circuit 102 from the input terminal of the receiving circuit 104 in order to realize good reception characteristics in the receiving mode. The impedance Z out_res, which allows the antenna to be _{seen through} , is configured to be a complex conjugate.

Here, R _res and I _res are real numbers, and j is an imaginary number. Since the impedance in anticipation of the antenna from the input terminal of the matching circuit 102 in the transmission mode is R _load , the second impedance regulator 205 has a function of adjusting the impedance of _{R load} to R _res −jI _res.

For example, the input impedance Z _{in_res} of the receiving circuit 104 is 50Ω (R _res = 50Ω, I _res = 0Ω), and the first impedance regulator 1022 is in series L (L) as shown in FIG. 3 (b). _When it is composed of only i1) and ground parallel C (C _i1 ), the second impedance regulator 205 is connected to the RF switch 103 from the terminal side as shown in FIG. 5 (b). It is possible to configure only D _p1 ) and ground L (L _p1). By _{combining C p1} and L _i1 and L _p1 and C _{i 1} to resonate at a predetermined frequency (that is, C _p1 and L _{i 1} have equal absolute impedance values at a predetermined frequency. L _p1 And C _i1 ), the impedance of the series circuit of the first impedance regulator 1022 and the second impedance regulator 205 becomes almost zero in the predetermined frequency band. The impedance of the filter 1021 inside the matching circuit 102 is almost zero in a predetermined frequency band. Therefore, Z _{out_res} is substantially equal to the input impedance of the antenna. Generally, the impedance of the antenna is 50Ω, so Z _{out_res} is 50Ω, which is equal to _{Z in_res.}

Further, in the case where the first impedance regulator 1022 is configured such that the series L and the parallel C are alternately connected as shown in FIG. 3A (from the terminal connected to the digital PA101, L). _i1 , C _i1 , L _i2 , C _i2 , ..., L _in , C _in ), the second impedance regulator 205, as shown in FIG. 5 (a), the series C and the parallel L are alternately connected. (From the terminal connected to the RF switch 103, C _p1 , L _p1 , C _p2 , L _p2 , ..., C _pn , L _pn ), C _ik and L _pk , and L _ik and C Set to a parameter that resonates with _{pk in a predetermined frequency band.} With this setting, the impedance of the series circuit of the first impedance regulator 1022 and the second impedance regulator 205 becomes almost zero in the predetermined frequency band. This makes Z _{out_res} approximately equal to the input impedance of the antenna. Generally, the impedance of the antenna is 50Ω, so Z _{out_res} is 50Ω, which is equal to _{Z in_res.}

Further, as described above, the first impedance regulator 1022 can be configured by alternately arranging the series C and the ground parallel L, and of the series L, the series C, the ground parallel L, and the ground parallel C. It can be configured in combination, or it can be configured in other circuits using L and C. In this case, the second impedance adjuster 205 has a configuration in which C is arranged at a place where L is arranged and L is arranged at a place where C is arranged in the first impedance adjuster 1022. Further, by designing the C (, L) of the second impedance regulator 205 to a value that resonates with the L (, C) of the corresponding first impedance regulator 1022 in a predetermined frequency band, the first The impedance of the series circuit of the impedance regulator 1022 and the second impedance regulator 205 becomes almost zero in the predetermined frequency band. Therefore, Z _{out_res} is substantially equal to the input impedance of the antenna. Generally, the impedance of the antenna is 50Ω, so Z _{out_res} is 50Ω, which is equal to _{Z in_res.}

In the reception mode, all the switch elements of the digital PA 101 are controlled to the OPEN state, so that high isolation is realized between the digital PA 101 and the second impedance regulator 205 and the reception circuit 104. Therefore, the electromagnetic wave received by the antenna is efficiently transmitted to the receiving circuit 104 via the matching circuit 102, the RF switch 103, and the second impedance regulator 205.

According to the above configuration, since the transmission signal does not pass through the RF switch 103 in the transmission mode, the transmitter / receiver 200 of the present invention can suppress an increase in power consumption. Further, the transmitter / receiver 200 is provided with the matching circuit 102, so that the reduction of the transmission power can be suppressed. Further, the transmitter / receiver 200 is provided with the second impedance adjuster 205, so that deterioration of the characteristics of the received signal in the reception mode can be suppressed.

[Third Embodiment]
FIG. 6 is a block diagram showing the configuration of the transmitter / receiver 300 according to the third embodiment of the present invention. Referring to FIG. 6, the transmitter / receiver 300 includes a digital PA 101, a matching circuit 102, an RF switch 103, a receiving circuit 104, a second impedance regulator 205, and a third impedance regulator 306. The transmitter / receiver 300 in the third embodiment differs from the transmitter / receiver 200 in the second embodiment in that it further includes a third impedance regulator 306.

The third impedance regulator 306 connects the RF switch 103 and the second impedance regulator 205.

A passive element such as a capacitor is actually parasiticly connected to the output terminal of the digital PA101 as a device parasitic component. Depending on the target frequency and device, especially in the reception mode, the magnitude of this parasitic component cannot be ignored.

In the reception mode, a third impedance regulator 306 is newly inserted in order to take the matching in consideration of the present parasitic component. Similar to the second embodiment, in the reception mode, the RF switch 103 is controlled to the CLOSE state, and all the switch elements constituting the digital PA 101 are controlled to the OPEN state.

The third impedance adjuster 306 corrects the parasitic component of the digital PA101 so that the impedance in anticipation of the antenna from the input terminal of the receiving circuit 104 becomes the second impedance adjuster 205 as in the second embodiment. Is equal to the impedance of the column circuit of the matching circuit 102 and the antenna. That is, as in the second embodiment, matching can be performed by setting the impedance of the columnar circuit of the second impedance regulator 205, the matching circuit 102, and the antenna to be a complex conjugate relationship with the input impedance of the receiving circuit 104. Can be taken. That is, good reception characteristics are realized.

As the assumed parasitic component of the digital PA101, a capacitor (C _par ) connected between the output terminal of the digital PA101 and the ground is generally assumed. In this case, the third impedance regulator 306 is _{composed of a ground inductor (L comp} ). By _{designing the L comp} to a value that resonates with the C _par in a predetermined frequency band, the impedance to the ground can be made infinite in combination. Therefore, the transmitter / receiver 300 of the present embodiment has a circuit equivalent to that of the transmitter / receiver 200 shown in FIG. 4 in a predetermined frequency band. Similarly, in the receiving mode, the input impedance Z _{in_res of the receiving circuit 104 and the impedance Z out_res} that anticipates the antenna from the input terminal of the receiving circuit 104 via the second impedance regulator 205 and the matching circuit 102 are complex conjugates. Become a relationship. That is, the transmitter / receiver 300 can realize good reception characteristics in the reception mode.

According to the above configuration, since the transmission signal does not pass through the RF switch 103 in the transmission mode, the transmitter / receiver 300 of the present invention can suppress an increase in power consumption. Further, the transmitter / receiver 300 is provided with the matching circuit 102, so that the reduction of the transmission power can be suppressed. Further, the transmitter / receiver 300 is provided with the second impedance regulator 205 and the third impedance regulator 306, so that deterioration of the characteristics of the received signal in the reception mode can be suppressed.

[Fourth Embodiment]
FIG. 7 is a block diagram showing the configuration of the transmitter / receiver 400 according to the fourth embodiment of the present invention. Referring to FIG. 7, the transmitter / receiver 400 includes a digital PA 101, a matching circuit 102, a first RF switch 103, a receiving circuit 104, a fourth impedance regulator 407, and a second RF switch 408. The transmitter / receiver 400 in the fourth embodiment is different from the transmitter / receiver 100 in the first embodiment in that it further includes a fourth impedance regulator 407 and a second RF switch 408.

In the transmission mode, the first RF switch 103 and the second RF switch 408 are controlled to the OPEN state. Therefore, in this mode, the digital PA 101, the matching circuit 102, and the antenna have the same connection relationship as the transmitter / receiver 100 of the first embodiment shown in FIG. Since the transmission path does not include the RF switch, the transmitter / receiver 400 can suppress an increase in power consumption as in the first embodiment.

In the receive mode, the first RF switch 103 and the second RF switch 408 are controlled to the CLOSE state. In the receive mode, the input / output terminals of the first impedance regulator 1022 are short-circuited. When the first impedance regulator 1022 is composed of only elements such as L and C whose impedance is an imaginary number, the first impedance regulator 1022 is expected from the input / output terminals of the first impedance regulator 1022. Impedance (Z _imp ) is composed only of imaginary components to the ground. Here, the fourth impedance regulator 407 provides an imaginary component having the opposite sign to the imaginary component of _{Z imp as the ground impedance.} That is, the fourth impedance regulator 407 has a value in which the impedance becomes −Z _{imp (positive value) in a predetermined frequency band when Z imp} is negative, and is simply configured with only an inductor with one end grounded. can do. On the contrary, when Z _imp is positive, the impedance has _{a value of −Z imp} (negative value) in a predetermined frequency band, and can be configured only by a capacitor whose one end is grounded.

Similar to the first embodiment, in the reception mode, all the switch elements constituting the digital PA101 are controlled to the OPEN state. The digital PA101 maintains high isolation from other circuit blocks. In the receive mode, the impedance between the antenna and the input terminal of the receive circuit 104 is zero. Therefore, if the input impedance of the receiving circuit 104 is adjusted to 50Ω, considering that the input impedance of the antenna is usually 50Ω, matching is achieved, and the transmitter / receiver 400 can obtain good receiving characteristics. it can.

According to the above configuration, since the transmission signal does not pass through the first RF switch 103 and the second RF switch 408 in the transmission mode, the transmitter / receiver 400 of the present invention can suppress an increase in power consumption. Further, the transmitter / receiver 400 is provided with the matching circuit 102, so that the reduction of the transmission power can be suppressed. Further, the transmitter / receiver 400 is provided with the fourth impedance adjuster 407, so that deterioration of the characteristics of the received signal in the reception mode can be suppressed.

Although the present invention has been described above with reference to each embodiment, the present invention is not limited to the above-described embodiment. Various changes that can be understood by those skilled in the art can be made to the structure and details of the present invention within the scope of the present invention.

In addition, each component in each embodiment of the present invention can be realized not only by hardware but also by a computer and a program. The program is recorded and provided on a computer-readable recording medium such as a magnetic disk or a semiconductor memory, and is read by the computer when the computer is started up. This read program causes the computer to function as a component in each of the above-described embodiments by controlling the operation of the computer.

100, 200, 300, 400 Transmitter / Receiver 101 Digital PA
102 Matching circuit 1021 Filter 1022 First impedance regulator 103 RF switch, first RF switch 104 Receiving circuit 205 Second impedance regulator 306 Third impedance regulator 407 Fourth impedance regulator 408 Second RF switch

Claims (7)

A digital PA (Power Amplifier) that outputs a digital RF signal and
A matching circuit with one end connected to the output terminal of the digital PA and the other end connected to the antenna.
A receiving circuit in which the received signal received by the antenna is input via the matching circuit, and a receiving circuit.
An RF (Radio Frequency) switch that inputs the received signal to the receiving circuit when one end is connected to the output terminal of the digital PA and the other end is connected to the input terminal of the receiving circuit and is controlled by CLOSE.
A second impedance regulator for connecting the RF switch and the input terminal of the receiving circuit is provided.
The matching circuit has a first impedance regulator.
The first impedance regulator and the second impedance regulator are configured to include one or more inductors and capacitors, respectively.
The first impedance regulator
A series inductor connected in series to the output terminal side of the digital PA and the antenna,
On the antenna side of the series inductor, one LC circuit composed of a ground parallel capacitor connected in parallel between the series inductor and the ground potential.
Or when a plurality of the LC circuits are connected while maintaining the series connection of the series inductors of the individual LC circuits.
The second impedance regulator is
In the one or more LC circuits constituting the first impedance regulator,
A series capacitor connected in series to the RF switch and the input terminal of the receiving circuit is arranged at a place where the series inductor is arranged.
In a configuration where the ground parallel inductor is arranged, the ground parallel inductor connected in parallel between the series inductor and the ground potential is arranged on the input terminal side of the receiving circuit of the series capacitor.
Or,
In the configuration of the first impedance adjuster, when the capacitor is arranged in place of the series inductor and the inductor is arranged in place of the ground parallel capacitor in the LC circuit, the second impedance adjustment is performed. The vessel has a configuration in which an inductor is arranged in place of the series capacitor and a capacitor is arranged in place of the parallel inductor to the ground.
When the RF switch is controlled to OPEN, the first impedance regulator is set so that the output impedance of the digital PA and the impedance that anticipates the antenna from the input terminal of the matching circuit are matched .
When the RF switch is controlled by CLOSE, the second impedance regulator has a complex conjugate of the output impedance of the matching circuit and the impedance that anticipates the receiving circuit from the input terminal of the second impedance regulator. A transmitter / receiver characterized by being set to <br />. The digital PA comprises a plurality of switch elements, one end of which is connected to a power supply or ground node.
When the RF switch is controlled by OPEN, one of the plurality of switch elements is controlled by CLOSE and all the other switch elements are controlled by OPEN.
The transmitter / receiver according to claim 1, wherein when the RF switch is controlled by CLOSE, all of the plurality of switch elements are controlled by OPEN. A third impedance regulator that connects the RF switch and the second impedance regulator is further provided.
The third impedance regulator is
The transceiver of claim 1, wherein the between the second impedance adjuster and the RF switch, to be composed of only the connected ground inductor or ground capacitor between the ground potential. A digital PA (Power Amplifier) that outputs a digital RF signal and
A matching circuit having a first impedance regulator, one end connected to the output terminal of the digital PA and the other end connected to an antenna.
A receiving circuit in which the received signal received by the antenna is input via the matching circuit, and a receiving circuit.
An RF (Radio Frequency) switch that inputs the received signal to the receiving circuit when one end is connected to the output terminal of the digital PA and the other end is connected to the input terminal of the receiving circuit and is controlled by CLOSE.
It includes another RF switch that bypasses the first impedance regulator.
If the previous SL RF switch is controlled to OPEN, the other of the RF switch is controlled to OPEN, the first impedance regulator expects the antenna output impedance of the digital PA from the input terminal of the matching circuit It is set to match the impedance,
A transmitter / receiver characterized in that when the RF switch is controlled by CLOSE, the other RF switch is controlled by CLOSE and short-circuits the first impedance regulator. Further, a fourth impedance regulator for connecting between the RF switch and the input terminal of the receiving circuit is provided.
Said fourth impedance regulator
The transmitter / receiver according to claim 4 , further comprising only a ground inductor or a ground capacitor connected between the RF switch and the input terminal of the receiving circuit and between the ground potential. A digital PA (Power Amplifier) that outputs a digital RF signal and
A matching circuit with one end connected to the output terminal of the digital PA and the other end connected to the antenna.
A receiving circuit in which the received signal received by the antenna is input via the matching circuit, and a receiving circuit.
When one end is connected to the output terminal of the digital PA and the other end is connected to the input terminal of the receiving circuit to be CLOSE, an RF (Radio Frequency) switch that inputs the received signal to the receiving circuit and
With a second impedance regulator connecting between the RF switch and the input terminal of the receiving circuit
Configure the transmitter / receiver by
A first impedance regulator is provided in the matching circuit.
The first impedance regulator and the second impedance regulator are configured to include one or more inductors and capacitors, respectively.
The first impedance regulator
A series inductor connected in series to the output terminal side of the digital PA and the antenna,
On the antenna side of the series inductor, one LC circuit composed of a ground parallel capacitor connected in parallel between the series inductor and the ground potential.
Or when the plurality of LC circuits are connected while maintaining the series connection of the series inductors of the individual LC circuits.
The second impedance regulator is
In the one or more LC circuits constituting the first impedance regulator,
A series capacitor connected in series to the RF switch and the input terminal of the receiving circuit is arranged at a place where the series inductor is arranged.
At the place where the ground parallel capacitor is arranged, the ground parallel inductor connected in parallel between the series inductor and the ground potential is arranged on the input terminal side of the receiving circuit of the series capacitor.
Or,
In the configuration of the first impedance regulator, when a capacitor is arranged in place of the series inductor in the LC circuit and an inductor is arranged in place of the ground parallel capacitor,
In the configuration of the second impedance regulator, an inductor is arranged in place of the series capacitor and a capacitor is arranged in place of the parallel inductor to the ground.
When the RF switch is OPEN, the first impedance regulator is set so that the output impedance of the digital PA and the impedance that anticipates the antenna from the input terminal of the matching circuit are matched.
When the RF switch becomes CLOSE, the output impedance of the matching circuit and the impedance of the receiving circuit expected from the input terminal of the second impedance regulator are complex conjugate by the second impedance regulator. A transmitter / receiver control method characterized by being set as follows. A digital PA (Power Amplifier) that outputs a digital RF signal and
A matching circuit having a first impedance regulator, one end connected to the output terminal of the digital PA and the other end connected to an antenna.
A receiving circuit in which the received signal received by the antenna is input via the matching circuit, and a receiving circuit.
When one end is connected to the output terminal of the digital PA and the other end is connected to the input terminal of the receiving circuit to be CLOSE, an RF (Radio Frequency) switch that inputs the received signal to the receiving circuit and
A transmitter / receiver is configured with another RF switch that bypasses the first impedance regulator.
If the previous SL RF switch is OPEN, the aforementioned other RF switch and OPEN, the by a first impedance adjuster, and the impedance in anticipation of the antenna from the input terminal of the output impedance and the matching circuit of the digital PA Set to match,
A method for controlling a transmitter / receiver, characterized in that when the RF switch is set to CLOSE, the other RF switch is set to CLOSE and the first impedance regulator is short-circuited.

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