JP6820892B2 - Printing wiring board and manufacturing method of printed wiring board - Google Patents

Description

The present disclosure relates to a printed wiring board having a cavity and a method for manufacturing the printed wiring board.

In recent years, with the increase in the integration and density of wiring, there are cases where a cavity is provided in a multilayer printed wiring board and electronic components are mounted there. However, when mounting electronic components in the cavity, it is formed at the bottom of the cavity. It is desired to improve the peel strength of the wiring pattern to be used.

In the conventional printed wiring board, a cavity is formed as shown below. For example, when forming a cavity in a printed wiring board by counterbore processing using a drill or a laser, a release layer is provided inside the printed wiring board in advance, and the surface of the printed wiring board is processed to the release layer by a drill or a laser. , The superstructure of the peeling layer is removed at the boundary of the peeling layer to form a cavity. After that, the release layer is removed.

In addition to this, for example, for the same purpose as the release layer, a dummy pattern is provided inside the printed wiring board in advance, a laser is irradiated from the surface of the printed wiring board, and the dummy pattern is used as a laser receiver to remove the superstructure. , There is a technique to form a cavity. In this case, the dummy pattern is removed by etching.

Japanese Unexamined Patent Publication No. 9-148744 Japanese Unexamined Patent Publication No. 2012-146983 JP-A-2017-06946

The above-mentioned conventional technique has the following problems.
In the technique of providing the release layer inside the printed wiring board, since the release layer as an auxiliary material is used, there is a problem that the member cost and the formation cost of the release layer increase. Further, in the case of this technique, it is difficult to control the layer structure between the upper layer of the release layer and the surrounding layer, and there is also a problem that the insulating layer and the wiring are bent and the surrounding plate thickness is increased. Further, in the conventional technique of providing the dummy pattern, since the dummy pattern is finally removed by etching, the wiring to be connected to the pad cannot be formed, and it is difficult to connect the circuit wiring to the electronic component housed in the cavity at the bottom. become.

There is also a technique for flattening the bottom by drilling without using a dummy pattern or a peeling layer, but due to the problem of depth adjustment accuracy during cutting, over-cutting or under-cutting may occur. Insufficient removal of shaving residue may occur.

The present invention has been made to solve such a problem, and improves the peel strength of the wiring pattern formed at the bottom of the cavity while enabling the connection between the electronic component inside the cavity and the circuit outside the cavity at the bottom of the cavity. It is an object of the present invention to provide a printed wiring board and a method for manufacturing a printed wiring board, which can be used and does not leave a removal residue of an upper structure on the bottom of the cavity.

The printed wiring board of one aspect of the present disclosure is
A cavity that opens to the substrate side, penetrates the substrate, and has the surface of the insulating resin layer as the bottom surface in a part of a multilayer substrate in which an insulating resin layer is laminated with an insulating resin on the lower layer of the insulating resin substrate.
It is provided with a conductor layer having a surface having the same height as the inner portion excluding the peripheral portion of the surface of the insulating resin layer and being embedded in the insulating resin layer so that the surface forms a part of the bottom surface.
The peripheral portion is formed deeper than the inner portion, and the conductor layer is formed only on the inner portion .
The conductor layer on the bottom surface of the cavity is lower than the insulating resin layer around the cavity by the thickness of the metal foil with the carrier foil .

A method for manufacturing a printed wiring board according to one aspect of the present disclosure is described.
On a part of the metal foil with the carrier foil provided on the second surface of the insulating resin substrate having the first surface and the second surface , nickel and copper are continuously patterned in this order. The process of forming the conductor layer and
A step of forming a first insulating resin layer on the first surface of the substrate and forming a second insulating resin layer on the second surface of the substrate.
Cavity forming region from the side of the first insulating resin layer toward the metal leaf with carrier foil in the laminating direction until halfway through the metal leaf with carrier foil or until it penetrates the metal leaf with carrier foil. The carrier foil and the metal foil of the metal foil with the carrier foil are separated from each other by cutting along the contour line of the above, and the upper superstructure is removed from the peeled surface of the metal foil with the carrier foil to form a cavity. The step of exposing the foil constituting the metal foil with the carrier foil to the bottom of the cavity, and
A step of removing the foil exposed at the bottom of the cavity by flash etching to expose the surface of the second insulating resin layer and the surface of the conductor layer embedded in the second insulating resin layer. To be equipped.

According to the multilayer printed wiring board of the present disclosure, it is possible to improve the peel strength of the wiring pattern formed at the bottom of the cavity while enabling the connection between the electronic component inside the cavity and the circuit outside the cavity at the bottom of the cavity. Furthermore, no removal residue of the superstructure remains at the bottom of the cavity.

It is sectional drawing explaining the manufacturing method of the printed wiring board of one Embodiment. It is sectional drawing explaining the manufacturing method of the printed wiring board of one Embodiment. It is sectional drawing explaining the manufacturing method of the printed wiring board of one Embodiment. It is sectional drawing explaining the manufacturing method of the printed wiring board of one Embodiment. It is sectional drawing explaining the manufacturing method of the printed wiring board of one Embodiment. It is sectional drawing explaining the manufacturing method of the printed wiring board of one Embodiment. It is sectional drawing explaining the manufacturing method of the printed wiring board of one Embodiment. It is sectional drawing explaining the manufacturing method of the printed wiring board of one Embodiment. It is sectional drawing explaining the manufacturing method of the printed wiring board of one Embodiment. It is sectional drawing explaining the printed wiring board of one Embodiment and the manufacturing method thereof. It is sectional drawing explaining the printed wiring board of one Embodiment and the manufacturing method thereof.

The printed wiring board of the embodiment of the present disclosure will be described with reference to the drawings.

〔Production method〕
First, a method of manufacturing a printed wiring board according to an embodiment will be described with reference to FIGS. 1 to 11.
In recent years, in order to facilitate the handling up to the circuit formation of a thin metal foil (mainly copper foil) for realizing high-density wiring, a release layer is formed on a support called a carrier foil and a thin metal is formed on the support. A metal leaf with a carrier foil on which the foil is formed is available.
This method is a method of forming a cavity by separating and removing the superstructure by utilizing the peeling function between the metal foil of the metal foil with the carrier foil and the carrier foil.

(Board preparation process)
As shown in FIG. 1, a metal foil 11 with a carrier foil is provided on the lower surface (second surface) of the upper surface (first surface) and the lower surface (second surface) of the insulating resin of the substrate 10. prepare. The substrate 10 may be a laminated substrate on which an insulating resin layer or a wiring layer is laminated, and the upper surface (first surface) and the lower surface (second surface) may be due to the surface of the laminated insulating resin layer. ..
A metal foil with a carrier foil may be bonded to the upper surface and the lower surface, but in that case, it is desirable to peel off the carrier foil on the upper surface. In the present embodiment, of the metal foil 11a and the carrier foil 11b, which are the foils constituting the metal foil 11 with the carrier foil, the metal foil 11a is attached to the lower surface (second surface) of the substrate 10. As described above, only the peeling function between the metal foil 11a and the carrier foil 11b of the metal foil 11 with the carrier foil is used, and the wiring is not formed by the metal foil 11a. Therefore, which foil is used as the substrate 10 side. It doesn't matter.
The thickness of each of the metal leaf 11 with the carrier foil is preferably 12 μm or more. In the configuration of FIG. 3, the carrier foil 11b preferably has a thickness of 18 μm or less, which will be described later, and is capable of flash etching. The copper foil on the upper side of the double-sided laminated plate is preferably as thin as possible, 12 μm or less. As the copper foil with a carrier foil, MT-EX (manufactured by Mitsui Mining & Smelting Co., Ltd.), which does not require removal of the peeled surface before flash etching described later, is suitable.

Examples of the insulating resin forming the substrate 10 include epoxy resin, bismaleimide-triazine resin, polyimide resin, polyphenylene ether (PPE) resin, phenol resin, polytetrafluoroethylene (PTFE) resin, silicon resin, polybutadiene resin, and polyester. Examples thereof include resins, melamine resins, urea resins, polyphenylene sulfide (PPS) resins, and polyphenylene oxide (PPO) resins. Two or more of these resins may be mixed.

(Metal leaf etching process with carrier foil)
Next, as shown in FIG. 2, the metal leaf 11 with a carrier foil other than the cavity forming region C1 is removed by mask pattern formation and etching treatment using photolithography.

(Pattern plating process)
Subsequently, a conductor layer is formed by performing pattern plating on a partial region (inside the cavity forming region C1) of the metal foil 11 with a carrier foil by using photolithography.
By this step, as shown in FIG. 3, pattern plating is applied on a part of the upper surface and the lower surface of the substrate 10, and in addition to the conductor layer 12 in the lower surface side cavity forming region C1, the outside of the lower surface side cavity forming region C1. The conductor layer 13 and the conductor layer 14 on the upper surface side are formed. At this time, the conductor layer 12 in the lower surface side cavity forming region C1 is formed on the carrier foil 11b.
Specifically, after the dry film 15 is laminated on the upper surface side and the lower surface side of the substrate 10, the mask pattern is formed by exposure and development, and the conductor layers 12, 13, 14 are subjected to plating treatment. To form.
Although only the pad is shown in the figure, the wiring pattern is also formed arbitrarily. However, since the peripheral edge portion C11 in the lower surface side cavity forming region C1 is countersunk in a later process, a conductor pattern is not formed, and the inner peripheral portion C12 inside the peripheral edge portion C11 to be counterbored is on the carrier foil 11b. Complete the conductor pattern of.

The pattern plating is basically copper plating. In the pattern plating here, when there is a concern that the pattern plating portion other than the carrier foil 11b is also slightly etched when the carrier foil 11b is removed in the subsequent process, the pattern is used as a barrier against the removal of the carrier foil 11b. Performs continuous plating of nickel plating + pattern copper plating. In this case, the thickness of the nickel plating is 2 μm or more.

This nickel plating process is called "barrier plating". If the plating at this stage also serves as plating for surface treatment of component mounting, continuous plating of nickel, gold, nickel, and copper is performed. In this case as well, the thickness of the nickel plating is 2 μm or more for the first time and 3 μm or more for the second time, and the gold plating is 0.3 μm or more in the case of wire bonding, although it depends on the mounting method of the parts.

After the pattern plating treatment, the remaining dry film 15 is peeled off to expose the metal foil 11 with the carrier foil as shown in FIG.

(Build-up layer formation process)
Next, as shown in FIG. 5, the first insulating resin layer 16 is formed on the upper surface (first surface) of the substrate 10, and the second insulating resin layer 17 is formed on the lower surface (second surface) of the substrate 10. To form. As the first insulating resin layer 16 and the second insulating resin layer 17, one layer or an arbitrary plurality of layers are formed, respectively.

That is, the upper layer (upper surface) and the lower layer (lower surface) of the substrate 10 are built up an arbitrary number of times to produce the multilayer substrate B1. That is, in this step, the insulating resin layers 16 and 17 are formed on the substrate 10 while the metal foil 11 with the carrier foil is left in the cavity forming region C1, so that the metal foil 11 with the carrier foil is formed with the internal substrate 10 and the insulating resin. A multilayer substrate B1 embedded between the layer 17 (substructure) is manufactured (formed).

As shown in FIG. 6, a circuit is formed on the multilayer board B1 including vias 18 and 19 for interlayer connection. For forming a circuit on the multilayer board B1, for example, not only a subtractive method of removing unnecessary conductors as a circuit by etching but also M-SAP, SAP and the like can be applied.
The vias 18 and 19 are formed by performing a step of forming a via hole pilot hole in a predetermined region of the substrate 10 and the insulating resin layers 16 and 17 by laser processing and a step of plating the region including the via hole pilot hole. Do.
In particular, the conductor layer 12 in the cavity forming region C1 is formed by forming the via 18 connected to the conductor layer 12 formed on the carrier foil 11b in the via hole pilot hole penetrating the second insulating resin layer 16. The circuit can be formed so as to be pulled out of the cavity forming region C1.

As shown in FIG. 6, it is preferable to remove the conductor layer in the cavity forming region C1 on the upper surface side of the multilayer substrate B1. This is to facilitate counterbore processing in the cavity forming step described later.

(Cavity forming process)
In this step, first, as shown in FIG. 7, a metal with a carrier foil is cut from the upper surface of the multilayer substrate B1, that is, from the side of the first insulating resin layer 16 toward the metal foil with the carrier foil 11 in the stacking direction. Cutting is performed along the contour line of the cavity forming region C1 until the middle of the foil 11 or the metal foil 11 with the carrier foil is penetrated.
In the present embodiment, cutting is performed until the metal foil 11 with the carrier foil is penetrated. Further, it is preferable to use a drill bit D1 provided with a sensor at the tip. After the signal of the metal foil 11a is detected by the sensor, the thickness of the metal foil 11a and the carrier foil 11b is taken into consideration, and the metal leaf 11a is dug down by a drill about 30 μm from the upper end. As a result, the carrier foil 11b is penetrated. The dug hole is cut laterally with an end mill and cut along the contour line of the cavity forming region C1 (cutting the peripheral edge portion C11).
The peeling boundary between the metal foil 11a and the carrier foil 11b is exposed in the hole formed by this cutting process.

Next, as shown in FIG. 8, the carrier foil 11b and the metal foil 11a are separated from each other to remove the upper upper structure B11 from the peeled surface of the metal foil 11 with the carrier foil, and the cavity is as shown in FIG. C is formed and the carrier foil 11b is exposed to the bottom of the cavity C.
The cutting depth of the cutting process exceeds the layer thickness of the foil (11a) contained in the upper structure B11 of the carrier foil 11b and the metal foil 11a, and reaches the foil (11b) exposed at the bottom of the cavity C. It may be the depth range until it is done. In this case, the foil (11a) contained in the superstructure B11 can be separated from the periphery and peeled off from the foil (11b) exposed at the bottom of the cavity C.
However, if the cutting is stopped in the relatively thick insulating resin layer 17 as in the present embodiment, strict cutting depth (position) accuracy is not required, and the cutting of the metal leaf 11 with the carrier foil is insufficient. It can be manufactured easily and reliably without any risk of becoming.

(Carrier foil removal process)
In this step, the carrier foil 11b exposed at the bottom of the cavity C is removed by flash etching and embedded in the surface 17a of the second insulating resin layer 17 and the second insulating resin layer 17 as shown in FIG. The surface of the conductor layer 12 is exposed to the inner portion C12.
Since the roughness of the surface of the insulating resin layer 17 is transferred to the roughness of the carrier foil 11b, the foil on the carrier foil 11b side is switched when it is necessary to adjust the roughness of the surface of the resin insulating layer 17. Ra transferred to the insulating resin layer made of the carrier foil of MT-EX is 280 to 400 nm, and Ra transferred to the insulating resin layer made of the thin copper foil is 180 to 300 nm. By selecting a copper foil with a carrier foil other than MT-EX, a further different roughness can be realized.

More specifically, in this step, the carrier foil 11b is removed by flash etching the bottom of the cavity forming region C1. As a result, the surface 17a of the insulating resin layer 17 under the substrate 10 and the conductor layer 12 whose surface is exposed at the same height (position) as the surface 17a and embedded in the insulating resin layer 17 are the bottom surface of the cavity C. (Inner part C12) is formed. In this way, the conductor layer 12 flatly exposed on the inner portion C12 of the bottom surface of the cavity C functions as a component mounting land so that the circuit wiring in the multilayer board B2 and the electronic component accommodated in the cavity C can be connected. Become.

If it is not desired to reduce the conductor thickness of the outermost layer by flash etching, it is preferable to mask the area other than the cavity C.

When nickel plating is performed as barrier plating, nickel is further etched. For nickel etching, the nickel remover NH-1860 series (manufactured by MEC COMPANY Ltd.) is suitable.

When gold plating is performed under the nickel plating of barrier plating for wire bonding applications, the ferric chloride solution and cupric chloride solution, which are typical etching solutions of the subtractive method, do not dissolve gold, so in principle. However, it is not suitable because it penetrates into the interface between gold plating and the insulating material due to its strong penetrating power to the interface, and side etching occurs that melts the nickel plating and copper plating below the gold plating.

(Solder resist process)
In this step, as shown in FIG. 11, the solder resist 21 is formed while leaving the contact area of the conductor layer. As the solder resist, a dry film type and a liquid type can be used.

(Electronic component mounting location formation process)
After this step, it shall be performed when a step is required in the component mounting land.
In this step, the conductor layer 12 exposed at the bottom of the cavity C is plated to form the metal plating layer 22, and a connection pad which is a component mounting land having a step from the bottom surface is formed.

If necessary, the process of mounting the electronic component may be added as follows. That is, the electronic component is housed in the cavity C, and the electrode provided at the bottom of the electronic component and the metal plating layer 22 on the conductor layer 12 are brought into contact with each other to connect the circuits to each other. It should be noted that, when the electronic component is not mounted here and is mounted elsewhere, the steps below the electronic component mounting step are unnecessary.

[Printed circuit board]
As shown in FIG. 10 or 11, the printed wiring board B2 or B of the present embodiment manufactured by the above manufacturing method is a multilayer substrate in which an insulating resin layer 17 is laminated with an insulating resin on a lower layer of the insulating resin substrate 10. Cavity C which opens to the substrate 10 side and penetrates the substrate 10 and has the surface of the insulating resin layer 17 as the bottom surface, and the inner portion C12 excluding the peripheral edge C11 of the surface of the insulating resin layer 17 in a part of the region (C1). A conductor layer 12 having a surface having the same height and being embedded in the insulating resin layer 17 so that the surface forms a part of the bottom surface is provided.
The peripheral edge portion C11 is formed deeper than the inner portion C12, and the conductor layer 12 is formed only on the inner portion.
By having a structure in which a groove is formed in the peripheral edge portion C11 of the bottom surface of the cavity C, the formation of the cavity C using the metal foil 11 with the carrier foil is easily and surely made as described above.

In the printed wiring board B2 or B, the conductor layer 12 on the bottom surface of the cavity C is lower than the insulating resin layer 17 around the cavity C by a thickness corresponding to the thickness of the metal leaf with the carrier foil of 11t (see FIG. 10). .. Due to the structure of the bottom surface of the cavity C, it is possible to form the cavity C using the metal foil 11 with the carrier foil as described above.
Further, as described above, the conductor layer 12 includes a connection pad for electronic components. Further, the conductor layer 12 may include a circuit wiring in which the conductor layer 12 is connected in the plane direction to the connection pad. However, the connection pad and the circuit wiring are housed in the inner portion C12. The structure of the bottom surface of the cavity facilitates the formation of the metal leaf 11 with the carrier foil and the cavity C by counterbore processing as described above.

As described above, the peripheral edge C11 is cut along the contour of the cavity to be formed, the metal foil 11 with the carrier foil is peeled off to remove the superstructure B11, and then the carrier foil 11b exposed at the bottom of the cavity C is flushed. A conductor layer 12 embedded in the surface 17a of the insulating resin layer 17 located under the substrate 10 that remains after being removed by etching so that the upper surface is substantially flush with each other is formed so as to be housed in the cavity C. The circuit connection between the electronic component and the substrate side can be made at the bottom of the electronic component.

By forming the conductor layer 12 substantially flush with the bottom surface of the cavity C as a connection pad (component mounting land) and connecting it to the electrode at the bottom of the electronic component in this way, the component mounting as a wiring pattern at the bottom of the cavity C The peel strength of the land can be improved.

Since the metal foil 11 with a carrier foil is used as the release material for the upper structure B11 that occupies the space where the cavity C is planned to be formed, fine wiring can be performed at the bottom of the cavity C.
Since the wiring at the bottom of the cavity C is covered with the metal leaf 11 with a carrier foil until the middle process and does not come into direct contact with the interlayer insulating resin, no resin residue remains on the wiring at the bottom of the cavity C even after counterbore processing. .. Even if the wiring at the bottom of the cavity C is gold-plated and a corrosion resistance test is performed, there is no resin residue, so that the corrosion resistance is excellent.
The metal foil 11 with a carrier foil used in the circuit board forming process has excellent heat resistance, and even after undergoing a process including heat treatment, the metal foil 11a and the carrier foil 11b do not lose their peelability and form a cavity C. can do.

The example of the manufacturing procedure of the printed wiring board in the above embodiment is an example, and the processing processes can be changed in various ways by exchanging each processing process, adding a new processing process, and deleting some processing processes. Is also possible.

Although the embodiments of the present disclosure have been described above, the embodiments are shown as examples, and can be implemented in various other embodiments, and components are omitted as long as the gist of the invention is not deviated. , Can be replaced or changed.

10 Substrate 11 Metal foil with carrier foil 11a Metal foil 11b Carrier foil 12,13,14 Conductor layer 16,17 Insulation resin layer 18,19 Via B1 Multilayer substrate (intermediate)
B11 Superstructure B2, B Printed wiring board C Cavity C1 Cavity formation area C11 Peripheral part C12 Inner part

Claims (7)

A cavity that opens to the substrate side, penetrates the substrate, and has the surface of the insulating resin layer as the bottom surface in a part of a multilayer substrate in which an insulating resin layer is laminated with an insulating resin on the lower layer of the insulating resin substrate.
It is provided with a conductor layer having a surface having the same height as the inner portion excluding the peripheral portion of the surface of the insulating resin layer and being embedded in the insulating resin layer so that the surface forms a part of the bottom surface.
The peripheral portion is formed deeper than the inner portion, and the conductor layer is formed only on the inner portion .
A printed wiring board in which the conductor layer on the bottom surface of the cavity is lower than the insulating resin layer around the cavity by the thickness of the metal foil with a carrier foil . A cavity that opens to the substrate side, penetrates the substrate, and has the surface of the insulating resin layer as the bottom surface in a part of a multilayer substrate in which an insulating resin layer is laminated with an insulating resin on the lower layer of the insulating resin substrate.
A conductor layer having a surface having the same height as the inner portion excluding the peripheral portion of the surface of the insulating resin layer and being embedded in the insulating resin layer so that the surface forms a part of the bottom surface.
With
The peripheral portion is formed deeper than the inner portion, and the conductor layer is formed only on the inner portion.
Wherein the conductive layer of the bottom surface of the cavity, the insulating resin layer by Ri printed wiring board that has a low Kuna' around the cavity. The printed wiring board according to claim 1 or 2, wherein the conductor layer includes a connection pad with an electronic component. The printed wiring board according to claim 3, wherein the conductor layer includes a circuit wiring in which the conductor layer is connected to the connection pad in the plane direction. On a part of the metal foil with the carrier foil provided on the second surface of the insulating resin substrate having the first surface and the second surface , nickel and copper are continuously patterned in this order. The process of forming the conductor layer and
A step of forming a first insulating resin layer on the first surface of the substrate and forming a second insulating resin layer on the second surface of the substrate.
Cavity forming region from the side of the first insulating resin layer toward the metal leaf with carrier foil in the laminating direction until halfway through the metal leaf with carrier foil or until it penetrates the metal leaf with carrier foil. The carrier foil and the metal foil of the metal foil with the carrier foil are separated from each other by cutting along the contour line of the above, and the upper superstructure is removed from the peeled surface of the metal foil with the carrier foil to form a cavity. The step of exposing the foil constituting the metal foil with the carrier foil to the bottom of the cavity, and
A step of removing the foil exposed at the bottom of the cavity by flash etching to expose the surface of the second insulating resin layer and the surface of the conductor layer embedded in the second insulating resin layer. A method for manufacturing a printed wiring board. With a carrier foil provided on the second surface of an insulating resin substrate having a first surface and a second surface.
A process of forming a conductor layer by continuously pattern-plating nickel, gold, nickel, and copper on a part of the metal leaf .
A step of forming a first insulating resin layer on the first surface of the substrate and forming a second insulating resin layer on the second surface of the substrate.
Cavity forming region from the side of the first insulating resin layer toward the metal leaf with carrier foil in the laminating direction until halfway through the metal leaf with carrier foil or until it penetrates the metal leaf with carrier foil. The carrier foil and the metal foil of the metal foil with the carrier foil are separated from each other by cutting along the contour line of the above, and the upper superstructure is removed from the peeled surface of the metal foil with the carrier foil to form a cavity. The step of exposing the foil constituting the metal foil with the carrier foil to the bottom of the cavity, and
A step of removing the foil exposed at the bottom of the cavity by flash etching to expose the surface of the second insulating resin layer and the surface of the conductor layer embedded in the second insulating resin layer.
A method of manufacturing a printed wiring board. A step of forming a via hole pilot hole in a portion of the second insulating resin layer corresponding to the conductor layer,
The method for manufacturing a printed wiring board according to claim 5 or 6 , further comprising a step of performing pattern plating on the region including the via hole pilot hole.

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