JP6672067B2 - Stabilized power supply circuit - Google Patents

Description

  The present invention relates to a power supply voltage stabilizing circuit, and more particularly to a circuit for further stabilizing an output voltage and improving a power supply voltage utilization factor.

  In a semiconductor integrated circuit, in view of a demand for a reduction in a layout area of an element and a limitation of an interface voltage with a circuit connected to the outside of the IC, some ICs having a high withstand voltage power supply terminal include the power supply terminal. There is a configuration in which a stabilized power supply circuit of an internal circuit composed of low withstand voltage elements is connected, and a main circuit other than the stabilized power supply circuit uses low withstand voltage elements.

  For example, when a MOSFET is used as an element constituting a stabilized power supply circuit used inside such an IC, advantages such as low output resistance, good frequency characteristics, and relatively easy circuit adjustment such as phase compensation are provided. (See, for example, Patent Documents 1 and 2).

  As such a source follower circuit, for example, a circuit using an enhancement type MOSFET as shown in FIG. 4 or a circuit which improves the characteristics of the circuit of FIG. 4 as shown in FIG. and so on.

For example, FIG. 4 shows an example of a source follower circuit configured by using an enhancement NMOSFET 45, in which a reference voltage is applied to the gate of the enhancement NMOSFET to obtain a stabilized voltage from the source. Has become.
FIG. 5 is a circuit diagram showing a main part of a circuit example disclosed in Patent Document 2, which is an example of a conventional circuit for improving the operation characteristics of the circuit shown in FIG. .

  This circuit generates and applies a bias voltage close to the threshold voltage of the enhancement NMOSFET 45 from the reference voltage to the gate of the enhancement NMOSFET 45 by the source follower of the enhancement PMOSFET 46 having a threshold voltage having an absolute value equal to that of the enhancement NMOSFET 45. It is composed. In such a circuit, the threshold voltage of the enhancement-type NMOSFET 45 is offset by the threshold voltage of the enhancement-type PMOSFET 46, and the output terminal 47 can output a voltage substantially equal to the reference voltage.

JP 2011-212444 A Japanese Patent No. 3556328

  However, in the configuration shown in FIG. 4, the threshold voltage of the enhancement type NMOSFET 45 takes a positive value, so that the stabilized output voltage (stabilized power supply output voltage) obtained at the output terminal 47 is as follows. As represented by the following equation 1, there is a disadvantage that the gate voltage of the NMOSFET 45 is lower by the threshold voltage of the NMOSFET 45.

  Stabilized power supply output voltage = gate voltage of NMOSFET−threshold voltage of NMOSFET.

  The circuit shown in FIG. 5 is a circuit in which a measure for improving the output voltage drop as described above has been taken. However, since the elements having different characteristics, that is, the NMOS type semiconductor element and the PMOS type semiconductor element, are used, the circuit shown in FIG. Due to the above variation, when the threshold voltages of the NMOS semiconductor device and the PMOS semiconductor device are different from each other, there arises a problem that the threshold voltages cannot be canceled each other as described above.

Also, the threshold voltage of the MOSFET naturally varies due to variations in the wafer process. Therefore, even if a reference voltage generated by an element having a small variation in a wafer process such as a Zener diode is used as the reference voltage, the circuit shown in FIGS. Occurs.
For this reason, a product configuration in which the output voltage of the circuit shown in FIGS. 4 and 5 is directly used as the reference voltage may be difficult depending on the desired accuracy.

  In addition, when the enhancement type NMOSFET is used, in the conventional circuit of FIG. 4, the output voltage is always lower than the gate voltage of the NMOSFET 45 by the threshold voltage of the NMOSFET 45 as shown in the equation (1). Therefore, when the power supply voltage falls below the reference voltage, even if the gate voltage of the NMOSFET 45 is made equal to the power supply voltage in order to make the output voltage equal to the power supply voltage, the output voltage is set to a low voltage by the threshold voltage of the NMOSFET 45. As a result, there is a problem that the power supply voltage utilization rate is deteriorated.

  The present invention has been made in view of the above circumstances, and provides a stabilized power supply circuit that has good power supply voltage use efficiency and can obtain a stable output voltage regardless of fluctuations in the power supply voltage.

In order to achieve the above object of the present invention, a stabilized power supply circuit according to the present invention comprises:
A first depletion-type NMOSFET having a gate connected to each other; a current flowing between a drain of the first depletion-type NMOSFET and a power supply is supplied to a drain of the first depletion-type NMOSFET. While a current detection circuit for detecting is provided, a source of the first depletion type NMOSFET is connected to a cathode of a Zener diode, and an anode of the Zener diode is connected to a ground potential;
A current source is provided between the gates of the first and second depletion type NMOSFETs and a power supply, and an impedance is controlled between the gate and the ground potential according to a current detection result of the current detection circuit. A variable resistor configured to be provided is provided,
The second depletion-type NMOSFET is a stabilized power supply circuit in which a power supply voltage is applied to a drain and a stabilized voltage is provided to a source so as to be output.
The current detection circuit is configured such that, when a current detection result corresponding to that the power supply voltage is in a state where the current is not enough to flow through the zener diode is obtained, the impedance of the variable resistor is higher than the impedance of the current source. The variable resistor is controlled so as to increase the voltage, and a voltage substantially equal to the power supply voltage can be output from the source of the second depletion type NMOSFET, while the power supply voltage is low enough to flow the current through the Zener diode. When a current detection result corresponding to the above is obtained, the variable resistor is controlled so that the impedance of the variable resistor is lower than the impedance of the current source, and the second depletion type NMOSFET is controlled. Which is capable of outputting a voltage substantially equal to the voltage of the Zener diode from the source of A.

According to the present invention, by using a depletion-type NMOSFET having a negative threshold voltage for the output stage, when the power supply voltage is low enough to cause a current to flow through the Zener diode, the power supply voltage is almost output. As a result, the power supply voltage utilization rate can be reliably improved as compared with the conventional case.
If the power supply voltage is higher than a voltage sufficient to pass a current through the Zener diode, the circuit operation cancels the threshold voltage of the depletion type NMOSFET, and thus the threshold voltage of the depletion type NMOSFET used for the internal power supply. Even if the voltage varies, a voltage substantially equal to the voltage of the Zener diode can be output.
Furthermore, even when the power supply voltage rises sharply, it is possible to suppress a rise in the stabilized power supply voltage as an output voltage, and to provide a stabilized and reliable power supply circuit with higher stability and reliability than before. The effect is that it can be performed.

FIG. 2 is a circuit diagram illustrating a basic circuit configuration example of a stabilized power supply circuit according to an embodiment of the present invention. FIG. 2 is a circuit diagram illustrating a specific circuit configuration example of the stabilized power supply circuit according to the embodiment of the present invention. FIG. 9 is a circuit diagram illustrating another specific circuit configuration example of the stabilized power supply circuit according to the embodiment of the present invention. FIG. 9 is a circuit diagram showing a circuit configuration example of a conventional stabilized power supply circuit using a source follower circuit using an enhancement type NMOSFET. FIG. 5 is a circuit diagram showing an example of a circuit configuration of a conventional circuit for improving output characteristics of the stabilized power supply circuit shown in FIG. 4.

An embodiment of the present invention will be described below with reference to FIGS.
The members, arrangements, and the like described below do not limit the present invention, and can be variously modified within the scope of the present invention.
First, an example of a basic circuit configuration of a stabilized power supply circuit according to an embodiment of the present invention will be described with reference to FIG.
First, the stabilized power supply circuit according to the embodiment of the present invention includes first and second NMOSFETs (N-channel MOS field-effect transistors) 1 and 2, a Zener diode 21, and a current detection circuit (“I −DET ”), a bias voltage generating current source 22, and a bias voltage generating variable resistor 23 as main components.

Hereinafter, a specific circuit configuration will be described. First, in the embodiment of the present invention, the first and second NMOSFETs 1 and 2 are of a depletion type.
The first NMOSFET 1 has a current detection circuit 50 provided between the drain and the power supply, the source of which is connected to the cathode of a Zener diode 21 and the anode of which is connected to the ground potential. It has become.

  The gate of the first NMOSFET 1 is connected to the gate of the second NMOSFET 2, and a bias voltage generating current source 22 is connected in series between the connection point and the power supply. . The bias voltage generation current source 22 functions as a current source for generating a gate bias voltage of the second NMOSFET 2.

Further, between the gates of the first and second NMOSFETs 1 and 2 and the ground potential, a bias voltage generating variable resistor 23 whose impedance can be varied by an output signal of the current detection circuit 50 is provided in series. ing.
The power supply voltage is applied to the drain of the second NMOSFET 2, while the output terminal 41 is connected to the source of the second NMOSFET 2, so that a stabilized voltage (hereinafter, “stabilized for convenience of description, Power supply output voltage).

Next, a circuit operation in such a configuration will be described.
First, the first NMOSFET 1 and the second NMOSFET 2 have the same threshold voltage.
Since the threshold voltage of the depletion-type NMOSFET takes a negative value, when the drain voltage is higher than the gate voltage, the stabilized power supply output voltage, which is the output voltage, is made higher by at most the absolute value of the threshold voltage than the gate voltage. be able to.
When the drain voltage is equal to or lower than the gate voltage, the stabilized power supply output voltage becomes substantially equal to the drain voltage.

  The operation of the current detection circuit 50 will be described. First, when the power supply voltage is equal to or higher than a voltage sufficient to allow the current to flow through the Zener diode 21, the current detection circuit 50 detects that the current has flowed through the Zener diode 21, and A control signal is output from the circuit 50 to the bias voltage generating variable resistor 23 to reduce the impedance, and the impedance of the bias voltage generating variable resistor 23 is reduced.

  As a result, a bias voltage corresponding to the impedance difference between the bias voltage generation current source 22 and the bias voltage generation variable resistor 23 is generated at the gate of the second NMOSFET 2. That is, the bias voltage is a voltage lower by the absolute value of the threshold voltage of the negative sign of the second NMOSFET 2. As a result, a stabilized power supply voltage substantially equal to the voltage of the Zener diode 21 is output to the output terminal 41.

  When the power supply voltage rises sharply, the current flowing through the Zener diode 21 increases. Therefore, the impedance of the bias voltage generating variable resistor 23 is controlled by the current detection circuit 50 to be lower, and the output terminal 41 An increase in output voltage is suppressed.

Next, a specific example of the circuit configuration of the current detection circuit 50 and the bias resistor 23 will be described with reference to FIG. The same components as those shown in FIG. 1 are denoted by the same reference numerals, and detailed description thereof will be omitted. Hereinafter, different points will be mainly described.
In the circuit configuration example shown in FIG. 2, the current detection circuit 50 includes first and second PMOSFETs (P-channel MOSFETs) 11 and 12 and a control resistor 30 as main components. Has become.
Further, the bias voltage generating variable resistor 23 is configured using the third NMOSFET 3.

More specifically, first, the first and second PMOSFETs 11 and 12 form a current mirror circuit, and their sources are connected to each other so that a power supply voltage is applied. And the drain of the first NMOSFET 1 are connected to each other.
The drain of the second PMOSFET 12 is connected to the ground potential via the control resistor 30, and the connection point between the drain and the control resistor 30 is connected to the gate of the third NMOSFET 3.

The third NMOSFET 3 functioning as the bias voltage generating variable resistor 23 has a drain connected to the gates of the first and second NMOSFETs 1 and 2, and a source connected to the ground potential.
Next, the operation in such a configuration will be described.
Since the gate-source voltages of the first and second PMOSFETs 11 and 12 are equal, their drain currents are equal, and a current equal to the current flowing through the Zener diode 21 flows through the control resistor 30.

  When the power supply voltage is low, no current flows through the Zener diode 21, the gate voltage of the third NMOSFET 3 falls below the threshold voltage of the third NMOSFET 3, and the impedance of the third NMOSFET 3 increases. The gate voltage of the NMOSFET 2 is substantially equal to the power supply voltage, and the stabilized power supply output voltage obtained at the output terminal 41 is also substantially equal to the power supply voltage.

  On the other hand, when the power supply voltage increases and a current flows through the Zener diode 21 and the voltage across the control resistor 30 exceeds the threshold voltage of the third NMOSFET 3, the impedance of the third NMOSFET 3 decreases, and the bias voltage is generated. A bias voltage equal to the absolute value of the threshold voltage of the negative sign of the depletion type NMOSFET is generated and applied to the gate of the second NMOSFET 2 in accordance with the difference in impedance with the current source 22 for use.

As a result, the stabilized power supply output voltage at the output terminal 41 becomes substantially equal to the voltage of the Zener diode 21.
As described above, in the circuit configuration example shown in FIG. 2, the current detection circuit 50 is configured by the current mirror circuit using the first and second PMOSFETs 11 and 12, and the current detection circuit 50 is provided at the input stage of the current mirror circuit. While detecting the drain current of the NMOSFET 1 in other words, in other words, detecting the current flowing through the Zener diode 21, the third output functioning as the bias voltage generating variable resistor 23 by the drain output of the second PMOSFET 12 in the output stage. The operation of the NMOSFET 3 is controlled.
The circuit as shown in FIG. 2 can be realized as a one-chip semiconductor integrated circuit by a general CMOS process having a well structure with two polarities.

Next, a second specific circuit configuration example of the current detection circuit 50 will be described with reference to FIG. The same components as those shown in FIGS. 1 and 2 are denoted by the same reference numerals, and detailed description thereof will be omitted. Hereinafter, different points will be mainly described.
In the second specific circuit configuration example, the current detection circuit 50 has a grounded-gate type comparator circuit including first and second PMOSFETs 11 and 12 and a bias circuit including fourth to sixth NMOSFETs 4 to 6. It is configured.

  More specifically, first, the source of the first PMOSFET 11 is connected via a first source resistor 31, and the source of the second PMOSFET 12 is connected via a second source resistor 32. A power supply voltage is applied. Note that the resistance value of the first source resistor 31 is preferably set to a value smaller than the resistance value of the second source resistor 32.

  The first and second PMOSFETs 11 and 12 have their gates connected to the drain of the first PMOSFET 11, and the connection point is connected to the drain of the fourth NMOSFET 4. The source is connected to the ground potential.

On the other hand, the drain of the second PMOSFET 12 is connected to the gate of the third NMOSFET 3 and to the drain of the fifth NMOSFET 5.
The fourth to sixth NMOSFETs 4 to 6 and the bias circuit current source 24 constitute a bias circuit for the grounded gate type comparator circuit including the first and second PMOSFETs 11 and 12.

That is, in the fourth to sixth NMOSFETs 4 to 6, the respective gates and the drain of the sixth NMOSFET 6 are connected to each other, and the drain of the sixth NMOSFET 6 is connected to the bias circuit current source 24. A constant current is supplied.
The sources of the fifth and sixth NMOSFETs 5 and 6 are both connected to the ground potential.

Next, the operation in such a configuration will be described.
First, when the power supply voltage is low, the second source resistor 32 has a higher resistance value than the first source resistor 31, so that the drain current of the second PMOSFET 12 is equal to the drain current of the first PMOSFET 11. It is smaller than the current. Therefore, the gate voltage of the third NMOSFET 3 is lower than the threshold voltage of the third NMOSFET 3, and the impedance of the third NMOSFET 3 is increased, so that the gate voltage of the second NMOSFET 2 becomes almost equal to the power supply voltage. The resulting stabilized power supply output voltage is approximately equal to the power supply voltage.

  On the other hand, when the power supply voltage increases and a current flows through the Zener diode 21, the voltage across the first source resistor 31 increases, and the gate-source voltage of the first and second PMOSFETs 11 and 12 increases. . When the drain current of the first PMOSFET 11 exceeds the current value of the bias voltage generating current source 22, the gate voltage of the third NMOSFET 3 exceeds the threshold voltage of the third NMOSFET 3, and the impedance of the third NMOSFET 3 decreases. Become.

As a result, a bias voltage corresponding to the difference in impedance between the bias voltage generation current source 22 and the third NMOSFET 3 is generated at the gate of the second NMOSFET 2. That is, the bias voltage is a voltage lower by the absolute value of the threshold voltage of the negative sign of the second NMOSFET 2.
As a result, a stabilized power supply voltage substantially equal to the voltage of the Zener diode 21 is output to the output terminal 41.

As described above, in the circuit configuration example shown in FIG. 3, the current detection circuit 50 is configured by the grounded-gate type comparator circuit including the first and second PMOSFETs 11 and 12, and the comparator circuit includes the first NMOSFET 1 Is compared with whether or not the drain voltage exceeds a voltage sufficient to cause a current to flow through the Zener diode 21, and the operation of the third NMOSFET 3 is controlled according to the comparison result.
The circuit as shown in FIG. 3 can be realized as a one-chip semiconductor integrated circuit by a general CMOS process having a well structure with two polarities.

In the above-described embodiment of the present invention, the MOSFET is used as the semiconductor element constituting the current detection circuit 50. However, the present invention is not limited to this. For example, a bipolar transistor may be used.
Further, the current detection circuit 50 may be configured to use the current mirror circuit illustrated in FIG. 2, or may be generated in the first source resistor 31 which is a current detection resistor as illustrated in FIG. 3. The configuration may be such that a voltage to be detected is detected by a comparator circuit.

When the comparator circuit is used, the grounding type does not need to be limited to the gate grounding shown in FIG.
Further, the bias voltage generating current source 22 may be realized using a current source circuit, or may be configured to output the drain saturation current IDSS of the high breakdown voltage depletion type NMOSFET.
Further, it is preferable that the bias voltage generating variable resistor 23 is configured using a bipolar transistor or a MOSFET.

  The present invention can be applied to a stabilized power supply circuit in which improvement of the power supply voltage utilization rate and further stabilization of the output voltage are desired.

21 Zener diode 22 Current source 23 for generating bias voltage Variable resistor 50 for generating bias voltage 50 Current detection circuit

Claims (3)

A first depletion-type NMOSFET having a gate connected to each other; a current flowing between a drain of the first depletion-type NMOSFET and a power supply is supplied to a drain of the first depletion-type NMOSFET. While a current detection circuit for detecting is provided, a source of the first depletion type NMOSFET is connected to a cathode of a Zener diode, and an anode of the Zener diode is connected to a ground potential;
A current source is provided between the gates of the first and second depletion type NMOSFETs and a power supply, and an impedance is controlled between the gate and the ground potential according to a current detection result of the current detection circuit. A variable resistor configured to be provided is provided,
The second depletion-type NMOSFET is a stabilized power supply circuit in which a power supply voltage is applied to a drain and a stabilized voltage is provided to a source so as to be output.
The current detection circuit is configured such that, when a current detection result corresponding to a state in which the power supply voltage is less than a current flowing through the zener diode is obtained, the impedance of the variable resistor is higher than the impedance of the current source. The variable resistor is controlled so as to increase the voltage, and a voltage substantially equal to the power supply voltage can be output from the source of the second depletion type NMOSFET, while the power supply voltage is low enough to flow the current through the Zener diode. When a current detection result corresponding to the above is obtained, the variable resistor is controlled so that the impedance of the variable resistor is lower than the impedance of the current source, and the second depletion type NMOSFET is controlled. From the source of the Zener diode to output a voltage substantially equal to the voltage of the Zener diode. Stabilized power supply circuit according to claim. The current detection circuit is configured using a current mirror circuit, and the current mirror circuit detects a drain current of the first depletion type NMOSFET at an input stage thereof, and detects the variable resistor by an output of an output stage. Control is provided,
2. The stabilization device according to claim 1, wherein the variable resistor includes a transistor, and the transistor is provided so that its operation is controlled by an output signal of an output stage of the current mirror circuit. Power circuit.   The current detection circuit is configured by a comparator circuit using a grounded-gate or base-grounded amplifier instead of the current mirror circuit, and the comparator circuit has a drain voltage of the first depletion-type NMOSFET. 3. The stabilization device according to claim 2, wherein a comparison is made as to whether or not a voltage sufficient to allow a current to flow through the zener diode has been exceeded, and the variable resistor can be controlled in accordance with the comparison result. Power circuit.

Images