JP6645402B2 - Semiconductor device - Google Patents

Description

  The technology disclosed in this specification relates to a semiconductor device.

  Patent Literature 1 discloses a semiconductor device. The semiconductor device includes a semiconductor element, a sealing resin for sealing the semiconductor element, a lead frame having a semiconductor element bonded to an upper surface located inside the sealing resin, and a lower surface of a first lead frame. And an insulating sheet exposed on the surface of the sealing resin. The insulating sheet electrically insulates the lead frame from other devices arranged adjacent to the semiconductor device, for example, a cooler.

  In the semiconductor device manufacturing process described above, the semiconductor element is sealed with a sealing resin by performing so-called molding. In this molding, a lead frame to which a semiconductor element is soldered is placed in a mold together with an insulating sheet. Then, the sealing resin heated to a softening temperature is injected into the mold. Thereby, the bonding between the lead frame and the insulating sheet can be performed together with the sealing of the semiconductor element with the sealing resin.

JP 2004-165281 A

  After the molding, in the process of lowering the temperature of the semiconductor device to room temperature, each component of the semiconductor device undergoes thermal contraction. Here, since the sealing resin and the lead frame are made of different materials, the amounts of shrinkage generated in the sealing resin and the lead frame are also different from each other. As a result, deformation such as warpage may occur in the semiconductor device. If the semiconductor device is small, the amount of deformation is small, and such deformation can be ignored. However, for example, in a semiconductor device having a plurality of semiconductor elements, the size thereof is relatively large, so that the amount of deformation due to the above-described thermal shrinkage is also large. In this case, the insulating sheet located on the surface of the sealing resin may be stretched or bent, and a problem such as breakage or peeling of the insulating sheet may occur.

  In view of the above, the present disclosure provides a technique capable of suppressing defects such as breakage and peeling of an insulating sheet in a semiconductor device having the insulating sheet.

A semiconductor device disclosed in the present specification includes a first semiconductor element and a second semiconductor element, a sealing resin for sealing the first semiconductor element and the second semiconductor element, and a first semiconductor element and a second semiconductor element on an upper surface located inside the sealing resin. comprising 1 and the semiconductor element and the lead frame second semiconductor elements are mounted, and a first insulation sheet and the second insulation sheet is exposed on the surface of the sealing resin with and is joined to the lower surface of the rie de frame. The lead frame includes a first thick portion, a second thick portion adjacent to the first thick portion at an interval, and a first thick portion between the first thick portion and the second thick portion. And a thin portion extending with a smaller cross-sectional area than the second thick portion. A first semiconductor element is mounted on an upper surface of the first thick portion, and a first insulating sheet is joined to a lower surface of the first thick portion. The second semiconductor element is mounted on the upper surface of the second thick portion, and the second insulating sheet is joined to the lower surface of the second thick portion. The space between the first thick portion and the second thick portion is filled with a sealing resin.

  Here, the terms “upper surface” and “lower surface” in the present specification are used to express two surfaces located on opposite sides for the sake of convenience, and for example, a surface located vertically above or a surface below vertically It is not intended to be construed as being limited to the plane located at. The semiconductor device may be designed, manufactured, or used, for example, in such a posture that the “upper surface” is located vertically below and the “lower surface” is vertically located above. In addition, the “cross-sectional area” here means an area of a cross section perpendicular to a direction in which the first thick portion and the second thick portion are adjacent to each other.

  Further, that the first insulating sheet and the second insulating sheet are exposed on the surface of the sealing resin means that they are not completely sealed inside the sealing resin, and that the first insulating sheet and the second insulating sheet are not exposed. It is not intended that the sheet be necessarily exposed to the outside. For example, the first insulating sheet and the second insulating sheet may be covered with a conductive layer such as a metal layer, and the first insulating sheet and the second insulating sheet (that is, the insulating layer) are visually recognized from the outside. It may not be possible.

  In the above-described semiconductor device, a thin portion is formed in the lead frame. The thin portion has a smaller cross-sectional area than the first thick portion and the second thick portion, and reduces the rigidity of the lead frame. When the rigidity of the lead frame is reduced, the lead frame is also easily deformed in response to the heat-shrinkable sealing resin, and the difference in the amount of shrinkage between the sealing resin and the lead frame is reduced. Further, since the space between the first thick portion and the second thick portion is filled with the sealing resin, the difference in the amount of shrinkage between the sealing resin and the lead frame is also reduced. By reducing the difference in the amount of shrinkage between the two, deformation occurring in the semiconductor device is suppressed. Furthermore, since the insulating sheet bonded to the lead frame is divided into the first insulating sheet and the second insulating sheet, the stress generated on each of the insulating sheets is reduced. As described above, defects such as breakage and peeling of the insulating sheet are significantly suppressed.

FIG. 2 is a cross-sectional view illustrating the semiconductor device 10 according to the embodiment. Sectional drawing in the II-II line in FIG. FIG. 4 is a diagram illustrating a manufacturing process (particularly, molding) of the semiconductor device 10. FIG. 4 is a diagram illustrating deformation that occurs after the semiconductor device 10 is molded. FIG. 4 is a cross-sectional view of the same position as that of FIG. FIG. 2 is a cross-sectional view of the same position as in FIG. 1, showing a modification in which concave portions 18 c and 18 d are provided in a sealing resin 18.

  A semiconductor device 10 according to an embodiment will be described with reference to the drawings. The semiconductor device 10 is a so-called power semiconductor package, and can be employed in a power supply circuit that connects between a power supply and a running motor in an electric vehicle such as a hybrid vehicle, a fuel cell vehicle, or an electric vehicle. . However, the semiconductor device 10 is not limited to an electric vehicle, and can be employed in power supply circuits of various devices.

  As shown in FIGS. 1 and 2, the semiconductor device 10 includes a first semiconductor element 12, a second semiconductor element 14, and a third semiconductor element 16. Each of the first semiconductor element 12, the second semiconductor element 14, and the third semiconductor element 16 is a so-called power semiconductor element, such as a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) or an IGBT (Insulated Gate Bipolar Transistor). It may be a switching element or a diode. The semiconductor material forming the first semiconductor element 12, the second semiconductor element 14, and the third semiconductor element 16 is not particularly limited, and may be, for example, a group III-V semiconductor such as silicon, silicon carbide, or gallium nitride. Note that the number of semiconductor elements included in the semiconductor device 10 is not limited to three, and may be two or four or more.

  The first semiconductor element 12, the second semiconductor element 14, and the third semiconductor element 16 are arranged along the left-right direction in FIG. 1, and are arranged on the same plane. Here, for convenience of explanation, a direction in which the first semiconductor element 12, the second semiconductor element 14, and the third semiconductor element 16 are arranged (left-right direction in FIG. 1) is defined as an X-axis direction, and as shown in FIG. Is defined. The Y-axis direction is the depth direction in FIG. 1 and is parallel to the plane on which the three semiconductor elements 12, 14, 16 are arranged. The Z-axis direction is the vertical direction in FIG. 1 and is perpendicular to the plane on which the three semiconductor elements 12, 14, 16 are arranged.

  The semiconductor device 10 further includes a sealing resin 18. The sealing resin 18 seals the three semiconductor elements 12, 14, 16. As will be described later, the sealing resin 18 is molded using a mold 100 (see FIG. 3), and is also called a resin mold or the like. Although there is no particular limitation on the sealing resin 18, for example, a sealing material containing an epoxy resin as a main component can be employed. The sealing resin 18 has a generally plate-like shape, and has an upper surface 18a and a lower surface 18b. The upper surface 18a and the lower surface 18b are parallel to each other and perpendicular to the Z-axis direction. In other words, the upper surface 18a and the lower surface 18b are parallel to the X-axis direction and the Y-axis direction, and the normal of the upper surface 18a and the lower surface 18b is parallel to the Z-axis direction.

  The semiconductor device 10 further includes a lead frame 20. The lead frame 20 is made of a conductive material such as copper or another metal. The lead frame 20 has a generally plate-like shape, and has an upper surface 20a and a lower surface 20b. The upper surface 20a and the lower surface 20b are parallel to each other and perpendicular to the Z-axis direction, except for a range of concave portions 23c and 25c described later. In other words, the upper surface 20a and the lower surface 20b are parallel to the X-axis direction and the Y-axis direction, and the normal of the upper surface 20a and the lower surface 20b is parallel to the Z-axis direction.

  The upper surface 20a of the lead frame 20 is located inside the sealing resin 18, and the three semiconductor elements 12, 14, 16 are mounted on the upper surface 20a of the lead frame 20. Each of the three semiconductor elements 12, 14, 16 is soldered to the upper surface 20a of the lead frame 20, and is electrically and thermally connected to the lead frame 20. A part of the lead frame 20 extends outside the sealing resin 18 at a position (not shown), and forms a connection terminal for connecting to an external circuit. Note that the lead frame 20 may be composed of a single member, or may be composed of a combination of a plurality of members.

  The lead frame 20 has a first thick portion 22, a second thick portion 24, and a third thick portion 26. The first thick portion 22, the second thick portion 24, and the third thick portion 26 are arranged along the X-axis direction while being spaced from each other. The first semiconductor element 12 is mounted on the upper surface 20a of the first thick part 22, and the second semiconductor element 14 is mounted on the upper surface 20a of the second thick part 24. The third semiconductor element 12 is mounted on the upper surface 20a of the thick portion 26. In addition, in addition to the first semiconductor element 12, another semiconductor element may be further mounted on the first thick part 22. The same applies to the second thick portion 24 and the third thick portion 26.

  The lead frame 20 further has a first thin portion 23 and a second thin portion 25. The first thin portion 23 is located between the first thick portion 22 and the second thick portion 24, and connects the first thick portion 22 and the second thick portion 24 to each other. The thickness of the first thin portion 23 is smaller than the thickness of the first thick portion 22 and the thickness of the second thick portion 24. The thickness here is a dimension in the Z-axis direction, and is a distance between the upper surface 20a and the lower surface 20b. The space between the first thick portion 22 and the second thick portion 24 is filled with the sealing resin 18. Similarly, the second thin portion 25 is located between the second thick portion 24 and the third thick portion 26, and connects the second thick portion 24 and the third thick portion 26 to each other. ing. The thickness of the second thin portion 25 is smaller than the thickness of the second thick portion 24 and the thickness of the third thick portion 26. The space between the second thick portion 24 and the third thick portion 26 is also filled with the sealing resin 18.

  As an example, in the lead frame 20 of the present embodiment, the first thin portion 23 and the second thin portion 25 are respectively formed by providing two concave portions 23c and 25c on the lower surface 20b of the lead frame 20. Each of the two concave portions 23 c and 25 c is a groove-shaped concave portion extending along the Y-axis direction, and is filled with the sealing resin 18. An opening extending from the upper surface 20a to the lower surface 20b may be formed in one or both of the first thin portion 23 and the second thin portion 25. By forming such an opening, it is possible to promote the flow of the sealing resin 18 to the concave portions 23c and 25c in molding.

  With the above-described configuration, the cross-sectional area of the lead frame 20 is smaller in the first thin portion 23 and the second thin portion 25 than in the first thick portion 22, the second thick portion 24, and the third thick portion 26. ing. Here, the cross-sectional area means an area of a cross section perpendicular to the X-axis direction (that is, the direction in which the three thick portions 22, 24, and 26 are arranged). According to such a configuration, the rigidity of the lead frame 20 (particularly, rigidity against compression in the X-axis direction) can be reduced as compared with the case where the first thin portion 23 and the second thin portion 25 are not present. Thereby, although it will be described in detail later, it is possible to suppress deformation of the semiconductor device 10 due to a temperature change.

  The semiconductor device 10 further includes a first insulating sheet 32, a second insulating sheet 34, and a third insulating sheet 36. The three insulating sheets 32, 34, 36 are joined to the lower surface 20b of the lead frame 20, and are exposed on the lower surface 18b of the sealing resin 18. More specifically, the first insulating sheet 32 is joined to the lower surface 20b of the first thick portion 22, the second insulating sheet 34 is joined to the lower surface 20b of the second thick portion 24, and the third insulating sheet The sheet 36 is joined to the lower surface 20b of the third thick portion 26.

  The first insulating sheet 32 has a larger area than the lower surface 20b of the first thick portion 22 and completely covers the lower surface 20b of the first thick portion 22. It extends without interruption along the periphery of one insulating sheet 32. The same applies to the second insulating sheet 34 and the third insulating sheet 36. Each of the three insulating sheets 32, 34, 36 is made of an insulating material such as a resin material. The semiconductor device 10 is usually arranged adjacent to a cooler (not shown), and the lower surface 18b of the sealing resin 18 contacts the cooler. At this time, since the insulating sheets 32, 34, 36 are interposed between the lead frame 20 and the cooler, the semiconductor device 10 and the cooler are electrically insulated.

  The semiconductor device 10 further includes a first upper lead 42, a second upper lead 44, and a third upper lead 46. The first upper lead 42 is soldered to the first semiconductor element 12 and is electrically connected to the lead frame 20 via the first semiconductor element 12. The second upper lead 44 is soldered to the second semiconductor element 14 and is electrically connected to the lead frame 20 via the second semiconductor element 14. The third upper lead 46 is soldered to the third semiconductor element 16, and is electrically connected to the lead frame 20 via the third semiconductor element 16. Each of the three upper leads 42, 44, 46 is made of a conductive material such as copper or another metal material. Although not shown here, each of the three upper leads 42, 44, and 46 may be electrically connected to each other inside or outside the sealing resin 18, or may extend outside the sealing resin 18 and extend outside. May be electrically connected.

  As shown in FIG. 3, in the manufacturing process of the semiconductor device 10, sealing and molding of the sealing resin 18 are performed by performing so-called molding. In the molding, constituent members of the semiconductor device 10 such as the upper leads 42, 44, 46, the semiconductor elements 12, 14, 16, the lead frame 20, and the insulating sheets 32, 34, 36 are arranged in the mold 100. At this stage, the semiconductor elements 12, 14, 16 are already soldered to the lead frame 20. The same applies to other members to be soldered (for example, upper leads 42, 44, 46). Next, the sealing resin 18 heated to a softening temperature is injected into the mold 100. Thus, the semiconductor elements 12, 14, 16 are sealed by the sealing resin 18, and the lead frame 20 and the insulating sheets 32, 34, 36 are joined to each other.

  As shown in FIG. 4, after molding, the semiconductor device 10 is removed from the mold 100 and cooled to room temperature. In the process of lowering the temperature of the semiconductor device 10 to room temperature, each component of the semiconductor device 10 undergoes thermal contraction. Here, since the sealing resin 18 and the lead frame 20 are made of different materials, the amounts of shrinkage generated in the sealing resin 18 and the lead frame 20 are also different from each other. In the present embodiment, the amount of contraction generated in the sealing resin 18 is larger than the amount of contraction generated in the lead frame 20. In general, a resin material has a large linear expansion coefficient at a temperature equal to or higher than the glass transition point, and therefore, the amount of shrinkage when the temperature is lowered tends to be larger than that of a metal material. In particular, when a thermosetting resin such as an epoxy resin generally used in semiconductor devices is used, the amount of shrinkage during curing is large, and therefore these semiconductor devices (including the semiconductor device 10 of the present embodiment) are used. In (2), the amount of shrinkage of the sealing resin 18 can be larger than that of the lead frame 20. In this regard, the upper portion 10a of the semiconductor device 10 has a higher proportion of the sealing resin 18, and the lower portion 10b of the semiconductor device 10 has a higher proportion of the lead frame 20. As a result, the semiconductor device 10 may be warped such that the upper surface 18a is concavely curved, as schematically shown by a broken line D in FIG. Arrows S in FIG. 4 schematically show the direction and amount of contraction in each part of the semiconductor device 10. Note that, depending on the materials forming the sealing resin 18 and the lead frame 20, the magnitude relationship between the amounts of shrinkage generated therebetween may be reversed, and in this case, the direction of the warpage generated in the semiconductor device 10 is also reversed.

  The dashed line D in FIG. 4 exaggerates the deformation that occurs in the semiconductor device 10, and such a large deformation does not occur in the semiconductor device 10 of the present embodiment. However, if such a large deformation occurs in the semiconductor device 10, the insulating sheets 32, 34, and 36 may be stretched or bent to cause a problem such as breakage or peeling of the insulating sheets 32, 34, or 36. obtain. Failure of the insulating sheets 32, 34, 36 reduces the insulation between the lead frame 20 and an external device (for example, a cooler). Here, the semiconductor device 10 of the present embodiment has a plurality of semiconductor elements 12, 14, and 16, which are arranged linearly along the X-axis direction. With such a configuration, since the dimension of the semiconductor device 10 in the X-axis direction is relatively large, the deformation of the semiconductor device 10 can be large. If the semiconductor device 10 is deformed, a force is applied to the semiconductor device 10 when the semiconductor device 10 is disposed with respect to the cooler, and the semiconductor device 10 is corrected so as to be in close contact with the flat surface of the cooler. There is a need. At this time, for example, the larger the amount of warpage δ shown in FIG. 4 is, the larger the amount of deformation of the semiconductor device 10 due to the correction is, and therefore, a problem such as peeling or peeling of the insulating sheets 32, 34, and 36 is likely to occur.

  Regarding the above points, in the semiconductor device 10 of the present embodiment, the thin portions 23 and 25 are formed on the lead frame 20. As described above, the thin portions 23 and 25 have a smaller cross-sectional area than the thick portions 22, 24 and 26 and reduce the rigidity of the lead frame 20. Since the rigidity of the lead frame 20 is reduced, the lead frame 20 is also easily deformed in response to the heat-shrinkable sealing resin 18, and the difference in the amount of shrinkage between the sealing resin 18 and the lead frame 20 is reduced. . The space between the first thick portion 22 and the second thick portion 24 and the space between the second thick portion 24 and the third thick portion 26 are filled with the sealing resin 18. This also reduces the difference in the amount of contraction between the sealing resin 18 and the lead frame 20 (specifically, the difference in the amount of contraction between the upper portion 10a and the lower portion 10b of the semiconductor device 10). By reducing the difference in the amount of shrinkage between the two, deformation occurring in the semiconductor device 10 is suppressed.

  Furthermore, in the semiconductor device 10 of the present embodiment, the insulating sheets 32, 34, and 36 bonded to the lead frame 20 are not a single sheet material, but the first insulating sheet 32, the second insulating sheet 34, and the third insulating sheet. Since the sheet is divided into the sheets 36, the stress generated in each of the insulating sheets 32, 34, 36 is reduced. In addition to suppressing the deformation that occurs in the semiconductor device 10, the stress that occurs in each of the insulating sheets 32, 34, and 36 is reduced, so that problems such as breakage and peeling of the insulating sheets 32, 34, and 36 are effective. Is suppressed. Thereby, insulation between the cooler (not shown) and the lead frame 20 is ensured. Further, by using the plurality of insulating sheets 32, 34, 36, the size of each of the insulating sheets 32, 34, 36 becomes smaller than when a single insulating sheet is employed. Thereby, for example, in the manufacturing process of the semiconductor device 10, handling of the insulating sheets 32, 34, 36 becomes easy.

  In the semiconductor device 10 described above, various design changes can be made. For example, as shown in FIG. 4, the thin portions 23, 25 of the lead frame 20 may be portions having a smaller width dimension than the thick portions 22, 24, 26. Although such thin portions 23 and 25 are only an example, they can be provided by forming notches 23d and 25d in the lead frame 20 as viewed in plan. Here, the width dimension is a dimension of the lead frame 20 in the Y-axis direction. Also in such a form, the thin portions 23 and 25 have a smaller cross-sectional area than the thick portions 22, 24 and 26, so that the rigidity of the lead frame 20 can be reduced. The width dimension (dimension in the Y-axis direction) of the thin portions 23, 25 can be, for example, about the same as the upper leads 42, 44, 46. At this time, the thicknesses (dimensions in the Z-axis direction) of the thin portions 23, 25 may be smaller than or the same as the thicknesses of the thick portions 22, 24, 26.

  Specific modes of the first thin portion 23 and the second thin portion 25 are not limited to those disclosed in the present specification. The first thin portion 23 and the second thin portion 25 can be formed by providing the lead frame 20 with a concave portion, a notch, a through hole, and the like. The first thin portion 23 may be any portion that extends between the first thick portion 22 and the second thick portion 24 with a smaller cross-sectional area than the first thick portion 22 and the second thick portion 24. Similarly, the second thin portion 25 is a portion extending between the second thick portion 24 and the third thick portion 26 with a smaller cross-sectional area than the second thick portion 24 and the third thick portion 26. Just fine. According to such a configuration, by reducing the rigidity of the lead frame 20, deformation of the semiconductor device 10 due to a temperature change can be suppressed. Note that the semiconductor device 10 does not necessarily need to include the third semiconductor element 16. In this case, the lead frame 20 has at least the first thick portion 22, the second thick portion 24, and the first thin portion 23. Just fine.

  As another modified example, as shown in FIG. 5, one or a plurality of concave portions 18c and 18d may be provided on the upper surface 18a of the sealing resin 18. The concave portions 18c and 18d illustrated in FIG. 5 are provided along the thin portions 23 and 25, respectively, and have a groove shape extending in the Y-axis direction. The shape and number of the concave portions 18c and 18d are not particularly limited. By providing the recesses 18c and 18d on the upper surface 18a of the sealing resin 18, the amount of contraction of the upper portion 10a of the semiconductor device 10 can be reduced, and the deformation of the semiconductor device 10 can be further suppressed. Further, by providing the recesses 18c and 18d in the sealing resin 18, the required volume of the sealing resin 18 is reduced, so that the molding of the relatively large semiconductor device 10 becomes easy. In the molding, the softened sealing resin 18 may be injected into each of a plurality of portions separated by the concave portions 18c and 18d.

  As described above, the specific examples of the present technology have been described in detail. However, these are merely examples and do not limit the scope of the claims. The technical elements described in the present specification or the drawings exert technical utility singly or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology exemplified in the present specification or the drawings can simultaneously achieve a plurality of objects, and has technical utility by achieving one of the objects.

10: semiconductor device 12: first semiconductor element 14: second semiconductor element 16: third semiconductor element 18: sealing resin 20: lead frame 20a: upper surface 20b of lead frame 20: lower surface 22 of lead frame 20: lead frame 20 First thick portion 23: first thin portion 24 of lead frame 20: second thick portion 25 of lead frame 20: second thin portion 26 of lead frame 20: third thick portion 32 of lead frame 20: First insulating sheet 34: Second insulating sheet 36: Third insulating sheet 42: First upper lead 44: Second upper lead 46: Third upper lead 100: Mold

Claims (1)

A first semiconductor element and a second semiconductor element;
A sealing resin for sealing the first semiconductor element and the second semiconductor element;
A lead frame on which the first semiconductor element and the second semiconductor element are mounted on an upper surface located inside the sealing resin;
Together are joined to the lower surface of the front cut over lead frame, a first insulating sheet and the second insulation sheet which is exposed on the surface of the sealing resin,
With
The lead frame includes a first thick portion, a second thick portion adjacent to the first thick portion at an interval, and a space between the first thick portion and the second thick portion. A first thick portion and a thin portion extending with a smaller cross-sectional area than the second thick portion;
The first semiconductor element is mounted on the upper surface of the first thick portion, and the first insulating sheet is joined to the lower surface of the first thick portion,
The second semiconductor element is mounted on the upper surface of the second thick portion, and the second insulating sheet is joined to the lower surface of the second thick portion,
The space between the first thick portion and the second thick portion is filled with the sealing resin.
Semiconductor device.

Images