JP6583851B2 - DC-DC converter - Google Patents

Description

  The present invention relates to a DC-DC converter that suppresses the generation of noise and increases the conversion efficiency.

  With the widespread use of HEV (Hybrid Electric Vehicle) type electric vehicles and the practical application of EV (Electric Vehicle) type electric vehicles, research on in-vehicle DC-DC converters is actively conducted, and the present inventor also proposes various configurations. (For example, Patent Document 1 to Patent Document 7).

JP 2013-258789 A JP 2011-250598 A JP 2011-172423 A JP 2011-172422 A JP 2011-120389A JP 2011-120388 A JP 2011-030335 A

  However, reduction of high frequency noise superimposed on the power supply line and further improvement of conversion efficiency are desired. Here, in view of the placement space of the in-vehicle converter and the recent high integration and high performance of electronic elements, a slight increase in the number of components is not a problem.

  The present invention has been completed in view of the above circumstances, and an object of the present invention is to provide a DC-DC converter that realizes reduction of noise in a power supply line and further improvement of power supply efficiency.

  In order to achieve the above object, a DC-DC converter according to the present invention includes an upstream AC conversion circuit (1) that receives a DC voltage and converts it into an AC signal having a predetermined switching frequency, and the AC signal is converted into a DC voltage. And a synchronous rectifier circuit (2) on the downstream side that converts to a high frequency transformer (TR) provided with a center tap in the output winding, and the synchronous rectifier circuit (2) is configured to output the output winding of the high frequency transformer. A first and second pair of switching elements (Q5, Q6) connected to both ends of the wire and capable of ON / OFF control, and an output winding of the high-frequency transformer when one or both of the pair of switching elements are turned on A diode element connected in parallel to each of the power supply line (LN) configured by arranging the coil element (L2) through which the current flowing through the pair flows and the pair of switching elements (Q5, Q6). (D1 / D2) and a capacitor (C1 / C2) series circuit and a pair of output control elements (Q7, Q8) that are ON / OFF controlled in relation to the operation of each of the pair of switching elements (Q5, Q6). ), And in response to the ON operation of one of the output control elements (Q7, Q8), the regenerative power for supplying one charge of the capacitor (C1 / C2) to the power supply line (LN) And a control circuit (CTL).

  In the present invention, for the sake of clarity, the term “diode” is used for convenience. However, the term “unidirectional current element” is used as a general term, and does not mean a diode as a specific electronic element. The same applies to the capacitor, which merely means an electronic element having a power storage function. In addition, the quotation marks written in parentheses merely exemplify the circuit elements of the embodiments for clarification of the configuration, and do not limit the scope of rights at all.

  In the present invention, the first control signal (S1) for ON / OFF control of the first switching element (Q5) and the second control signal (S2) for ON / OFF control of the second switching element (Q6) are It is preferable that the OFF control periods are not overlapped while the ON control periods are overlapped with each other.

In addition, the charge charged in the first capacitor (C1) corresponding to the first switching element (Q5) during the OFF period from the OFF transition time to the ON transition time of the first switching element (Q5) is the first switching element. A first delay circuit (DY1) that controls not to discharge until the ON transition time of (Q5) is provided in the regeneration control circuit (CTL), and the first output control element (Q7) includes the first delay circuit (Q7). It is preferable that the DY1) output is received and the ON operation is performed.

On the other hand, the charge charged in the second capacitor (C2) corresponding to the second switching element (Q6) during the OFF period from the OFF transition time of the second switching element (Q6) to the ON transition time is the second switching element. A second delay circuit (DY2) that controls not to discharge until the ON transition time of (Q6) is provided in the regeneration control circuit (CTL), and the second output control element (Q8) It is also preferable to be configured to receive an output of DY2) and perform an ON operation .

  The first delay circuit preferably has a first comparator that compares the voltage across the first capacitor (C1) with a reference voltage (Vr), and the logical product of the output of the first comparator and the first control signal (S1). And a first gate circuit that outputs a logic. Similarly, the second delay circuit preferably includes a second comparator that compares the voltage across the second capacitor (C2) with the reference voltage (Vr), the output of the second comparator, and the second control signal (S2). And a second gate circuit that logically outputs a logical product.

  Preferably, the series circuit of the diode (D1 / D2) and the capacitor (C1 / C2) should be connected in parallel with a snubber circuit in which a resistor (R1 / R2) and a capacitor (C3 / C4) are connected in series. is there. The power supply line (LN) should be provided at the center tap of the high frequency transformer (TR) provided with the center tap (Tc).

  According to the above-described present invention, it is possible to realize a DC-DC converter that realizes reduction of noise in the power supply line and further improvement of power supply efficiency.

It is drawing explaining the DC-DC converter which concerns on an Example. It is drawing explaining the operation | movement content at the time of operation | movement phase PH1. It is drawing explaining the operation | movement content at the time of operation | movement phase PH3. It is drawing explaining the operation | movement content at the time of operation | movement phase PH2 and operation | movement phase PH4.

  Hereinafter, the present invention will be described in more detail based on examples. FIG. 1 is a diagram for explaining a DC-DC converter according to an embodiment. The whole circuit configuration (FIG. 1A), the circuit configuration of a delay circuit (FIG. 1B), and the circuit operation are explained. The time chart (FIG.1 (c)-FIG.1 (g)) is shown.

  As shown in FIG. 1A, the DC-DC converter of the embodiment receives a direct current voltage to generate an alternating current signal having a predetermined switching frequency, and an alternating current signal generated by the alternating current conversion circuit 1 is converted to direct current. The synchronous rectifier circuit 2 that converts the voltage is electromagnetically coupled by a high frequency transformer TR. As shown in the figure, the high-frequency transformer TR is configured by providing a center tap Tc in the output winding.

  The AC conversion circuit 1 is configured by connecting four switching elements Q1 to D4 each realized by an IGBT (Insulated Gate Bipolar Transistor) or the like in a full bridge type. Then, each switching element Q1 to D4 is ON / OFF controlled at a predetermined switching frequency to generate an AC signal, and the generated AC signal passes through the choke coil L1 and is the primary winding of the high-frequency transformer TR. Configured to be fed to the wire.

  Although not particularly limited, in the present embodiment, the first drive control signal OUT1 is supplied to the gate terminals of the first group of switching elements Q1 and Q4, and the second group of switching elements Q2 and Q3 are supplied. Is supplied with the second drive control signal OUT2.

  Therefore, in the following description, the AC conversion circuit 1 includes (1) the first operation phase PH1 in which the first group of switching elements Q1, Q4 are turned on in the OFF operation state of the second group of switching elements Q2, Q3. (2) the second group PH2 in which the switching elements Q1 and Q4 of the first group shift from the ON operation to the OFF operation; and (3) the second group in the OFF operation state of the switching elements Q1 and Q4 of the first group. The third operation phase PH3 in which the switching elements Q2 and Q3 of the second group are turned on and (4) the fourth operation phase PH4 in which the switching elements Q2 and Q3 of the second group shift from the ON operation to the OFF operation are repeated in this order. (See FIGS. 1C and 1D).

  Next, the synchronous rectification circuit 2 includes a first switching element Q5 connected to one terminal T1 of the secondary winding of the high-frequency transformer TR, and a second switching element Q6 connected to the other terminal T2 of the secondary winding. The power line LN includes a choke coil L2 connected to the center tap Tc of the high-frequency transformer TR, and the regeneration control circuit CTL supplies a regenerative current to the power line LN.

  As shown in the drawing, one terminal of the choke coil L2 is connected to the center tap Tc of the secondary winding, while a smoothing capacitor C5 is connected between the other terminal of the choke coil L2 and the ground, so that a DC-DC converter is obtained. Power supply line LN is formed.

  In the present embodiment, the first and second switching elements Q5 and Q6 are composed of, for example, an N-channel MOS, and a resistor R1 / R2 and a capacitor are provided between the source terminal and the drain terminal of each switching element Q5 and Q6. The first and second RC snubber circuits in which C3 / C4 are connected in series, and the first and second charging circuits in which diodes D1 / D2 and capacitors C1 / C2 are connected in series are connected.

  Although not particularly limited, in the case of the embodiment, not only the first and second switching elements Q5 and Q6 but also the first and second snubber circuits and the charging circuit are configured by circuit elements having the same characteristics. Has been.

  As shown in FIG. 1A, two operation control signals S1 and S2 having different phases are supplied to the gate terminals of the switching elements Q5 and Q6 via the driver circuit Dr. Here, as the driver circuit Dr, a high breakdown voltage driver IC (for example, AUIRS21271S) having an overcurrent limiting function is preferably used. This also applies to the other driver circuits Dr.

  The two operation control signals S1 and S2 having different phases are appropriately selected. Here, the first operation control signal S1 obtained by logically inverting the first drive control signal OUT1 and the second drive control signal OUT2 are used. Is used as a second operation control signal S2 (see FIGS. 1E and 1F).

  The regeneration control circuit CTL includes a first delay circuit DY1 that receives the output Vin of the capacitor C1 of the first charging circuit, a second delay circuit DY2 that receives the output Vin of the capacitor C2 of the second charging circuit, and an N-channel MOS. The first and second output control elements Q7 and Q8, the drivers Dr and Dr that drive the output control elements Q7 and Q8, a diode D3 that is a unidirectional current element, and a choke coil L3. Has been.

  The diode D3 is connected in a direction that blocks current from the source terminals of the output control elements Q7 and Q8 to the ground. The source terminals of the two output control elements Q7 and Q8 are connected to the power supply line LN via the choke coil L3.

  The first and second delay circuits DY1 and DY2 have the same configuration. As shown in FIG. 1B, the voltage dividing resistors R3 and R4 that divide the input voltage Vin received from the capacitor C1 / C2 and the voltage dividing resistor R3. , R4, a comparator CM that compares the divided voltage Vs (= Vin * R4 / (R3 + R4)) with the reference voltage Vr, a gate circuit GT that receives the output Vm of the comparator CM and performs a logical AND operation; It is comprised.

  As illustrated, the reference voltage Vr is supplied to the inverting input terminal (−) of the comparator CM, while the divided voltage Vs is supplied to the non-inverting input terminal (+) of the comparator CM. Therefore, the comparator output Vm becomes H level only when the divided voltage Vs exceeds the reference voltage Vr.

  Further, the gate circuit GT of the delay circuit is supplied with the operation control signal S1 / S2 together with the comparator output Vm, and is configured to output a logical product of the two signals. Therefore, the H-level comparator output Vm is supplied to the driver Dr as the H-level output Vo only when the operation control signal S1 / S2 is at the H level.

  Here, since the driver Dr is configured to output a signal in phase with the input signal to the gate terminal of the output control element Q7 / Q8, the output control element Q7 / Q8 eventually has the comparator output Vm at the H level. In addition, the ON operation is performed only when the operation control signals S1 / S2 are at the H level.

  As shown in FIG. 1A, since the voltage Vin across the capacitor C1 / C2 is supplied to the drain terminal of the output control element Q7 / Q8, the capacitor C1 / C8 is turned on when the output control element Q7 / Q8 is turned on. The charge of C2 is discharged via the output control elements Q7 / Q8 and supplied to the choke coil L3. In the operating state, the choke coil L3 forms an LC series resonance circuit via the output control element Q7 / Q8, and the output control element Q7 / Q8 transitions OFF when the capacitors C1 / C2 are discharged. It will be.

  Subsequently, the circuit operation of the DC-DC converter of the embodiment having the above circuit configuration will be described in a confirming manner. As described above, the AC conversion circuit 1 shifts the internal operation in the order of the first operation phase PH1, the second operation phase PH2, the third operation phase PH3, and the fourth operation phase PH4 (FIG. 1 (c ), See FIG. 1 (d)).

<First operation phase PH1>
First, the operation during the first operation phase PH1 will be described. In the first operation phase PH1, the first group of switching elements Q1 and Q4 are in the ON state, and as shown in FIG. Current flows.

  As shown in FIG. 1 (f), in the first operation phase PH1, since the second switching element Q6 is in the ON state, the secondary side of the high-frequency transformer TR is connected to the secondary from the output terminal T2 toward the center tap Tc. A current Io flows, and this flows to the power supply line LN as the charging current Io of the choke coil L2 (see FIGS. 2 and 1G).

  By the way, at the initial timing of the first operation phase PH1, the first switching element Q5 that has been in the ON state until then transitions OFF (FIG. 1 (e)), and in response to this sudden change, the first switching element Q5 At the drain terminal (point A), a surge voltage that oscillates not a little occurs (see FIG. 2B).

  However, in the configuration of this embodiment, the surge voltage charges the capacitor C1 via the diode D1, and is appropriately absorbed by the first snubber circuit including the resistor R1 and the capacitor C3. Corresponding to the charging of the capacitor C1 (see FIG. 4D), the output Vm of the comparator CM of the delay circuit DY1 becomes the H level (see FIG. 4E).

  However, during the first operation phase PH1, since the operation control signal S1 is at the L level (FIG. 4C), the output Vo of the gate circuit GT of the delay circuit DY1 maintains the L level (FIG. 4F). Correspondingly, the output control element Q7 maintains the OFF state correspondingly. Therefore, the charge of the capacitor C1 is not discharged, and the voltage Vin across the capacitor C1 is almost maintained at the highest level of the surge voltage.

<Third operation phase PH3>
Next, the operation during the third operation phase PH3 will be described with reference to FIG. In the third operation phase PH3 of the AC conversion circuit 1, the second group of switching elements Q2 and Q3 are in the ON state, and as shown in FIG. 3, an upward primary current flows through the primary side of the high-frequency transformer TR.

  On the other hand, in the synchronous rectification circuit 2, since the first switching element Q5 is in the ON state during the third operation phase PH3 (see FIG. 1 (e)), the output terminal T1 is connected to the secondary side of the high-frequency transformer TR. To the center tap Tc flows, and this flows to the power supply line LN as the charging current Io of the choke coil L2 (see FIG. 3 and FIG. 1G).

  At the initial timing of the third operation phase PH3, the second switching element Q6 that has been in the ON state until then transitions OFF (see FIG. 1 (f)), so that the drain terminal (point B) of the second switching element Q6 is connected. Will generate a surge voltage that oscillates (see FIG. 3B).

  However, in the configuration of this embodiment, the surge voltage charges the capacitor C2 via the diode D2, and is appropriately absorbed by the second snubber circuit including the resistor R2 and the capacitor C4. Corresponding to the charging of the capacitor C2, the output Vm of the comparator CM of the delay circuit DY2 becomes H level.

  However, since the operation control signal S2 is at the L level at the timing of the third operation phase PH3 (see FIG. 1 (f)), the output Vo of the gate circuit GT of the delay circuit DY2 is maintained at the L level. Correspondingly, the output control element Q8 maintains the OFF state. Therefore, the charge of the capacitor C2 is not discharged, and the voltage Vin across the capacitor C2 is almost maintained at the highest level of the surge voltage (FIG. 3B).

  Although the comparator CM output of the delay circuit DY2 and the output Vo of the AND gate are not shown in FIG. 4, the positional relationship between the operation control signal S2 and the voltage of each part is the operation control signal S1 (FIG. 4 (c)). )) With respect to the charging voltage Vin of the capacitor C1 (FIG. 4D), the output Vm of the comparator CM (FIG. 4E), and the output Vo of the gate circuit GT (FIG. 4F). .

<Second Operation Phase PH2, Fourth Operation Phase PH4>
Subsequently, the operation of the synchronous rectifier circuit 2 in the second operation phase PH2 and the fourth operation phase PH4 will be described. As shown in FIG. 4A, at these operation timings, the switching elements Q1 to Q4 of the AC conversion circuit 1 are all in the OFF state.

  On the other hand, since both the first and second switching elements Q5 and Q6 in the synchronous rectifier circuit 2 are in the ON state, a current path from the ground to the center tap Tc of the high-frequency transformer TR is formed, and the discharge current of the choke coil L2 Will flow in the direction shown in the figure (see FIG. 4 and FIG. 1G).

  Then, as shown in FIG. 4C, the second operation phase PH2 is started when the operation control signal S1 rises to the H level. Therefore, in synchronization with the rising timing of the operation control signal S1, the output Vo of the gate circuit GT of the first delay circuit DY1 becomes H level, and the first output control element Q7 is turned on in response to this, so that the capacitor The discharge of the charge of C1 is started.

  The discharging path of the charging charge is capacitor C1 → first output control element Q7 → choke coil L3 → power supply line LN, and this discharging operation is continued until the voltage Vin across the capacitor C1 falls below the reference voltage Vr. Then, after the voltage Vin across the capacitor C1 falls below the reference voltage Vr, the first output control element Q7 is turned off, and thereafter, the delay circuit DY1 has no possibility of affecting other circuits.

  The above relationship is basically the same in the case of the fourth operation phase PH4 started when the operation control signal S2 rises to the H level. That is, in the fourth operation phase PH4, the charge of the capacitor C2 is discharged through the path of the capacitor C2, the second output control element Q8, the choke coil L3, and the power supply line LN, and this discharge operation is performed by the voltage Vin across the capacitor C2. Until the voltage falls below the reference voltage Vr.

  Thus, in this embodiment, the electrostatic energy charged in the capacitor C1 in the first operation phase PH1 is regenerated in the power supply line LN in the second operation phase PH2, and charged in the capacitor C2 in the third operation phase PH3. Since the electrostatic energy is regenerated to the power supply line LN in the fourth operation phase PH4, the conversion efficiency can be effectively improved by recovering excess energy.

  Moreover, by deliberately delaying the energy recovery timing by one operation phase, the noise component (ringing component) superimposed on the surge voltage can be absorbed by the capacitor C1 / C2, and the noise component is also reliably superimposed on the power supply line. It will be resolved.

  In addition, by deliberately delaying the energy recovery timing by one operation phase, the regenerative current is not added to the increasing coil charging current Io (see FIG. 1G), but the decreasing coil discharge current capacitor Io (see FIG. 1). 1 (g)), the regenerative current is added to the output current Io, and the fluctuation of the output current Io can be suppressed.

  As mentioned above, although the Example of this invention was described concretely, the concrete description content does not specifically limit this invention. That is, in the embodiments, for the sake of convenience of explanation, the full-bridge type AC conversion circuit 1 has been described as performing a basic operation, but it is needless to say that a phase shift control operation may be employed instead of the basic operation. . Further, the upstream AC conversion circuit 1 may have any circuit configuration as long as it receives a DC voltage and converts it into a high-frequency signal.

DESCRIPTION OF SYMBOLS 1 AC converter circuit 2 Synchronous rectifier circuit TR High frequency transformer Q5 1st switching element Q6 2nd switching element L2 Coil element LN Power supply line Q7 Output control element Q8 Output control element CTL Regeneration control circuit

Claims (8)

An upstream AC converter circuit (1) that receives a DC voltage and converts it into an AC signal having a predetermined switching frequency, and a downstream synchronous rectifier circuit (2) that converts the AC signal into a DC voltage are output windings. Are combined with a high frequency transformer (TR) provided with a center tap.
The synchronous rectifier circuit (2)
A first and second pair of switching elements (Q5, Q6) capable of ON / OFF control connected to both ends of the output winding of the high-frequency transformer;
A power line (LN) configured by arranging a coil element (L2) through which a current flowing through the output winding of the high-frequency transformer flows when one or both of the pair of switching elements is turned on;
A series circuit of a diode (D1 / D2) and a capacitor (C1 / C2) connected in parallel to each of the pair of switching elements (Q5, Q6);
The output control elements (Q7, Q8) are configured to have a pair of output control elements (Q7, Q8) that are ON / OFF controlled in relation to the operations of the pair of switching elements (Q5, Q6). A regenerative control circuit (CTL) for supplying one charge of the capacitor (C1 / C2) to the power supply line (LN)
The DC-DC converter characterized by providing. A first control signal (S1) for ON / OFF control of the first switching element (Q5) and a second control signal (S2) for ON / OFF control of the second switching element (Q6) are:
2. The DC-DC converter according to claim 1, wherein the ON control periods are not overlapped with each other, while the ON control periods are overlapped with each other. During the OFF period from the OFF transition time to the ON transition time of the first switching element (Q5), the charge charged in the first capacitor (C1) corresponding to the first switching element (Q5) becomes the first switching element (Q5). ) Is provided in the regeneration control circuit (CTL), the first delay circuit (DY1) for controlling not to discharge until the ON transition time of
The DC-DC converter according to claim 1 or 2, wherein the first output control element (Q7) is configured to receive an output of the first delay circuit (DY1) and perform an ON operation . During the OFF period from the OFF transition time to the ON transition time of the second switching element (Q6), the charge charged in the second capacitor (C2) corresponding to the second switching element (Q6) becomes the second switching element (Q6). ) Is provided in the regeneration control circuit (CTL), the second delay circuit (DY2) for controlling not to discharge until the ON transition time of
The DC-DC converter according to any one of claims 1 to 3, wherein the second output control element (Q8) is configured to receive an output from the second delay circuit (DY2) and perform an ON operation .   The first delay circuit compares the voltage across the first capacitor (C1) with a reference voltage (Vr), and outputs a logical product of the logical product of the output of the first comparator and the first control signal (S1). The DC-DC converter according to claim 3, comprising one gate circuit.   The second delay circuit compares the voltage across the second capacitor (C2) with the reference voltage (Vr), and outputs a logical product of the logical product of the output of the second comparator and the second control signal (S2). The DC-DC converter according to claim 4, comprising a two-gate circuit.   A snubber circuit in which a resistor (R1 / R2) and a capacitor (C3 / C4) are connected in series is connected in parallel to the series circuit of the diode (D1 / D2) and the capacitor (C1 / C2). The DC-DC converter in any one of.   The DC-DC converter according to any one of claims 1 to 7, wherein the power supply line (LN) is provided at a center tap of a high-frequency transformer (TR) provided with a center tap (Tc).

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