JP6537901B2 - Measuring device and interpolation processing program - Google Patents

Description

  The present invention relates to a measuring apparatus provided with a processing unit capable of executing processing for deriving necessary values by linear interpolation, and an interpolation processing program in which a procedure for causing the processing unit of the measuring apparatus to execute such processing is recorded. It is.

  In a measuring device that measures various electrical parameters, it is widely used to derive various values regarding measurement conditions and measurement results by interpolation processing. For example, the invention of a resistance value measuring device (hereinafter, also referred to as "measuring device") disclosed in the following patent documents is configured to be able to derive a measured value by interpolation processing. In this measuring device, the time required for discharging (or charging) a fixed amount of charge stored in a capacitor with a constant current that is inversely proportional to the resistance value via the measured resistance or reference resistance, or at the time of discharging The resistance of the resistance to be measured is measured by interpolation processing using the parameters for frequency (values in linear relationship to the resistance value), the parameters calculated for the two reference resistances, and the parameters for the resistance to be measured. A configuration for obtaining a value is adopted.

In this case, in this measurement apparatus, as one example, the resistance value of one of the three reference resistances is R1, and the above-described parameter (period: charge time + discharge time) of the reference resistance is T1. Let R2 be the other one of the three reference resistors, T2 be the above parameter for that reference resistor, and Rs be the resistance of the measured resistor, and its measured resistor The resistance value R s is derived by linear interpolation using the equation “Rs = (R2−R1) × (Ts−T1) / (T2−T1) + R1)”, where Ts is the above parameter for Configuration is adopted. Thus, with this measuring device, it is possible to measure the resistance value of the resistance to be measured more accurately than the measuring device (measuring method) disclosed as the prior art in the following patent documents.

JP-A-2000-55954 (page 5-8, FIG. 1-11)

  However, the following problems exist in the conventional measuring apparatus. That is, in the conventional measuring apparatus, parameters measured for two reference resistors whose resistance values are known (values having a linear relationship to the resistance values) and similar parameters measured for the measured resistance are used. A configuration is adopted in which the resistance value of the measured resistance is derived by linear interpolation. Specifically, as an example, the conventional measuring device performs a first subtraction process of subtracting the resistance value R1 from the resistance value R2, a second subtraction process of subtracting the cycle T1 from the cycle Ts, and a cycle T1 from the cycle T2. Third subtraction processing to be subtracted, multiplication processing to multiply the calculation value of the first subtraction processing by the calculation value of the first subtraction processing, division processing to divide the calculation value of the multiplication processing by the calculation value of the third subtraction processing A configuration is adopted in which the resistance value Rs is calculated by executing six arithmetic processings of addition processing of adding the resistance value R1 to the calculated value of the division processing and the division processing.

  In this case, it is known that when deriving the resistance value Rs by interpolation processing as described above in this type of apparatus, the load on the arithmetic processing unit at the time of division processing is very large. For this reason, when deriving the resistance value by the method of calculating the resistance value employed in the conventional measuring device, a high-performance arithmetic processing unit is required, and due to this, the manufacturing of the measuring device There is a problem that the cost is rising. In addition, in order to adopt a configuration in which each of the above-described arithmetic processing is performed by PLD (programmable logic device), four types of a subtraction processing unit, an addition processing unit, a multiplication processing unit, and a division processing unit are programmed to perform each operation. Since it is necessary to construct a processing unit, the circuit configuration for interpolation processing becomes large. This not only complicates programming at the time of manufacture but also consumes valuable resources of the PLD and may run out of resources for executing other processes.

  The present invention has been made in view of such problems, and has as its main object to provide a measuring device and an interpolation processing program capable of deriving a necessary value by linear interpolation without performing division processing.

In order to achieve the above object, the measuring device according to claim 1 is characterized in that, among the N reference points (N is a natural number of 3 or more) specified by the first value and the second value in linear relationship, respectively. Linear interpolation of the second value at the processing target point based on the first value and the second value at two points and the first value at the processing target point different from the reference points A measuring unit having a processing unit capable of executing interpolation processing derived by the step, the M-th (M being each natural number less than or equal to (N-1)) in the reference point in ascending order of the first value Assuming that the difference between the first value and the first value at the (M + 1) -th reference point in ascending order of the first value is a third value, 2 ⁿ / m (n Is a natural number of 2 or more, and m is a natural number) of multiple types of fourth values A storage unit storing interpolation processing data capable of specifying the n value and the m value of the fourth value closest to the third value and the m value of each of the processing target points; Is between the L-th (L is a natural number less than or equal to M) reference point in ascending order of the first value and the (L + 1) -th reference point in ascending order of the first value In the interpolation processing for deriving the second value at a processing target point, a first processing for specifying the value of n and the value of m corresponding to the processing target point on the basis of the data for interpolation processing, A second process of calculating a fifth value which is a difference between the first value at the L-th reference point and the first value at the processing target point, the second process at the L-th reference point And the second at the (L + 1) th reference point A third process of calculating a sixth value which is a difference from the value of d, a fourth process of calculating a seventh value by multiplying the fifth value, the sixth value, and the value of m; And executing a fifth process of converting the seventh value to the eighth value by shifting the value to the right by n bits according to the value of the n, and performing a fifth process than the second value at the L-th reference point The eighth value is added to the second value at the Lth reference point when the second value at the (L + 1) th reference point is large, and the second value at the processing target point From the second value at the Lth reference point when the second value at the Lth reference point is larger than the second value at the (L + 1) th reference point. The eighth value is subtracted to derive the second value at the processing target point.

The measuring device according to claim 2 is the measuring device according to claim 1, wherein the storage unit is in the range of the first value from the Mth reference point to the (M + 1) th reference point. The interpolation processing in which information in which certain (N-1) respective ranges and the n value and the m value corresponding to the processing target point included in the respective range are associated with each other is recorded Data is stored.

The interpolation processing program according to claim 3 is characterized in that at two points among the reference points of N points (N is a natural number of 3 or more) specified by the first value and the second value in a linear relationship, respectively. The second value at the processing target point is derived by linear interpolation based on the first value and the second value, and the first value at the processing target point different from the reference points. An interpolation processing program in which a procedure for causing a processing unit of a measurement apparatus to execute interpolation processing is recorded, the Mth (M being each natural number of (N-1) or less) in ascending order of the first value. Assuming that the difference between the first value at the reference point and the first value at the (M + 1) th reference point in ascending order of the first value is a third value, 2 ⁿ / m (n is a natural number of 2 or more and m is a natural number) Interpolation processing data capable of specifying the value of n and the value of m at the fourth value closest to the third value among the plural types of fourth values that can be specified for each of the processing target points Between the L-th (L is a natural number less than M) reference point and the (L + 1) -th reference point in ascending order of the first value. As the interpolation processing for deriving the second value at the processing target point, the first value specifying the value of n and the value of m corresponding to the processing target point on the basis of the data for interpolation processing A second process of calculating a fifth value which is a difference between the first value at the Lth reference point and the first value at the processing target point, the second process at the Lth reference point A second value and the second at the (L + 1) th reference point; A third process of calculating a sixth value which is a difference from the value, a fourth process of calculating a seventh value by multiplying the fifth value, the sixth value, and the value of m; A fifth process of shifting the seventh value to the right by n bits according to the value of n and converting it to an eighth value is executed, and the second value at the Lth reference point is greater than the second value When the second value at the (L + 1) th reference point is large, the eighth value is added to the second value at the Lth reference point to obtain the second value at the processing target point. And deriving the second value at the Lth reference point when the second value at the Lth reference point is larger than the second value at the (L + 1) th reference point. A procedure for subtracting the eighth value to derive the second value at the processing target point is recorded. To have.

  The measurement apparatus according to claim 1, wherein the second target point between the L-th reference point in the ascending order of the first value and the (L + 1) -th reference point in the ascending order of the first value In the interpolation processing for deriving a value, a first processing for specifying the values of n and m corresponding to the processing target point based on interpolation processing data, the first value at the Lth reference point and the processing target A second process of computing a fifth value which is the difference from the first value at the point, the difference between the second value at the Lth reference point and the second value at the (L + 1) th reference point A third process of computing a sixth value, a fourth process of computing a seventh value by multiplying the fifth value, the sixth value and the value of m, and an n-bit right of the seventh value Execute the fifth process of shifting and converting to the eighth value, and (L + 1) than the second value at the Lth reference point The eighth value is added to the second value at the Lth reference point when the second value at the th reference point is large to derive the second value at the processing target point, and the Lth reference point The eighth value is subtracted from the second value at the Lth reference point when the second value at the point is larger than the second value at the (L + 1) th reference point, and the second value at the processing target point Derive Further, in the interpolation processing program according to claim 3, a procedure for causing the processing unit of the measuring apparatus to execute the above processing is recorded.

  Therefore, according to the measuring apparatus of the first aspect and the interpolation processing program of the third aspect, the second value can be derived by linear interpolation without performing division processing which is heavily burdened. As a result, for example, when the arithmetic processing circuit for interpolation processing is configured on PLD, the division processing unit becomes unnecessary, and the situation where valuable resources of PLD are consumed can be suitably avoided. When adopting a configuration in which each arithmetic processing is performed by the arithmetic processing circuit, the load on the arithmetic processing circuit at the time of interpolation processing is sufficiently reduced, so even if the processing unit is configured with a low-spec arithmetic processing circuit, The required second value can be derived reliably. Therefore, not only the manufacturing cost of the measuring apparatus can be sufficiently reduced, but also the time required for the interpolation process can be shortened by the amount of not performing the division process which is heavily burdened.

Measurement device according to claim 2, and according to the interpolation processing program procedure is recorded to execute various processes in the processing unit of the measuring device, the from M-th reference point to (M + 1) th reference point Interpolation processing in which information in which (N-1) each range which is a range of 1 values and n and m values corresponding to processing target points included in each range are associated with each other is recorded For example, the type of difference between the first value of the Mth reference point and the first value of the (M + 1) th reference point, ie, (N-1) ranges of When using interpolation processing data configured to be able to specify the corresponding n value and m value for each type of area, how wide is the range including the processing target point? To determine the value of n, and after that, the value of n corresponding to the specified width While it is necessary to specify the values of m and m, it is only necessary to specify which of the (N-1) ranges the processing target point for which the second value is to be derived is to be derived by interpolation processing. The value of n or the value of m corresponding to the specified range can be easily specified. As a result, the number of arithmetic processing (the number of arithmetic circuits for executing the arithmetic processing) can be reduced, so that the manufacturing cost of the measuring apparatus can be further reduced, and the time required for the interpolation processing can be further shortened. can do.

FIG. 2 is a block diagram showing the configuration of a measuring apparatus 1; FIG. 3 is an explanatory diagram for describing an example of a configuration of an interpolation processing circuit 10 that constitutes a part of the processing unit 5 in the measuring device 1. It is explanatory drawing for demonstrating the linear relationship of the frequency of the alternating current signal supplied to a measuring object, and a power correction coefficient. It is an explanatory view for explaining an example of table Dt for interpolation processing.

  Hereinafter, an embodiment of a measuring device and an interpolation processing program will be described with reference to the attached drawings.

  The measuring device 1 shown in FIG. 1 is an “impedance measuring device” which is an example of a “measuring device”, and includes a measuring unit 2, an operation unit 3, a display unit 4, a processing unit 5 and a storage unit 6. It is configured to be able to measure the impedance of

  The measurement unit 2 measures the impedance while supplying an AC signal of an arbitrary frequency to the measurement object according to the control of the processing unit 5. The operation unit 3 includes various operation switches for instructing measurement condition setting operation and measurement start / stop, and outputs an operation signal corresponding to the switch operation to the processing unit 5. The display unit 4 displays various display screens (all not shown) such as a measurement condition setting screen and a measurement result display screen. The processing unit 5 controls the measuring device 1 generally. Specifically, the processing unit 5 controls the measuring unit 2 to execute measurement processing of measuring impedance while supplying an AC signal to the measurement target. Further, the processing unit 5 stores the measurement result of the measurement unit 2 in the storage unit 6 and causes the display unit 4 to display the measurement result.

  In this case, the processing unit 5 controls the measuring unit 2 in measurement processing to correct the power so as to be constant without variation for each frequency when supplying AC signals of various frequencies to the object to be measured. Further, in the measuring apparatus 1 of this example, as described later, a power correction coefficient (hereinafter, also simply referred to as a “correction coefficient”) for an AC signal of a reference frequency is defined in advance. When the signal is supplied, a configuration is adopted in which a correction coefficient corresponding to the frequency of the AC signal to be supplied is derived by linear interpolation based on the correction coefficient of the AC signal of the reference frequency. Furthermore, in the measurement apparatus 1 of this example, as an example, a part of the processing unit 5 (an element that performs processing for deriving a correction coefficient by linear interpolation, etc.) is configured by PLD (programmable logic device).

  Specifically, in the measuring apparatus 1 of this embodiment, as shown in FIG. 2, the subtraction processing units 11 and 12, the absolute value acquisition unit 13, the multiplication processing units 14 and 15, the bit shift processing unit 16, and the addition processing unit 17 The interpolation processing circuit 10 configured by the subtraction processing unit 18 is constructed in the PLD by programming, and this interpolation processing circuit 10 functions as a "processing unit" to adopt a configuration for deriving a desired correction coefficient. There is. The procedure for deriving the correction coefficient by the interpolation processing circuit 10 (each component 11 to 18) in the processing unit 5 will be described in detail later. Further, in the processing unit 5 of this example, not only the interpolation processing circuit 10 but also other various operation units are constructed in the PLD, but in order to facilitate understanding of the configuration of the “measuring device”, interpolation is performed. The illustration and description of the arithmetic units other than the processing circuit 10 will be omitted.

  The storage unit 6 stores the correction coefficient data Dk, the interpolation processing table Dt, the measurement result of the measurement unit 2, and the like. The correction coefficient data Dk is composed of information that can specify the relationship between the frequency of the AC signal supplied to the measurement target and the power correction coefficient for correcting the power (power) of the AC signal at that frequency. Specifically, in this example, as shown in FIG. 3, as an example, frequencies (an example of “first value”) and powers at five points (examples of N = 5 points) of reference points P1 to P5 The correction coefficient (an example of the “second value”) is recorded.

  In this case, in the measurement apparatus 1 of this example, as shown in the figure, the frequency of the AC signal and the correction coefficient have a linear relationship in a frequency range H1 of more than 0 Hz to 1000 Hz, and more than 1000 Hz to 1400 Hz The frequency of the AC signal and the correction factor have another linear relationship in the frequency range H2, and the frequency and the correction coefficient of the AC signal have another linear relationship in the frequency range H3 over 1400 Hz to 2000 Hz, and 2000 Hz The frequency of the alternating current signal and the correction factor have yet another linear relationship in the frequency range H4 of up to 3000 Hz.

On the other hand, the interpolation processing table Dt is an example of the “interpolation data”, and the “m value” (hereinafter referred to as “value Vm”) used by the multiplication processing unit 14 when the interpolation processing circuit 10 interpolates the correction coefficient. And “the value of n” (hereinafter, also referred to as “value Vn”) used by the bit shift processing unit 16 is configured by information that can be specified. Specifically, in this example, the frequency values at the Mth (N = 1 to 5th in the present example, M = 1 to 4) reference points in the order of small frequency values (low frequency order), and the frequency When the difference between the (M + 1) th (the second to fifth in this example) reference point and the frequency value at the reference point in ascending order of the value of The value Vn in the “fourth value” closest to the “third value” of the plurality of (four, as an example) predefined “preceding types” (for example, three types) that can be represented by ⁿ / m The value Vm is configured of information that can be specified for each of interpolation points (interpolation points Pa, Pb, etc. in FIG. 3: an example of “processing target point”) which are determined within each frequency range H1 to H4.

  More specifically, in this example in which reference points P1 to P5 as shown in FIG. 3 are defined, the value of the frequency of M = 1st reference point P1: 0 and (M + 1) = 2th reference point The value of the frequency of P2: the value of “1000” which is the difference from 1000, the value of the frequency of M = 2nd reference point P2: 1000 and the value of the frequency of (M + 1) = 3 th reference point P3: 1400 And the value of the frequency of the M = 3th reference point P3: 1400 and the value of the frequency of the (M + 1) = 4th reference point P4: 2000, “600” And the value of the frequency of the M = 4th reference point P4: 2000 and the value of the difference between the value of the frequency of the (M + 1) = 5th reference point P5: 3000 and the value of “1000” are respectively It corresponds to the "third value".

The value of "1000", in the present example to a value of "400", and each "third value" a value of "600", the value of ^"2 10/1 = 1024" (n = 10, m = 1 in the example), and examples of the values of ^"2 11 /5=409.6" (n = 11, m = 5 ), and ^"2 12 /7=585.142 ..." The three types of values (example of n = 12, m = 7) correspond to “the fourth value that can be represented by 2 ⁿ / m”. Furthermore, the interpolation processing table Dt of this example includes four frequency ranges H1 to H4 (an example of “ (N−1) ranges”) and interpolation points (frequency ranges included in each of the frequency ranges H1 to H4). It is composed of information in which a value Vn and a value Vm corresponding to the interpolation point Pa included in H1 and the interpolation point Pb included in the frequency range H3 are mutually associated.

  Specifically, as shown in FIG. 4, in the interpolation processing table Dt, when the code of "0x00" indicating the frequency range H1 and the correction coefficient of the interpolation point included in the frequency range H1 are derived. The code of “0x1A” in which the lower bits are configured by “1” indicating “m = 1” and “A” indicating “n = 10” to be used is mutually correlated and recorded. Further, in the interpolation processing table Dt, the sign “0x01” indicating the frequency range H2 and “m = 5” indicating the correction coefficient of the interpolation point included in the frequency range H2 are used. A code of “0x5B”, in which lower bits are configured by “B” indicating “5” and “n = 11,” is recorded in association with each other.

  Furthermore, in the interpolation processing table Dt, a sign of “0x02” indicating the frequency range H3 and “m = 7” indicating the correction coefficient of the interpolation point included in the frequency range H3 are shown. A code of “0x7C”, in which lower bits are configured by “C” indicating 7 ”and“ n = 12 ”, is recorded in association with each other. Further, in the interpolation processing table Dt, a sign “0x03” indicating the frequency range H4 and “m = 1” indicating the correction coefficient of the interpolation point included in the frequency range H4 are shown. A code of “0x1A”, in which lower bits are configured by “A” indicating 1 ”and“ n = 10 ”, is recorded in association with each other.

  The correction coefficient data Dk and the interpolation processing table Dt are generated in advance by an external device and stored in the storage unit 6 as an example.

  When measuring the impedance by the measuring device 1, the processing unit 5 first controls the measuring unit 2 to supply an AC signal to the object to be measured. At this time, as an example, when supplying an AC signal of 1000 Hz to the object to be measured, the processing unit 5 uses the correction coefficient with "100" of the reference point P2 based on the correction coefficient data Dk to execute the AC signal. Correct the power of

  On the other hand, when supplying an AC signal of a frequency different from the frequency of the reference points P1 to P5 recorded in the correction coefficient data Dk, the processing unit 5 (main processing circuit in the processing unit 5) Is specified in which of the frequency ranges H1 to H4. At this time, when supplying an AC signal of, for example, 500 Hz, it is determined that the frequency is included in the frequency range H1, and interpolation processing is started to derive a correction coefficient for the interpolation point Pa corresponding to 500 Hz.

  Specifically, the correction coefficients at the interpolation point Pa between the L = 1st reference point P1 in ascending order of the frequency value and the (L + 1) = 2nd reference point P2 in ascending order of the frequency value are In the interpolation process of the present example to be derived, the processing unit 5 first specifies the value Vn and the value Vm associated with the frequency range H1 in which the interpolation point Pa is included, based on the interpolation process table Dt. Example 1)). In this case, based on the symbols “A” and “1” of the symbols “0x1A” associated with the symbol “Address” corresponding to the frequency range H1 in the interpolation processing table Dt, “n =“ 10 "and" m = 1 "are specified respectively.

  Next, the processing unit 5 sets the correction coefficient value V1 (in this example, “40”) at the L = 1st reference point P1 and the correction coefficient value V2 ((L + 1) = 2th reference point P2) (this In the example, “100” is input to the subtraction processing unit 11 to calculate the value V3 (“60” in this example) which is the difference between the value V1 and the value V2 (from the value V2 to the value V1 Execution of processing to subtract). In addition, the processing unit 5 sets the value V4 (“0” in this example) of the frequency at the L = 1st reference point P1 and the value V5 (“500” in this example) of the frequency at the interpolation point Pa, respectively. A value V6 (an example of the “fifth value”: “500” in this example), which is the difference between the value V4 and the value V5, is input to the subtraction processing unit 12 (from the value V5 to the value V4 Processing for subtraction: an example of “second processing”).

  On the other hand, when the value V3 (in this example, "60") of the calculation result by the subtraction processing unit 11 is output, the absolute value acquiring unit 13 calculates the value V3a ("sixth value") which is the absolute value of the value V3. Example of “: In this example,“ 60 ”is acquired. Note that, in this example, the subtraction processing by the subtraction processing unit 11 and the acquisition processing of the absolute value by the absolute value acquisition unit 13 correspond to the “third processing”. In addition, when the value V6 (in this example, "500") of the calculation result by the subtraction processing unit 12 is output, the multiplication processing unit 14 multiplies the value V6 by the value Vm (in this example, "1"). The value V7 (in this example, "500") is calculated. Furthermore, the multiplication processing unit 15 multiplies the value V3a (“60” in this example) acquired by the absolute value acquisition unit 13 by the value V7 (“500” in this example) of the calculation result by the multiplication processing unit 14 A calculated value V8 (an example of the “seventh value”: “30000” in this example) is calculated. In the present example, the multiplication processing by the multiplication processing unit 14 and the multiplication processing by the multiplication processing unit 15 together correspond to the “fourth processing”.

In addition, when the value V8 of the operation result by the multiplication processing unit 15 is output, the bit shift processing unit 16 shifts the value V8 to the right by n bits according to the value Vn to obtain the value V9 (“eighth Processing of converting “an example of“ value ”(example of“ fifth processing ”). In this case, in the present example in which the value V8 is “30000” and the value Vn is “10”, the bit shift processing unit 16 shifts “30000” to the right by “10” bits and converts it to the value V9. Thus, when the value Vn = “10”, the value “2 ⁿ = 1024” (the difference between the value of the frequency of the reference point P1 and the value of the frequency of the reference point P2 is “1000” and the value Vm = “1” is The value of “29” is the same as the value obtained by rounding off the value after the decimal point in the value “29.296875” by dividing “30000” by a value close to “1000” multiplied by “10”. Ru.

  On the other hand, in the processing unit 5 (interpolation processing circuit 10) of this example, when the absolute value acquisition unit 13 acquires the value V3a which is the absolute value of the value V3, the value V3 is a positive value (ie, the value V2). Is a value larger than the value V1: an example of “when the second value at the (L + 1) th reference point is larger than the second value at the Lth reference point”), together with the output of the value V3a And outputs a value V + consisting of a predefined 1-bit code indicating that the value V3 is a positive value. In response to this, the addition processing unit 17 adds the value V9 of the calculation result by the bit shift processing unit 16 ("29" in this example) to the correction coefficient (40 in this example) at the L = 1th reference point P1. To calculate a value V10a with "69" which is a correction coefficient at the interpolation point Pa. Thereby, the derivation of the correction coefficient: value V10a at the time of supplying the 500 Hz AC signal is completed. Therefore, the processing unit 5 corrects the power of the AC signal using the value V10a (correction coefficient) with "69" derived for the interpolation point Pa.

  When the correction coefficient of the interpolation point Pa is derived by the conventional method, the value of “70” is corrected by the equation “(100−40) × (500−0) / (1000−0) +40”. Although calculated as a coefficient, in the measuring apparatus 1 of this example, it is possible to derive a value V10a of "69" close to the value of "70" without performing division processing.

  On the other hand, when supplying an alternating current signal of, for example, 1800 Hz, the processing unit 5 (main processing circuit in the processing unit 5) specifies that the frequency is included in the frequency range H3, and supplies the interpolation point Pb corresponding to 1800 Hz. Interpolation processing to derive a correction coefficient is started.

  Specifically, the correction coefficients at the interpolation point Pb between the L = 3th reference point P3 in ascending order of the frequency value and the (L + 1) = 4th reference point P4 in ascending order of the frequency value are In the interpolation process of the present example to be derived, the processing unit 5 first specifies the value Vn and the value Vm associated with the frequency range H3 in which the interpolation point Pb is included, based on the interpolation process table Dt. Another example of “processing 1”). In this case, based on "C" and "7" of the code of "0x7C" associated with the code (Address) of "0x02" corresponding to the frequency range H3 in the interpolation processing table Dt, "n = 12 "and" m = 7 "are specified respectively.

  Next, the processing unit 5 calculates the correction coefficient value V1 ("200" in this example) at the L = 3th reference point P3 and the correction coefficient value V2 ((L + 1) = 4th reference point P4) In the example, “150” is input to the subtraction processing unit 11 to calculate the value V3 (“−50” in this example) which is the difference between the value V1 and the value V2 (from the value V2 to the value V1 Execution of the process of subtracting In addition, the processing unit 5 respectively calculates the value V4 ("1400" in this example) of the frequency at the L = 3th reference point P3 and the value V5 ("1800" in this example) of the frequency at the interpolation point Pb. By inputting to the subtraction processing unit 12, a value V6 (another example of the "fifth value": "400" in this example) which is the difference between the value V4 and the value V5 is calculated (from the value V5 to the value Process of subtracting V4: Another example of “second process”).

  On the other hand, when the value V3 (in this example, “−50”) of the calculation result by the subtraction processing unit 11 is output, the absolute value acquiring unit 13 calculates the value V3a (“sixth Another example of “value”: In this example, “50” is acquired. Also in this example, the subtraction processing by the subtraction processing unit 11 and the acquisition processing of the absolute value by the absolute value acquisition unit 13 correspond to the “third processing”. Also, when the value V6 (in this example, "400") of the calculation result by the subtraction processing unit 12 is output, the multiplication processing unit 14 multiplies the value V6 by the value Vm (in this example, "7") The value V7 ("2800" in this example) is calculated. Furthermore, the multiplication processing unit 15 multiplies the value V3a ("50" in this example) acquired by the absolute value acquisition unit 13 by the value V7 ("2800" in this example) of the calculation result by the multiplication processing unit 14. A calculated value V8 (another example of the “seventh value”: “140000” in this example) is calculated. Also in this example, the multiplication processing by the multiplication processing unit 14 and the multiplication processing by the multiplication processing unit 15 together correspond to the “fourth processing”.

In addition, when the value V8 of the operation result by the multiplication processing unit 15 is output, the bit shift processing unit 16 shifts the value V8 to the right by n bits according to the value Vn to obtain the value V9 (“eighth A process of converting into another example of “value” is performed (another example of “fifth process”). In this case, in the present example in which the value V8 is “140000” and the value Vn is “12”, the bit shift processing unit 16 shifts “140000” to the right by “12” bits and converts it to a value V9. Thus, when the value Vn = “12”, the value “2 ⁿ = 4096” (the difference between the value of the frequency of the reference point P3 and the value of the frequency of the reference point P4 “600” is obtained. Value close to the decimal point in the value of "34.1796875" divided by "140000" by a value close to "4200" multiplied by Ru.

  On the other hand, in the processing unit 5 (interpolation processing circuit 10) of this example, when the absolute value acquisition unit 13 acquires the value V3a which is the absolute value of the value V3, when the value V3 is a negative value (ie, the value V2 When the value V1 is larger than that: when the second value at the Lth reference point is larger than the second value at the (L + 1) th reference point)), along with the output of the value V3a A value V- consisting of a predefined 1-bit code indicating that the value V3 is a negative value is output. Accordingly, the value V9 ("34" in this example) of the calculation result by the bit shift processing section 16 from the correction coefficient (200 in this example) at the L = 3th reference point P3 by the subtraction processing part 18 To calculate a value V10b with "166" which is a correction coefficient at the interpolation point Pb. Thereby, the derivation of the correction coefficient: value V10b at the time of supplying the alternating current signal of 1800 Hz is completed. Therefore, the processing unit 5 corrects the power of the AC signal using the value V10b (correction coefficient) with "166" derived for the interpolation point Pb.

  When deriving the correction coefficient of the interpolation point Pb by the conventional method, "166. 666 ..." according to the equation "(150-200) x (1800-1400) / (2000-1400) + 200". Is calculated as a correction factor, but the measurement apparatus 1 of this example derives a value V10b of “166” close to the value of “166.666...” Without performing division processing. It is possible to

  As described above, in this measuring device 1, the L-th reference point and the “first value” in the ascending order of “first value (“ frequency value ”in the above example)” are in the ascending order (L + 1 As a processing target point in interpolation processing for deriving the “second value (in the above example,“ power correction coefficient ”)” at the processing target point (interpolation point Pa, Pb, etc.) between the second reference point The “first process” that specifies the corresponding values Vn and Vm based on the interpolation process table Dt, the “first value (value V4)” at the Lth reference point, and the “first process” at the processing target point Of “the second value (value V5)” which is the difference between the “value V5” and the “second value (value V1)” at the L-th reference point Calculate the “sixth value (value V3a)” which is the difference between the “L + 1) th reference point and the“ second value (value V2) ” To calculate the "seventh value (value V8)" by multiplying the "third process", the "fifth value", the "sixth value" and the value Vm, and the "fourth process", and Execute the "fifth process" to shift the value of "7" to the "eighth value (value V9)" by shifting it to the right by n bits, and execute the "second value" at the Lth reference point When the “second value” at the (L + 1) th reference point is large, the “eighth value” is added to the “second value” at the Lth reference point, and the “second value (the second value ( While deriving the value V10a ′ ′ and when the “second value” at the Lth reference point is larger than the “second value” at the (L + 1) th reference point, the “second value at the Lth reference point” The “second value (value V10 b)” at the processing target point is derived by subtracting the “eighth value” from the value of “value”.

  Therefore, according to this measuring device 1, the “second value” can be derived by linear interpolation without performing division processing that places a heavy load. As a result, when the arithmetic processing circuit for interpolation processing is configured on the PLD, the division processing unit becomes unnecessary, and as a result, the situation where valuable resources of the PLD are consumed can be suitably avoided. Not only can the manufacturing cost of the measuring apparatus 1 be sufficiently reduced, but also the time required for the interpolation processing can be shortened by the amount of not performing the division processing that places a heavy burden.

Further, according to the measuring apparatus 1, in a first range of values (N-1) each range of the number (in this example from M th reference point to (M + 1) th reference point, (N- 1) “Interpolate the interpolation processing table Dt in which information in which four frequency ranges H1 to H4) and values Vn and values Vm corresponding to processing target points included in each range are associated with each other is recorded the use as processing data ", for example, M-th reference point the" first value "(M + 1) th type of difference between the" first value "of the reference point, i.e., (N- 1) “Interpolation data” configured so as to be able to specify the corresponding “value of n” and “value of m” for each type of width in this range (type of width in frequency range H1 to H4) The frequency range H in which the processing target point (interpolation point Pa, Pb, etc.) is included is It is necessary to execute subtraction processing etc. to specify if it is a degree, and then it is necessary to specify “value of n” and “value of m” corresponding to the specified width, but by interpolation processing Only by specifying to which of the frequency ranges H1 to H4 the processing target point for which the “second value” is to be derived is included, “n value” or “m value corresponding to the specified frequency range H Can be identified. As a result, the number of arithmetic processing (the number of arithmetic circuits for executing the arithmetic processing) can be reduced, so that the manufacturing cost of the measuring apparatus 1 can be further reduced, and the time required for the interpolation processing can be further reduced. It can be shortened.

  The configuration of the “measuring device” is not limited to the example of the configuration of the measuring device 1 described above. For example, the subtraction processing unit 12 that executes the "second processing", the subtraction processing unit 11 that executes the "third processing" and the absolute value acquisition unit 13, and the multiplication processing unit that performs the "fourth processing" 14, 15, the bit shift processing unit 16 that executes the "fifth process", and the "second value (values V10a, V10b) at the processing target point" based on the results of the "fifth process" In the example described above, the interpolation processing circuit 10 having the addition processing unit 17 and the subtraction processing unit 18 for computing the function on the PLD is made to function as a "processing unit". Instead of the part 5, as in the measuring apparatus 1A shown in FIG. 1, the “addition processing”, the “subtraction processing”, the “multiplication processing” and the “division” are performed without constructing elements for performing interpolation processing in the PLD. Processing unit capable of executing various "calculation processing" such as "processing" a, and storing (installing) in the storage unit 6 an interpolation processing program Dp (an example of an “interpolation processing program”) in which the procedures for causing the processing unit 5a to execute the above-described respective processings are stored (installed). It is also possible to adopt a configuration in which any “second value” is linearly interpolated by functioning as a “processing unit”.

  According to the measuring apparatus 1A having such a configuration and the interpolation processing program Dp installed in the measuring apparatus 1A, it is possible to derive the “second value” by linear interpolation without performing division processing that places a large burden. it can. As a result, the load on the processing unit 5a at the time of interpolation processing is sufficiently reduced. Therefore, even if the processing unit 5a is configured by a low-spec arithmetic processing circuit, the required "second value" is reliably derived. As a result, not only can the manufacturing cost of the measuring apparatus 1A be sufficiently reduced, but also the time required for the interpolation processing can be shortened by the amount of not performing division processing that places a heavy burden.

In addition, after the processing of deriving the value V7 by multiplying the value V6 equivalent to the "fifth value" by the value Vm equivalent to the "value of m" as the "fourth process", the "sixth value" Has been described by taking as an example the configuration (process procedure) of deriving the value V8 equivalent to the “seventh value” by multiplying the value V3 corresponding to “the value V3a by the value V7”, but the “fourth process” is executed The configuration (processing procedure) is not limited to the above example, and the “seventh value” may be obtained by multiplying the “sixth value” by the “value of m” and multiplying the calculation result by the “fifth value”. (Process procedure) for deriving the “fifth value” by “fifth value” and “fifth value” by multiplying “the value m” by “the sixth value” (process (process) Procedure) can also be adopted. Even when such a configuration (processing procedure) is adopted, the same effect as the time of interpolation processing by the above-described configuration (processing procedure) can be achieved.

Further, the interpolation processing power correction coefficient for the values of the frequency and the "first value", and to correct the power of the AC signal according to the frequency of an AC signal supplied to the measurement object as a "second value" However, the “first value” and the “second value” are not limited to the above example, and various “second values” linearly related to the “first value” Can be interpolated with the same configuration and procedure as the above example. Furthermore, although the example which carries out the interpolation process of the value (the above-mentioned example, power correction coefficient) for controlling operation of a "measurement apparatus" was explained, the value which shows "measurement value (measurement result)" by a "measurement apparatus" It is also possible to interpolate as “the second value at the processing target point”.

  In this case, the “first value” and the “second value” are not limited to the above examples, and for example, the values such as voltage, current, and solar radiation amount may be “first values”, and these values may be used. When performing interpolation processing with values such as light quantity, temperature, and power generation amount that are respectively in a linear relationship to the “second value”, interpolation is performed according to the same configuration (processing procedure) as the above configuration (processing procedure) By performing the process, it is possible to derive the required "second value" without executing the division process which is heavily burdened.

1, 1A Measurement apparatus 2 Measurement unit 5, 5a Processing unit 6 Storage unit 10 Interpolation processing circuit 11, 12, 18 Subtraction processing unit 13 Absolute value acquisition unit 14, 15 Multiplication processing unit 16 bit shift processing unit 17 Addition processing unit Dk correction Coefficient data Dp Interpolation program Dt Interpolation table H1 to H4 Frequency range P1 to P5 Reference point Pa, Pb Interpolation points V1 to V3, V3a, V4 to V9, V10a, V10b Value Vm, Vn Value V +, V- Value

Claims (3)

The first value and the second value at two points of N reference points (N is a natural number of 3 or more) specified respectively by the first value and the second value in a linear relationship A measurement unit equipped with a processing unit capable of executing interpolation processing for deriving the second value at the processing target point by linear interpolation based on the first value at the processing target point different from the reference points; A device,
The first value at the reference point of the Mth (M is each natural number of (N-1) or less) in ascending order of the first value and the (M + 1) th in ascending order of the first value A plurality of types that can be represented by 2 ⁿ / m (where n is a natural number of 2 or more and m is a natural number) when the difference between the reference point and the first value is the third value. Storage for storing interpolation processing data that can specify the value of n and the value of m in the fourth value closest to the third value among the fourth values of Equipped with
The processing unit is configured to set the L-th (L is a natural number less than M) reference point in ascending order of the first value and the (L + 1) -th reference point in ascending order of the first value. In the interpolation processing for deriving the second value at the processing target point between the first and second methods, the value of n and the value of m corresponding to the processing target point are respectively specified based on the data for interpolation processing. A second process of calculating a fifth value which is a difference between the first value at the L-th reference point and the first value at the processing target point; at the L-th reference point A third process of calculating a sixth value which is a difference between the second value and the second value at the (L + 1) th reference point, the fifth value, the sixth value, and the third value a fourth process of calculating a seventh value by multiplying the value of m, and the seventh value Executes a fifth process of shifting to the eighth value by n-bit right shifting according to the value of (.alpha.), And at the (L + 1) th reference point than the second value at the L.sup.th reference point The eighth value is added to the second value at the Lth reference point when the second value is large to derive the second value at the processing target point, and the Lth When the second value at the reference point is larger than the second value at the (L + 1) th reference point, the eighth value is subtracted from the second value at the Lth reference point The measuring device which derives the 2nd value in the processing object point. The storage unit includes (N-1) pieces of the respective ranges which are the range of the first value from the Mth reference point to the (M + 1) th reference point, and the range included in the respective ranges. The measuring device according to claim 1, storing the data for interpolation processing in which information in which the value of n and the value of m corresponding to the processing target point are associated with each other is recorded. The first value and the second value at two points of N reference points (N is a natural number of 3 or more) specified respectively by the first value and the second value in a linear relationship A procedure for causing the processing unit of the measuring apparatus to execute interpolation processing for deriving the second value at the processing target point by linear interpolation based on the first value at the processing target point different from the reference points The interpolation processing program in which
The first value at the reference point of the Mth (M is each natural number of (N-1) or less) in ascending order of the first value and the (M + 1) th in ascending order of the first value A plurality of types that can be represented by 2 ⁿ / m (where n is a natural number of 2 or more and m is a natural number) when the difference between the reference point and the first value is the third value. Using the data for interpolation processing that can specify the value of n and the value of m at the fourth value closest to the third value among the fourth values of The processing between the L-th (L is a natural number less than M) reference point in ascending order of the first value and the (L + 1) -th reference point in ascending order of the first value As the interpolation processing for deriving the second value at the target point, the value of n corresponding to the processing target point and the value of n A first process of specifying the value of m based on the interpolation process data; a difference between the first value at the Lth reference point and the first value at the process target point; A second process of computing a value of 5; computing a sixth value which is a difference between the second value at the L-th reference point and the second value at the (L + 1) -th reference point A third process, a fourth process for calculating a seventh value by multiplying the fifth value, the sixth value, and the value of m, and the seventh value according to the value of the n performing a fifth process of shifting to the eighth value by n-bit shift right, and the second value at the (L + 1) th reference point than the second value at the Lth reference point Adding the eighth value to the second value at the L-th reference point when The second value at the logic target point is derived, and when the second value at the Lth reference point is larger than the second value at the (L + 1) th reference point, the Lth An interpolation processing program storing a procedure of subtracting the eighth value from the second value at the reference point to derive the second value at the processing target point.

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