JP6534884B2 - Power supply for lighting - Google Patents

Description

  The present invention relates to a power supply apparatus for illumination, which supplies power to a lighting apparatus including a plurality of light emitting elements, and has both a light control function and a light emitting element switching function.

  FIG. 9 is a circuit diagram of a lighting power supply device according to the prior art. AC power supply 1, input filter circuit 2, bleeder circuit 3, AC-DC converter 4, secondary side rectifying and smoothing circuit 5, first LED (light emitting element) 6 and second LED (light emitting element) 7 in this order It is connected. Further, the bleeder circuit 3, the first regulator circuit 8, the delay circuit 11, and the controller 12 are connected in this order of description, and the first regulator circuit 8, the second regulator circuit 9, and the control microcomputer 10 are connected in order of description. ing. The control microcomputer 10 is also connected to the bleeder circuit 3. The first regulator circuit 8 includes a first Zener diode ZD1 and an NMOS type transistor Q1. The delay circuit 11 includes a second Zener diode ZD2, a PNP transistor Q2, an NPN transistor Q3, and a delay capacitor (capacitive element) C1.

  Next, the light emitting element switching function of the prior art lighting power supply device of the above configuration will be described using the timing chart of FIG.

When the input voltage AC _in by the AC power supply 1 is turned on (applied) at timing t ₀₀ , a pulsating DC voltage is generated through the input filter circuit 2 and the AC-DC converter 4, and the secondary side rectifying and smoothing circuit 5 rectifies the voltage. A smoothed constant DC voltage is applied to the anode terminals of the first LED 6 and the second LED 7. In addition, the control microcomputer 10 activated in response to the turning on of the input voltage AC _in sets the input voltage detection signal CLK to the “H” level and applies it to the CLK terminal of the controller 12 and the dimming PWM signal DP Apply to the terminal. At the same time, the DC voltage stabilized by the first regulator circuit 8 is supplied to the delay circuit 11.

At timing t ₀₁ , the voltage V _C1 across the delay capacitor C 1 smoothly rises under a fixed time constant to reach the Zener voltage V _ZD2 of the second Zener diode ZD 2, and the second Zener diode ZD 2 breaks down. Therefore, the NPN transistor Q3 is turned on, then the PNP transistor Q2 is turned on, and the power input terminal voltage VDD of the controller 12 starts to rise. At timing t ₀₂ when the power supply input terminal voltage VDD reaches the start threshold voltage VDD _ON , the light adjustment / light emitting element switching function of the controller 12 is activated, and the D1 terminal is switched from the “H” level to the “L” level. , The first LED 6 lights up. The conditions for the controller 12 to start operation are that the input voltage detection signal CLK is at the “H” level and the power supply input terminal voltage VDD is higher than the start threshold voltage VDD _ON .

At timing _t03 , the input voltage AC _in is turned off (disconnected), the dimming PWM signal DP is stopped, and the input voltage detection signal CLK and the voltage V _C1 across the delay capacitor C1 start to drop. When the falling input voltage detection signal CLK reaches the input stop determination threshold voltage CLK _OFF at timing t _CLKL (= t ₀₄ ), the controller 12 stops the light adjustment / light emitting element switching function, and the first LED 6 is turned off. In conjunction, the power supply input terminal voltage VDD drops at a constant speed, and reaches the light emitting element switching condition satisfaction determination threshold voltage VDD _OFF at the critical timing t _VDDOFF (= t ₀₆ ) _in the off period of the input voltage AC _in . After that, the power supply input terminal voltage VDD continues to drop at a slower rate.

Power input terminal voltage VDD is input voltage AC _in the timing t ₀₇ until it reaches the reset threshold voltage VDD _RST is turned on again. By this time, the voltage V _C1 across the delay capacitor C1 has dropped smoothly to the zero level under a fixed time constant. When the input voltage AC _in is turned on again, the voltage V _C1 across the delay capacitor C1 smoothly starts to rise under a constant time constant. Further, the input voltage detection signal CLK and the dimming PWM signal DP are input to the controller 12 again. When the voltage V _C1 across the delay capacitor C1 reaches the Zener voltage (breakdown threshold voltage) V _ZD2 at timing t ₀₈ and the power supply input terminal voltage VDD rises and reaches the start threshold voltage VDD _ON at timing t ₀₉ , the controller 12 switches the D2 terminal from "H" level to "L" level this time, and turns on the second LED 7.

The first LED 6 is turned on when the number of times the input voltage AC _in is turned on is an odd number, and the second LED 7 is turned on when the number is an even number. Is alternately switched and turned on each time the input voltage AC _in is on. That is, the light emitting element is switched.

The requirements for establishing such a light emitting element switching condition are
<1> Timing when the minute predetermined waiting time Tc (for example, 19 ms) elapses from the timing t _CLKL (= t ₀₄ ) when the input voltage detection signal CLK becomes “L” level is the waiting time elapsed timing t _wait (= t ₀₅ ) that the critical timing t _VDDOFF (= t ₀₆ ) at which the falling power input terminal voltage VDD reaches the light emitting element switching condition satisfaction determination threshold voltage VDD _OFF is later than the waiting time elapsed timing t _wait . By the way, if the drop speed of the power supply input terminal voltage VDD is abnormally fast and these forward / reverse relationships are reversed, the light emitting element switching condition is not satisfied, and the light is lit in the previous cycle with respect to the input voltage AC _in of this cycle. The same LED turns on again.

<2> The input voltage detection signal CLK becomes lower than the input stop determination threshold voltage CLK _OFF and becomes "L" level, and the power input terminal voltage VDD switches the light emitting element in a state in which the power input terminal voltage VDD drops. The input voltage detection signal CLK must be kept at the “L” level until the critical timing t _VDDOFF (= t ₀₆ ) when the condition satisfaction determination threshold voltage VDD _OFF is reached. In other words, the input voltage detection signal CLK becomes “H” level after passing the critical timing t _VDDOFF (= t ₀₆ ).

For Figure 10, the timing t ₀₆ to the power supply input terminal voltage VDD reaches the light emitting element switching condition satisfaction judgment threshold voltage VDD _OFF is ahead of the timing t ₀₇ to the input voltage AC _in is turned on again. Further, a timing t ₀₇ at which the input voltage AC _in is turned on again is a timing at which the power supply input terminal voltage VDD has not dropped to the reset threshold voltage VDD _RST . Under such conditions, the light emitting element switching condition is satisfied.

When the input voltage AC _in is turned on again _in a period until the power supply input terminal voltage VDD reaches the reset threshold voltage VDD _RST after the timing t ₀₆ when the light emitting element switching condition satisfaction judgment threshold voltage VDD _OFF is reached, the above operation Repeated. Then, as described above, since the light emitting element switching condition is satisfied, in the next cycle, the controller 12 switches the D2 terminal from the “H” level to the “L” level instead of the D1 terminal in the previous cycle. . As a result, current flows in the second LED 7 and the second LED 7 is lit. That is, switching of the light emitting element is realized.

The prior art configured as described above has the following problems. The problem is that the controller 12 falls into the latch mode when a momentary interruption of the input voltage AC _in occurs.

As shown in FIG. 11, when the off period of the input voltage AC _in starting from the timing t ₀₃ is very short, the power input terminal voltage VDD does not fall sufficiently and the light emitting element switching condition satisfaction judgment threshold voltage VDD _OFF is reached. At time t ₀₅₅ , the input voltage AC _in is turned on again. When the input voltage AC _in is turned on, the voltage V _C1 across the delay capacitor C1 resumes rising, but the timing of turning on the input voltage AC _in again is too early (about an off period of the input voltage AC _in 30 to 80 ms are assumed (one example), by which the voltage V _C1 across the circuit has a small amount of drop and maintains a relatively high voltage level. Voltage across Vc ₁ resumes power input terminal voltage VDD is higher than the timing t ₀₅₆ exceeding the Zener voltage V _ZD2. Since timing t ₀₅₆ of this rise and restart is early, the power supply input terminal voltage VDD during the fall does not reach the light emitting element switching condition satisfaction determination threshold voltage VDD _OFF (see the broken line extending diagonally lower right in FIG. 11). It will start rising. In this case, the controller 12 will enter the latch mode. The controller 12 that has fallen into the latch mode does not perform normal operation, and the second LED 7 does not turn on and remains off even if the input voltage AC _in is turned on. This latch mode is maintained until the input voltage AC _in is turned off next and the power input terminal voltage VDD reaches the light-emitting element switching condition satisfaction determination threshold voltage VDD _OFF or less.

The reason why the controller 12 falls into the latch mode is as follows. That is, to set the controller 12 to the light adjustment mode and the light emitting element switching mode,
(1) Apply the dimming PWM signal DP to the DP terminal (2) The power input terminal voltage VDD applied to the VDD terminal rises, and there is a restriction that the order of reaching the start threshold voltage VDD _ON must be observed. Because of this limitation, a delay circuit 11 including a delay capacitor C1 is provided. However, when the delay circuit 11 is provided, it is applied to the voltage V _C1 across the delay capacitor C1 and, consequently, to the VDD terminal because of a constant time constant τ d (= R3 · C1) due to the capacitance of the delay capacitor C1. The falling speed of the power supply input terminal voltage VDD becomes slow. This causes the latch mode at the time of the momentary interruption. When the latch mode is entered, the light emitting element switching condition is not satisfied, which causes a failure in the light emitting element switching control. That is, the controller 12 is in a latch stop state of the power supply (lights out lock).

  The present invention has been made in view of the above circumstances, and a lighting power supply device having a light control / switching function can be provided with a relatively simple configuration, even if the input voltage is turned off momentarily. It is an object of the present invention to prevent latch stop (lights out lock) of the controller's power supply when a momentary power failure occurs.

  The present invention solves the above-mentioned problems by taking the following measures.

  A lighting power supply device according to the present invention is a lighting power supply device that performs switching operation and light control operation of each light emitting element by switching on / off of a plurality of light emitting elements based on an input voltage. A control unit that generates and outputs an input voltage detection signal and a dimming PWM signal when voltage on is detected, and stops generation and output of the input voltage detection signal and dimming PWM signal when it is detected that the input voltage is off , A PWM signal terminal to which a light control PWM signal is input, a voltage detection terminal to which an input voltage detection signal is input, a power supply input terminal to which a driving power supply voltage is applied, and a plurality of light emitting elements When the voltage level of the input voltage detection signal exceeds the input stop determination threshold voltage, it is open, but when it becomes less than the input stop determination threshold voltage And a discharge terminal short-circuited to the ground terminal, and the light control operation is performed when the power supply voltage applied to the power supply input terminal reaches a predetermined start threshold voltage after the light control PWM signal is input to the PWM signal terminal. And a controller that performs switching operation when switching conditions are satisfied according to on / off switching of the input voltage, and a capacitive element for delay, and the power supply voltage applied to the power supply input terminal is the start threshold voltage And a delay circuit for delaying the timing when the light modulation PWM signal is input to the PWM signal terminal and the positive terminal of the delay capacitive element is connected to the discharge terminal of the controller. It features.

According to this configuration, the control unit outputs the input voltage detection signal (CLK) and the dimming PWM signal (DP) to the controller when the input voltage (AC _in ) is turned on, and the input voltage is turned off. The output of the input voltage detection signal and the dimming PWM signal is stopped. When the input voltage detection signal is stopped, the controller shorts the discharge terminal (BLDR) to the ground terminal to rapidly discharge the delay capacitance element and immediately return the voltage (V _C1 ) to the zero level. Let Even if the input voltage is turned off momentarily and the input voltage off period in the previous cycle is very short, the voltage rise across the delay capacitive element is started from the zero level. Thus, the switching condition can be established with certainty.

Here, on condition that the power input terminal becomes equal to or lower than the switching condition satisfaction judgment threshold voltage (VDD _OFF ) after a predetermined standby time has elapsed from the timing when the voltage level of the input voltage detection signal becomes equal to or lower than the input stop judgment threshold voltage. When the switching condition is satisfied, it becomes possible to reliably cause the power supply input terminal voltage (VDD) in the process of falling to reach the switching condition satisfaction determination threshold voltage (VDD _OFF ). When the input voltage is turned on again, the voltage across the delay capacitive element rises again from zero level, and the power input terminal voltage reaches the start threshold voltage (VDD _ON ), and the light control and switching function of the controller is activated again. Be When the power supply input terminal voltage exceeds the start threshold voltage, the controller proceeds to the lighting operation process of the light emitting element, but as described above, the power supply input terminal voltage (VDD) during falling is the switching condition satisfaction judgment threshold voltage (VDD _OFF ) As the switching condition is satisfied, the light emitting element to be lighted is switched from the light emitting element of the previous lighting to another light emitting element. And, this is true regardless of whether the on timing of the input voltage is the normal timing or the premature timing in the case of a momentary interruption.

  Therefore, the controller turns on the input voltage before the power supply input terminal falls below the switching condition satisfaction determination threshold voltage after the voltage level of the input voltage detection signal falls below the input stop determination threshold voltage, and the power input terminal If the state that does not reach the switching condition satisfaction determination threshold voltage is maintained, the delaying capacitive element is rapidly discharged even when transitioning to the latch mode, and the power supply stops latching even if the input voltage is momentarily interrupted ( It is possible to avoid turning off the light.

  According to the present invention, in the illumination power supply device having the light control / switching function, even if the input voltage is turned off due to a momentary interruption, latch stop (light off state lock) of the power supply of the controller can be avoided. . In addition, the configuration for that purpose is extremely simple as it is simply connecting the discharge terminal to the positive electrode terminal of the delay capacity element, and an advantageous development in space and cost can be achieved.

The circuit diagram which shows the structure of the power supply device for illumination of the Example of this invention Timing chart showing the operation of the lighting power supply device of the embodiment of the present invention Timing chart showing the operation of the lighting power supply device of the embodiment of the present invention Timing chart showing the operation of the lighting power supply device of the embodiment of the present invention Timing chart showing the operation of the lighting power supply device of the embodiment of the present invention Flow chart showing the operation of the lighting power supply device of the embodiment of the present invention Flow chart showing the operation of the lighting power supply device of the embodiment of the present invention Flow chart showing the operation of the lighting power supply device of the embodiment of the present invention A circuit diagram showing the configuration of a prior art lighting power supply device Timing chart showing the operation of a prior art lighting power supply Timing chart showing the operation of a prior art lighting power supply

  Hereinafter, the embodiment of the illumination power source apparatus of the present invention having the above configuration will be described in detail on the level of a specific example.

FIG. 1 is a circuit diagram showing the configuration of a lighting power supply apparatus according to an embodiment of the present invention. In FIG. 1, 1 is an AC power supply, 2 is an input filter circuit, 3 is a bleeder circuit (discharge circuit), 4 is an AC-DC converter, 5 is a secondary side rectifying and smoothing circuit, and 6 is a first LED (light emitting element) , 7 is a second LED (light emitting element), 8 is a first regulator circuit, 9 is a second regulator circuit, 10 is a control microcomputer (microcomputer (control unit)) corresponding to the control unit, 11 is an 11 A delay circuit 12 is a controller (main control IC). The input filter circuit 2 incorporates a triac dimmer. The bleeder circuit 3 has a function of preventing a malfunction of triac dimming by constantly supplying a current so that the output voltage does not rise excessively when no load is applied. The AC-DC converter 4 has a function of converting AC voltage into DC voltage of pulsating current. The secondary side rectifying and smoothing circuit 5 has a function of rectifying and smoothing the DC voltage of the pulsating current to generate a constant level DC voltage. The first regulator circuit 8 has a function of generating a stabilized DC voltage in a positive half wave period of the AC voltage and supplying a power supply voltage to the controller 12 via the delay circuit 11. The second regulator circuit 9 has a function of stepping down the DC voltage from the first regulator circuit 8 and supplying a power supply voltage to the control microcomputer 10. The bleeder circuit 3 has a function of inputting a phase change of the input voltage AC _in to the control microcomputer 10. The first LED 6 and the second LED 7 have different light colors (emission colors). An AC power supply 1 is connected to the input side of an AC-DC converter 4 via an input filter circuit 2. A bleeder circuit 3 is connected between a power supply line L1 connecting the input filter circuit 2 and the AC-DC converter 4 and a ground line L2. The output side of the AC-DC converter 4 is connected to the anode terminals of the first LED 6 and the second LED 7 via the secondary side rectifying and smoothing circuit 5. The cathode terminal of the first LED 6 is connected to the D1 terminal of the controller 12, and the cathode terminal of the second LED 7 is connected to the D2 terminal.

  As constituent requirements of the first regulator circuit 8, Q1 is an NMOS type field effect transistor (FET), R1 is a resistive element, and ZD1 is a first Zener diode. As the configuration requirements of the delay circuit 11, Q2 is a PNP transistor, Q3 is an NPN transistor, ZD2 is a second zener diode, R2, R3 and R4 are resistance elements, and C1 is a delay capacitor (capacitance element) is there. As components of a feed line from the delay circuit 11 to the controller 12, R5 and R6 are resistance elements, and D1 is a diode for backflow prevention.

The drain of the NMOS transistor Q1 in the first regulator circuit 8 is connected to the power supply line L1, and the source thereof is connected to the emitter of the PNP transistor Q2 in the delay circuit 11 and the power terminal of the second regulator circuit 9. It is done. A series circuit of a resistor element R1 and a first Zener diode ZD1 in the first regulator circuit 8 is connected between the power supply line L1 and the ground, and a connection node N1 between the resistor element R1 and the first Zener diode ZD1 is an NMOS Is connected to the gate of the transistor Q1 of FIG. When the AC voltage appearing in the power supply line L1 becomes equal to or higher than the Zener voltage (breakdown threshold voltage) _{VZD1 of} the first Zener diode ZD1, the first Zener diode ZD1 breaks down and current flows to the resistance element R1 and the first Zener diode ZD1. , And the voltage of the connection node N1 is held at the Zener voltage _VZD1 , which is applied to the gate of the NMOS transistor Q1 to make the transistor Q1 conductive. DC voltage Zener voltage V _ZD1 stabilized is defined by the zener diode ZD1 is supplied to the delay circuit 11 via the transistor Q1 of the NMOS type, further feeding the VDD terminal of the controller 12 via the delay circuit 11.

  The output terminal of the second regulator circuit 9 is connected to the power supply terminal of the control microcomputer 10. The output terminal of the bleeder circuit 3 is connected to the input terminal of the control microcomputer 10. The output terminal of the input voltage detection signal CLK is connected to the CLK terminal of the controller 12, and the output terminal of the dimming PWM signal DP is connected to the DP terminal of the controller 12. A connection node N2 between the source of the NMOS transistor Q1 in the first regulator circuit 8 and the power supply terminal of the second regulator circuit 9 is connected to the emitter of the PNP transistor Q2 in the delay circuit 11.

  The resistor R2 is connected between the base and the emitter of the PNP transistor Q2 in the delay circuit 11, and the collector of the NPN transistor Q3 is connected to the base. The emitter of the NPN transistor Q3 is grounded, and a series circuit of a resistive element R3, a second Zener diode ZD2 and a resistive element R4 is connected between its base and the emitter of the PNP transistor Q2. The anode of the second Zener diode ZD2 is connected to the resistance element R4, and the cathode is connected to the resistance element R3. A delaying capacitor C1 is connected between a connection node N3 between the resistance element R3 and the cathode of the second Zener diode ZD2 and the ground. The collector of the PNP transistor Q2 in the delay circuit 11 is connected to the VDD terminal of the controller 12 through the resistance elements R5 and R6 and the diode D1 for backflow prevention.

  Next, each terminal in the controller 12 will be described.

The CLK terminal has a function of monitoring the on (on) / off (off) of the input voltage AC _in by the AC power supply 1 in response to "H" / "L" of the input voltage detection signal CLK from the control microcomputer 10. .

  The DP terminal has a function (light control function) to control the magnitude of the output current to the LEDs 6, 7 in accordance with the duty ratio of the light control PWM signal DP applied from the control microcomputer 10.

  The cathode terminal of the first LED 6 is connected to the D1 terminal, and the D1 terminal has a function of lighting the first LED 6 by switching from "H" to "L". The cathode terminal of the second LED 7 is connected to the D2 terminal, and the D2 terminal has a function of lighting the second LED 7 by switching from "H" to "L". The light emitting element can be switched by switching between the state in which the D1 terminal is set to "L" and the state in which the D2 terminal is set to "L".

When the power supply input terminal voltage VDD applied to the VDD terminal becomes equal to or higher than the start threshold voltage VDD _ON , the controller 12 is activated, and control operation of light adjustment / light emitting element switching becomes possible. The fact that the power color input terminal voltage VDD drops and becomes equal to or lower than the light emitting element switching condition satisfaction judgment threshold voltage VDD _OFF is a premise for satisfying the light color switching condition. Even if the input voltage AC _in is turned on again _{in a} state where the power supply input terminal voltage VDD does not drop to the light emitting element switching condition satisfaction judging threshold voltage VDD _OFF , the light emitting element switching condition is not satisfied.

  The controller 12 uses, for example, an LED illumination control IC (OZ2089) manufactured by O2 Micro (O2 Micro).

In the embodiment of the present invention, the connection node N3 of the resistive element R3 in the delay circuit 11, the delay capacitor C1 and the second Zener diode ZD2 is connected to the BLDR terminal (discharge terminal) involved in rapid discharge in the controller 12. There is. The BLDR terminals (discharge terminal) is open when the voltage of the input voltage detection signal CLK exceeds the input stop judgment threshold voltage CLK _OFF, the state became below the input stop determination threshold voltage CLK _OFF (CLK terminal Is a terminal which is short-circuited to the ground terminal at a timing before the power supply input terminal voltage VDD falls below the light emitting element switching condition satisfaction judgment threshold voltage VDD _OFF .

  Next, the operation of the lighting power supply apparatus of the embodiment of the present invention configured as described above will be described.

In the delay circuit 11, in the initial state, both the PNP transistor Q2 and the NPN transistor Q3 are in the OFF state. In this initial state, when the input voltage AC _in from the AC power supply 1 is turned on, the NPN type transistor Q3 is in the off state, so the voltage applied from the first regulator circuit 8 causes the resistive element R2 for biasing. Because the voltage is applied to the base of the PNP transistor Q2, the PNP transistor Q2 is kept off. On the other hand, the current by the voltage applied from the first regulator circuit 8 flows into the delaying capacitor C1 through the resistor element R3 to raise the voltage V _C1 across the capacitor _C1 to a fixed time constant. Characteristic curve of the increase, as the origin of the time axis (horizontal axis) and the voltage axis (vertical axis), and one that approaches the V _in to smoothly increase under time constant τd = R3 · C1. Here, V _in is a constant voltage generated by the first regulator circuit 8 and is a voltage applied to the input terminal (connection node N2) of the delay circuit 11, and e is the number of Napiers at the bottom of the natural logarithm (e = 2. 718 281 828 ...)) (E (t) = E (1-e ^ (-t / RC)).

When the voltage V _C1 across the delay capacitor C1 rises and reaches the Zener voltage (breakdown threshold voltage) V _ZD2 of the Zener diode ZD2, the Zener diode ZD2 breaks down, and an NPN type transistor Q3 via the resistance element R4 And the base current is supplied to turn on the transistor Q3. Since the base of the PNP transistor Q2 is grounded through the turned on transistor Q3 by this turn-on, a potential difference is generated between the base and the emitter of the transistor Q2, and the transistor Q2 is also turned on. As a result, the DC voltage V _in from the first regulator circuit 8 is supplied to the power supply input VDD terminal of the controller 12 through the PNP transistor Q2 with resistance turned on, the resistance elements R5 and R6, and the diode D1 for backflow prevention. The Rukoto. Thereby, the controller 12 is activated and activated.

  Next, the light emitting element switching function will be described using the timing chart of FIG.

When the input voltage AC _in by the AC power supply 1 is turned on at the timing t ₀ , a DC voltage (pulse current) is generated through the input filter circuit 2 and the AC-DC converter 4, and the secondary side rectifying and smoothing circuit 5 rectifies the voltage. A smoothed constant DC voltage is applied to the anode terminals of the first LED 6 and the second LED 7. At this time, the input filter circuit 2 removes noise coming in from a commercial power supply or the like. The bleeder circuit 3 performs control so that current always flows so that the output voltage does not rise excessively when not loaded, and prevents the malfunction of the triac dimmer in the input filter circuit 2. On the other hand, when the input voltage AC _in is turned on, DC power is supplied to the control microcomputer 10 via the first regulator circuit 8 and the second regulator circuit 9, and the control microcomputer 10 is immediately activated. The activated control microcomputer 10 sets the input voltage detection signal CLK to the “H” level and applies it to the CLK terminal of the controller 12 and applies the dimming PWM signal DP to the DP terminal.

At timing t _1, power input terminal voltage VDD in the controller 12 starts to rise. At this time, the first regulator circuit 8, the first Zener diode ZD1 is breakdown AC voltage appearing on the power supply line L1 becomes the Zener voltage V _ZD1 more first Zener diode ZD1, the voltage of the connection node N1 The zener voltage _VZD1 is held and applied to the gate of the NMOS transistor Q1 to make the transistor Q1 conductive. The NMOS transistor Q1 whose gate voltage is controlled to a constant level supplies a constant current to the delay circuit 11.

At the timing t ₂ the delay time Td has elapsed from the timing t ₀ is defined by the delay circuit 11, the rising power input terminal voltage VDD reaches the start threshold voltage VDD _ON, the controller 12 starts operation is activated . As a result, the controller 12 switches the D1 terminal from the “H” level to the “L” level, and current flows through the first LED 6 to light the first LED 6. The power supply input terminal voltage VDD reaches a prescribed level corresponding to the constant voltage (V _in ) prescribed by the first regulator circuit 8 and stably transitions. The conditions for the controller 12 to start operation are that the input voltage detection signal CLK appearing at the CLK terminal is at the “H” level and the power supply input terminal voltage VDD is higher than the start threshold voltage VDD _ON . The brightness of the first LED 6 is controlled by the duty ratio (time ratio) of the dimming PWM signal DP.

When time passes and the input voltage AC _in is turned off (timing t ₃ ), the control microcomputer 10 stops the output of the input voltage detection signal CLK and the dimming PWM signal DP and switches to the “L” level. The high frequency dimming PWM signal instantaneously drops to zero level, and the relatively low frequency input voltage detection signal CLK and the power supply input terminal voltage VDD drop at a constant rate. The controller 12 stops the light adjustment / light emitting element switching function at the timing t _CLKL (= t ₄ ) when the voltage level of the input voltage detection signal CLK decreases and becomes “L” level lower than the input stop determination threshold voltage CLK _OFF. Do. As a result, the D1 terminal returns from the "L" level to the "H" level, and the first LED 6 is turned off. On the other hand, since the output voltage of the first regulator circuit 8 disappears with the turning off of the input voltage AC _in , the voltage V _C1 across the delay capacitor C1 in the delay circuit 11 starts to drop. The voltage drop is performed under the above-mentioned time constant τd = R3 · C1 for the initial very short time.

At timing t _CLKL (= t ₄ ), the controller 12 connects the BLDR terminal (discharge terminal) to the ground terminal GND. Since the BLDR terminal (discharge terminal) is connected to the positive terminal of the delay capacitor C1 in the delay circuit 11, the delay capacitor C1 is discharged at a very high speed, and the voltage V _C1 across the capacitor _C1 is instantaneously Descent to zero level. At this timing t _CLKL (= t ₄ ), the input voltage detection signal CLK is turned off, so the first LED 6 is turned off.

The standby time elapses when the minute predetermined time Tc (for example, 19 ms) has elapsed from the timing t _CLKL (= t ₄ ) at which the input voltage detection signal CLK becomes “L” level (equal to or less than the input stop determination threshold voltage CLK _OFF ) The timing t _wait (= t ₅ ). The power supply input terminal voltage VDD drops at a constant rate from the timing immediately before this timing t _wait (= t ₅ ).

Here, the relationship between the critical timing t _VDDOFF (= t ₆ ) when the power supply input terminal voltage VDD reaches the light emitting element switching condition satisfaction determination threshold voltage VDD _OFF and the timing (t ₇ ) at which the input voltage AC _in is turned on again Is a problem.

In the case of FIG. 2, the critical timing t _VDDOFF (= t ₆ ) at which the power input terminal voltage VDD reaches the light emitting element switching condition satisfaction determination threshold voltage VDD _OFF is higher than the timing t ₇ at which the input voltage AC _in is turned on again. It is ahead. The timing t ₇ the input voltage AC _in is turned on again, it is the timing of the power supply input terminal voltage VDD has not dropped to the reset threshold voltage VDD _RST. That is, here, assuming that the input voltage AC _in does not turn on again, the power input terminal voltage VDD eventually drops to the reset threshold voltage VDD _RST . It is considered that the input voltage AC _in is turned on again before the timing. After the critical timing t _VDDOFF (= t ₆ ) after the power input terminal voltage VDD reaches the light emitting element switching condition satisfaction determination threshold voltage VDD _OFF , the falling speed is lower than the falling speed before the critical timing t _VDDOFF (= t ₆ ) It is getting smaller.

  Here, the light emitting element switching condition for the next cycle is shown again.

<1> as the input voltage detection signal CLK is "L" timing t _CLKL became level (= t ₄₎ small predetermined standby time from Tc (e.g. 19 ms) latency timing for elapse elapsed time t _wait, drop The critical timing t _{VDDOFF at} which the power supply input terminal voltage VDD reaches the light emitting element switching condition satisfaction determination threshold voltage VDD _OFF is later than the waiting time elapsed timing t _wait .

<2> The input voltage detection signal CLK becomes lower than the input stop determination threshold voltage CLK _OFF and becomes "L" level, and the power input terminal voltage VDD switches the light emitting element in a state in which the power input terminal voltage VDD drops. The input voltage detection signal CLK must be kept at the “L” level until the critical timing t _VDDOFF (= t ₆ ) when the condition satisfaction judgment threshold voltage VDD _OFF is reached. In other words, the input voltage detection signal CLK becomes “H” level after passing the critical timing t _VDDOFF (= t ₆ ).

Incidentally, the waiting time elapsed before the critical time t _VDDOFF input voltage AC _in the power supply input terminal voltage VDD from the timing t ₃ when turned off has reached the light emitting element switching condition satisfaction judgment threshold voltage VDD _OFF (= t ₆₎ is given It is required to be within time To (for example, 2 seconds).

For Figure 2, at a critical time t _VDDOFF (= t ₆₎ after reaching the light emitting element switching condition satisfaction judgment threshold voltage VDD _OFF, the input voltage AC in the period up to the power input terminal voltage VDD reaches the reset threshold voltage VDD _{RST in} is turned on again. At this time, the voltage V _C1 across the delay capacitor C1 has already dropped to the zero level due to the rapid discharge. When the input voltage AC _in is turned on again, the above operation is restarted from the beginning, and the input voltage detection signal CLK and the dimming PWM signal DP rise, and the voltage V _C1 across the delay capacitor _C1 is constant time constant τ d = R3 · smoothly increased from C1 original zero level, after yielding of the second Zener diode ZD2 reached at timing t ₈ the Zener voltage V _ZD2, the power input terminal voltage VDD at time t ₉ rises. When the power supply input terminal voltage VDD reaches the start threshold voltage VDD _ON , the controller 12 is activated. Since the light emitting element switching condition is satisfied in the next cycle as described above, the controller 12 switches the D2 terminal from the “H” level to the “L” level instead of the D1 terminal in the previous cycle. As a result, current flows in the second LED 7 and the second LED 7 is lit. That is, switching of the light emitting element is realized.

  The description of the operation based on the timing chart of FIG. 2 above is in the normal state.

  Next, the operation when the drop speed of the power supply input terminal voltage VDD becomes excessive will be described using the timing chart of FIG.

In the above-described normal state, the critical timing t _VDDOFF (= t ₆ ) at which the power input terminal voltage VDD reaches the light emitting element switching condition satisfaction determination threshold voltage VDD _OFF is the timing t _CLKL (= t ₄ ) (voltage CLK Is a timing after the waiting time elapse timing t _wait (= t ₅ ) after the lapse of a minute predetermined time Tc from when CLK falls below CLK _OFF (see FIG. 2). However, in the case of FIG. 3, contrary to that, the power input terminal voltage VDD is the light emission element switching condition satisfaction determination threshold voltage before the waiting time elapse timing t _wait (= t ₅ ) after the predetermined time Tc elapses. a case has been reached VDD _OFF, in this case, the light emitting element switching condition for the next cycle is not approved. That is, the light emitting element switching condition is satisfied when the drop speed of the power supply input terminal voltage VDD is low to a certain extent as shown in FIG. 2 and the drop speed is too fast as shown in FIG. Of the two requirements <1> and <2> for light emitting element switching condition satisfaction, <1> is not met. In this case, when the input voltage AC _in is turned on again, the first LED 6 is turned on again, not the second LED 7. That is, switching of the light emitting element does not occur.

Then, the off period of the input voltage AC _in long, will be described with reference to the timing chart of FIG. 4 the operation when again on the input voltage AC _in is delayed from the reset timing.

In the case of the normal state described above, the timing t ₇ the input voltage AC _in is turned on again, power input terminal voltage VDD is a timing earlier than timing at which drops to the reset threshold voltage VDD _RST, and this Conversely, when the input voltage AC _in is turned on again at timing t ₁₁ after the reset timing t _RST (= t ₁₀ ) at which the power input terminal voltage VDD has dropped to the reset threshold voltage VDD _RST , light emission occurs. Although the occurrence of the element switching condition occurs, the power supply input terminal voltage VDD drops to the reset threshold voltage VDD _RST before the input voltage AC _in is turned on again, and the controller 12 is actually reset. Switching does not occur. That is, the switching of the light emitting element occurs when the timing at which the input voltage AC _in is turned on again is before the drop to the reset threshold voltage VDD _RST, and the on timing at which the input voltage AC _in is on again is too late. In the case, switching of the light emitting element does not occur. In this case, the first LED 6 is turned on, not the second LED 7, because the input voltage AC _in is turned on again after being reset. That is, switching of the light color does not occur.

Next, the operation in the case where the input voltage AC _in causes an instantaneous interruption will be described using the timing chart of FIG. This is to be compared with FIG. 11 which points out the problems of the prior art.

Input voltage AC _in is turned off at time t _3, OFF an input voltage detection signal CLK is equal to or less than the input stop determination threshold voltage CLK _OFF PWM signal DP is for simultaneously dimming OFF, at timing t _CLKL (= t ₄₎ become. At this timing t _CLKL (= t ₄ ), as described above, the controller 12 connects the BLDR terminal (discharge terminal) to the ground terminal GND. Therefore, in the delay circuit 11 connected to the BLDR terminal (discharge terminal) The delay capacitor C1 is discharged at a very high speed, and the voltage V _C1 across the capacitor C1 drops to the zero level in an instant. At this timing, the input voltage detection signal CLK is turned off (the CLK terminal is low), so the first LED 6 is turned off.

In the case of this operation example, at the timing t _ACON (= t ₅₅ ) at which the input voltage AC _in is turned on again, the falling power input terminal voltage VDD is the light emission element switching condition satisfaction determination threshold voltage VDD
It is ahead of the critical timing t _VDDOFF (= t ₆ ) to reach _OFF . The off period of the input voltage AC _in is very short, which corresponds to a momentary interruption. In the case of the prior art, as shown in FIG. 11, the discharge of the delaying capacitor C1 does not proceed, and the level of the voltage V _C1 across the delaying capacitor C1 at the time of rising and resuming is considerably high. Therefore, the controller 12 latches because the power input terminal voltage VDD rises again without the power input terminal voltage VDD in the process of falling falling below the light emitting element switching condition satisfaction determination threshold voltage VDD _OFF. It was stopped (unlit state lock). On the other hand, in the case of the embodiment of the present invention, as described above, the BLDR terminal (terminal for discharge) is connected to the ground terminal GND to discharge the delay capacitor C1 at a very high speed. The re-rise of the voltage V _C1 across the capacitor C1 of the capacitor C1 is started from the zero level. As a result, the period until the voltage V _C1 across the delay capacitor C1 reaches the Zener voltage V _ZD2 of the second Zener diode ZD2 can be extended, and the power input terminal voltage VDD falling during that time can be a stop threshold It will reach the voltage VDD _OFF .

Power input terminal voltage VDD is inverted rises at a timing t _61, the timing t ₆₂ reaches the activation threshold value voltage VDD _ON, since the light emitting element switching condition is satisfied, the controller 12 the D2 terminal from the "H" level The second LED 7 lights up to switch to the “L” level.

As described above, according to the embodiment of the present invention, even if the input voltage AC _in is turned off due to a momentary interruption, the latch stop (light off state lock) of the power supply of the controller 12 can be avoided. Moreover, the configuration for that purpose is extremely simple as it is simply connecting the BLDR terminal (discharge terminal) to the positive terminal of the delay capacitor C1, which is extremely advantageous in space and cost.

  Next, as another embodiment, the operation in the case of control by software will be described using the flowcharts shown in FIG. 6, FIG. 7 and FIG. This flowchart is executed in cooperation of the control microcomputer 10 and the controller 12.

  In step S1, the light emitting element switching condition satisfaction flag Fj is set to "0". This corresponds to the first cycle.

Next, in step S2, when the input voltage AC _in is turned on (applied), the process proceeds to the next step S3.

  In step S3, the input voltage detection signal CLK and the dimming PWM signal DP are output.

Next, in step S4, it waits for the rising power supply input terminal voltage VDD to reach the start threshold voltage VDD _ON . When this level is reached, the dimming / light emitting element switching function of the controller 12 is activated.

  Next, in step S5, it is determined whether the light emitting element switching condition satisfaction flag Fj is "1". If it is "1", it will progress to step S6, and if it is "0", it will progress to step S7. Since it is "0" in the first cycle, the process proceeds to step S7.

  In step S6, if the previous operation is the LED1 operation (YES in step S6), the operation is switched to the LED2 operation (step S9). If the previous operation is the LED2 operation (NO in step S6), the operation is switched to the LED1 operation (step S7). In step S10 subsequent to step S9, the operation LED flag FL is set to "2." This indicates that the second LED 7 has been lit.

  In step S7, the D1 terminal of the controller 12 is switched to the “L” level to turn on the first LED 6.

  Next, in step S8, the operation LED flag FL is set to "1". This indicates that the first LED 6 has been lit.

Next, in step S11, when the input voltage AC _in is turned off (disconnected), the process proceeds to step S12.

  In step S12, the output of the input voltage detection signal CLK and the dimming PWM signal DP is stopped.

Next, in step S13, the process waits for the falling input voltage detection signal CLK to reach the input stop determination threshold voltage CLK _OFF . If it reaches, it will progress to step S14.

  In step S14, the BLDR terminal (discharge terminal) of the controller 12 is connected to the ground terminal GND.

  Next, in step S15, the timer count is started.

  Next, in step S16, it waits for the timer count to reach a minute predetermined waiting time Tc (for example, 19 ms). If it reaches, it will progress to step S17.

In step S17, it is determined whether the power supply input terminal voltage VDD during the drop has reached the light emitting element switching condition satisfaction determination threshold voltage VDD _OFF . That is, it is determined whether or dropped to the light emitting element switching condition satisfaction judgment threshold voltage VDD _OFF before small predetermined standby time Tc (e.g. 19 ms) has elapsed. If it has dropped to that level, this corresponds to the state of FIG. 3, and the process proceeds to step S23, where the light emitting element switching condition satisfied flag Fj is set to "0", and the second LED 7 is Instead, the first LED 6 is turned on again.

When the determination in step S17 is negative, that is, before the minute predetermined waiting time Tc (for example, 19 ms) elapses, the power input terminal voltage VDD has reached the light emitting element switching condition satisfaction determination threshold voltage VDD _OFF. If not, the process proceeds to step S18 to wait for the input voltage AC _in to be turned on again. If ON is detected, the process proceeds to step S19.

In step S19, it is determined whether or not the power supply input terminal voltage VDD being dropped has dropped to the light emitting element switching condition satisfaction determination threshold voltage VDD _OFF . That is, it is determined whether or not the level is reached at the timing when the input voltage AC _in is turned on again. If it has reached, the process proceeds to step S20. This routine corresponds to the state of FIG. 2 or FIG.

In step S20, it is determined whether the power supply input terminal voltage VDD has reached the reset threshold voltage VDD _RST . If not reached, this corresponds to the state of FIG. 2. In this case, the process proceeds to step S21, the light emitting element switching condition satisfied flag Fj is set to "1", and in the next cycle, the first LED 6 is replaced with the first Prepare to turn on the LED 7 of 2. On the other hand, if reached, this corresponds to the state of FIG. 4. In this case, the process proceeds to step S22, the light emitting element switching condition satisfied flag Fj is set to "0", and in the next cycle, not the second LED 7 It is prepared to light the first LED 6 again.

In the determination of step S19, if the power input terminal voltage VDD in the process of falling at the timing of turning on the input voltage AC _in is not lowered to the light emitting element switching condition satisfaction judgment threshold voltage VDD _OFF , this corresponds to the state of FIG. However, in this case, the process proceeds to step S21, the light emitting element switching condition satisfaction flag Fj is set to "1", and in the next cycle, preparation is made to light the second LED 7 instead of the first LED 6.

  Following step S21, step S22 and step S23, the process returns to step S2. Then, in the next cycle, after the determination of step S5 and step S6, the routine of step S7 → S8 or the routine of step S9 → S10 is followed. In step S9, the D2 terminal of the controller 12 is switched to "L" level to turn on the second LED 7, and in step S10, the operation LED flag FL is set to "2" to indicate that the second LED 7 is turned on. After setting, the process proceeds to step S11.

  The routine for leaving from step S19 to step S21 in FIG. 8 is established because the BLDR terminal (discharge terminal) is configured to be switched and connected to the ground terminal GND. In the case of the prior art, when the determination result in step S19 is negative, the controller 12 is in the latch stop state (lights out lock), whereas in the embodiment of the present invention, such a disadvantage occurs. It is possible to avoid the situation.

  In the above embodiment, the first LED 6 and the second LED 7 have different light colors (emission colors), but the light emitting directions of the first LED 6 and the second LED 7 are different, for example. It is not limited to when colors differ. Further, the number of light emitting elements is not limited to two, and may be three or more.

  The present invention relates to a lighting power supply device having a light control / switching function, as a technique for avoiding that the power supply of the controller is not latched (locked off) even when the input voltage is interrupted momentarily. It is useful.

6 1st LED (light emitting element)
7 Second LED (Light Emitting Element)
10 Control microcomputer (control unit)
11 delay circuit 12 controller AC _in input voltage BLDR discharge terminal C1 delay capacitor (capacitive element)
CLK _OFF input stop judgment threshold voltage CLK input voltage detection signal DP PWM signal for dimming Dimming voltage of capacitor for _C1 delay V _ZD2 Zener voltage ( _breaking threshold voltage)
VDD Power supply input terminal voltage VDD _ON start threshold voltage VDD _OFF light emitting element switching condition satisfaction judgment threshold voltage

Claims (4)

In a lighting power supply device that performs switching operation and dimming operation of each light emitting element by switching on / off of a plurality of light emitting elements based on input voltage.
An input voltage detection signal and a dimming PWM signal are generated and output when the input voltage is detected on, and a generation output of the input voltage detection signal and the dimming PWM signal is detected when the input voltage is detected off Control unit to stop the
A PWM signal terminal to which the light modulation PWM signal is input, a voltage detection terminal to which the input voltage detection signal is input, a power supply input terminal to which a driving power supply voltage is applied, and the plurality of light emitting elements When the voltage level of the input voltage detection signal exceeds the input stop determination threshold voltage, the multiple element connection terminals connected, the ground terminal, and the input stop detection threshold voltage become lower than the input stop determination threshold voltage Has a discharge terminal short-circuited to the ground terminal, and the power supply voltage applied to the power supply input terminal after the dimming PWM signal is input to the PWM signal terminal is set to a predetermined start threshold voltage The controller performs the light adjustment operation when it reaches, and a controller that performs the switching operation when a switching condition is satisfied according to the on / off switching of the input voltage.
A delay that includes a capacitive element for delaying and delays the timing at which the power supply voltage applied to the power supply input terminal reaches the activation threshold voltage with respect to the timing at which the dimming PWM signal is input to the PWM signal terminal. Equipped with a circuit,
The power supply apparatus for illumination characterized by the positive electrode terminal of the capacitive element for said delay being connected to the said terminal for discharge in the said controller.   The switching condition is performed on condition that the power input terminal becomes equal to or lower than the switching condition satisfaction determination threshold voltage after a predetermined standby time has elapsed from the timing when the voltage level of the input voltage detection signal becomes lower than the input stop determination threshold voltage. The illumination power supply device according to claim 1, which is satisfied. The controller is configured such that the input voltage is turned on before the power supply input terminal becomes lower than or equal to the switching condition satisfaction determination threshold voltage after the voltage level of the input voltage detection signal becomes lower than the input stop determination threshold voltage. and if a state of the input terminal does not reach the switching condition establishment determining threshold voltage is maintained, the lighting power source apparatus according to claim 1 or 2, wherein transition to latch mode. Wherein a plurality of lighting power supply device according to claim 3, wherein the first light emitting element and the second light emitting element is connected to the element connection terminals as a light emitting element,
A DC voltage regulated based on the input voltage is input as the driving power supply voltage to the power supply input terminal.
The delay circuit is interposed between an output terminal of the voltage regulated DC voltage and a power input terminal of the controller.
The controller
The input voltage is turned on, the input voltage detection signal and the dimming PWM signal are input from the control unit, the voltage across the delay capacitive element is increased, and a predetermined time is elapsed after a delay time by the delay circuit has elapsed. When the delay circuit operates and the breakdown threshold voltage is reached, the voltage-regulated DC voltage is applied to the power supply input terminal through the delay circuit, and the power supply input terminal voltage rises to the start threshold voltage. Control to turn on the first light emitting element when activated
When the input voltage is turned off and the voltage level of the input voltage detection signal drops and falls below the input stop determination threshold voltage, the first light emitting element is turned off and the discharge terminal is shorted to the ground terminal. to be to quickly discharge the capacitive element for the delay, to prevent the transition to the latch mode,
When the input voltage is turned on again, the input voltage detection signal and the dimming PWM signal are input from the control unit, and the voltage across the delay capacitive element is increased to the predetermined breakdown threshold voltage. A lighting power supply device that is activated when it reaches and controls to turn on the second light emitting element.

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