JP6530905B2 - Single crystal semiconductor layer, free-standing substrate and method for manufacturing laminated structure - Google Patents

Description

  The present invention relates to a group III nitride semiconductor single crystal semiconductor layer, a free-standing substrate, a laminated structure, and a method of manufacturing them.

In Patent Document 1, a carbon concentration of 5 × 10 ¹⁶ atms / cm ³ or more and 1 × 10 ¹⁸ atms / cm ³ or less of Al _x Ga _1−x N (0.05 ≦ x ≦ 0.24) formed on a substrate. ) Layer is disclosed.

JP, 2013-8938, A

  In devices such as light emitting diodes (LEDs) and laser diodes (LDs), it is required to improve the internal quantum efficiency. An object of the present invention is to provide a technique for improving internal quantum efficiency in devices such as LEDs and LDs.

According to the invention
In _x Ga _1-x N (0 ≦ x ≦ 1),
Assuming that the lattice constant in the c-axis direction is L1 and (0.575x + 5.185) Å is L2, the rate of change (L1-L2) / L2 of L1 based on L2 is 0.386 × 10 ⁻⁴ or more 4.243 × 10 ^-4 or less,
Assuming that the lattice constant in the a-axis direction is M1 and (0.359x + 3.189) Å is M2, the rate of change (M1-M2) / M2 of M1 based on M2 is 0.314 × 10 ⁻⁴ or more 4.077 × ^{10 -4} der less is,
C is doped as an impurity,
A single crystal semiconductor layer is provided in which the concentration of C in a region within a depth of 15 μm from the surface is 5 × 10 ¹⁸ atoms / cm ³ or more and 1 × 10 ²¹ atoms / cm ³ or less .

  Further, according to the present invention, there is provided a self-supporting substrate including the single crystal semiconductor layer.

  Further, according to the present invention, there is provided a laminated structure including the single crystal semiconductor layer.

Moreover, according to the present invention,
A preparation step of preparing a base substrate;
Wherein on the base _substrate, is composed of _{In x Ga 1-x N (} 0 ≦ x ≦ 1), the lattice constant of c-axis direction is L1, when a L2 a (0.575x + 5.185) Å, L2 The change rate (L1-L2) / L2 of L1 is 0.386 × 10 ⁻⁴ or more and 4.243 × 10 ⁻⁴ or less, and the lattice constant in the a-axis direction is M1 (0.359 × + 3). .189) A single crystal semiconductor layer in which the change ratio (M1-M2) / M2 of M1 based on M2 is 0.314 × 10 ⁻⁴ or more and 4.077 × 10 ⁻⁴ or less, where M2 is M 2 A growth process to form
I have a,
In the growth step, C is doped as an impurity, and the single crystal has a C concentration of 5 × 10 ¹⁸ atoms / cm ³ or more and 1 × 10 ²¹ atoms / cm ³ or less in a region having a depth from the surface of 15 μm or less A method of manufacturing a single crystal semiconductor layer for forming a semiconductor layer is provided.

Further, according to the present invention, there is provided a method of manufacturing a self-supporting substrate including the method of manufacturing the single crystal semiconductor layer .

Further, according to the present invention, there is provided a method for producing a laminated structure including the method for producing the single crystal semiconductor layer .

  According to the present invention, a technology for improving the internal quantum efficiency is realized in devices such as LEDs and LDs.

It is a flowchart for demonstrating an example of the manufacturing method of the single crystal semiconductor layer of this embodiment. It is a figure which shows the structure of HVPE apparatus. FIG. 2 is a plan view showing a laminated structure formed in Example 1; FIG. 6 is a graph showing the result of measuring the C-containing concentration in the single crystal semiconductor layer made of GaN of the multilayer structure formed in Example 1. FIG. 7 is a diagram showing that the lattice constant of GaN constituting the single crystal semiconductor layer is expanded by doping C into the single crystal semiconductor layer made of GaN.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In all the drawings, the same components are denoted by the same reference numerals, and the description thereof will be appropriately omitted.

First, an outline of the present embodiment will be described. In this embodiment, In _x Ga _1-x N (0 ≦ x ≦ 0) where the lattice constant is expanded in both the c-axis direction and the a-axis direction compared to the literature value at the time of undoped by the unique characteristic manufacturing method. Achieve layer 1). Then, a device such as an LED or LD is formed on the layer of In _x Ga _1-x N (0 ≦ x ≦ 1) in which the lattice constant is thus expanded in both the c-axis direction and the a-axis direction. , Internal quantum efficiency can be improved.

  When epitaxial growth is performed for devices such as LEDs and LDs on a substrate (for example, a substrate comprising the GaN layer of the present embodiment) in which the lattice constant is expanded in both the c-axis direction and particularly the a-axis direction In forming QW), the difference in lattice mismatch with the grown InGaN layer is reduced, and the piezoelectric field is reduced. For this reason, the Stark effect which causes the fall of an internal quantum efficiency and a Droop problem can be reduced. As a result, device characteristics can be improved.

Next, the single crystal semiconductor layer of In lattice constant was expanded to both c-axis and the a-axis direction _{x Ga 1-x N (0} ≦ x ≦ 1), self-supporting substrate and a laminated structure including the single crystal semiconductor layer The method of manufacturing the body will be described.

  First, a method for manufacturing a single crystal semiconductor layer is described. As shown in the flowchart of FIG. 1, the manufacturing method has a preparation step S10 and a growth step S20.

In the preparation step S10, a base substrate is prepared. On this underlying substrate, “a layer of In _x Ga _{1 -x} N (0 ≦ x ≦ 1) in which the lattice constant is expanded in both the c-axis direction and the a-axis direction” is grown in the next growth step S20. .

The base substrate may be a substrate of the same type as “a layer of In _x Ga _1-x N (0 ≦ x ≦ 1) in which the lattice constant is expanded in both the c-axis direction and the a-axis direction”. (Example: sapphire substrate) may be used. The growth surface which is the main surface (exposed surface) of the base substrate may be a + c surface, or may be an m surface, an a surface or a semipolar surface.

In the preparation step S10, one or more layers (hereinafter, "intermediate layer") may be formed on the base substrate. Then, in the growth step S20, “In _x Ga _1−x N (0 ≦ x ≦ 1 where the lattice constant is expanded in both the c-axis direction and the a-axis direction on the intermediate layer formed on the base substrate Layer) may be grown.

The intermediate layer is a buffer layer, an active layer, p-type In _x Ga _1-x N (0 ≦ x ≦ 1), p-type Al _y Ga _1-y N (0 ≦ y ≦ 1), n-type In _x Ga _{1 −x} N (0 ≦ x ≦ 1), n-type Al _y Ga _1-y N (0 ≦ y ≦ 1), non-doped In _x Ga _1-x N (0 ≦ x ≦ 1), non-doped Al _y Ga _{1- Although y} N (0 ≦ y ≦ 1), a carbide layer, a nitride layer, and the like can be considered, they are not limited thereto. The method of manufacturing the intermediate layer can be realized according to the prior art, and thus the description thereof is omitted here.

In growth step S20, on the base substrate, directly or via an intermediate _layer, to form a single crystal semiconductor layer which is composed of _{In x Ga 1-x N (} 0 ≦ x ≦ 1).

When the lattice constant in the c-axis direction of the single crystal semiconductor layer formed in the growth step S20 is L1, and (0.575x + 5.185) Å is L2, the change ratio of L1 based on L2 (L1− L2) / L2 is 4.243 × ^{10 -4} or less 0.386 × ^{10 -4} or more.

The value of L1 indicates the value of the lattice constant in the c-axis direction of the single crystal semiconductor layer of this embodiment. The value of L2 indicates a literature value of c-axis direction of the lattice constant of not performing processing impurity doping such as _{In x Ga 1-x N (} 0 ≦ x ≦ 1). And, in (L 1-L 2) / L 2, how much the lattice constant in the c-axis direction of the single crystal semiconductor layer of this embodiment is changed as compared with the document value when the treatment such as impurity doping is not performed Indicates

Also, assuming that the lattice constant in the a-axis direction of the single crystal semiconductor layer formed in the growth step S20 is M1, and (0.359x + 3.189) Å is M2, the change ratio of M1 based on M2 (M1- M2) / M2 is 0.314 × 10 ⁻⁴ or more and 4.077 × 10 ⁴ or less

The value of M1 indicates the value of the lattice constant in the a-axis direction of the single crystal semiconductor layer of this embodiment. The value of M2 indicates the literature values for the a-axis direction of the lattice constant of not performing processing impurity doping such as _{In x Ga 1-x N (} 0 ≦ x ≦ 1). And in (M1-M2) / M2, how much is the lattice constant in the a-axis direction of the single crystal semiconductor layer of this embodiment changed as compared with the document value when the treatment such as impurity doping is not performed? Indicates

In the growth step S20, the Ga position or the N position is substituted in In _x Ga _1-x N (0 ≦ x ≦ 1), and the covalent bond radius is long and doped with a practical (non-hazardous) element at a predetermined concentration Then, “a layer of In _x Ga _1−x N (0 ≦ x ≦ 1) in which the lattice constant is expanded in both the c-axis direction and the a-axis direction and the above change rate is realized” is realized.

  The elements to be doped include C, Mg, P, S, Cl, Ca, Ti, V, As, Se, Sr, Zr, Nb, Ag, Sn, Te, I, Ba, Hf, W, Bi, etc. Any one or more of are illustrated. Hereinafter, a method for manufacturing a single crystal semiconductor layer doped with C at a predetermined concentration will be described as an example. The single crystal semiconductor layer in which C is doped at a predetermined concentration can be formed by epitaxial growth by MOCVD method (organic metal vapor phase growth method), HVPE method (hydride vapor phase growth method) or the like.

For MOCVD method, attaching the base substrate into an MOCVD apparatus, III-group material gas and nitrogen raw material gas by supplying with a carrier gas to the surface of the base substrate, the base substrate _{In x Ga 1-x N (} 0 ≦ A single crystal semiconductor layer of x ≦ 1) is formed. The temperature of the base substrate is maintained at 500 ° C., for example. The carrier gas is nitrogen (N ₂ ) gas or hydrogen (H ₂ ) gas. For example, using trimethylgallium (Ga (CH ₃ ) ₃ , TMG) or triethylgallium (Ga (C ₂ H ₅ ) ₃ , TEG) as the group III source gas and ammonia (NH ₃ ) gas as the nitrogen source gas, A single crystal semiconductor layer formed of a nitride semiconductor (eg, GaN) having a wurtzite crystal structure can be formed.

In forming a single crystal semiconductor layer, and a methyl or ethyl group were decomposed from group III material gas, since the decomposed hydrogen (H ₂₎ from the hydrogen (H ₂₎ or ammonia as the carrier gas, methane (CH ₄ ) And ethane (C ₂ H ₆ ) are produced. C can be introduced as an impurity into the single crystal semiconductor layer by using methane or ethane thus generated. When forming a single crystal semiconductor layer, the concentration of C doped in the single crystal semiconductor layer is adjusted by adjusting the temperature of the base substrate, the supply amount of group III source gas (V / III ratio), the growth pressure, and the like. it can. Specifically, the concentration of C can be increased as the temperature of the base substrate is lowered, the V / III ratio is decreased, and the growth pressure is decreased.

  Next, an example of using the HVPE method will be described. FIG. 2 is a view showing an example of the structure of the HVPE apparatus 100 that can be used in the present embodiment.

  The HVPE apparatus 100 includes a reaction tube 121, a substrate holder 123, a group III gas supply unit 139, a nitrogen source gas supply unit 137, a doping gas supply tube 125, a gas discharge tube 135, a first heater 129 and a second heater 130. . The substrate holder 123 is provided in the reaction tube 121. The group III gas supply unit 139 supplies the group III source gas to the growth region 122 including the substrate holder 123 in the reaction tube 121. The nitrogen source gas supply unit 137 supplies the nitrogen source gas to the growth region 122. The doping gas supply pipe 125 supplies the doping gas to the growth region 122. The gas discharge pipe 135 discharges the gas in the reaction pipe 121.

  In the HVPE apparatus 100, a group III nitride semiconductor layer is grown on the substrate 133 held by the substrate holder 123. The substrate holder 123 is attached to the rotating shaft 132 and is rotatable.

A first gas supply pipe 124 and a second gas supply pipe 126 are connected to the reaction pipe 121, and between the supply port of the first gas supply pipe 124 and the supply port of the second gas supply pipe 126. A shielding plate 136 is provided. Hereinafter, in the reaction tube 121, the side closer to the supply ports of the first gas supply pipe 124, the doping gas supply pipe 125, and the second gas supply pipe 126 is called the upstream side, and the side closer to the gas discharge pipe 135 is Called downstream. The shield plate 136 separates the space on the upstream side of the reaction tube 121 into two layers, an upper layer and a lower layer. The lower layer region is provided with a source boat 128, and the source boat 128 holds a group III raw material 127. The gas supplied from the first gas supply pipe 124 and the second gas supply pipe 126 can be switched to a purge gas for purging the inside of the reaction pipe 121 as needed. The purge gas is, for example, nitrogen (N ₂ ) gas.

The nitrogen source gas is supplied into the reaction pipe 121 from the first gas supply pipe 124 together with the carrier gas. The halogen-containing gas is supplied into the reaction pipe 121 from the second gas supply pipe 126 together with the carrier gas. The doping gas is supplied from the doping gas supply pipe 125 into the reaction pipe 121. The carrier gas is, for example, nitrogen (N ₂ ) gas or hydrogen (H ₂ ) gas.

  The nitrogen source gas supply unit 137 includes a first gas supply pipe 124 and a region of the reaction pipe 121 above the shielding plate 136 (excluding the doping gas supply pipe 125 and the inside thereof). The group III gas supply part 139 includes the second gas supply pipe 126, the source boat 128, the group III raw material 127, and the region of the reaction pipe 121 below the shielding plate 136. A first heater 129 is disposed around the nitrogen source gas supply unit 137 and the group III gas supply unit 139.

  The nitrogen source gas supplied from the first gas supply pipe 124 passes downstream in the nitrogen source gas supply unit 137 and is supplied to the surface of the substrate 133. At this time, the inside of the nitrogen source gas supply unit 137 is maintained at a temperature of, for example, 800 ° C. or more and 900 ° C. or less by heat applied from the first heater 129. This heat promotes the decomposition of the nitrogen source gas in the nitrogen source gas supply unit 137.

  In the group III gas supply unit 139, a group III source gas is generated from the halogen-containing gas supplied from the second gas supply pipe 126 and the group III raw material 127 held in the source boat 128. The generated group III source gas is supplied to the surface of the substrate 133 held by the substrate holder 123. At this time, the inside of the group III gas supply unit 139 is maintained at a temperature of, for example, 800 ° C. or more and 900 ° C. or less by heat applied from the first heater 129. When the halogen-containing gas supplied from the second gas supply pipe 126 passes downstream in the group III gas supply part 139, the surface of the group III raw material 127 held in the source boat 128 or the volatilized III Contact with raw materials 127. Then, a group III source gas is generated.

  A substrate holder 123 holding a substrate 133 is disposed in the growth region 122 located downstream of the nitrogen source gas supply unit 137 and the group III gas supply unit 139 in the reaction tube 121. The nitrogen source gas is supplied from the nitrogen source gas supply unit 137 to the growth region 122, and the group III source gas is supplied from the group III gas supply unit 139. Then, the group III nitride semiconductor layer is formed on the substrate 133. A second heater 130 is disposed around the growth region 122 to apply heat to the growth region 122 as needed. A uniform layer can be obtained in the plane of the substrate 133 by rotating the substrate holder 123 about the rotation axis 132 while forming the group III nitride semiconductor layer.

When using the HVPE method, first, attaching the base substrate to the substrate holder 123 of the HVPE apparatus 100, to form a single crystal semiconductor layer made of _{In x Ga 1-x N (} 0 ≦ x ≦ 1) on a base substrate. Here, an example of forming a single crystal semiconductor layer made of GaN will be described. The single crystal semiconductor layer is formed while introducing a compound containing C as a dopant together with a source gas.

Ammonia (NH ₃ ) as nitrogen source gas, gallium (Ga) as group III source 127, hydrogen chloride (HCl) as halogen-containing gas, and doping gases such as methane (CH ₄ ), ethane (C ₂ H ₆ ) Hydrocarbon compounds such as propane (C ₃ H ₈ ) and ethylene (C ₂ H ₄ ) can be used. In this case, a GaN layer containing C as an impurity is formed as a single crystal semiconductor layer. When the single crystal semiconductor layer is formed, the temperature of the growth region 122 is maintained, for example, at a temperature of approximately 1000 to 1200 ° C.

  In the case of this method, the concentration of C to be doped into the single crystal semiconductor layer can be adjusted by adjusting the supply amount of the dopant containing C. Specifically, the concentration of C becomes higher as the supply amount of the dopant is increased.

The thickness of the single crystal semiconductor layer formed of In _x Ga _1-x N (0 ≦ x ≦ 1) is 15 μm or more, preferably 50 μm or more. Further, the concentration of carbon in the vicinity of the surface (the surface opposite to the surface facing the base substrate) of the single crystal semiconductor layer is 5 × 10 ¹⁸ atoms / cm ³ or more and 1 × 10 ²¹ atoms / cm ³ or less, preferably 1 × 10 ¹⁹ atoms / cm ³ or more and 1 × 10 ²¹ atoms / cm ³ or less, more preferably 2 × 10 ¹⁹ atoms / cm ³ or more and 1 × 10 ²¹ atoms / cm ³ or less. Incidentally, the vicinity of the surface means that the depth from the surface is within 15 μm.

As shown in the following examples, as the impurity concentration in this embodiment increases, the c-axis direction and the a-axis direction of the single crystal semiconductor layer formed of In _x Ga _1-x N (0 ≦ x ≦ 1). The rate of change (magnification) of the lattice constant tends to be large. Then, as described above, the concentration of impurities can also be adjusted by adjusting the growth conditions.

Therefore, before the growth step S20 of this embodiment, target values of the lattice constant in the c-axis direction and the lattice constant in the a-axis direction of the single crystal semiconductor layer are determined, and the single crystal semiconductor layer is determined based on the target values. The method may further comprise the step of determining the concentration of impurities to be doped into the Then, in the growth step S20, under the condition that the impurity of the determined concentration is _doped, it may be formed a single crystal semiconductor layer made of _{In x Ga 1-x N (} 0 ≦ x ≦ 1). In this way, In _x Ga _1-x N (0 ≦ x ≦ 1) in which the desired concentration of impurity is doped and the lattice constant in the c-axis direction and the lattice constant in the a-axis direction become desired target values. Can be formed.

  According to the method for manufacturing a single crystal semiconductor layer of the present embodiment described above, the following single crystal semiconductor layer is realized.

1. Change of L1 based on L2, where L2 is a lattice constant in the c-axis direction L1 and L2 is (0.575x + 5.185) Å, which is composed of In _x Ga _1−x N (0 ≦ x ≦ 1) The ratio (L1−L2) / L2 is 0.386 × 10 ⁻⁴ or more and 4.243 × 10 ⁴ or less,
Assuming that the lattice constant in the a-axis direction is M1 and (0.359x + 3.189) Å is M2, the rate of change (M1-M2) / M2 of M1 based on M2 is 0.314 × 10 ⁻⁴ or more A single crystal semiconductor layer which is 4.077 × 10 ⁻⁴ or less.

2. In the single crystal semiconductor layer described in 1,
An impurity containing any of C, Mg, P, S, Cl, Ca, Ti, V, As, Se, Sr, Zr, Nb, Ag, Sn, Te, I, Ba, Hf, W, Bi A doped single crystal semiconductor layer.

3. In the single crystal semiconductor layer described in 2,
C is doped as the impurity,
The single crystal semiconductor layer in which the concentration of C in the vicinity of the surface is 5 × 10 ¹⁸ atoms / cm ³ or more and 1 × 10 ²¹ atoms / cm ³ or less.

  In the method of manufacturing a self-standing substrate of this embodiment, a single crystal semiconductor layer is formed on the base substrate in the same manner as the method of manufacturing a single crystal semiconductor layer described above. Then, the structure including the base substrate and the single crystal semiconductor layer obtained in this manner can be used as a self-standing substrate. In addition, a structure obtained by removing at least part of the base substrate or the intermediate layer from the structure body, or a layer obtained by slicing the single crystal semiconductor layer can be used as a self-supporting substrate.

  According to such a method for manufacturing a self-supporting substrate, a self-supporting substrate including the single crystal semiconductor layer according to any one of the above 1 to 3 can be obtained.

  Further, in the method for manufacturing a laminated structure of the present embodiment, a single crystal semiconductor layer is formed on the base substrate in the same manner as the method for manufacturing a single crystal semiconductor layer described above. Then, a structure including the base substrate and the single crystal semiconductor layer obtained in this manner can be used as a stacked structure. In addition, a laminate structure can be obtained by removing at least a part of the base substrate and the intermediate layer from the laminate structure.

As described above, according to this embodiment, a single crystal semiconductor layer of In _x Ga _1-x N (0 ≦ x ≦ 1) in which the lattice constant is expanded in both the c-axis direction and the a-axis direction, specifically Then, assuming that the lattice constant in the c-axis direction is L1, and (0.575x + 5.185) Å is L2, the rate of change (L1-L2) / L2 of L1 based on L2 is 0.386 × 10 ^-4 or more and 4.243 × 10 ^-4 or less, the lattice constant in the a-axis direction is M1, and (0.359x + 3.189) Å is M2, the change rate of M1 based on M2 (M1- A single crystal semiconductor layer in which M 2) / M 2 is 0.314 × 10 ⁻⁴ or more and 4.077 × 10 ⁴ or less is realized. Furthermore, a self-supporting substrate and a laminated structure including such a single crystal semiconductor layer are realized.

  Further, according to the present embodiment, it is possible to adjust the rate of change (magnification rate) of the lattice constant in the c-axis direction and the a-axis direction, and set the values of the lattice constant in the c-axis direction and the a-axis direction to desired values it can.

  According to such this embodiment, internal quantum efficiency can be improved in devices, such as LED and LD. That is, according to the present embodiment, it is possible to manufacture a substrate in which lattice constants are expanded in both the c-axis direction and the a-axis direction (eg, a substrate comprising the GaN layer of the present embodiment). Then, devices such as LEDs and LDs can be formed on such a substrate.

  When epitaxial growth is performed for a device such as an LED or LD on a substrate whose lattice constant is expanded in the c-axis direction, particularly in the a-axis direction, between the InGaN layers to be grown to form the active layer (QW) The difference in lattice mismatch is reduced and the piezoelectric field is reduced. For this reason, the Stark effect which causes the fall of an internal quantum efficiency and a Droop problem can be reduced. As a result, device characteristics can be improved.

Further, according to this embodiment, it is possible to control the _{In x Ga 1-x N (} 0 ≦ x ≦ 1) magnification c-axis direction and the a-axis direction both the lattice constant of the single crystal semiconductor layer. For example, a single crystal semiconductor layer of In _x Ga _1-x N (0 ≦ x ≦ 1) of this embodiment adjusted to have a lattice constant different from that of the substrate is formed on the substrate in which distortion such as warpage is generated. Can generate distortion. Then, the warp of the substrate and the curvature of the crystal plane can be corrected by the distortion. Incidentally, according to this embodiment, by controlling the _{In x Ga 1-x N (} 0 ≦ x ≦ 1) magnification c-axis direction and the a-axis direction both the lattice constant of the single crystal semiconductor layer, generation It is possible to control the magnitude of distortion. As a result, distortion of a desired size can adjust problems such as warpage of the substrate to a desired state.

Similarly, a compressive strain of a desired size is generated between the substrate and the single crystal semiconductor layer of In _x Ga _1-x N (0 ≦ x ≦ 1) of this embodiment. Reduction is also expected.

  Next, examples of the present invention will be described.

Example 1
The base substrate was mounted in the MOCVD apparatus to form a single crystal semiconductor layer made of GaN. The base substrate was a GaN free-standing substrate having a growth surface having a diameter of 50 mm and a + c plane. A single crystal semiconductor layer made of GaN was formed on the growth surface of the base substrate using TMG as the group III source gas, ammonia (NH ₃ ) gas as the nitrogen source gas, and H ₂ and N ₂ as the carrier gas. Further, using methane (CH ₄ ) and ethane (C ₂ H ₆ ) generated by being decomposed from TMG used as the group III source gas, C is contained as an impurity in the single crystal semiconductor layer made of GaN. At this time, the temperature balance was set so as to have a temperature distribution in the base substrate surface.

As growth conditions for the single crystal semiconductor layer made of GaN, the growth temperature is 900 ° C., the supply amount of TMG is 500 sccm, the supply amount of NH ₃ gas is 5 slm, the supply amount of carrier gas is 13.5 slm for H ₂ , and N ₂ A single crystal semiconductor layer of GaN having a thickness of 15 μm was formed over the base substrate at 1.5 slm.

  FIG. 3 is a plan view showing a laminated structure of a base substrate obtained in this example and a single crystal semiconductor layer made of GaN. The rightward direction in this figure is defined as the x-axis direction, and the upward direction is defined as the y-axis direction. It can be seen from the figure that the color is darker in the + x direction and the + y direction, that is, the density of C is higher. The distribution of the C concentration was consistent with the distribution of the temperature in the base substrate surface. From the above, it can be confirmed that the concentration of doped C can be adjusted by adjusting the temperature of the base substrate.

  FIG. 4 shows the results of measurement of the concentration of carbon (C) in the single crystal semiconductor layer made of GaN at three points in the plane of the laminated structure shown in FIG. 3 by SIMS (Secondary Ion Mass Spectrometry). . The contents of hydrogen (H), oxygen (O), silicon (Si) and secondary ion strength are also shown. The horizontal axis represents the depth from the surface (surface opposite to the surface facing the base substrate) of the single crystal semiconductor layer made of GaN, and the vertical axis represents the concentration of each element or the secondary ion intensity.

The carbon concentration in the vicinity of the surface of the single crystal semiconductor layer made of GaN is 5 × 10 ¹⁹ atoms / cm ^{3 at} the position of (x, y) = (− 20, 0), (x, y) = (0, 0) It was 9 × 10 ¹⁹ atoms / cm ^{3 at} the position of 3 and 3 × 10 ²⁰ atoms / cm ³ at the position of (x, y) = (20, 0). Accordingly, this result also indicates that the concentration of carbon is higher in the + x direction. In SIMS measurement, in the vicinity of the exposed surface of the sample, the measured value is affected by asperities, adsorbates, and the like. Therefore, the concentration of each element in this measurement was read as the concentration in the vicinity of the top surface in the value where the numerical value is constant. The carbon concentration of the base substrate was smaller than that of the single crystal semiconductor layer made of GaN.

(Example 2)
The base substrate was attached to the substrate holder 123 of the HVPE apparatus 100 (see FIG. 2) to form a single crystal semiconductor layer made of GaN. The base substrate was a GaN free-standing substrate having a growth surface having a diameter of 2 inches and a + c plane. A single crystal semiconductor layer formed of GaN was formed using hydrogen chloride (HCl) gas as a halogen-containing gas, Ga as a Group III source, ammonia (NH ₃ ) gas as a nitrogen source gas, and H ₂ as a carrier gas. Methane (CH ₄ ) was used as a doping gas, and carbon was contained as an impurity in the single crystal semiconductor layer made of GaN.

The growth temperature is 1040 ° C., the supply amount of HCl gas is 400 cc / min, the supply amount of NH ₃ gas is 1 L / min, and the supply amount of CH ₄ gas is 50 cc / min. The amount of carrier gas supplied was 17.7 L / min, and a single crystal semiconductor layer of 20 μm in thickness made of GaN was formed over the base substrate.

The concentration of carbon contained in the vicinity of the exposed surface of the formed single crystal semiconductor layer of GaN measured by SIMS analysis was 3.0 × 10 ¹⁹ atoms / cm ³ .

(Example 3)
In the same manner as in Examples 1 and 2, a plurality of laminated structures in which a single crystal semiconductor layer made of GaN is formed on a base substrate made of GaN are formed. Note that by adjusting the growth conditions at the time of forming the single crystal semiconductor layer made of GaN, the concentration of C doped in the single crystal semiconductor layer made of GaN in each stacked structure is made different from each other.

  FIG. 5 shows the a-axis lattice constant and the c-axis lattice constant of the single crystal semiconductor layer made of GaN in each of the plurality of stacked structures. “M-1”, “M-2”, “M-3”, and “M-4” are samples in which a single crystal semiconductor layer made of GaN is formed by MOCVD. The magnitude relationship of the doping concentration of C is "M-4" <"M-3" <"M-2" <"M-1". "H-1", "H-2", and "H-3" are the samples which formed the single-crystal semiconductor layer which consists of GaN by HVPE. The magnitude relationship of the doping concentration of C is “H−3” <“H−2” <“H−1”.

  The concentration of C was measured by SIMS, and the lattice constant was measured on the surface of the central portion of the single crystal semiconductor layer made of GaN using a reciprocal lattice mapping measuring means of (10-15). Since the literature value of the a-axis lattice constant of GaN without treatment such as carbon doping is 3.189 Å and the literature value of the c-axis lattice constant is 5.185 Å, according to FIG. It can be seen that both the axial lattice constant and the c-axis lattice constant are expanding. Also, it can be seen that as the doping concentration of C increases, both the a-axis lattice constant and the c-axis lattice constant increase.

Then, according to the present embodiment, according to the result of FIG. 5, according to the present embodiment, In _x Ga _1−x N (0 ≦ x ≦ 1), and the lattice constant in the c axis direction is L1 (0.575x + 5.185). Assuming that L2 is L, change rate (L1−L2) / L2 of L1 based on L2 is 0.386 × 10 ⁻⁴ or more and 4.243 × 10 ⁴ or less, and the lattice constant in the a-axis direction When M1 is M1 and (0.359x + 3.189) Å is M2, the rate of change (M1-M2) / M2 of M1 based on M2 is 0.314 × 10 ⁻⁴ or more and 4.077 × 10 ⁻ It can be seen that a single crystal semiconductor layer having a thickness of ⁴ or less, a self-supporting substrate including the single crystal semiconductor layer, and a stacked structure can be realized.

  The inventors of the present invention, instead of carbon, Mg, P, S, Cl, Ca, Ti, V, As, Se, Sr, Zr, Nb, Ag, Sn, Te, I, Ba, Hf, W It has been confirmed that similar results can be obtained also when Bi, etc. are used.

  Although the embodiments of the present invention have been described above with reference to the drawings, these are merely examples of the present invention, and various configurations other than the above can also be adopted.

Hereinafter, an example of a reference form is added.
1. In _x Ga _1-x N (0 ≦ x ≦ 1),
Assuming that the lattice constant in the c-axis direction is L1 and (0.575x + 5.185) Å is L2, the rate of change (L1-L2) / L2 of L1 based on L2 is 0.386 × 10 ⁻⁴ or more 4.243 × 10 ^-4 or less,
Assuming that the lattice constant in the a-axis direction is M1 and (0.359x + 3.189) Å is M2, the rate of change (M1-M2) / M2 of M1 based on M2 is 0.314 × 10 ⁻⁴ or more A single crystal semiconductor layer which is 4.077 × 10 ⁻⁴ or less.
2. In the single crystal semiconductor layer described in 1,
An impurity containing any of C, Mg, P, S, Cl, Ca, Ti, V, As, Se, Sr, Zr, Nb, Ag, Sn, Te, I, Ba, Hf, W, Bi A doped single crystal semiconductor layer.
3. In the single crystal semiconductor layer described in 2,
C is doped as the impurity,
The single crystal semiconductor layer in which the concentration of C in the vicinity of the surface is 5 × 10 ¹⁸ atoms / cm ³ or more and 1 × 10 ²¹ atoms / cm ³ or less.
4. A free-standing substrate comprising the single crystal semiconductor layer according to any one of 1 to 3.
5. A laminated structure including the single crystal semiconductor layer according to any one of 1 to 3.
6. A preparation step of preparing a base substrate;
Wherein on the base _substrate, is composed of _{In x Ga 1-x N (} 0 ≦ x ≦ 1), the lattice constant of c-axis direction is L1, when a L2 a (0.575x + 5.185) Å, L2 The change rate (L1-L2) / L2 of L1 is 0.386 × 10 ⁻⁴ or more and 4.243 × 10 ⁻⁴ or less, and the lattice constant in the a-axis direction is M1 (0.359 × + 3). .189) A single crystal semiconductor layer in which the change ratio (M1-M2) / M2 of M1 based on M2 is 0.314 × 10 ⁻⁴ or more and 4.077 × 10 ⁻⁴ or less, where M2 is M 2 A growth process to form
A method for manufacturing a single crystal semiconductor layer having
7. In the method of manufacturing a single crystal semiconductor layer according to 6,
In the growth step, any of C, Mg, P, S, Cl, Ca, Ti, V, As, Se, Sr, Zr, Nb, Ag, Sn, Te, I, Ba, Hf, W, and Bi. A method for manufacturing a single crystal semiconductor layer, wherein the single crystal semiconductor layer is doped with an impurity containing a dopant.
8. In the method of manufacturing a single crystal semiconductor layer according to 7,
In the growth step, C is doped as the impurity, and the single crystal semiconductor layer having a concentration of C in the vicinity of the surface of 5 × 10 ¹⁸ atoms / cm ³ or more and 1 × 10 ²¹ atoms / cm ³ or less is formed. Method for manufacturing a single crystal semiconductor layer.
9. In the method of manufacturing a single crystal semiconductor layer according to 7 or 8,
Before the growth step, a determination step of determining the concentration of the impurity to be doped in the single crystal semiconductor layer based on the target values of the lattice constant in the c axis direction and the lattice constant in the a axis direction of the single crystal semiconductor layer And a method of manufacturing a single crystal semiconductor layer.
10. A preparation step of preparing a base substrate;
Wherein on the base _substrate, is composed of _{In x Ga 1-x N (} 0 ≦ x ≦ 1), the lattice constant of c-axis direction is L1, when a L2 a (0.575x + 5.185) Å, L2 The change rate (L1-L2) / L2 of L1 is 0.386 × 10 ⁻⁴ or more and 4.243 × 10 ⁻⁴ or less, and the lattice constant in the a-axis direction is M1 (0.359 × + 3). .189) A single crystal semiconductor layer in which the change ratio (M1-M2) / M2 of M1 based on M2 is 0.314 × 10 ⁻⁴ or more and 4.077 × 10 ⁻⁴ or less, where M2 is M 2 A growth process to form
A method of manufacturing a free standing substrate having:
11. A preparation step of preparing a base substrate;
Wherein on the base _substrate, is composed of _{In x Ga 1-x N (} 0 ≦ x ≦ 1), the lattice constant of c-axis direction is L1, when a L2 a (0.575x + 5.185) Å, L2 The change rate (L1-L2) / L2 of L1 is 0.386 × 10 ⁻⁴ or more and 4.243 × 10 ⁻⁴ or less, and the lattice constant in the a-axis direction is M1 (0.359 × + 3). .189) A single crystal semiconductor layer in which the change ratio (M1-M2) / M2 of M1 based on M2 is 0.314 × 10 ⁻⁴ or more and 4.077 × 10 ⁻⁴ or less, where M2 is M 2 A growth process to form
The manufacturing method of the laminated structure which has.

100 HVPE apparatus 121 reaction tube 122 growth region 123 substrate holder 124 first gas supply pipe 125 doping gas supply pipe 126 second gas supply pipe 127 group III raw material 128 source boat 129 first heater 130 second heater 132 rotation Shaft 133 Substrate 135 Gas discharge pipe 136 Shielding plate 137 Nitrogen source gas supply unit 139 Group III gas supply unit

Claims (4)

A preparation step of preparing a base substrate;
Wherein on the base _substrate, is composed of _{In x Ga 1-x N (} 0 ≦ x ≦ 1), the lattice constant of c-axis direction is L1, when a L2 a (0.575x + 5.185) Å, L2 The change rate (L1-L2) / L2 of L1 is 0.386 × 10 ⁻⁴ or more and 4.243 × 10 ⁻⁴ or less, and the lattice constant in the a-axis direction is M1 (0.359 × + 3). .189) A single crystal semiconductor layer in which the change ratio (M1-M2) / M2 of M1 based on M2 is 0.314 × 10 ⁻⁴ or more and 4.077 × 10 ⁻⁴ or less, where M2 is M 2 A growth process to form
Prior to the growth step, a determination step of determining the concentration of an impurity to be doped in the single crystal semiconductor layer based on target values of the lattice constant in the c axis direction and the lattice constant in the a axis direction of the single crystal semiconductor layer; ,
A method for manufacturing a single crystal semiconductor layer having In the method of manufacturing a single crystal semiconductor layer according to claim 1,
In the growth step, C is doped as an impurity, and the single crystal has a C concentration of 5 × 10 ¹⁸ atoms / cm ³ or more and 1 × 10 ²¹ atoms / cm ³ or less in a region having a depth from the surface of 15 μm or less A method for manufacturing a single crystal semiconductor layer for forming a semiconductor layer. The manufacturing method of the self-supporting substrate containing the manufacturing method of the single-crystal semiconductor layer of Claim 1 or 2 . The manufacturing method of the laminated structure containing the manufacturing method of the single-crystal semiconductor layer of Claim 1 or 2 .