JP6520782B2 - Evaluation method and manufacturing method of epitaxial wafer - Google Patents

Description

  The present invention relates to an epitaxial wafer evaluation method and manufacturing method.

  Semiconductor wafers for CIS (CMOS image sensors) and power devices are required to have a long lifetime, and in order to avoid a decrease in the lifetime, a low carbonization of the wafer is required. In addition, it is also required to make the resistivity in the wafer plane uniform. Therefore, in epitaxial wafers (sometimes referred to as EPW) used for these applications, carbon and dopants (such as boron and phosphorus), defects, and impurities of the epitaxial layer (sometimes referred to as EP layer) Such high-precision evaluation is required.

  Among the evaluation methods of the epitaxial layer, although the carbon concentration can be measured by FT-IR, it is not possible to evaluate only the epitaxial layer because of the transmission method, and the measurement sensitivity is worse compared to the current required level. In comparison, the low temperature photoluminescence (PL) method is highly sensitive. In addition, since the low temperature PL method can independently determine the concentrations of boron and phosphorus (Non-Patent Document 1), it is considered to be suitable for the above evaluation.

  The PL method is described below. First, when light of energy larger than the band gap is used as an excitation source and excitation light is irradiated to a silicon wafer, excited electron-hole pairs are formed. The PL method is a method of detecting luminescence (luminescence) when these are recombined via a metastable state, and evaluating and quantifying defects and impurities present in a silicon wafer.

  In the PL method, since the evaluation can be performed at the penetration depth according to the wavelength of excitation light, it is considered to be applicable to the evaluation of an epitaxial layer formed on a substrate (silicon wafer) for epitaxial layer growth. For example, the penetration depth of laser light of wavelength 532 nm into silicon is 0.8 to 0.9 μm, and it is considered that evaluation of only the epitaxial layer is possible if the epitaxial layer is thicker than that. However, the penetration depth of the excitation light here is the depth at which the intensity is 1 / e, and some light penetrates to a deeper region. Also, the formed electron-hole pairs diffuse in the silicon wafer. Therefore, particularly in the case of an epitaxial wafer, there are many documents that detect light emission not only from the epitaxial layer but also from the substrate (Patent Documents 1 to 6).

  Patent Document 1 describes a method in which a substrate is etched away to leave only an epitaxial layer. Patent Document 2 describes a method of using a low resistivity substrate as the substrate. Patent Document 3 describes a method of performing PL measurement with two types of excitation light and solving the diffusion equation to extract only data of the epitaxial layer. Patent Document 4 (paragraph 0033) describes a method of changing the wavelength of excitation light. Patent Document 5 describes a method of simulating the relationship between the defect depth position and the PL intensity for each temperature, actually performing PL measurement for each temperature, and determining the depth at which a defect or contamination exists from the comparison. . Further, Patent Document 6 discloses a method of detecting PL from the front surface and the back surface and evaluating defects of the epitaxial layer from the difference between them.

  However, although the method described in Patent Document 1 does not have a substrate, it is possible to evaluate only the epitaxial layer, but since the substrate is absent, the thickness is thin and handling is difficult (the epitaxial layer is broken).

  The method of Patent Document 2 can not evaluate only the epitaxial layer because it is affected by the surface layer of the substrate.

  In the method of Patent Document 3, PL measurement using two types of excitation light means that the number of measurement steps is doubled, and it is not easy to solve the diffusion equation.

  In the method of Patent Document 4, as described above, the excitation light reaches a depth deeper than the penetration depth, and electron-hole pairs diffuse in the wafer, so only the epitaxial layer is changed when the wavelength of the excitation light is changed. Can not be evaluated.

  In the method of Patent Document 5, it takes time and effort to create a temperature-dependent depth-dependent graph, and the specific method is not disclosed and is unknown. Furthermore, measuring PL by temperature also requires a large number of man-hours.

  In the method of Patent Document 6, the measurement depth when measured from the front surface and the measurement depth when measured from the back surface naturally differ from each other, and there is a depth distribution in defects and contamination of the bulk (substrate). Even if the difference of PL data from the above is taken, it does not become data of the epitaxial layer.

Japanese Examined Patent Publication 7-32182 JP-A-8-139146 JP 2002-83852 A JP, 2014-199253, A JP, 2011-60861, A JP, 2008-198913, A

JIS H0615

  The present invention has been made in view of the above problems, and prevents diffusion of generated electron-hole pairs in photoluminescence measurement, and accurately and simply evaluates defects and contamination of the epitaxial layer of the epitaxial wafer. It is an object of the present invention to provide an evaluation method of an epitaxial wafer that can be performed. Another object of the present invention is to provide an epitaxial wafer manufacturing method capable of manufacturing an epitaxial wafer with reduced defects and contamination.

In order to achieve the above object, the present invention is a method of evaluating an epitaxial wafer in which an epitaxial layer made of single crystal silicon is grown on the single crystal silicon of a growth wafer having single crystal silicon,
Preparing an SOI wafer having a base substrate of single crystal silicon, a buried insulating film, and an SOI layer of single crystal silicon as the growth wafer;
Growing an epitaxial layer to be evaluated on the SOI layer of the growth wafer to form an epitaxial wafer;
And a step of evaluating the epitaxial layer to be evaluated by irradiating excitation light from the surface of the epitaxial layer to be evaluated to perform photoluminescence measurement, and providing a method of evaluating an epitaxial wafer. .

  As described above, by growing the epitaxial layer to be evaluated on the SOI layer of the SOI wafer and performing photoluminescence measurement from the epitaxial layer side, the electron-hole pairs generated by the excitation light in the epitaxial layer are Recombination mainly occurs in the epitaxial layer without passing through the buried insulating film. Therefore, the influence of the diffusion of electron-hole pairs into the base substrate can be eliminated, and the epitaxial layer can be evaluated accurately and simply.

  At this time, it is preferable to set the thickness of the SOI layer in the growth wafer to 1 μm or less. Further, the thickness of the SOI layer in the growth wafer is more preferably 0.5 μm or less.

  As described above, if the thickness of the SOI layer in the growth wafer is reduced to 1 μm or less, particularly 0.5 μm or less, the number of electron-hole pairs recombining in the SOI layer is smaller, so that it is more accurate. An evaluation of the epitaxial layer can be performed.

Further, in the method of evaluating an epitaxial wafer according to the present invention, before the step of growing the epitaxial layer to be evaluated on the SOI layer of the wafer for growth,
As a research SOI wafer, an SOI wafer having a base substrate made of single crystal silicon, a buried insulating film, and an SOI layer made of single crystal silicon different in conductivity type from the base substrate is made different in thickness of the SOI layer. Process of preparing multiple sheets,
The photoluminescence measurement is performed by irradiating excitation light from the surface of the SOI layer of the plurality of prepared SOI wafers for investigation.
Determining a thickness A of an SOI layer in which excitation light used for the photoluminescence measurement does not reach the base substrate of the investigation SOI wafer;
Preferably, the epitaxial layer to be evaluated is grown on the SOI layer of the wafer for growth with a thickness of A or more to evaluate the epitaxial layer to be evaluated.

  As described above, the thickness A of the SOI layer in which the excitation light does not reach the base substrate is obtained, and the epitaxial layer to be evaluated is grown with a thickness of A or more, whereby the excitation light reaches the base substrate in the growth wafer. Since the influence of light emission in the base substrate can be eliminated, the evaluation of the epitaxial layer can be performed more accurately.

  At this time, when the thickness A is determined, the dopant concentration which is detected by photoluminescence measurement on the investigation SOI wafer and which shows the same conductivity type as the base substrate is determined from the resistivity of the base substrate The thickness of the SOI layer of the investigation SOI wafer which is not more than 5% of the above can be determined, and the thickness can be made the thickness A.

  If the thickness A of the SOI layer is determined on the basis of such a standard, and the epitaxial layer to be evaluated which is larger than the thickness is grown, the epitaxial layer to be evaluated is hardly influenced by the base substrate of the growth wafer. Impurity contamination and defects can be detected with higher accuracy. In addition, the epitaxial layer to be evaluated can be easily evaluated.

At this time, in addition to performing photoluminescence measurement from the surface of the SOI layer of the investigation SOI wafer when obtaining the thickness A, photoluminescence measurement also from the surface of the base substrate of the investigation SOI wafer Do,
Dopant concentration indicating the same conductivity type as the base substrate detected by photoluminescence measurement from the surface of the SOI layer of the investigation SOI wafer is detected by photoluminescence measurement from the surface of the base substrate of the investigation SOI wafer The thickness of the SOI layer of the investigation SOI wafer which is equal to or less than 5% of the dopant concentration showing the same conductivity type as the base substrate may be determined, and the thickness may be the thickness A.

  If the thickness A of the SOI layer is determined on the basis of such a standard, and the epitaxial layer to be evaluated which is larger than the thickness is grown, the epitaxial layer to be evaluated is hardly influenced by the base substrate of the growth wafer. Impurity contamination and defects can be detected with higher accuracy.

  In the method of evaluating an epitaxial wafer according to the present invention, the thickness of the epitaxial layer to be evaluated, which is grown on the SOI layer of the wafer for growth, is preferably 10 μm or more.

  As described above, when the thickness of the epitaxial layer to be evaluated is 10 μm or more, since the excitation light hardly reaches the base substrate, it is possible to evaluate only the epitaxial layer to be evaluated.

  Further, it is preferable that the conductivity type of the SOI layer of the growth SOI wafer and the conductivity type of the epitaxial layer to be evaluated formed on the SOI layer be the same.

  As described above, if the conductivity types of the SOI layer and the epitaxial layer are the same, there is no need to consider the influence of the PN junction formed at the interface between the SOI layer and the epitaxial layer in the case of the opposite conductivity type. It can be performed. Also, in the evaluation of the epitaxial layer, when a dopant of the conductivity type opposite to that of the SOI layer and the epitaxial layer is detected, it is not the major dopant of the SOI layer but the contamination introduced in the epitaxial layer growth step. It can be estimated that

  At this time, it is preferable that the conductivity types of the base substrate of the growth SOI wafer, the SOI layer, and the epitaxial layer to be evaluated formed on the SOI layer be the same.

  As described above, if the conductivity type of the base substrate of the growth SOI wafer, the SOI layer, and the epitaxial layer to be evaluated formed on the SOI layer are the same, the influence of the PN junction at the interface between the SOI layer and the epitaxial layer, etc. There is no need to take account of In addition, when a dopant of a conductivity type opposite to that of the base substrate, the SOI layer, and the epitaxial layer is detected in the evaluation of the epitaxial layer, it is not the major dopant of the SOI layer or the base substrate but the epitaxial layer It can be estimated that this is the contamination introduced in the growth process.

  Further, in order to achieve the above object, the present invention relates to the growth condition of an epitaxial layer of an epitaxial wafer judged to be a non-defective product by the evaluation method of the epitaxial wafer described above, on the single crystal silicon Provided is a method of manufacturing an epitaxial wafer characterized by performing growth of an epitaxial layer made of single crystal silicon.

  Such a method of manufacturing an epitaxial wafer can provide an epitaxial wafer with reduced defects and contamination with certainty.

  According to the evaluation method of the epitaxial wafer of the present invention, in the PL measurement of the epitaxial layer formed on the wafer for growth, the influence of the wafer for growth is excluded and defects and contamination of only the epitaxial layer are evaluated accurately and simply. be able to. Moreover, according to the method of manufacturing an epitaxial wafer of the present invention, an epitaxial wafer with reduced defects and contamination can be provided.

It is a figure which shows the process flow of one aspect | mode of the evaluation method of the epitaxial wafer of this invention. It is the schematic which shows the structure of the wafer for growth, and an epitaxial layer. It is a figure which shows a part of process flow of another aspect of the evaluation method of the epitaxial wafer of this invention. It is the schematic which shows the structure of the SOI wafer for investigation.

  Hereinafter, the present invention will be described in detail with reference to the drawings, but the present invention is not limited thereto.

  First, an example (first embodiment) of the embodiment of the method for evaluating an epitaxial wafer of the present invention will be described with reference to FIGS. 1 and 2. FIG.

  The present invention is an evaluation method of an epitaxial wafer in which an epitaxial layer made of single crystal silicon is grown on single crystal silicon of a growth wafer having single crystal silicon. FIG. 1 is a diagram showing a process flow of an epitaxial wafer evaluation method of the present invention. FIG. 2 is a schematic view showing the configuration of a growth wafer (SOI wafer) and an epitaxial layer on the SOI layer applied to the method of evaluating an epitaxial wafer according to the present invention. In the method of evaluating an epitaxial wafer according to the present invention, first, an SOI wafer having a base substrate 1 of single crystal silicon, a buried insulating film 3 and an SOI layer 5 of single crystal silicon is prepared as a growth wafer 10 (FIG. 1) a). Next, the epitaxial layer 7 to be evaluated is grown on the SOI layer 5 of the growth wafer 10 to form an epitaxial wafer 13 (B in FIG. 1). Furthermore, the epitaxial layer 7 to be evaluated is evaluated by performing photoluminescence measurement by irradiating excitation light from the surface of the epitaxial layer 7 to be evaluated (C in FIG. 1). At this time, it is preferable to perform the growth of the epitaxial layer 7 to be evaluated under the growth conditions to be actually evaluated.

  As shown in FIG. 2, a buried insulating film 3 is present between the base substrate 1 and the SOI layer 5 of the SOI wafer. As the buried insulating film 3, a silicon oxide film (Buried Oxide: BOX) layer can be suitably used. Since the electron-hole pairs excited by the excitation light can not pass through the insulating film (oxide film), the electron-hole pairs generated in the region above the buried insulating film 3 recombine in the region. Therefore, by growing the epitaxial layer 7 on the SOI layer 5 of the growth wafer 10 and performing PL measurement from the surface of the epitaxial layer 7, it is possible to evaluate almost only the epitaxial layer 7.

  Further, in the method for evaluating an epitaxial wafer of the present invention, the thickness of the SOI layer 5 in the growth wafer 10 can be set to 1 μm or less, more preferably 0.5 μm or less. With such a thickness of the SOI layer, diffusion of electron-hole pairs from the epitaxial layer 7 to the SOI layer 5 on the buried insulating film 3, generation of electron-hole pairs in the SOI layer 5, and It can minimize the impact of recombination. Thus, the thickness of the SOI layer 5 is preferably thin within the range in which an epitaxial layer made of single crystal silicon can be grown.

  In addition, another embodiment (second embodiment) of the method for evaluating an epitaxial wafer of the present invention will be further described with reference to FIGS. 3 and 4. In this embodiment, an appropriate thickness for growing the epitaxial layer 7 to be evaluated in the first embodiment is previously determined. FIG. 3 is a diagram showing part of the process flow of the method of evaluating an epitaxial wafer according to this aspect of the present invention. FIG. 4 is a schematic view showing the structure of a research SOI wafer used in this embodiment. In the method of evaluating an epitaxial wafer according to the present invention shown in FIG. 3, first, in the step of growing the epitaxial layer 7 to be evaluated on the SOI layer 5 of the growth wafer 10 in the first embodiment (FIG. 1B). First, an SOI wafer having a base substrate 21 made of single crystal silicon, a buried insulating film 23, and an SOI layer 25 made of single crystal silicon having a conductivity type different from that of the base substrate 21 as an SOI wafer for investigation (FIG. (A) of FIG. 3 is prepared in such a manner that the thickness d of the SOI layer 25 is made different. At this time, as a method of changing the thickness d of the SOI layer 25, an epitaxial layer of the same conductivity type as the SOI layer may be grown on the SOI layer with a different thickness. Then, excitation light is irradiated from the surface of the SOI layer 25 of the prepared SOI wafer 20 for investigation to conduct photoluminescence measurement (B in FIG. 3), and the excitation light used for the photoluminescence measurement is the SOI for investigation. The thickness A of the SOI layer 25 not reaching the base substrate 21 of the wafer 20 is determined (C in FIG. 3), and the epitaxial layer 7 to be evaluated is formed on the SOI layer 5 of the growth wafer 10 with a thickness of A or more. The epitaxial layer 7 is grown to evaluate the evaluation target epitaxial layer 7 (D in FIG. 3). At this time, it is preferable to perform the growth of the epitaxial layer 7 to be evaluated under the growth conditions to be actually evaluated.

  Even when an SOI wafer is used as a growth wafer, a part of excitation light may pass through the SOI layer to reach the base substrate, electron-hole pairs are generated in the base substrate, and recombination occurs in the base substrate. There is something to do. In this case, the detected PL includes information on defects and contamination of the base substrate. Therefore, it is desirable to grasp the accurate arrival depth of the excitation light (not the depth at which the intensity of the excitation light becomes 1 / e, but the depth at which the intensity of the excitation light becomes almost zero).

  Therefore, as described above, in the investigation SOI wafer 20, an SOI wafer in which the conductivity types of the SOI layer 25 and the base substrate 21 are different and the thickness d of the SOI layer 25 is changed is prepared. For example, the SOI layer 25 can be N-type, and the base substrate 21 can be P-type (when the embedded insulating film is a silicon oxide film, this structure can be expressed as N / BOX / P). With such a structure, since the conductivity types of the SOI layer 25 and the base substrate 21 are different, it is possible to easily distinguish which dopant is used in PL measurement. In the case of the above N / BOX / P structure, PL measurement is performed from the surface of the SOI layer 25, and the thickness A of the SOI layer 25 at which the measured value of boron concentration which is the dopant of the P type base substrate 21 becomes sufficiently low. Ask. The fact that the measured value of boron concentration is sufficiently low in PL measurement from the SOI layer side means that almost all the excitation light is absorbed in the SOI layer 25 without reaching the base substrate 21. As described above, whether or not excitation light passes through the buried insulating film 23 and reaches the base substrate 21 can be determined based on the measured value of the dopant concentration showing the same conductivity type as that of the base substrate 21. Therefore, when evaluating the epitaxial layer 7 to be evaluated in the next step, a growth SOI wafer 10 having a thin SOI layer 5 as thin as possible is newly prepared, and the thickness A described above is prepared. If the above epitaxial layer 7 is grown, the excitation light does not reach the base substrate 1 and it becomes possible to evaluate only the epitaxial layer 7.

  Here, a more specific aspect in determining the thickness A will be described. When the thickness A is determined, the dopant concentration indicating the same conductivity type as the base substrate 21 detected by photoluminescence measurement on the investigation SOI wafer 20 is 5 of the dopant concentration determined from the resistivity of the base substrate 21. The thickness of the SOI layer 25 of the investigation SOI wafer 20 which is not more than% can be obtained, and the thickness can be made the above thickness A.

  As an example, the case where the SOI wafer of the N / BOX / P structure is used as the investigation SOI wafer 20 will be described. In this case, since the base substrate 21 is P-type, attention is focused on boron concentration. The boron concentration of the back surface (the front surface of the base substrate 21) of the investigation SOI wafer 20 is determined by the resistivity of the base substrate 21. Then, if the boron concentration detected from the surface (SOI layer 25 side) of the investigation wafer 20 in PL measurement is 5% or less of the boron concentration obtained from the resistivity of the base substrate 21, the excitation light is the base substrate 21. It can be determined that only the SOI layer 25 on the buried insulating film 23 is being evaluated without reaching to the maximum.

  Further, as a further specific mode when determining the thickness A described above, another mode different from the above will be described. In this case, in addition to performing photoluminescence measurement from the surface of the SOI layer 25 of the investigation SOI wafer 20, photoluminescence measurement can also be performed from the surface of the base substrate 21 of the investigation SOI wafer 20. The photoluminescence measurement of the surface of the base substrate 21 of the investigation SOI wafer 20 can also be performed on the back surface (that is, the surface of the base substrate 21) of the investigation SOI wafer 20 after the investigation SOI wafer 20 is manufactured. It can also be performed on the surface of the base substrate in the state before manufacturing 20.

  Then, the dopant concentration indicating the same conductivity type as that of the base substrate 21 detected by photoluminescence measurement from the surface of the SOI layer 25 of the investigation SOI wafer 20 is a photo from the surface of the base substrate 21 of the investigation SOI wafer 20. The thickness of the SOI layer 25 of the research SOI wafer 20 which is 5% or less of the dopant concentration showing the same conductivity type as the base substrate 21 detected by the luminescence measurement is determined, and the thickness is taken as the above thickness A. be able to.

  Here, according to the inventor's investigation, on the SOI layer of the SOI wafer having different conductivity types of the SOI layer and the base substrate, the same epitaxial layer as the conductivity type of the SOI layer is formed with a different thickness, and the epitaxial layer is formed. The measured value of the dopant concentration of the same conductivity type as that of the base substrate detected by this PL measurement decreases as the thickness of the epitaxial layer increases, and the PL concentration of the base substrate decreases by 5% In the following case, the decrease became very slow like an exponential function. This means that the excitation light does not reach the base substrate, and only the SOI layer on the BOX and the epitaxial layer on the SOI layer are evaluated. For this reason, the excitation light does not reach the base substrate, or reaches the base substrate by using the determination standard whether the dopant concentration of the same conductivity type as the base substrate is 5% or less of the dopant concentration of the base substrate. You can determine if you Furthermore, when the concentration of the dopant is 3% or less or 1% or less of the dopant concentration of the base substrate, it can be determined that the excitation light has not reached the base substrate more reliably.

  Further, the thickness of the epitaxial layer 7 to be evaluated grown on the SOI layer 5 of the growth wafer 10 can be 10 μm or more. When light having a wavelength of 532 nm was used as excitation light for the PL method, it was confirmed that the base substrate could not be reached if the thickness of the SOI layer was 10 μm. More preferably, the thickness of the epitaxial layer 7 to be evaluated can be 15 μm or more, and further 20 μm or more. At the same time, as described above, if the thickness of the SOI layer 5 is 1 μm or less, the influence of the SOI layer 5 can be almost ignored in PL measurement, and the evaluation of only the epitaxial layer 7 to be evaluated becomes more reliable. It can be thought that it is done.

  Further, the conductivity types of the SOI layer 5 of the growth SOI wafer 10 and the epitaxial layer 7 to be evaluated formed on the SOI layer 5 can be made the same. As a result, it is not necessary to take into consideration the influence of formation of a PN junction between the SOI layer 5 and the epitaxial layer 7. In addition, when a dopant of the opposite conductivity type to the dopant introduced into the epitaxial layer 7 is detected in the evaluation of the epitaxial layer 7, it is not the major dopant of the SOI layer 5 but in the growth step of the epitaxial layer 7 to be evaluated. It can be estimated that it is pollution of When the conductivity type of the epitaxial layer 7 is P type, the opposite conductivity type dopant is phosphorus, arsenic or the like, and when the conductivity type of the epitaxial layer 7 is N type, the opposite conductivity type dopant is boron Etc.

  Further, the conductivity types of the base substrate 1 of the growth SOI wafer 10, the SOI layer 5, and the epitaxial layer 7 to be evaluated formed on the SOI layer 5 can be made the same. Thereby, when a dopant of the opposite conductivity type to the dopant introduced into the epitaxial layer 7 is detected in the evaluation of the epitaxial layer 7, it is not the major dopant of the SOI layer 5 or the base substrate 1, but the epitaxial layer to be evaluated. It can be estimated that it is contamination in 7 growth processes.

  Furthermore, in the present invention, under the growth conditions of the epitaxial layer 7 of the epitaxial wafer 13 judged to be non-defective by the evaluation method of the epitaxial wafer described above, an epitaxial consisting of single crystal silicon on the single crystal silicon of the wafer having single crystal silicon. A method of manufacturing an epitaxial wafer for growing a layer is provided. With an epitaxial wafer manufactured by such a method of manufacturing an epitaxial wafer, defects and contamination in the epitaxial layer can be reduced more reliably. The wafer on which the epitaxial layer is grown may be a wafer having single crystal silicon, and may be, for example, a single crystal silicon wafer or an SOI wafer.

  EXAMPLES The present invention will be more specifically described below with reference to examples and comparative examples, but the present invention is not limited to these.

(Example)
A YAG laser with a wavelength of 532 nm was used as excitation light for PL measurement. The penetration depth of light of this wavelength into silicon (depth at which the intensity is 1 / e) is 0.8 to 0.9 μm. The sample for PL measurement was cooled to 4.2 K with liquid helium and measured by the so-called low temperature PL method.

First, in order to understand the exact arrival depth of the excitation light (not the depth at which the intensity becomes 1 / e, but the depth at which the intensity of the excitation light becomes almost zero), the structure of N / BOX / P described above An investigation SOI wafer 20 was prepared. The resistivity of the base substrate 21 is 10 Ωcm, and the boron concentration of the base substrate 21 at this time is 1.3 × 10 ¹⁵ atoms / cm ³ . The resistivity of the SOI layer 25 is also 10 Ωcm, and the phosphorus concentration of the SOI layer 25 at this time is 4.4 × 10 ¹⁴ atoms / cm ³ . The base substrate 21 is a p-type single crystal silicon substrate, the buried insulating film 23 is a silicon oxide film, and the SOI layer 25 is n-type single crystal silicon.

The thickness of the SOI layer 25 in the above-described SOI wafer for investigation 20 was set to three levels of 4 μm, 10 μm, and 15 μm. When PL measurement of the SOI wafer 20 having the SOI layer 25 is performed from the surface of the SOI layer 25, when the thickness of the SOI layer 25 is 4 μm, both phosphorus and boron are detected, and boron is more preferable than phosphorus. It was high concentration. At this time, the measured value of boron concentration was 3.3 × 10 ¹⁴ atoms / cm ³ , which was 25% of the boron concentration of the base substrate 21. When the thickness of the SOI layer 25 was 10 μm and 15 μm, the boron concentration was measured at 5% or less of the boron concentration of the base substrate 21 and phosphorus was detected at a concentration corresponding to the resistivity of the SOI layer 25. The above results indicate that when the thickness of the SOI layer 25 is 4 μm, the excitation light penetrates to the base substrate 21 and its dopant (boron) is also detected, and the thickness of the SOI layer 25 is 10 μm or more In this case, the excitation light does not reach the base substrate 21 and it means that only the SOI layer 25 can be evaluated.

In addition, the investigation SOI wafer 20 of the P / BOX / N structure having a thickness of 3 μm and 10 μm of the SOI layer 25 (that is, the base substrate 21 is N-type single crystal silicon, the buried insulating film 23 is a silicon oxide film, SOI layer No. 25 is P type single crystal silicon.) Was also prepared and the same evaluation was performed. The resistivity of the base substrate 21 is 10 Ωcm, and the phosphorus concentration is 4.4 × 10 ¹⁴ atoms / cm ³ . The resistivity of the SOI layer 25 is also 10 Ωcm, and the boron concentration is 1.3 × 10 ¹⁵ atoms / cm ³ .

PL measurement was performed from the surface of the SOI layer 25 of these SOI wafers 20. When the thickness of the SOI layer 25 was 3 μm, both boron and phosphorus were detected, and the concentration of phosphorus was higher than that of boron. At this time, the measured value of the phosphorus concentration was 2.2 × 10 ¹⁴ atoms / cm ³ , which was 50% of the phosphorus concentration of the base substrate 21. On the other hand, when the thickness of the SOI layer 25 was 10 μm, the measured value of the phosphorus concentration was 5% or less of the phosphorus concentration of the base substrate 21 and boron was detected at a concentration corresponding to the resistivity of the SOI layer 25. That is, when the thickness of the SOI layer 25 is 3 μm, the excitation light passes through the buried insulating film 23 to reach the base substrate 21 (N-type, phosphorus doped), but when the thickness is 10 μm, the excitation light It was confirmed that only the SOI layer 25 could be evaluated without reaching the base substrate 21.

  From the above results, in PL measurement with excitation light having a wavelength of 532 nm, the diffusion of electron-hole pairs is prevented by the buried insulating film 23 by growing the epitaxial layer by 10 μm or more on the (thin) SOI layer 25. In addition, it has been found that electron-hole pairs are not generated in the base substrate 21 and evaluation of only the epitaxial layer by the PL method is possible.

  Next, by setting the thickness of the epitaxial layer 7 formed on the growth wafer 10 to 10 μm, it was confirmed as follows that evaluation of only the epitaxial layer 7 could be performed by the PL method. Aside from the investigation SOI wafer 20, a SOI wafer having a P / BOX / N structure was newly prepared as a growth wafer 10. The thickness of the SOI layer 5 of the growth wafer 10 was 0.2 μm. A P-type epitaxial layer 7 was grown to a thickness of 10 μm on the SOI layer 5 of the growth wafer 10. When PL measurement is performed from both the surface (P-type) of the epitaxial layer 7 and the back surface (the surface of the base substrate 1, N-type) of the epitaxial wafer 13, only boron which is a P-type dopant is observed from the surface of the epitaxial layer 7. Is detected at a concentration corresponding to the resistivity of the epitaxial layer 7. On the other hand, from the back surface of the epitaxial wafer 13 (the front surface of the base substrate 1), only phosphorus, which is an N-type dopant, was detected at a concentration corresponding to the resistivity of the base substrate 1. From the above, it can be confirmed that only the epitaxial layer 7 to be evaluated can be evaluated by setting the film thickness of the epitaxial layer 7 to be evaluated on the SOI wafer to 10 μm.

  In addition to the SOI wafer having the P / BOX / N structure described above, an SOI wafer having a P / BOX / P structure was newly prepared as the growth wafer 10. The thickness of the SOI layer 5 of this SOI wafer was 0.2 μm. At each time point before and after the chamber maintenance of the reactor of the epitaxial growth apparatus, the P type epitaxial layer 7 was grown to a thickness of 10 μm on the growth wafer 10 prepared here. Thereafter, the dopant concentration was measured from the surface of the epitaxial layer 7 by the low temperature PL method.

  When the above-described SOI wafer was used as the growth wafer 10, it was confirmed in PL measurement that the phosphorus concentration of the epitaxial layer 7 was lower after the chamber maintenance, and the cleanliness of the reactor was improved.

(Comparative example)
A P-type single crystal silicon substrate was prepared as a wafer for growing an epitaxial layer. Then, in the same manner as in the example, a P-type epitaxial layer was grown to a thickness of 10 μm on the prepared P-type single crystal silicon substrate before and after the chamber maintenance of the reactor of the epitaxial growth apparatus. Thereafter, as in the example, the dopant concentration was measured from the surface of the epitaxial layer by a low temperature PL method in which the wavelength of excitation light is 532 nm.

  In the comparative example, no difference was observed in the measured values of the phosphorus concentration before and after the chamber maintenance, and phosphorus was detected at a higher concentration than in the example. This is considered to be because the phosphorus of the impurity contained in the P type single crystal silicon substrate used as a substrate for epitaxial layer growth is detected because there is no embedded insulating film in the comparative example.

  If the excitation light in the PL measurement is changed, the accurate reach depth of the excitation light may be obtained by the same method, and the epitaxial layer 7 having a thickness corresponding to that may be grown on the SOI layer 5. For example, if light having a short wavelength such as ultraviolet light is used as the excitation light, the arrival depth (and penetration depth) to silicon becomes shorter, and evaluation of the thinner epitaxial layer 7 also becomes possible.

  The present invention is not limited to the above embodiment. The above embodiment is an exemplification, and it has substantially the same configuration as the technical idea described in the claims of the present invention, and any one having the same function and effect can be used. It is included in the technical scope of the invention.

1, 21: base substrate, 3, 23: embedded insulating film, 5, 25: SOI layer,
7 ... (evaluated) epitaxial layer, 10 ... wafer for growth,
13 ... epitaxial wafer, 20 ... SOI wafer for investigation.

Claims (10)

An evaluation method of an epitaxial wafer in which an epitaxial layer made of single crystal silicon is grown on the single crystal silicon of a growth wafer having single crystal silicon,
Preparing an SOI wafer having a base substrate of single crystal silicon, a buried insulating film, and an SOI layer of single crystal silicon as the growth wafer;
Growing an epitaxial layer to be evaluated on the SOI layer of the growth wafer to form an epitaxial wafer;
And a step of evaluating the epitaxial layer to be evaluated by irradiating excitation light from the surface of the epitaxial layer to be evaluated to perform photoluminescence measurement, and evaluating the epitaxial wafer.   2. The method of evaluating an epitaxial wafer according to claim 1, wherein the thickness of the SOI layer in the growth wafer is set to 1 μm or less.   The method for evaluating an epitaxial wafer according to claim 2, wherein a thickness of the SOI layer in the growth wafer is set to 0.5 μm or less. Before the step of growing the epitaxial layer to be evaluated on the SOI layer of the growth wafer,
As a research SOI wafer, an SOI wafer having a base substrate made of single crystal silicon, a buried insulating film, and an SOI layer made of single crystal silicon different in conductivity type from the base substrate is made different in thickness of the SOI layer. Process of preparing multiple sheets,
The photoluminescence measurement is performed by irradiating excitation light from the surface of the SOI layer of the plurality of prepared SOI wafers for investigation.
Determining a thickness A of an SOI layer in which excitation light used for the photoluminescence measurement does not reach the base substrate of the investigation SOI wafer;
The epitaxial layer to be evaluated is grown on the SOI layer of the wafer for growth with a thickness of A or more, and the epitaxial layer to be evaluated is evaluated. The evaluation method of the epitaxial wafer as described in any one of 3.   When the thickness A is determined, the dopant concentration indicating the same conductivity type as the base substrate, detected by photoluminescence measurement on the investigation SOI wafer, is 5% of the dopant concentration determined from the resistivity of the base substrate The method for evaluating an epitaxial wafer according to claim 4, wherein a thickness of an SOI layer of the investigation SOI wafer to be described below is obtained, and the thickness is set to the thickness A. When obtaining the thickness A, in addition to performing photoluminescence measurement from the surface of the SOI layer of the SOI wafer for investigation, photoluminescence measurement is also performed from the surface of the base substrate of the SOI wafer for investigation,
Dopant concentration indicating the same conductivity type as the base substrate detected by photoluminescence measurement from the surface of the SOI layer of the investigation SOI wafer is detected by photoluminescence measurement from the surface of the base substrate of the investigation SOI wafer The thickness of the SOI layer of the investigation SOI wafer which is equal to or less than 5% of the dopant concentration showing the same conductivity type as the base substrate is determined, and the thickness is taken as the thickness A. The evaluation method of the epitaxial wafer of claim 4.   7. The evaluation of the epitaxial wafer according to any one of claims 1 to 6, wherein the thickness of the epitaxial layer to be evaluated to be grown on the SOI layer of the wafer for growth is 10 μm or more. Method. Epitaxial according to any one of claims 1 to 7, characterized in that the same conductivity type of the evaluation of the epitaxial layer formed on SOI layer and the SOI layer of the growth window Eha Wafer evaluation method. Base substrate of the growth window Eha, SOI layer, and any one of claims 1 to 8, characterized in that the same conductivity type of the evaluation of the epitaxial layer formed on the SOI layer The evaluation method of the epitaxial wafer as described in. A growth condition of an epitaxial layer of an epitaxial wafer judged to be non-defective by the evaluation method of an epitaxial wafer according to any one of claims 1 to 9, wherein the single crystal silicon single wafer is single crystalline silicon. A method of manufacturing an epitaxial wafer comprising growing an epitaxial layer of crystalline silicon.

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