JP6382084B2 - Chip parts manufacturing method - Google Patents

Description

  The present invention relates to a chip component manufacturing method for forming a chip component from a substrate.

  2. Description of the Related Art Conventionally, as a method of forming a chip component from a substrate, a circuit pattern is previously formed in a chip component formation region of the substrate using a resist pattern as a mask and then cut by dicing along the outer periphery of the chip component formation region. As shown in Document 1, a manufacturing method is known in which a predetermined electrode is formed on the outer surface of a chip after a cut groove is formed in a substrate.

  An example of a chip component manufacturing method for forming a chip from a conventional substrate will be described with reference to the drawings. As shown in FIG. 7, a plurality of chip components 101 are formed on the substrate 100, and a circuit pattern 102 and an electrode 103 are formed on each chip component 101.

  After the circuit pattern 102 and the electrode 103 are formed, a cutting groove 114 along the outer periphery of the chip component 101 is formed on the substrate 100 by the dicing blade 113, and the circuit pattern 102 and the electrode 103 are formed on the upper surface 104 as shown in FIG. An individual chip component 101 having an electrode 103 and having a cut surface 106 on the side surface is obtained.

  It is also known to use DRIE (Deep-Reactive Ion Etching) as a method for forming a cut groove in a substrate. The cross-sectional shape of the cutting groove formed by DRIE varies depending on the mask, and a cutting groove with high perpendicularity can be formed by using a mask having a narrow opening.

JP 2008-251752 A

  As shown in FIG. 8, the cut surface (side surface) 106 of the chip component 101 cut by the dicing blade 113 is in a rough state, and the angle formed by the upper surface 104 of the chip component 101 and the cut surface (side surface) 106 is as follows. It will deviate greatly with respect to 90 degrees. For this reason, when the positional accuracy of the chip component 101 is required, the cut surface (side surface) 106 cannot be used as the reference surface. In the case of an application where an optical functional component is placed on the upper surface 104 of the chip component 101 and positioning accuracy is required with respect to the cut surface 106, the above-described cut surface (side surface) 106 greatly increases the optical coupling efficiency. It will decrease.

  In addition, it is known that the angle formed between the side surface and the top surface is vertical by using DRIE. However, in order to form the side surface vertically by using DRIE, in order to level the etching gas penetration property. It is necessary to use a mask having a relatively narrow opening. However, in order to form a film on a side surface formed perpendicularly by DRIE by vapor deposition or sputtering, the film is difficult to be formed because the film material is difficult to enter because the opening is narrow.

  An object of the present invention is to provide a chip component manufacturing method that can form side surfaces with high verticality and can easily form films on the side surfaces.

In the chip component manufacturing method for forming a a singulated plurality of chip component substrate, and the resist pattern forming step of forming a resist pattern on the surface of the substrate, a resist pattern as a mask, the substrate is etched, the chip component at least one After the first slit forming step for forming the first slit including the side surface, the second slit forming step for forming the second slit including the first slit, and the second slit forming step, on at least one side surface of the chip component And a film forming process for forming a film.

  The lower surface of the substrate is held by a holding member, a resist pattern is formed on the upper surface of the substrate, the first slit penetrates the substrate and is formed in an annular shape, and the second slit is formed in an annular shape A chip part manufacturing method is formed by removing a portion surrounded by the slit from the substrate.

  After the film forming step, the substrate is cut to form the other side surface of the chip component, and to obtain a chip component manufacturing method in which the chip component is separated.

By forming the first slit by etching, at least one side surface having a vertical and smooth angle formed with the upper surface of the chip component is formed, and by forming the second slit including the first slit, the side surface is formed. The film can be easily attached to the film.

  ADVANTAGE OF THE INVENTION According to this invention, the chip component manufacturing method which can form the side surface with high perpendicularity and can form the film | membrane on a side surface easily can be provided.

The top view of the board | substrate which formed the 1st slit in this invention The perspective view of the board | substrate which formed the 1st slit in this invention The top view of the board | substrate which formed the 2nd slit in this invention The perspective view of the board | substrate which formed the 2nd slit in this invention The figure which cut | disconnects the board | substrate in this invention The perspective view of the chip component (submount) in this invention Diagram showing conventional chip component manufacturing method Perspective view of conventional chip parts The figure which shows the main surface side film thickness ratio to the slit width

  The chip component manufacturing method of the present invention will be described as an example using silicon as a semiconductor material as a substrate material. Further, the chip component of this embodiment is a submount on which a laser diode (LD) is mounted, the laser diode is mounted on the upper surface of the chip component, and the side surface of the chip component is used as a reference surface and used as a mounting surface on a mounted member. Shall. Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a top view of a substrate on which a first slit is formed. FIG. 2 is a perspective view of FIG. FIG. 3 is a top view of the substrate on which the second slit is formed. FIG. 4 is a perspective view of FIG. FIG. 5 is a diagram for cutting the substrate. FIG. 6 is a perspective view of a chip component (submount). FIG. 9 is a diagram showing the main-surface side film thickness ratio with respect to the slit width.

  A resist pattern is formed by photolithography on a substrate 200 made of silicon and having a thickness of about 200 μm, and a first slit 211 is formed by DRIE. The width of the first slit 211 is preferably as narrow as possible in order to improve the verticality in terms of DRIE characteristics. However, if it is too narrow, the minimum opening width of the resist is limited by photolithography, so a width of about 10 to 20 μm is desirable.

  As shown in FIGS. 1 and 2, an island 207 is formed in the substrate 200 by the first slit 211 formed in an annular shape, and at least one side surface of the submount 201 is formed as an etching surface 205. Note that the lower surface of the substrate 200 is held by a dry film (not shown) so that the state of the substrate 200 and the island 207 can be maintained even if the first slit 211 penetrates the substrate 200. In the present embodiment, the first slit 211 is formed corresponding to the side surface of one submount 201, but is not necessarily limited to this, and may be formed corresponding to the side surfaces of a plurality of submounts. good.

  The substrate 200 on which the first slits 211 are formed is immersed in a resist stripping solution, so that the resist used as a DRIE mask and the dry film holding the substrate 200 are peeled off from the substrate 200. At that time, the island 207 is also detached, and the substrate 200 is formed with the second slit 212 including the first slit 211 as shown in FIGS.

  As shown in FIG. 6, since the submount 201 uses the etching surface 205 as a reference surface and is solder-welded, a certain amount of metal film, for example, Ti / Pt / Au is formed on the etching surface 205 from the lower layer. There is a need. Ti is an adhesion layer with silicon, Pt is a role of preventing diffusion of Au into silicon, and Au is a role of maintaining bonding property with AuSn solder. Therefore, in order to efficiently form a film on the etching surface 205, the width of the second slit 212 needs to be increased. After the first slit 211 is formed, the island 207 is removed, whereby the second slit 212 having an opening capable of film formation can be easily formed while ensuring the perpendicularity of the etching surface 205.

  After a metal film is formed by sputtering on the substrate 200 on which the second slit 212 is formed, a resist opening is formed by photolithography, the metal film is etched by ion milling, and an upper surface 204 and side surfaces (etching surfaces) 205 of the submount 201 are formed. Then, a predetermined circuit pattern 202 is formed. Alternatively, a portion to be formed in advance may be opened with a resist, formed by sputtering, and formed by a lift-off method.

  In addition, when forming a metal film or a predetermined circuit pattern 202 on the substrate 200, a dicing blade (not shown) is used to separate the submount 201 into a cutting area where the submount 201 is separated later. It is desirable to provide a metal film opening that does not contact the metal film.

  FIG. 9 shows data of film thickness values of the side surface (etching surface) 205 when a metal film is formed from the upper surface side by changing the width of the second slit 212 using a sputtering apparatus. The film thickness ratio of the side surface (etching surface) 205 is shown when Ti / Pt / Au is formed from the lower layer, the total is the total, and the film thickness of the upper surface 204 is 100%. From this result, it can be seen that when the width of the second slit 212 is 400 μm or more, there is no change in the amount of metal film.

  Next, a resist is opened on the upper surface 204 of the submount 201 by photolithography, and an AuSn solder film 203 for mounting a laser diode is formed.

  Finally, as shown in FIG. 5, the substrate 200 is cut with a dicing blade, and a cutting groove 214 is formed, so that individual pieces having cutting surfaces 206 other than the side surface (etching surface) 205 formed by DRIE are obtained. A chip component (submount) 201 is obtained.

  In this embodiment, the submount has been described as an example. However, the present invention is not limited to this, and the present invention can be similarly applied to a form in which an insulating film is three-dimensionally formed on a semiconductor substrate as a chip component.

DESCRIPTION OF SYMBOLS 100 Substrate 101 Chip component 102 Metal film 103 Electrode 104 Upper surface 106 Cut surface (side surface)
113 Dicing blade 114 Cutting groove 200 Substrate 201 Chip component (submount)
202 Circuit pattern 203 Solder film 204 Upper surface 205 Etching surface (side surface)
206 Cut surface (side)
207 Island 211 First slit 212 Second slit 214 Cutting groove

Claims (1)

In a chip component manufacturing method in which a substrate is separated into pieces to form a plurality of chip components,
A resist pattern forming step of forming a resist pattern on the surface of the substrate;
Etching the substrate using the resist pattern as a mask, penetrating the substrate, and forming a first slit that is annularly formed and includes at least one side surface of the chip component;
A second slit forming step of forming a second slit including the first slit by removing a portion surrounded by the first slit formed in an annular shape from the substrate ;
After the second slit forming step, a film forming step of forming a film on at least one side surface of the chip component;
After the film formation step, by cutting the substrate, to form the other side surface of the chip component, and to singulation,
A method of manufacturing a chip part, comprising:

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