JP6323622B2 - 部品実装基板 - Google Patents
部品実装基板 Download PDFInfo
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- JP6323622B2 JP6323622B2 JP2017548693A JP2017548693A JP6323622B2 JP 6323622 B2 JP6323622 B2 JP 6323622B2 JP 2017548693 A JP2017548693 A JP 2017548693A JP 2017548693 A JP2017548693 A JP 2017548693A JP 6323622 B2 JP6323622 B2 JP 6323622B2
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- H—ELECTRICITY
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- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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- H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
- H01L25/0655—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00 the devices being arranged next to each other
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- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15192—Resurf arrangement of the internal vias
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- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
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- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
- H05K2203/1305—Moulding and encapsulation
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- H05K2203/1305—Moulding and encapsulation
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
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Description
20,20B:樹脂基板
21,21B:本体樹脂部
22:表面樹脂層
23:回路導体
24:層間接続導体
25:外部接続用端子導体
30,30A,30B1,30B2,30B3,60:電子部品
31,31A:本体
32,32A:実装用端子
40:接合材
50,50B:モールド樹脂
61:本体
62:実装用端子
211,212,213,214,215:樹脂層
220:貫通孔
230:ランド導体
240:層間接続導体
Claims (3)
- 部品実装用のランド導体を含む導体パターンが形成された樹脂基板と、
前記樹脂基板の表面に実装され、実装用端子が前記ランド導体に接合される第1の部品と、
前記樹脂基板の表面と前記第1の部品を覆うように形成され、前記樹脂基板とは異なる材質からなるモールド樹脂と、
を備え、
前記樹脂基板は、表面に前記ランド導体が形成された本体樹脂部と、前記本体樹脂部の表面に配置された前記本体樹脂部と同種の材質からなる表面樹脂層とを備え、
前記表面樹脂層の表面には導体が形成されておらず、前記表面樹脂層は、前記ランド導体を前記樹脂基板の表面側に露出させる貫通孔を備え、
前記実装用端子は、前記貫通孔に充填された接合材によって、前記ランド導体に接合されていて、
前記表面樹脂層および前記本体樹脂部は、液晶ポリマを含み、
前記モールド樹脂は、シリコーン樹脂を含む、
部品実装基板。 - 部品実装用のランド導体を含む導体パターンが形成された樹脂基板と、
前記樹脂基板の表面に実装され、実装用端子が前記ランド導体に接合される第1の部品と、
前記樹脂基板の表面と前記第1の部品を覆うように形成され、前記樹脂基板とは異なる材質からなるモールド樹脂と、
を備え、
前記樹脂基板は、表面に前記ランド導体が形成された本体樹脂部と、前記本体樹脂部の表面に配置された前記本体樹脂部と同種の材質からなる表面樹脂層とを備え、
前記表面樹脂層の表面には導体が形成されておらず、前記表面樹脂層は、前記ランド導体を前記樹脂基板の表面側に露出させる貫通孔を備え、
前記実装用端子は、前記貫通孔に充填された接合材によって、前記ランド導体に接合されていて、
前記樹脂基板のヤング率は、前記モールド樹脂のヤング率よりも高い、
部品実装基板。 - 部品実装用のランド導体を含む導体パターンが形成された樹脂基板と、
前記樹脂基板の表面に実装され、実装用端子が前記ランド導体に接合される第1の部品と、
前記樹脂基板の表面と前記第1の部品を覆うように形成され、前記樹脂基板とは異なる材質からなるモールド樹脂と、
を備え、
前記樹脂基板は、表面に前記ランド導体が形成された本体樹脂部と、前記本体樹脂部の表面に配置された前記本体樹脂部と同種の材質からなる表面樹脂層とを備え、
前記表面樹脂層の表面には導体が形成されておらず、前記表面樹脂層は、前記ランド導体を前記樹脂基板の表面側に露出させる貫通孔を備え、
前記実装用端子は、前記貫通孔に充填された接合材によって、前記ランド導体に接合されていて、
前記本体樹脂部に内蔵された第2の部品を備え、
前記モールド樹脂は、前記表面樹脂層および前記本体樹脂部よりもヤング率の小さい材料からなり、
前記第2の部品を含む前記樹脂基板の体積に対する前記第2の部品の体積の比率は、前記モールド樹脂と前記第1の部品とからなる体積に対する前記第1の部品の体積の比率よりも小さい、
部品実装基板。
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JP7407732B2 (ja) * | 2018-12-04 | 2024-01-04 | 株式会社クラレ | 高電圧用回路基板およびそれを用いた高電圧デバイス |
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JP2005136043A (ja) * | 2003-10-29 | 2005-05-26 | Kyocera Corp | 配線基板及び電気装置 |
WO2012137626A1 (ja) * | 2011-04-01 | 2012-10-11 | 株式会社村田製作所 | 部品内蔵樹脂基板およびその製造方法 |
WO2014024754A1 (ja) * | 2012-08-07 | 2014-02-13 | 三菱瓦斯化学株式会社 | 半導体パッケージ用回路基板及びその製造方法 |
JP2014179612A (ja) * | 2013-03-14 | 2014-09-25 | General Electric Co <Ge> | パワーオーバーレイ構造およびその製造方法 |
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US5490324A (en) * | 1993-09-15 | 1996-02-13 | Lsi Logic Corporation | Method of making integrated circuit package having multiple bonding tiers |
TW411537B (en) * | 1998-07-31 | 2000-11-11 | Siliconware Precision Industries Co Ltd | Semiconductor package with CSP-BGA structure |
US6861588B2 (en) * | 2002-07-16 | 2005-03-01 | Murata Manufacturing Co., Ltd. | Laminated ceramic electronic component and method of producing the same |
JP4357817B2 (ja) * | 2002-09-12 | 2009-11-04 | パナソニック株式会社 | 回路部品内蔵モジュール |
US6998532B2 (en) * | 2002-12-24 | 2006-02-14 | Matsushita Electric Industrial Co., Ltd. | Electronic component-built-in module |
DE10300956B3 (de) * | 2003-01-13 | 2004-07-15 | Epcos Ag | Bauelement mit Höchstfrequenzverbindungen in einem Substrat |
JP2005108950A (ja) * | 2003-09-29 | 2005-04-21 | Matsushita Electric Ind Co Ltd | セラミックモジュール部品およびその製造方法 |
JP5262530B2 (ja) * | 2008-09-30 | 2013-08-14 | セイコーエプソン株式会社 | 電子デバイス及び電子デバイスの製造方法 |
JP5285819B1 (ja) * | 2012-11-07 | 2013-09-11 | 太陽誘電株式会社 | 電子回路モジュール |
WO2014097835A1 (ja) | 2012-12-18 | 2014-06-26 | 株式会社村田製作所 | 樹脂多層基板 |
US8987876B2 (en) | 2013-03-14 | 2015-03-24 | General Electric Company | Power overlay structure and method of making same |
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JP2005136043A (ja) * | 2003-10-29 | 2005-05-26 | Kyocera Corp | 配線基板及び電気装置 |
WO2012137626A1 (ja) * | 2011-04-01 | 2012-10-11 | 株式会社村田製作所 | 部品内蔵樹脂基板およびその製造方法 |
WO2014024754A1 (ja) * | 2012-08-07 | 2014-02-13 | 三菱瓦斯化学株式会社 | 半導体パッケージ用回路基板及びその製造方法 |
JP2014179612A (ja) * | 2013-03-14 | 2014-09-25 | General Electric Co <Ge> | パワーオーバーレイ構造およびその製造方法 |
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US10154597B2 (en) | 2018-12-11 |
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JPWO2017077837A1 (ja) | 2018-06-14 |
US20180242459A1 (en) | 2018-08-23 |
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