JP6305137B2 - Nitride semiconductor laminate and semiconductor device - Google Patents

Description

  The present invention relates to a nitride semiconductor laminate and a semiconductor device.

Group III-V compound semiconductors are used as materials for forming semiconductor devices such as high-efficiency light-emitting elements and field-effect transistors. For example, a field effect transistor (FET) such as a high electron mobility transistor (HEMT) is formed on a nitride semiconductor laminate such as a nitride semiconductor epitaxial wafer with a source electrode, a drain electrode, and a gate. It is formed by providing an electrode.
A nitride semiconductor laminate used for forming such a semiconductor device includes a substrate made of silicon carbide (SiC) or the like, a nucleation layer made of aluminum nitride (AlN) or the like epitaxially grown on the substrate, and the nucleation thereof. A buffer layer containing gallium nitride (GaN) or the like epitaxially grown on the layer, a channel layer (electron transit layer) made of high-purity GaN or the like epitaxially grown on the buffer layer, and nitride grown epitaxially on the channel layer A barrier layer (electron supply layer) made of aluminum gallium (AlGaN) or the like is laminated (see, for example, Patent Document 1).

By the way, in field effect transistors, current collapse can be an operational problem. Current collapse is prominently observed in GaN field-effect transistors, and is a phenomenon in which drain current is significantly reduced after application of a high voltage. This current collapse is generated when two-dimensional electron gas (Two Dimensional Electorn Gas) is depleted by trapping electrons in the surface level of the crystal surface. An AlGaN barrier layer is considered as the origin of the trap level in the current collapse.
In order to reduce the occurrence of such current collapse, for example, with respect to the nitride semiconductor multilayer structure, the carbon (C) concentration and the silicon (Si) concentration in the AlGaN barrier layer are regulated in a predetermined relationship, so that the electron trap by carbon It has been proposed to suppress the function (for example, see Patent Document 2).

JP 2011-023677 A JP 2009-117482 A

  However, it cannot be said that the current collapse can be surely suppressed in the nitride semiconductor laminate having the conventional configuration described above. Specifically, as disclosed in Patent Document 2, only by satisfying the relationship between the carbon concentration and the silicon concentration in the AlGaN barrier layer, the drain current can be improved or the sheet resistance when a field effect transistor is configured. It has been found that it is not always sufficient to achieve a reduction in the above (that is, reduction in sheet resistance or improvement in electron mobility in the nitride semiconductor laminate).

  Accordingly, an object of the present invention is to provide a nitride semiconductor laminate and a semiconductor device capable of effectively suppressing current collapse.

  In order to achieve the above object, the inventor of the present application examined the reason why the occurrence of current collapse cannot always be suppressed only by satisfying the relationship between the carbon concentration and the silicon concentration, and the barrier layer (electron supply layer) The inventor obtained that other elements (ie, elements other than carbon or silicon) may have an influence. The inventor of the present application has further studied earnestly, and has focused on hydrogen (H) in the electron supply layer, which is another element, and has come up with the present invention described below.

The first aspect of the present invention is:
In a nitride semiconductor laminate in which at least an electron transit layer and an electron supply layer are sequentially laminated on a substrate,
The electron supply layer is a nitride semiconductor laminate including carbon and hydrogen, and having a carbon concentration in the electron supply layer lower than a hydrogen concentration in the electron supply layer.

According to a second aspect of the present invention, in the nitride semiconductor laminate according to the first aspect,
The electron supply layer has a carbon concentration of 1 × 10 ¹⁷ cm ⁻³ or more and less than 1 × 10 ¹⁸ cm ⁻³ and a hydrogen concentration of 2 × 10 ¹⁷ cm ⁻³ or more and less than 3 × 10 ¹⁸ cm ^−3. It is characterized by.

According to a third aspect of the present invention, in the nitride semiconductor laminate according to the first or second aspect,
The electron supply layer contains silicon, and a silicon concentration in the electron supply layer is equal to or higher than the hydrogen concentration.

According to a fourth aspect of the present invention, in the nitride semiconductor laminate according to the third aspect,
The electron supply layer has a silicon concentration of 2 × 10 ¹⁷ cm ⁻³ or more and less than 3 × 10 ¹⁸ cm ⁻³ .

  According to a fifth aspect of the present invention, there is provided a semiconductor device formed using the nitride semiconductor multilayer structure according to any one of the first to fourth aspects.

  ADVANTAGE OF THE INVENTION According to this invention, the nitride semiconductor laminated body and semiconductor device which can suppress electric current collapse effectively can be provided.

It is a sectional side view which shows the example of schematic structure of the nitride semiconductor laminated body which concerns on this invention. It is a sectional side view which shows the schematic structural example of the semiconductor device which concerns on this invention. It is explanatory drawing which shows the specific example of the measurement result of sheet resistance, electron mobility, and current collapse about one Example and comparative example of this invention.

  Hereinafter, a nitride semiconductor laminate and a semiconductor device according to the present invention will be described with reference to the drawings. Here, a GaN-based nitride semiconductor epitaxial wafer will be described as an example of the nitride semiconductor stack, and a field effect transistor will be described as an example of the semiconductor device.

(1) Configuration of Nitride Semiconductor Stack FIG. 1 is a side sectional view showing a schematic configuration example of a nitride semiconductor stack according to the present invention.
As shown in the figure, the nitride semiconductor laminate 1 described in the present embodiment is configured by epitaxially growing a nucleation layer 3, a buffer layer 4, and a barrier layer 5 in this order on a substrate 2. .

(substrate)
The substrate 2 is made of, for example, Si or SiC. More specifically, as the substrate 2, for example, a polytype 4H or polytype 6H semi-insulating SiC substrate or the like is used. Here, the numbers 4H and 6H indicate the repetition period in the c-axis direction, and H indicates a hexagonal crystal. As the substrate 2, it is preferable to use a semi-insulating SiC substrate in order to reduce parasitic capacitance when a field effect transistor is configured and to obtain good high frequency characteristics.

(Nucleation layer)
The nucleation layer 3 is formed with, for example, AlN as a main component. The nucleation layer 3 functions as a buffer layer 3a in which a partial region (for example, a region located on the substrate 2 side) mainly buffers a lattice constant difference between the substrate 2 and the buffer layer 4, and other regions ( For example, a region located on the buffer layer 4 side) mainly functions as a nucleation layer 3b that forms nuclei for crystal growth.

(Buffer layer)
The buffer layer 4 is formed with GaN as a main component, for example. The buffer layer 4 functions as a buffer layer 4a in which a partial region (for example, a region located on the nucleation layer 3 side) mainly buffers a lattice constant difference between the nucleation layer 3 and the barrier layer 5. A partial region (for example, a region located on the barrier layer 5 side) mainly functions as an electron transit layer (channel layer) 4b for causing electrons to travel. In the electron transit layer 4b, there is a two-dimensional electron gas generated by a piezo effect in the barrier layer 5 due to a difference in lattice constant between the buffer layer 4 and the barrier layer 5 (an effect of generating an electric field by distorting the crystal). Will do.

(Barrier layer)
The barrier layer 5 is formed with, for example, AlGaN as a main component. The barrier layer 5 functions as an electron supply layer that supplies electrons to the electron transit layer 4b, and also functions as a barrier layer that spatially confines the two-dimensional electron gas.

  The barrier layer 5 is doped with Si, and the Si functions as an n-type carrier. Further, the barrier layer 5 is auto-doped with C according to the epitaxial growth conditions, and the C functions as a p-type carrier. Furthermore, H is taken into the barrier layer 5 from the source gas during the epitaxial growth according to the epitaxial growth conditions. That is, the barrier layer 5 is mainly composed of, for example, AlGaN, but is formed by containing Si, C, and H in addition to this.

By the way, C doping in the barrier layer 5 acts as a trap level for trapping carriers, so that the trapped carriers form a negative electric field, resulting in a decrease in the two-dimensional electron gas concentration in the buffer layer 4. This can be a factor causing an increase in current collapse. That is, in order to suppress the occurrence of current collapse, it is preferable that the C concentration in the barrier layer 5 is low.
Further, when Si doping is performed on the barrier layer 5, the Si concentration in the barrier layer 5 is made higher than the C concentration, and more n-type carriers are present than the trap level, thereby reducing the resistivity and reducing the current. The occurrence of collapse can be suppressed.
For these reasons, for the barrier layer 5, the generation of current collapse can be suppressed by defining these relationships so that the Si concentration is higher than the C concentration while suppressing the C concentration. Can be considered.

  However, as a result of the study by the inventors of the present application, it has been found that the current collapse cannot be reliably suppressed by simply increasing the Si concentration in the barrier layer 5 above the C concentration. Although the reason is not completely clarified, it is considered that the influence of other elements (that is, elements other than C or Si) contained in the barrier layer 5 is exerted. More specifically, the influence of H, which is one of the other elements contained in the barrier layer 5, affects the generation of current collapse unless the H concentration in the barrier layer 5 is set higher than the C concentration. It was found that it was not possible to suppress it. This means that even if the Si concentration in the barrier layer 5 is simply higher than the C concentration, if the H concentration in the barrier layer 5 is not higher than the C concentration, the drain in the case where a field effect transistor is formed as a result. It can be said that it is clear in view of the occurrence of a situation in which a decrease in current or an increase in on-resistance, that is, an increase in sheet resistance or a decrease in electron mobility in the nitride semiconductor laminate 1 occurs.

  From the above, in the nitride semiconductor laminate 1 of this embodiment, the barrier layer 5 has a C concentration in the barrier layer 5 lower than an H concentration in the barrier layer 5. Further, in the barrier layer 5, the Si concentration in the barrier layer 5 is the same as or higher than the H concentration in the barrier layer 5. That is, the barrier layer 5 is formed so that the relationship of Si concentration ≧ H concentration> C concentration is established.

The C concentration is preferably 1 × 10 ¹⁷ cm ⁻³ or more. This is because a lower C concentration is more effective for suppressing the occurrence of current collapse, but if it is lower than this, there is a possibility that it may lead to an increase in gate leakage current that is in a trade-off relationship with the suppression of occurrence of current collapse. Note that the upper limit value of the C concentration is preferably less than 1 × 10 ¹⁸ cm ⁻³ in consideration of a decrease in the two-dimensional electron gas.
The H concentration is preferably 2 × 10 ¹⁷ cm ⁻³ or more. This is to ensure that the relationship of H concentration> C concentration is established. Note that the upper limit of the H concentration is preferably less than 3 × 10 ¹⁸ cm ⁻³ in consideration of the growth conditions under which epitaxial growth is possible.
The Si concentration is preferably 2 × 10 ¹⁷ cm ⁻³ or more. This is to ensure that the relationship of Si concentration ≧ H concentration> C concentration is established. Note that the upper limit value of the Si concentration is preferably less than 3 × 10 ¹⁸ cm ⁻³ in consideration of a decrease in electron mobility in the nitride semiconductor laminate 1.

(2) Method for Manufacturing Nitride Semiconductor Stack Next, an example of a method for manufacturing the nitride semiconductor stack 1 having the above-described configuration will be described. Here, the case where the nucleation layer 3, the buffer layer 4 and the barrier layer 5 are formed by an epitaxial growth method using an organic metal vapor phase growth apparatus, also called a MOVPE (Metal Organic Vapor Phase Epitaxy) apparatus, will be described as an example.

(Substrate loading / pretreatment process)
In manufacturing the nitride semiconductor laminate 1, first, as the substrate 2, for example, a polytype 4H or polytype 6H semi-insulating SiC substrate is prepared and carried into a processing chamber provided in the MOVPE apparatus. Then, as a pretreatment process, a hydrogen (H ₂ ) / nitrogen (N ₂ ) mixed gas flow atmosphere not containing ammonia (NH ₃ ) is set in the processing chamber into which the substrate 2 is loaded, and at a predetermined set temperature (for example, 1100 ° C.). Heat treatment is performed for a predetermined time (for example, 5 minutes). By this heat treatment, the surface of the substrate 2 in the processing chamber is cleaned.

(Nucleation layer formation process)
After completion of the pretreatment process, NH ₃ gas is supplied into the processing chamber of the MOVPE apparatus, and the H ₂ / NH ₃ mixed gas is supplied for a predetermined time (for example, 25 seconds) while maintaining the processing chamber at a predetermined set temperature (for example, 1100 ° C.). )Introduce. With this NH ₃ gas flow, it is possible to prevent detachment of nitrogen atoms when forming the AlN layer in the nucleation layer forming step, and to improve the quality of the nucleation layer 3 made of AlN.

Thereafter, supply of the raw material gas for forming the nucleation layer 3 into the processing chamber is started while the processing chamber remains at a predetermined set temperature (for example, 1100 ° C.). As a source gas for forming the nucleation layer 3, for example, a mixed gas of NH ₃ gas and trimethylaluminum (TMA) gas can be used. Then, a nucleation layer 3 made of AlN having a predetermined thickness (for example, an average film thickness of 12 nm) is formed on any main surface of the substrate 2. In the nucleation layer 3 formed in this way, the surface of the substrate 2 is surely cleaned, so that contamination with impurities can be avoided in advance, and desorption of nitrogen atoms when the nucleation layer 3 is formed. Is prevented, so that the quality is improved.

(Buffer layer forming step)
After completion of the nucleation layer forming step, the processing chamber of the MOVPE apparatus is set to a predetermined set temperature (for example, 1000 ° C.) lower than the above-described predetermined set temperature. Then, the supply of TMA gas into the processing chamber is stopped, and the supply of, for example, trimethylgallium (TMG) gas into the processing chamber is started. At this time, since the supply of the NH ₃ gas into the processing chamber continues, the formation of the GaN layer as the buffer layer 4 is started by the start of the supply of the TMG gas. Then, a GaN layer having a predetermined thickness (for example, an average film thickness of 500 nm) is formed on the upper surface of the nucleation layer 3 as the buffer layer 4.

(Barrier layer forming process)
After completion of the buffer layer forming step, supply of TMA gas into the processing chamber is resumed while the processing chamber remains at a predetermined set temperature (for example, 1000 ° C.), and for example, into the processing chamber of monosilane (SiH ₄ ) gas. Start supplying. At this time, the supply of NH ₃ gas and TMG gas into the processing chamber continues. Therefore, the formation of an AlGaN layer doped with Si as the barrier layer 5 is started by supplying these mixed gases into the processing chamber. Then, an n-type AlGaN layer having a predetermined thickness (for example, an average film thickness of 30 nm) is formed on the upper surface of the buffer layer 4 as the barrier layer 5.

At this time, the barrier layer 5 is doped with Si by supplying SiH ₄ gas, is auto-doped with C according to the epitaxial growth conditions, and further takes in H from the source gas during the epitaxial growth. For Si, C and H thus contained, it is necessary to satisfy the relationship of Si concentration ≧ H concentration> C concentration.
In order to establish this relationship, in the barrier layer forming step, the growth conditions are optimized when the AlGaN layer as the barrier layer 5 is epitaxially grown. The “growth conditions” here include at least one of, for example, a growth temperature, a growth pressure, a V / III ratio, a growth rate, and a flow rate of each gas. Further, “optimization” of the growth condition means that the growth condition is appropriately adjusted so that the relationship of Si concentration ≧ H concentration> C concentration is established.

For example, in order to establish the relationship of Si concentration ≧ H concentration> C concentration, it is necessary to make it difficult for C to be doped in the AlGaN layer. For this purpose, techniques such as increasing the growth temperature, increasing the growth pressure, increasing the V group in the V / III ratio, and appropriately selecting the formation gas type of the barrier layer 5 are effective. Specifically, when the general growth temperature of the AlGaN layer is 700 to 800 ° C., it is considered to adopt a method such as forming the AlGaN layer at a predetermined set temperature (for example, 1000 ° C.) higher than this. It is done. Further, as the gas for forming the AlGaN layer, other triethyl gallium (TEG) gas than TMG gas can be used, but C is more than TEG (composition formula: (C ₂ H ₅ ) ₃ Ga) gas. It is also conceivable to employ a technique such as using a small amount of TMG (composition formula: (CH ₃ ) ₃ Ga). However, the method described here is only one method for making the relationship of Si concentration ≧ H concentration> C concentration difficult to be doped with C. That is, the optimization of the growth conditions is not limited to the method mentioned here, and if the relationship of Si concentration ≧ H concentration> C concentration can be established, the film thickness of the AlGaN layer to be formed, It is conceivable to carry out as appropriate in consideration of the quality and the specifications of the MOVPE apparatus.

(Substrate unloading process)
After completion of the barrier layer forming step, the substrate 2 is unloaded from the processing chamber, and the manufacturing process of the nitride semiconductor laminate 1 according to the present embodiment is completed.

(3) Configuration of Field Effect Transistor Next, a field effect transistor configured using the nitride semiconductor laminate 1 having the above configuration will be described.
A field effect transistor (FET) is an example of a semiconductor device configured using the nitride semiconductor laminate 1 and has a transistor structure in which a current flow is controlled by an electric field generated from a gate electrode. It is a thing. This field effect transistor includes a high electron mobility transistor (HEMT) using a high mobility two-dimensional electron gas induced in a semiconductor heterojunction as a channel.

FIG. 2 is a side sectional view showing a schematic configuration example of a field effect transistor according to the present invention.
As shown in the figure, the field effect transistor 10 according to the present embodiment includes an electrode 11 provided on the upper surface of the nitride semiconductor laminate 1, that is, the upper surface of the barrier layer 5. As the electrode 11, a gate electrode 11a, a source electrode 11b, and a drain electrode 11c are provided. The gate electrode 11a has a multilayer structure of, for example, nickel (Ni) and gold (Au). The source electrode 11b has a multilayer structure of, for example, titanium (Ti) and aluminum (Al). The drain electrode 11c has a multilayer structure of Ti and Al, for example. Further, for example, a GaN layer may be provided as the intermediate layer 12 between the upper surface of the barrier layer 5 and the electrode 11.

(4) Effects of this Embodiment According to this embodiment, one or more effects described below are produced.

(A) According to this embodiment, the barrier layer 5 functioning as an electron supply layer contains at least C and H, and the C concentration in the barrier layer 5 is higher than the H concentration in the barrier layer 5. It is low. Therefore, since the concentration of C acting as a trap level for capturing carriers is low, generation of current collapse can be suppressed as compared with the case where the C concentration is high. In addition, since the C concentration is lower than the H concentration, generation of current collapse can be effectively suppressed. That is, since the H concentration in the barrier layer 5 is higher than the C concentration, it does not lead to an increase in sheet resistance or a decrease in electron mobility in the nitride semiconductor laminate 1, and a field effect transistor is configured. There is no reduction in drain current or increase in on-resistance.
Thus, according to this embodiment, since the C concentration in the barrier layer 5 is lower than the H concentration, it is possible to provide the nitride semiconductor laminate 1 and the field effect transistor that can effectively suppress the current collapse. Can do.

(B) According to the present embodiment, since the C concentration in the barrier layer 5 is 1 × 10 ¹⁷ cm ⁻³ or more and the H concentration is 2 × 10 ¹⁷ cm ⁻³ or more, the relationship of H concentration> C concentration is established. The generation of current collapse can be effectively suppressed while ensuring the above. In addition, since the C concentration is not too low, an increase in gate leakage current that is in a trade-off relationship with suppression of current collapse generation is not caused.

(C) According to the present embodiment, the barrier layer 5 functioning as an electron supply layer contains Si in addition to C and H, and the Si concentration in the barrier layer 5 is H in the barrier layer 5. It is the same as the concentration or higher than the H concentration. That is, in the barrier layer 5, a relationship of Si concentration ≧ H concentration> C concentration is established, and as a result, the Si concentration becomes higher than the C concentration. Therefore, the presence of more n-type carriers than the trap level by such Si doping can reduce the resistivity and suppress the occurrence of current collapse. In addition, even in this case, not only the Si concentration in the barrier layer 5 is simply made higher than the C concentration, but also a relationship of Si concentration ≧ H concentration> C concentration is established, so that the occurrence of current collapse is ensured. Can be suppressed.

(D) According to the present embodiment, since the Si concentration in the barrier layer 5 is 2 × 10 ¹⁷ cm ⁻³ or more, it is ensured that the relationship of Si concentration ≧ H concentration> C concentration is established, and the current collapse is Generation can be effectively suppressed.

(4) Modification etc. Although the present embodiment has been described above, the above-described disclosure shows an exemplary embodiment of the present invention. That is, the technical scope of the present invention is not limited to the above exemplary embodiment.

  For example, in this embodiment, an AlN layer as the nucleation layer 3, a GaN layer as the buffer layer 4, and an AlGaN layer as the barrier layer 5 are sequentially stacked on the SiC substrate to form the nitride semiconductor multilayer stack 1. However, the present invention is not limited to this, and the present invention is not limited to this, so long as it can be called a nitride semiconductor laminate, even if it has a different configuration (for example, an InAlN layer). Similarly, it is conceivable to apply the present invention.

  Further, for example, in the present embodiment, the case where the nitride semiconductor multilayer body 1 is manufactured through the substrate carrying-in / pre-processing step, the nucleation layer forming step, the buffer layer forming step, the barrier layer forming step, and the substrate unloading step in this order is taken as an example. However, the present invention is not limited to this, and the process may be deleted, added, or changed without changing the gist thereof.

  For example, in the present embodiment, a field effect transistor (FET) including a high electron mobility transistor (HEMT) has been described as an example of the semiconductor device according to the present invention. However, the present invention is not limited thereto. The present invention is not limited, and the present invention can be applied to other semiconductor devices such as a semiconductor laser.

  Next, an Example is given and this invention is demonstrated concretely. However, it is needless to say that the present invention is not limited to the following examples.

(Example)
In the examples of the present invention, nucleation made of AlN having an average film thickness of 12 nm is formed on the substrate 2 made of a semi-insulating SiC substrate of polytype 4H or polytype 6H according to the procedure of the manufacturing method described in the above-described embodiment. The layer 3 is formed, the buffer layer 4 made of GaN having an average film thickness of 500 nm is formed thereon, the barrier layer 5 made of AlGaN having an average film thickness of 30 nm is formed thereon, and the nitride semiconductor laminate 1 is formed. Configured.

With respect to the barrier layer 5 in the nitride semiconductor laminate 1, the Si concentration, the H concentration, and the C concentration were measured by secondary ion mass spectrometry (SIMS). As a result, the Si concentration was 1.2. × 10 ¹⁸ cm ⁻³ , H concentration was 5.0 × 10 ¹⁷ cm ⁻³ , and C concentration was 1.4 × 10 ¹⁷ cm ⁻³ . That is, it can be seen that the barrier layer 5 has a relationship of Si concentration> H concentration> C concentration.

(Comparative example)
Then, the comparative example comprised for the comparison with the Example mentioned above is demonstrated. The nitride semiconductor laminate in Comparative Example 1 corresponds to a conventional configuration.

Also in the comparative example described here, the nitride semiconductor multilayer structure was configured in substantially the same procedure as in the above-described example. However, in the comparative example, unlike the above-described example, the growth conditions in the barrier layer forming step were not optimized.
When the Si concentration, H concentration, and C concentration of the barrier layer in the nitride semiconductor laminate obtained as a result were measured by SIMS, the Si concentration was 1.1 × 10 ¹⁸ cm ⁻³ and the H concentration was 4.1. × 10 ¹⁷ cm ⁻³ and C concentration was 7.9 × 10 ¹⁷ cm ⁻³ . That is, in the comparative example, it can be seen that the relationship of Si concentration> C concentration> H concentration is established for the barrier layer.

(Evaluation of electrical characteristics)
The electrical characteristics of the examples and comparative examples configured as described above were evaluated.
For the evaluation of electrical characteristics, the sheet resistance in the nitride semiconductor laminate was measured by a non-contact overcurrent method, and the electron mobility was measured by the non-contact Hall effect.
Further, a source electrode, a drain electrode, and a gate electrode are formed on the barrier layer of the nitride semiconductor laminate to form a field effect transistor, and the current collapse of the field effect transistor is measured by, for example, pulse IV. .

FIG. 3 is an explanatory diagram showing specific examples of measurement results of sheet resistance, electron mobility, and current collapse for the examples and comparative examples.
As shown in the figure, for the examples, the sheet resistance measurement result is 384 Ω / sq. The measurement result of electron mobility was 1520 cm ² / Vs, and the measurement result of current collapse was 1.14.
On the other hand, for the comparative example, the sheet resistance measurement result was 422 Ω / sq. The measurement result of electron mobility was 1350 cm ² / Vs, and the measurement result of current collapse was 1.89.

According to this measurement result, if the relationship of Si concentration> H concentration> C concentration is established for the barrier layer 5 of the nitride semiconductor laminate 1 as in the example, Si concentration> C as in the comparative example. It can be seen that the sheet resistance in the nitride semiconductor laminate 1 is kept low and the electron mobility is higher than when the relationship of concentration> H concentration is established. Even when the field effect transistor is configured, if the relationship of Si concentration> H concentration> C concentration is established as in the embodiment, the relationship of Si concentration> C concentration> H concentration as in the comparative example. It can be seen that the occurrence of current collapse is suppressed to a lower level than in the case where is established.
That is, if the relationship of Si concentration> H concentration> C concentration is established as in the embodiment, an increase in sheet resistance or a decrease in electron mobility in the nitride semiconductor laminate 1 is suppressed, and a field effect transistor is achieved. It can be said that generation of current collapse in the case of configuring can be effectively suppressed.

  DESCRIPTION OF SYMBOLS 1 ... Nitride semiconductor laminated body, 2 ... Substrate, 3 ... Nucleation layer, 3a ... Nucleation layer, 3b ... Buffer layer, 4 ... Buffer layer, 4a ... Buffer layer, 4b ... Electron travel layer (channel layer), 5 ... barrier layer (electron supply layer), 10 ... field effect transistor, 11 ... electrode, 11a ... gate electrode, 11b ... source electrode, 11c ... drain electrode, 12 ... intermediate layer

Claims (3)

In a nitride semiconductor laminate in which at least an electron transit layer and an electron supply layer are sequentially laminated on a substrate,
The electron supply layer is
Together comprising carbon and hydrogen, the carbon concentration of the electron supply layer is rather low than the hydrogen concentration of the electron supply layer,
And containing silicon, and the silicon concentration in the electron supply layer is the same as or higher than the hydrogen concentration,
Nitride semiconductor multilayer structure, wherein <br/> the silicon concentration is less than 2 × ¹⁰ 17 ^{cm -3} or more 1.2 × ¹⁰ 18 ^{cm -3.} The electron supply layer has a carbon concentration of 1 × 10 ¹⁷ cm ⁻³ or more and less than 1 × 10 ¹⁸ cm ⁻³ and a hydrogen concentration of 2 × 10 ¹⁷ cm ⁻³ or more and less than 3 × 10 ¹⁸ cm ⁻³ . The nitride semiconductor laminate according to claim 1, wherein the nitride semiconductor laminate is provided. Wherein a formed using a nitride semiconductor multilayer structure according to any one of claims 1 or 2.

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