JP6300296B2 - Transmission line - Google Patents

Description

  The present invention relates to a transmission line.

  Patent Document 1 describes an optical modulation device using a high-frequency signal. A transmission line such as a coplanar line or a microstrip line is used for transmitting a high-frequency signal. In order to transmit a high-frequency signal with a low loss between a plurality of transmission lines, impedance matching between the transmission lines is ensured.

JP 2013-15670 A

  For impedance matching, passive components such as capacitors may be connected to the transmission line. However, passive components cause high cost and large transmission lines. An object of this invention is to provide a small and low-cost transmission line in view of the said subject.

  The present invention includes a first substrate, a first signal line disposed on the first substrate, a second substrate disposed adjacent to the first substrate, and a second substrate disposed on the second substrate. Two signal lines, a ground pattern disposed at a position facing the end of the second signal line on the first substrate and connected to a ground potential, and between the first signal line and the second signal line And a first bonding wire that connects the two.

  In the above configuration, on the first substrate, the first and second ground patterns arranged with the first signal line in between at the end of the first signal line are arranged on the second substrate. Are arranged at the end of the second signal line, the third and fourth ground patterns arranged with the second signal line in between, and the second ground pattern is arranged at the end of the second signal line. And a second bonding wire for connecting the first ground pattern and the third ground pattern, and a third bonding wire for connecting the second ground pattern and the fourth ground pattern. It can be set as the structure which has these.

  The said structure WHEREIN: The said 2nd grounding pattern can be set as the structure formed by extending to the position facing the edge part of the said 2nd signal track | line and the said 4th grounding pattern.

  The said structure WHEREIN: A said 3rd grounding pattern can be set as the structure formed by arrange | positioning in the position facing the edge part of a said 1st signal track | line.

  The said structure WHEREIN: The said 3rd grounding pattern can be set as the structure formed by extending to the position facing the edge part of the said 1st signal track | line and the said 1st grounding pattern.

  In the above configuration, the first signal line has a portion that is narrower than the second signal line, the distance between the first signal line and the first ground pattern, the first signal line, and the second signal line. The distance to the ground pattern may be smaller than the distance between the second signal line and the third ground pattern and the distance between the second signal line and the fourth ground pattern.

  In the above configuration, the second signal line is connected to a bonding region disposed at a position closer to the extension line of the first signal line than the second signal line, and the first bonding wire is connected to the first signal line. It can be set as the structure connected between the edge part of a signal track | line and the said bonding area | region.

  In the above configuration, one of the first signal line and the second signal line forms a microstrip line, and the other of the first signal line and the second signal line forms a microstrip line or a coplanar line. It can be configured.

  The said structure WHEREIN: It can be set as the structure by which the pattern connected to the grounding potential is arrange | positioned in the position facing the said 2nd signal track | line among the side surfaces of the said 1st board | substrate.

  According to the present invention, a small and low-cost transmission line can be provided.

FIG. 1A is a plan view illustrating a transmission line according to the first embodiment. FIG.1 (b) is sectional drawing along line AA of Fig.1 (a). FIG.1 (c) is sectional drawing along line BB of Fig.1 (a). FIG. 2A is an enlarged view of the coplanar line. FIG. 2B is a circuit diagram illustrating an equivalent circuit of the transmission line. FIG. 3 is a plan view illustrating a transmission line according to a comparative example. FIG. 4A is a plan view illustrating a transmission line according to the second embodiment. FIG. 4B is an enlarged view of the coplanar line. FIG. 5A is a plan view illustrating a transmission line according to the third embodiment. FIG. 5B is an enlarged view of the coplanar line. FIG. 6A is a plan view illustrating a transmission line according to the fourth embodiment. FIG. 6B is an enlarged view of the coplanar line. FIG. 7 is a plan view illustrating an optical module according to the fifth embodiment.

  Examples will be described.

  The first embodiment is an example in which the signal line 22 and the ground pattern 14 function as a capacitor. FIG. 1A is a plan view illustrating a transmission line 100 according to the first embodiment. Lattice diagonal lines are entered in signal lines and wiring patterns. FIG.1 (b) is sectional drawing along line AA of Fig.1 (a). FIG.1 (c) is sectional drawing along line BB of Fig.1 (a).

  As shown in FIGS. 1A to 2A, the transmission line 100 includes two substrates 10 and 20. The substrate 10 (first substrate) is separated from the substrate 20 (second substrate). The substrate 10 is provided with a coplanar line 11 and a microstrip line 15. The substrate 20 is provided with a coplanar line 21 and a microstrip line 25. The coplanar line 11 includes a signal line 12 (first signal line) and ground patterns 13 and 14 provided on the upper surface of the substrate 10. The ground patterns 13 and 14 are separated from the signal line 12. The ground pattern 14 (second ground pattern) is located on the opposite side of the ground pattern 13 (first ground pattern) across the signal line 12. The coplanar line 21 includes a signal line 22 (second signal line) and ground patterns 23 and 24 provided on the upper surface of the substrate 20. The ground pattern 24 (fourth ground pattern) is located on the opposite side of the ground pattern 23 (third ground pattern) across the signal line 22.

  As shown in FIG. 1B, a ground pattern 16 is provided on the lower surface of the substrate 10, and the ground pattern 16 overlaps the signal line 12. The signal line 12 and the ground pattern 16 form a microstrip line 15. That is, the signal line 12 is shared by the coplanar line 11 and the microstrip line 15. A ground pattern 26 is provided on the lower surface of the substrate 20, and the ground pattern 26 overlaps the signal line 22. The signal line 22 and the ground pattern 26 form a microstrip line 25. The signal line 22 is shared by the coplanar line 21 and the microstrip line 25. The ground pattern 16 is provided on the entire lower surface of the substrate 10, for example. The ground pattern 26 is provided on the entire lower surface of the substrate 20, for example.

  As shown in FIG. 1A, the substrate 10 is provided with via wiring 17, and the substrate 20 is provided with via wiring 27. As shown in FIGS. 1A and 1C, the ground patterns 13 and 14 are electrically connected to the ground pattern 16 by via wirings 17 penetrating the substrate 10. The ground patterns 23 and 24 are connected to the ground pattern 26 by via wiring 27. The via wiring 17 is made of a metal formed on the wall surface of a groove provided on the side surface of the substrate 10 facing the substrate 20 and extends in the thickness direction. The via wiring 27 is made of metal formed on the wall surface of a groove provided on the side surface of the substrate 20 facing the substrate 10 and extends in the thickness direction.

  As shown in FIG. 1A, the signal line 12 of the substrate 10 and the signal line 22 of the substrate 20 are separated from each other, and the ground pattern of the substrate 10 and the ground pattern of the substrate 20 are separated. Electrical connection between the substrate 10 and the substrate 20 is performed by a bonding wire. The signal line 12 is connected to the signal line 22 by a bonding wire 30 (first bonding wire). The ground pattern 13 is connected to the ground pattern 23 by a bonding wire 32 (second bonding wire). The ground pattern 14 is connected to the ground pattern 24 by a bonding wire 34 (third bonding wire). The line width of the signal line, the distance between the signal line and the ground pattern, and the like can be adjusted so that the characteristic impedance of the coplanar line and the microstrip line becomes a desired magnitude (for example, 50Ω). The high-frequency signal input to the signal line 22 propagates through the microstrip line 15 and the coplanar line 11, further propagates through the coplanar line 21 and the microstrip line 25, and is output.

  The signal line, the ground pattern, and the via wiring are formed of a metal such as copper (Cu) or gold (Au), for example. The substrate is formed of an insulator such as resin or ceramic. The bonding wire is made of a metal such as Au.

  FIG. 2A is an enlarged view of the coplanar lines 11 and 21. The bonding wire is not shown. As shown in FIG. 2A, the width W2 of the ground pattern 14 is larger than the width W1 of the ground pattern 13. The distance D1 between the substrate 10 and the substrate 20 is, for example, 10 μm or more and 500 μm or less. A distance D2 between the signal line 22 and the ground pattern 23 is larger than a distance D3 between the signal line 22 and the ground pattern 24.

  As shown in FIGS. 1A and 2A, the ground pattern 14 faces the end of the signal line 22 and the ground pattern 24. For this reason, a capacitive reactance component (capacitance component) is generated between the ground pattern 14 and the signal line 22. In FIG. 1B, the capacitance component is schematically represented as a capacitor C1. Note that the term “facing” refers to, for example, facing in the arrangement direction of the substrates 10 and 20 (lateral direction in FIG. 1A).

  FIG. 2B is a circuit diagram illustrating an equivalent circuit of the transmission line 100. As shown in FIG. 2B, the microstrip line 15, the coplanar line 11, the inductor L1, the coplanar line 21, and the microstrip line 25 are connected in series between the input terminal In and the output terminal Out. One end of the capacitor C1 is connected between the inductor L1 and the coplanar line 21, and one end of the inductor L2 is connected to the other end of the capacitor C1. The other end of the inductor L2 is grounded. The inductor L1 corresponds to the inductance component of the bonding wire 30. The inductor L2 corresponds to the inductance components of the ground patterns 14 and 24 and the via wirings 17 and 27. The capacitor C1 corresponds to a capacitance component between the ground pattern 14 and the signal line 22. The input terminal In is an input end of the signal line 12 (for example, the left end in FIG. 1A), and the output terminal Out is an output end of the signal line 22 (for example, the right end in FIG. 1A).

  The capacitor C1 and the inductors L1 and L2 illustrated in FIG. 2B function as the matching circuit 19. The matching circuit 19 ensures impedance matching between the coplanar lines 11 and 21. Since a capacitance component (capacitor C 1) is generated between the ground pattern 14 and the signal line 22, it is not necessary to provide a chip capacitor on the substrates 10 and 20. For this reason, the transmission line 100 can be reduced in size and cost. The capacitance of the capacitor C1 can be adjusted by the distance D1. The smaller the distance D1, the larger the capacitance and the easier impedance matching. By taking impedance matching, the loss of high frequency signals is reduced.

  As shown in FIG. 2A, the width W2 of the ground pattern 14 is larger than the width W1. For this reason, the inductance component of the ground pattern 14 becomes small. Since the inductance of the inductor L2 in FIG. 2B is reduced, impedance matching is facilitated. For example, the ground pattern 14 may be divided into two, one facing the signal line 22 and the other facing the ground pattern 24. However, the inductance component generated by the ground pattern 14 and the via wiring 17 becomes large, and impedance matching becomes difficult. Therefore, it is preferable to use one wide grounding pattern 14.

  The ground pattern 13 faces the ground pattern 23, and the ground pattern 14 faces the ground pattern 24. For this reason, the coupling between the ground patterns is strengthened, and the reference potential (ground potential) is stabilized. Further, the bonding wires 32 and 34 can be shortened compared to the case where the ground patterns do not face each other. The smaller the distance D1, the shorter the bonding wires 30, 32 and 34. Since the inductance component of the bonding wire is reduced, impedance matching is facilitated.

  Since the via wiring 17 is provided on the side surface of the substrate 10 that faces the signal line 22, the ground plane (the ground pattern 14 and the via wiring 17) viewed from the signal line 22 is increased. This enhances capacitive coupling and facilitates impedance matching. The via wirings 17 and 27 may be metal formed on the wall surface of the through hole that penetrates the substrate. A ground pattern may be provided on the side surface of the substrate 10. The capacity component becomes large.

  FIG. 3 is a plan view illustrating a transmission line 100R according to a comparative example. As shown in FIG. 3, the ground pattern 14 does not face the signal line 22. For this reason, a capacitive component is not easily generated between the ground pattern 14 and the signal line 22. A chip capacitor 35 is provided on the substrate 20 for impedance matching. For this reason, the number of parts increases and the cost increases, and the transmission path 100R becomes large.

  Example 2 is an example in which the capacitance component is increased. FIG. 4A is a plan view illustrating a transmission line 200 according to the second embodiment. FIG. 4B is an enlarged view of the coplanar lines 11 and 21.

  As shown in FIG. 4A and FIG. 4B, the ground pattern 23 does not face the ground pattern 13 but faces the signal line 12. According to the second embodiment, a capacitance component is generated between the ground pattern 14 and the signal line 22 as in the first embodiment. Further, since the end of the signal line 12 and the ground pattern 23 face each other, a capacitance component is also generated between the signal line 12 and the ground pattern 23. That is, the capacitance of the capacitor C1 shown in FIG. For this reason, compared with Example 1, Example 2 can expand the range of impedance matching.

  The distance D4 between the signal line 22 and the ground pattern 23 shown in FIG. 4B can be the same as the distance D5 between the signal line 22 and the ground pattern 24. The distances D4 and D5 are smaller than the distance D2 shown in FIG. 2A and are about the same as the distance D3. By making the distance D4 and the distance D5 the same, the characteristic impedance of the coplanar line 21 can be brought close to 50Ω. Impedance matching is facilitated by bringing the characteristic impedance of the coplanar line 21 close to the characteristic impedance (50Ω) of the coplanar line 11.

  Example 3 is an example in which the bonding wire between the ground patterns is shortened. FIG. 5A is a plan view illustrating a transmission line 300 according to the third embodiment. FIG. 5B is an enlarged view of the coplanar lines 11 and 21.

  As shown in FIGS. 5A and 5B, the ground pattern 14 faces the signal line 22 and the ground pattern 24. The ground pattern 23 faces the signal line 12 and the ground pattern 13. For this reason, according to the third embodiment, as in the second embodiment, a capacitive component is generated between the signal line 12 and the ground pattern 24, and a capacitive component is generated between the signal line 22 and the ground pattern 14. Impedance matching is facilitated because the capacitance component increases.

  The ground pattern 13 faces the ground pattern 23, and the ground pattern 14 faces the ground pattern 24. The coupling between the ground patterns is strengthened, and the reference potential is stabilized. Further, since the bonding wires 32 and 34 are shortened, the inductance component of the bonding wires 32 and 34 is reduced, and impedance matching is facilitated.

  Example 4 is an example in which the bonding wire between the signal lines is shortened. FIG. 6A is a plan view illustrating a transmission line 400 according to the fourth embodiment. FIG. 6B is an enlarged view of the coplanar line 11. As shown in FIG. 6A, the bonding region 22 a is connected to the ground pattern 23 side of the signal line 22 so as to be integrated with the signal line 22. The bonding region 22 a is closer to the extension line of the signal line 12 than the signal line 22. A bonding wire 30 is connected to the bonding region 22a. According to the fourth embodiment, as in the first embodiment, since a capacitance component is generated between the signal line 22 and the ground pattern 14, impedance matching becomes possible.

  As shown in FIG. 6B, the signal line 12 includes lines 12a and 12b. The width W4 of the line 12a is smaller than the width W3 of the line 12b. The line 12 a forms the microstrip line 15, and the line 12 b forms the coplanar line 11. The distance D6 between the line 12b and the ground pattern 13 or 14 is smaller than the distance D4 between the signal line 22 and the ground pattern 23 and the distance D5 between the signal line 22 and the ground pattern 24. Since the signal line 12 is thin and the distance D6 is small, the characteristic impedance of the coplanar line 11 can be set to 50Ω, for example.

  As shown in FIG. 6A, the ground pattern 14 faces the ground pattern 24, and the ground pattern 13 faces the ground pattern 23. For this reason, the coupling between the ground patterns is strengthened, and the reference potential is stabilized. Also, the bonding wires 32 and 34 are shortened. Since the distance D6 is small, the signal line 12 and the signal line 22 are close to each other, and the bonding wire 30 is also shortened. Since the inductance component of the bonding wire is reduced, impedance matching is facilitated. The bonding wire 30 is further shortened by connecting the bonding wire 30 to the bonding region 22a. The characteristic impedance of the coplanar line 21 can be adjusted by changing the size of the bonding region 22a. You may provide the bonding area | region 22a in the signal track | line 22 of Examples 1-3.

  A capacitance component may be generated between the ground pattern 13 and the signal line 22, and one of the coplanar line and the microstrip line may be provided on the substrates 10 and 20. For example, the substrate 10 may be provided with the coplanar line 11 and the microstrip line 15 may not be provided. The substrate 20 may be provided with the coplanar line 21 and the microstrip line 25 may not be provided. One of the signal lines 12 and 22 may form a microstrip line and the other may form a microstrip line or a coplanar line. For example, the signal line 12 and the ground pattern 16 may form the microstrip line 15, and the signal line 12 and the ground patterns 13 and 14 may not form the coplanar line. The signal line 22 and the ground pattern 26 may form the microstrip line 25, and the signal line 22, and the ground patterns 23 and 24 may not form the coplanar line.

  Example 5 is an example of an optical module including a transmission line. FIG. 7 is a plan view illustrating an optical module 500 according to the fifth embodiment.

  As shown in FIG. 7, a temperature control unit such as a TEC (Thermoelectric Cooler) 44 is disposed on the bottom surface of the housing 40 of the optical module 500. On the TEC 44, a carrier 48 made of an insulating material such as aluminum oxide or ceramic and having high thermal conductivity, and a lens holder 46 are disposed. A lens 47 is held on the lens holder 46. Ground patterns 48 a and 48 b are provided on the upper surface of the carrier 48. Substrates 20 and 50, subcarrier 52, and capacitor 56 are provided on ground pattern 48b. A resistor 58 is connected between the ground patterns 48a and 48b. A capacitor 60 is provided on the ground pattern 48a.

  The subcarrier 52 is a dielectric substrate, for example. A semiconductor laser 54 (LD element) is disposed on the subcarrier 52. A signal line 50 a is formed on the upper surface of the substrate 50. The signal line 50a and the ground pattern 48a on the upper surface of the carrier 48 form a microstrip line.

  A receptacle 43 is fixed to the front surface of the housing 40. A substrate 10 that functions as a feedthrough is embedded in the rear side wall of the housing 40. The substrate 10 is provided with a coplanar line 11 and a signal line 12c. The signal lines 12 and 12 c and the ground patterns 13 and 14 of the substrate 10 are electrically connected to the terminal 42. The substrate 20 functions as a bridge between the substrate 10 and the substrate 50. The substrate 20 is provided with a coplanar line 21 and a microstrip line 25.

  The signal line 22 of the substrate 20 and the signal line 50a of the substrate 50 are electrically connected by a bonding wire 62. The signal line 50 a and the semiconductor laser 54 are electrically connected by a bonding wire 64. The semiconductor laser 54 is electrically connected to the capacitor 56 by a bonding wire 66 and electrically connected to the capacitor 60 by a bonding wire 68. The capacitor 60 and the signal line 12 c are connected by a bonding wire 70.

  The power supply voltage is supplied to the semiconductor laser 54 through the terminal 42, the signal line 12 c and the capacitor 60. A laser drive IC (Integrated Circuit, not shown) is disposed outside the optical module 500 and connected to a terminal 42 of the optical module 500. The laser drive IC amplifies and outputs an input signal that is a high-frequency signal. The input signal thus output is input to the semiconductor laser 54 via the coplanar line 11 of the substrate 10, the coplanar line 21 and microstrip line 25 of the substrate 20, and the microstrip line of the substrate 50. The output light of the semiconductor laser 54 is converged by the lens 47 and output to an optical fiber (not shown) inserted into the receptacle 43.

  The TEC 44 keeps the temperature of the semiconductor laser 54 constant. Thereby, the wavelength of output light can be locked. Further, since a part of the substrate 10 is exposed to the outside of the housing 40, the temperature of the substrate 10 is approximately the same as the outside. The substrate 20 is cooled by the TEC 44. Since the ground pattern of the substrate 10 and the ground pattern of the substrate 20 are separated from each other, heat is hardly transmitted between the substrates 10 and 20, and the temperature rise of the semiconductor laser 54 is suppressed.

  According to the fifth embodiment, the impedance loss between the coplanar lines 11 and 21 is taken to reduce the loss of the high frequency signal. For this reason, luminous efficiency becomes high. Since it is not necessary to provide a chip capacitor for impedance matching, the optical module 500 can be reduced in size and cost. The substrates 10 and 20 may be any of the first to fourth embodiments. The laser driving IC may be built in the optical module 500.

  Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and changes can be made within the scope of the gist of the present invention described in the claims. It can be changed.

10, 20 Substrate 11, 21 Coplanar line 13, 14, 16, 23, 24, 26 Ground pattern 15, 25 Microstrip line 17, 27 Via wiring 30, 32, 34 Bonding wire 100, 200, 300, 400 Transmission line 500 Optical module

Claims (1)

A first substrate;
A first signal line disposed on the first substrate;
A second substrate disposed adjacent to the first substrate;
A second signal line disposed on the second substrate;
A first ground pattern disposed on the first substrate;
Vias disposed on the first substrate at a position sandwiching the first signal line with the first ground pattern , facing an end of the second signal line , and provided on a side surface of the first substrate A second ground pattern connected to the ground potential via the wiring ;
Third and fourth ground patterns disposed on the second substrate with the second signal line interposed therebetween,
A first bonding wire for connecting between the first signal line and the second signal line,
A second bonding wire connecting the first ground pattern and the third ground pattern;
A third bonding wire connecting the second ground pattern and the fourth ground pattern;
The width of the second ground pattern in the direction in which the first ground pattern and the second ground pattern face each other is larger than the width of the first ground pattern in the direction in which the first ground pattern and the second ground pattern face each other. A transmission line characterized by being large .

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