JP6277151B2 - Sensor device - Google Patents

Description

  The present invention relates to a sensor device to which power is supplied from the outside, and more particularly to a sensor device having protection resistance against reverse power connection in which a positive electrode and a negative electrode of a power source are connected in reverse.

  For example, there is an overvoltage protection circuit described in Patent Document 1. This overvoltage protection circuit is composed of a surge protection circuit, an overvoltage detection circuit, and a switching circuit. The overvoltage protection circuit is supplied with DC power from an automobile battery (storage battery) via a power supply terminal Vcc and a ground terminal GND, and is used for a load. It is configured to supply overvoltage protected power to the load F1 connected to the power supply terminal VccS. The switching circuit is composed of P-type MOS transistors M1 and M2 and a resistor RM2. When an overvoltage is detected by the overvoltage detection circuit, a voltage is applied to the gate of the MOS transistor M2 via the MOS transistor M1 and the MOS is applied. The transistor M2 is shut off (turned off). As a result, the load power supply terminal VccS is disconnected (cut off) from the power supply receiving terminal Vcc.

JP 2000-332207 A

  However, the technique described in Patent Document 1 has protection against overvoltage, but lacks consideration for reverse power connection.

  In order to explain the problem in the sensor device, FIG. 17 shows a configuration of a sensor device 110 as a comparative example to the present invention. The sensor device 110 processes a power supply terminal 111 that supplies power, a ground terminal 112, a sensor element 118 that generates an electrical signal corresponding to a physical quantity, power supply to the sensor element 118, and an output signal from the sensor element 118. Signal processing LSI 113. The signal processing LSI 113 includes an overvoltage detection circuit 114 that detects that an overvoltage is applied to the power supply terminal 111, a signal processing circuit 117 that processes an output signal from the sensor element 118, and the sensor element 118 and the signal processing circuit 117. It is composed of a MOS transistor 116 that cuts off power supply. In FIG. 17, the parasitic diode 115 of the MOS transistor 116 is clearly shown.

  When a normal power supply voltage is supplied to the sensor device 110, the overvoltage detection circuit 114 sets the gate voltage of the MOS transistor 116 to 0 V to turn on the MOS transistor 116 and to the sensor element 118 and the signal processing circuit 117. Supply power. When an overvoltage is applied to the power supply terminal 111 of the sensor device 110, the overvoltage detection circuit 114 turns off the MOS transistor 116 by setting the gate voltage of the MOS transistor 116 to the same potential as that of the power supply terminal 111. By shutting off the power supply to the sensor element 118 and the signal processing circuit 117, the sensor element 118 and the signal processing circuit 117 are prevented from being damaged due to overvoltage. However, when the power supply of the sensor device 110 is reversely connected, the voltage of the power supply terminal 111 becomes a negative voltage. In this case, a negative voltage is applied to the sensor element 118 and the signal processing circuit 117 via the parasitic diode 115 of the MOS transistor 116. When a negative voltage is applied to the sensor element 118 and the signal processing circuit 117, an overcurrent flows to the sensor element 118 and the signal processing circuit 117 due to the negative voltage, and the sensor element 118 and the signal processing circuit 117 may be destroyed.

  An object of the present invention is to provide a sensor device with improved reliability by protecting a sensor element and a signal processing circuit from reverse connection of a power source.

  In order to solve the above-described problems, in the sensor device of the present invention, a signal processing circuit that detects the physical quantity and outputs an output signal corresponding to the physical quantity is processed from a load and a power supply terminal to the load. A power supply line for supplying power and a ground line for supplying a ground voltage from a ground terminal, and a well-feeding MOS transistor is provided between the well of the MOS transistor connected to the power supply line and the power supply line. When the power supply is normal and the voltage of the power supply terminal is higher than the voltage of the ground terminal, the well power supply MOS transistor is turned on, and the voltage of the power supply terminal is connected to the power supply line. When the power supply is supplied to the well of the MOS transistor and the voltage of the power supply terminal is lower than the voltage of the ground terminal when the power supply is abnormal, Serial wells feeding MOS transistor is turned off, and configured not current flows from the well to the power supply line of the MOS transistor.

  ADVANTAGE OF THE INVENTION According to this invention, the sensor apparatus which improved reliability by protecting a sensor element and a signal processing circuit from reverse connection of a power supply can be provided.

It is a figure which shows the structure of the sensor apparatus of a 1st Example. 2 is a diagram showing a configuration of an overvoltage detection circuit 5. FIG. 2 is a diagram showing a vertical structure of a power cut-off MOS transistor 6. FIG. It is a figure which shows the operation state at the time of the normal of the sensor apparatus of a 1st Example. It is a figure which shows an operation state when an overvoltage is applied to the sensor apparatus of a 1st Example. It is a figure which shows an operation state when the power supply of the sensor apparatus of a 1st Example is reversely connected. It is the wave form diagram which showed the voltage state of the node in each operation state. It is the figure which showed the ON or OFF state of the MOS transistor in each operation state. It is a figure which shows the structure of the sensor apparatus of a 2nd Example. It is a figure which shows the operation state when the power supply of the sensor apparatus of a 2nd Example is reversely connected. It is a figure which shows the structure of the sensor apparatus of a 3rd Example. It is a figure which shows the structure of the sensor apparatus of a 4th Example. It is a figure which shows the vertical structure of the output driver part of a 4th Example. It is a figure which shows the operation state at the time of the normal of the sensor apparatus of a 4th Example. It is a figure which shows the operation state when the power supply of the sensor apparatus of a 4th Example is reversely connected. It is a figure which shows the structure of the sensor apparatus of a 5th Example. It is a figure which shows the structure of the sensor apparatus as a comparative example with respect to this invention.

  Embodiments of the present invention will be described below with reference to the drawings.

First, a sensor device according to a first embodiment of the present invention will be described with reference to FIGS. 1 shows the configuration of the sensor device of the first embodiment, FIG. 2 shows the configuration of the overvoltage detection circuit 5, FIG. 3 shows the vertical structure of the power cutoff MOS transistor 6 and the well-feeding MOS transistors 9, 10, and FIG. 5 and 6 are circuit diagrams showing the voltage of each node when normal, when an overvoltage is applied, and when reversely connected. FIG. 7 is a waveform diagram showing the voltage at each node when normal, overvoltage is applied, and reverse connection. FIG. 8 is a power cutoff MOS transistor 6 and a well feed switch MOS transistor 9 when normal, overvoltage is applied, and reverse connection. 10 is a table showing 10 on and off states.

  The sensor device 1 of the present embodiment includes a power supply terminal 2 that supplies power, a ground terminal 3, a sensor element 8 that generates an electrical signal corresponding to a physical quantity, power supply to the sensor element 8, and output from the sensor element 8. And a signal processing LSI 4 for processing signals. The signal processing LSI 4 includes an overvoltage detection circuit 5 that detects that an overvoltage is applied to the power supply terminal 2, a signal processing circuit 7 that processes an output signal from the sensor element 8, and a power supply to the sensor element 8 and the signal processing circuit 7. The power cut-off MOS transistor 6 that cuts off the supply and the well-feeding MOS transistors 9 and 10 that supply the voltage to the well of the power cut-off MOS transistor 6 are configured.

  The sensor device 1 includes, as a load, a signal processing circuit 7 that processes the output signal of the sensor element 8 that detects a physical quantity and outputs an output signal corresponding to the physical quantity, and supplies power from the power supply terminal 2 to the load. The power supply line 201 is provided with a power supply cutoff MOS transistor 6 having a first terminal connected to the power supply terminal 2 side and a second terminal connected to the load side, and an input signal inputted to the gate terminal of the power supply cutoff MOS transistor 6 Thus, the power cutoff MOS transistor 6 is switched between the on state and the off state to prevent an abnormal voltage from being supplied to the load.

  An example of the overvoltage detection circuit 5 is shown in FIG. The overvoltage detection circuit 5 includes an input terminal 21 to which the voltage of the power supply terminal 2 is supplied, an input terminal 22 to which a ground voltage is supplied, resistors 23 and 24 that divide the voltage between the input terminals 21 and 22, and a resistor 23. , 24, the MOS transistor 30 that is turned on / off according to the divided voltage, and the MOS transistors 28, 29 that form a current mirror circuit that allows the current of the MOS transistor 30 to flow to the resistor 31, and the voltage at the power supply terminal 2 is lower than GND at the time of reverse connection MOS transistors 25, 26, 27 for preventing overcurrent from flowing through the overvoltage detection circuit 5, a resistor 31 for generating a voltage at the output terminal 32 according to the current flowing through the MOS transistor 29, and a power supply The output terminal 32 is connected to the gate terminal of the blocking MOS transistor 6.

  In the overvoltage detection circuit 5, when the voltage of the power supply terminal 2 is normal, that is, when the voltage of the input terminal 21 is not more than a predetermined value, the MOS transistor 30 is turned off, so that the current flowing through the resistor 31 becomes 0 and the output terminal The voltage of 32 is set to 0V. When an overvoltage is applied to the power supply terminal 2, that is, when the voltage at the input terminal 21 is equal to or higher than a predetermined value, the MOS transistor 30 is turned on, so that a current flows through the resistor 31, and the voltage at the output terminal 32 is applied to the input terminal. The potential is almost the same as the voltage of 21. When the power supply is reversely connected, that is, when the voltage at the input terminal 21 is a negative voltage, the MOS transistors 25 and 26 are turned off, so that the current flowing through the resistor 31 is 0, and the voltage at the output terminal 32 is 22, that is, the same potential as the ground terminal 3.

  Next, FIG. 3 shows the vertical structure of the power cutoff MOS transistor 6 and the well power supply MOS transistors 9 and 10. The power cut-off MOS transistor 6 is provided with an N-type well layer 56 on a P-type silicon substrate 57 provided with P + diffusions 43 for taking out electrodes, and is provided in the N-type well layer 56 for taking out electrodes from the N-type well layer 56. N + diffusion 44, P + diffusions 48 and 51 for forming source and drain regions, and a gate electrode 50 disposed between the source and drain regions. The well-feeding MOS transistor 9 includes P + diffusions 45 and 47 that form source and drain regions in the same N-type well layer 56 as the power cutoff MOS transistor, and a gate electrode 46 disposed between the source and drain regions. The The well-feeding MOS transistor 10 includes P + diffusions 52 and 54 that form source and drain regions in the same N-type well layer 56 as the power cutoff MOS transistor, and a gate electrode 53 disposed between the source and drain regions. The The terminal 41 is connected to the P + diffusion 48 of the power cutoff MOS transistor 6, the P + diffusion 47 of the well power supply switch MOS transistor 9, and the gate electrode 53 of the well power supply switch MOS10. The terminal 42 is connected to a P + diffusion 43 provided for taking out an electrode from the P-type silicon substrate and a gate electrode 46 of the well power supply switch MOS9. The terminal 55 is connected to the P + diffusion 51 of the power cutoff MOS transistor 6 and the P + diffusion 52 of the well power supply switch MOS transistor 10. The terminal 41 is connected to the power supply terminal 2, the terminal 42 is connected to the ground terminal 3, and the terminal 55 is connected to the sensor element 8 and the processing circuit 7.

  Next, the operation when a normal power supply voltage is supplied to the sensor device 1 of this embodiment will be described with reference to FIG. FIG. 4 clearly shows parasitic diodes formed between the P-type substrate and the N-type well layer and between the N-type well layer and the P + diffusion. The diode 17 represents a parasitic diode between the P-type substrate 57 and the N-type well 56. Diode 11 represents a parasitic diode between N-type well 56 and P + diffusion 48. Diode 12 is a parasitic diode between N-type well 56 and P + diffusion 51. Diode 13 represents a parasitic diode between N-type well 56 and P + diffusion 47. Diode 14 represents a parasitic diode between N-type well 56 and P + diffusion 45. Diode 15 is a parasitic diode between N-type well 56 and P + diffusion 52. Diode 16 represents a parasitic diode between N-type well 56 and P + diffusion 54. When the power supply voltage is normal, the voltage of the power supply terminal 2 is 5 V in FIG. In this case, the output of the overvoltage detection circuit 5 becomes 0V as described above, and the gate voltage of the power cutoff MOS transistor 6 becomes 0V. The source terminal of the power cutoff MOS transistor 6 is considered to be the high potential power supply terminal 2 side. Since the potential between the gate and the source is -5V, the power cutoff MOS transistor 6 is turned on, and the sensor element 8 and the signal processing circuit 7 5V is supplied as a power source. Further, since the gate of the well power supply MOS transistor 9 is connected to the ground terminal 3, it is 0V. Since the source terminal is considered to be the high potential power supply terminal 2 side and the potential between the gate and the source becomes −5V, the well power supply MOS transistor 9 is turned on, and the N-type well 56 includes the well power supply MOS transistor. The potential 5 V of the power supply terminal 2 is supplied through 10. On the other hand, the gate voltage of the well feeding MOS transistor 10 is 5 V because it is connected to the power supply terminal 2. The source terminal is considered to be on the N-type well 56 side having a high potential, and the potential between the gate and the source becomes 0 V, so that the well power supply MOS transistor 10 is turned off. Since the well power supply MOS transistor 9 is turned on, the voltage of the power supply terminal 2 is reliably supplied to the N-type well 56, and the power cutoff MOS transistor 6 can operate stably. When the potential of the N-type well 56 is not stable, there is a possibility that the on-current of the power cut-off MOS transistor 6 varies due to the back bias effect of the MOS. When the on-current of the power supply cutoff MOS transistor 6 decreases, the power supply of the processing circuit 7 and the sensor element 8 may fluctuate due to the load current of the processing circuit 7 and the sensor element 8, which may cause malfunction.

  Next, the operation when an overvoltage is supplied to the sensor device 1 of the present embodiment will be described with reference to FIG. In the case of an overvoltage, the voltage of the power supply terminal 2 is 10 V in FIG. In this case, the output of the overvoltage detection circuit is 10 V, which is the same potential as the power supply terminal 2 as described above, and the gate voltage of the power cutoff MOS transistor 6 is 10 V. The source terminal of the power cutoff MOS transistor 6 is considered to be the side of the power supply terminal 2 having a high potential, and the source potential is also 10V. Since the potential difference between the gate and the source becomes 0V, the power cut-off MOS transistor 6 is turned off. In the well power feeding MOS transistor 9, the potential of the gate connected to the ground terminal 3 is 0V, and the potential on the power supply terminal 2 side, which is considered to be higher and the source, is 10V. Since the potential difference between the gate and the source becomes −10V, the well power supply MOS transistor 9 is turned on, and 10V is supplied to the N-type well 56 through the well power supply MOS transistor 9. On the other hand, the well-feeding MOS transistor 10 has a gate connected to the power supply terminal 2 of 10 V, and is considered to be on the N-type well 56 side which has a higher potential and is considered to be a source, and the potential difference between the gate and the source is 0 V. Therefore, the well power supply MOS transistor 10 is turned off. Since the power cutoff MOS transistor 6 and the well power supply MOS transistor 10 are in the OFF state, no voltage is supplied from the power supply terminal 2 to the sensor element 8 and the signal processing circuit 7, and the sensor element 8 and the signal processing circuit 7 are not supplied. The power supply of is 0V. Thereby, even if an overvoltage is supplied to the sensor device 1, it is possible to prevent the overvoltage from being supplied as it is to the sensor element 8 and the signal processing circuit 7, and the reliability to the sensor element 8 and the signal processing circuit 7 can be prevented. Can be secured.

  Next, the operation when the sensor device 1 of this embodiment is reversely connected will be described with reference to FIG. In the case of reverse connection, the voltage of the power supply terminal 2 is −5 V in FIG. In this case, the output of the overvoltage detection circuit 5 is 0 V as described above. The source terminal of the power cut-off MOS transistor 6 is considered to be the side connected to the sensor element 8 and the signal processing circuit 7 having a high potential. The potential of the source terminal is 0 V because it is connected to the ground terminal 3 with a low resistance by the parasitic diode inside the signal processing circuit 7. Since the potential difference between the gate and the source becomes 0V, the power cut-off MOS transistor 6 is turned off. The well power supply MOS transistor 10 has a gate voltage of −5V. The sensor element 8 considered to have a higher potential and the terminal on the processing circuit 7 side are considered as the source, and the source potential becomes 0V. Since the potential difference between the gate and the source is −5 V, the well power supply MOS transistor 10 is turned on. 0V is supplied to the N-type well 56 through the well power supply MOS transistor 10 in the on state. The well power supply MOS transistor 9 has a gate connected to the ground terminal 3 and has a gate potential of 0V. Further, the terminal on the N-type well 56 side, which has a higher potential and is considered to be a source, becomes 0V. Since the potential difference between the gate and the source becomes 0 V, the well power supply MOS transistor 9 is turned off.

  The current flowing from the ground terminal 3 to the power supply terminal 2 through the parasitic diode 17 and the parasitic diode inside the signal processing circuit 7 is cut off by the power cutoff MOS transistor 6 and the well feeding MOS transistor 9 in the off state. For this reason, even if it is a reverse connection, an overcurrent does not generate | occur | produce and the destruction by the overcurrent of the sensor apparatus 1 can be prevented.

  FIG. 7 and FIG. 8 show a summary of the operations related to the above points. FIG. 7 shows the voltage of the power supply terminal 2, the voltage of the N-type well 56, and the gate voltage of the power cutoff MOS transistor 6 when normal, overvoltage is applied, and when the power supply is reversely connected. FIG. 8 shows whether the power cut-off MOS transistor 6 and the well power supply switches MOS 9 and 10 are in an on state or an off state in normal operation, overvoltage application, and reverse power connection.

  Thus, according to the present embodiment, a sensor device that ensures normal operation when a voltage is normally applied and is not destroyed even when an overvoltage is applied or reversely connected, that is, a sensor device with improved reliability. Can be realized.

  Next, a sensor device according to a second embodiment of the present invention will be described with reference to FIG. The sensor device 1 ′ of the second embodiment has basically the same configuration as the sensor device 1 of the first embodiment, but does not have the well-feeding MOS transistor 10.

  As shown in the table of FIG. 8, the well-feeding MOS transistor 10 is in an off state when it is normal and when an overvoltage is applied. However, it affects the operation because it is turned on when the power supply is reversely connected. Here, the operation when the power supply is reversely connected will be described with reference to FIG. As described in the first embodiment, the power cut-off MOS transistor 6 and the well power supply MOS transistor 9 are turned off, and the well power supply MOS transistor 10 is not present, so that the N-type well 56 is connected to the ground terminal 3 through the parasitic diodes 12 and 17. Is supplied with voltage. Since the forward turn-on voltage of the parasitic diode is approximately 0.6 V, the potential of the N-type well 56 is approximately −0.6 V, and the off current of the power cutoff MOS transistor 6 may increase due to the forward bias effect. If it is about −0.6 V, the increase amount is very small, and it is considered that there is no problem. According to the configuration of the second embodiment, the area can be reduced as compared with the configuration of the first embodiment because the well-feed MOS transistor 10 is not provided, while the effects of the first embodiment described above can be obtained. It becomes possible to reduce the manufacturing cost.

  Next, a sensor device according to a third embodiment of the present invention will be described with reference to FIG. In the sensor device 1 '' of the third embodiment, the operating voltage of the signal processing circuit 7 'and the sensor element 8' is lower than the voltage supplied from the outside to the power supply terminal 2, and the signal processing circuit 7 inside the signal processing LSI 4 ''. A configuration for generating a voltage to be supplied to “and the sensor element 8” is shown. The sensor device 1 ″ includes a power supply terminal 2 that supplies power, a ground terminal 3, a sensor element 8 ′ that generates an electrical signal corresponding to a physical quantity, power supply to the sensor element 8 ′, and power supply from the sensor element 8 ′. It comprises a signal processing LSI 4 ″ for processing output signals. The signal processing LSI 4 ″ includes an overvoltage detection circuit 5 that detects that an overvoltage is applied to the power supply terminal 2, a signal processing circuit 7 ′ that processes an output signal from the sensor element 8 ′, a constant voltage generation circuit 61, A step-down power supply voltage supply MOS transistor 65 that supplies a voltage to the operational amplifier 62, the signal processing circuit 7 ', and the sensor element 8', and a constant load current is supplied to stabilize the supply voltage of the step-down power supply voltage supply MOS transistor 65. A load current source MOS transistor 66, MOS transistors 71 and 73 for outputting a signal to the outside of the level shifter circuit 68 for converting a signal output from the signal processing circuit 7 ′ to a voltage level supplied to the power supply terminal 2, and a constant A voltage is supplied to the MOS transistor 63 that connects the voltage generation circuit 61 and the operational amplifier 62 to the power supply terminal 2 and the well of the MOS transistor. The MOS transistor 64 for supplying voltage, the MOS transistor 67 for supplying voltage to the well of the step-down power supply voltage supply MOS transistor 65, the MOS transistor 69 for connecting the level shifter 68 and the power supply terminal 2, and the voltage for supplying the well to the well of the MOS transistor 69 A MOS transistor 70 and a MOS transistor 72 for supplying a voltage to the well of the MOS transistor 71 are configured.

  Next, the operation will be described. During normal operation, the output signal of the overvoltage detection circuit 5 is low and the operational amplifier 62 is in an operating state. The constant voltage generation circuit 61 inputs a constant voltage to the non-inverting input terminal of the operational amplifier 62. The operational amplifier 62 uses the same power supply voltage for the signal processing circuit 7 ′ and the sensor element 8 ′ as the voltage input from the constant voltage generation circuit. The gate voltage of the step-down power supply voltage supply MOS transistor 65 is controlled so as to be a voltage. A constant voltage is input from the constant voltage generation circuit to the gate of the load current source MOS transistor 66 so as to obtain a desired load current. The signal output from the signal processing circuit 7 ′ is converted to a higher voltage level by the level shifter circuit 68 and output to the outside through the terminal 74 by the driver MOS transistors 71 and 73.

  Next, the operation when an overvoltage is applied to the power supply terminal 2 will be described. When an overvoltage is applied, the output of the overvoltage detection circuit 61 becomes high and the operational amplifier 62 is stopped. The output of the operational amplifier 62 in the stopped state is in a high state, and the step-down power supply voltage supply MOS transistor register 65 is in an off state. As a result, an overvoltage is supplied to the signal processing circuit 7 ′ and the sensor element 8 ′ to prevent destruction. Since the withstand voltage of the circuits other than the signal processing circuit 7 ′ and the sensor element 8 ′ is higher than the voltage supplied to the power supply terminal 2 when an overvoltage is applied, it is not destroyed even when an overvoltage is applied.

  Next, the operation when the power supply is reversely connected will be described. When the power supply voltage is reversely connected, the MOS transistors 63, 64, 67, 69, 70, 72 are turned off. For this reason, the output of the operational amplifier 62 is substantially the same voltage as the ground terminal 3. In the step-down power supply voltage supply MOS transistor 65, the terminal on the side connected to the power supply of the signal processing circuit 7 ′ and the sensor element 8 ′ having a higher voltage is considered as the source terminal. Since the source side terminal is equal to or lower than the voltage applied to the ground terminal 3 and the voltage between the gate and the source is 0 V or lower, the MOS transistor 65 is turned off. Similarly, the output of the MOS level shifter circuit 68 is almost the same voltage as the ground terminal 3, and the MOS transistor 71 is also turned off. Since the MOS transistors 63, 64, 65, 67, 69, 70, 71, 72 connecting the power supply terminal 2 and the internal node are all turned off, the ground terminal 3 is not connected to the power supply terminal 2 even when the power supply is reversely connected. Overcurrent does not flow and destruction can be prevented.

  In the present embodiment, in the circuit that generates the drive voltage of the processing circuit internally, the circuit that generates the drive voltage has the function of the cutoff switch, so that the power cutoff switch is unnecessary, and the area can be reduced, and It is possible to provide a sensor device that does not break even when power is reversely connected, that is, a sensor device with improved reliability.

  Next, a sensor device according to a fourth embodiment of the present invention will be described with reference to FIG. The sensor device 1 ′ ″ according to the fourth embodiment includes a signal processing LSI 4 ′ ″ and a sensor element 8 ′. The signal processing LSI 4 ′ ″ is substantially the same as the signal processing LSI 4 ″, and a MOS transistor 75 that connects the well of the MOS transistor 75 and the ground terminal 3 is added to the signal processing LSI 4 ″. The fourth embodiment aims to prevent destruction of the sensor device 1 ′ ″ and the external device due to the occurrence of overcurrent when a voltage lower than the voltage of the ground terminal 3 is supplied to the output terminal 74 from the outside. And

  The vertical structure of the MOS transistors 71, 72, 73, 75 is shown in FIG. N-type wells 86 and 87, an N-type well 88 formed below the N-type wells 86 and 87, and a P-type well 88 are formed on the P-type substrate 57. The P-type well 88 is separated from the P-type substrate 57 by N-type wells 86, 87 and 88.

  The terminal 81 is connected to the power supply terminal 2, and the terminal 82 is connected to the ground terminal 3. A P + diffusion 89 configured to extract electrodes on a P-type substrate is connected to a terminal 82 and supplies a ground voltage to the P-type substrate. A P-type diffusion 90 is formed on the P-type well 88 and serves as an electrode for supplying a voltage to the P-type well 88. The N type diffusions 91 and 93 and the gate electrode 92 formed on the P type well 88 constitute a MOS transistor 75, the N type diffusion 93 is connected to the ground terminal 3 through the terminal 82, and the N type diffusion 91 is a P type. It is connected to a P-type diffusion 90 that serves as an electrode for supplying a voltage to the well 88 and serves as a switch for connecting the terminal 82 and the P-type well 88. N-type diffusions 94 and 96 and gate electrode 95 constitute MOS transistor 73. The P-type diffusions 97 and 99 and the gate electrode 98 formed on the N-type well 87 constitute a MOS transistor 71. The P-type diffusions 100 and 102 formed on the N-type well 87 and the gate electrode 101 constitute a MOS transistor 72, and the P-type diffusion 100 is connected to the power supply terminal 2 through the terminal 81. It is connected to the N-type diffusion 103 serving as an electrode for supplying a voltage to the type well 87, and serves as a switch for connecting the terminal 81 and the N-type well 87. A terminal 83 represents an input terminal to the gate electrodes of the MOS transistors 71 and 73 and is connected to an output of the level shifter 68 circuit. A terminal 84 represents an output terminal of the output driver MOS transistors 71 and 73 and is connected to a signal output terminal 74 to the outside of the sensor device 1 ′ ″.

  FIG. 14 shows a normal operation state. FIG. 14 clearly shows the parasitic diode 76 of the output driver MOS transistor 73. The parasitic diode 76 is configured between the P-type well 88 and the N-type diffusion 96. The case where 5V is output to the power supply terminal 2, 0V to the ground terminal 3, and 0 to 5V is output to the output terminal 74 is shown. 5V is applied to the gate electrode of the well power feeding MOS transistor 75 through the power supply terminal 2, and 0V is supplied to a terminal connected to the ground terminal 3 which is considered to be a source having a lower voltage. The voltage between the gate and the source becomes 5V, the well power supply MOS transistor 75 is turned on, and a voltage of 0V is supplied to the P-type well 88. Since the voltage of the output terminal 74 is 0 to 5V, the forward voltage of the parasitic diode 76 is −5V to 0V and 0V or less, and no current flows.

  FIG. 15 shows the operation when a voltage lower than that of the ground terminal 3 is applied to the output terminal 74 through an external resistor or diode. The case where -5V is applied to the power supply terminal 2, 0V to the ground terminal 3, and -5V to the output terminal 74 is applied. The power supply is reversely connected, and a voltage state is assumed assuming that the output terminal 74 is connected to −5 V of the power supply by an external resistor or a diode. The gate voltage of the MOS transistor 75 is -5V, the potential of the P-type well, which is considered to be a lower voltage source, is -5V, and the voltage between the gate and the source is 0V or less, so the MOS transistor 75 is turned off. . Since no voltage is supplied to the P-type well 88 from the ground terminal 3, no overcurrent is generated in the parasitic transistor 76, and the sensor device 1 ″ ′ can be prevented from being destroyed.

  According to this embodiment, it is possible to provide a sensor device that is not destroyed by an overcurrent even when a voltage lower than that of a ground terminal is applied to an output terminal through an external element, that is, a sensor device with improved reliability. Is possible.

  Next, a sensor device according to a fifth embodiment of the present invention will be described with reference to FIG. The sensor device 1 ″ ″ of the fifth embodiment includes a signal processing LSI 4 ″ ″ and a sensor element 8. The signal processing LSI 4 ″ ″ is almost the same as the signal processing LSI 4 already described. The difference is that the diode 104 and the resistor 105 are connected to the gate of the power cut-off MOS transistor 6, the diode 106 and the resistor 107 are connected to the gate of the well power supply MOS transistor 9, and the well power supply MOS transistor. The difference is that a diode 108 and a resistor 109 are connected to the gate of the transistor 10. The diodes 104, 106, and 108 and the resistors 105, 107, and 109 serve to clamp the voltage difference between the gate and source of the MOS transistor below a certain value. This prevents the voltage difference between the gate and source of the MOS transistors 6 and 9 from exceeding the breakdown voltage and being destroyed when a voltage exceeding the breakdown voltage of the MOS transistor is applied to the power supply terminal 2 due to ESD or surge. To do. For example, the breakdown voltage due to the reverse voltage of the diode is 15V, and the breakdown voltage of the MOS transistors 6 and 9 is 20V.

  Assuming that the normal power supply voltage is 5 V, the diode 104 does not pass a current in the normal state. Therefore, the gate voltage of the power cutoff MOS transistor 6 becomes the same potential as the output of the overvoltage detection circuit 5 through the resistor 105. Since the diode 105 also does not pass current, the gate voltage of the well-fed MOS transistor 9 becomes the same potential as the ground terminal 3 through the resistor 107. Both the power cutoff MSO 6 and the well power supply MOS 9 are turned on, and supply the power supply voltage to the signal processing circuit 7 and the sensor element 8 as in the first embodiment.

  Next, consider the overvoltage application. Assuming that the applied voltage at the time of overvoltage application is 10V, the diodes 104 and 106 do not pass current as in the normal state, so the gate voltage of the power cutoff MOS transistor 6 becomes the same potential as the output of the overvoltage detection circuit 5 through the resistor 105. Since the output of the overvoltage detection circuit is in the high state, the power cutoff MOS transistor 6 is turned off to prevent the overvoltage from being applied to the signal processing circuit 7 and the sensor element 8 to be destroyed. Since the diode 105 also does not pass current, the gate voltage of the well power supply MOS transistor 9 becomes the same potential as the ground terminal 3 through the resistor 107, the well power supply MOS transistor 9 is turned on, and the well cutoff MOS transistor 6 well Supply the power supply voltage to ensure stable operation.

  Next, consider the case where the power supply is reversely connected. Assuming that the power supply voltage at the time of reverse connection of the power supply is −5 V, a current may flow from the ground terminal 3 to the power supply terminal 2 through the resistor 104 connected to the diode 104, the resistor 105, and the output of the overvoltage circuit. By making the resistance value 105 sufficiently high, it is possible to suppress it to a desired current value or less. A current may flow from the ground terminal 3 to the power supply terminal 2 through the diode 106 and the resistor 107, but by making the resistance value of the resistor 107 sufficiently high, it can be suppressed to a desired current value or less. A current may flow from the ground terminal 3 to the power supply terminal 2 through the parasitic diode of the MOS transistor constituting the signal processing circuit 7, the diode 108, and the resistor 109. However, by making the resistance value of the resistor 109 sufficiently high, a desired value can be obtained. It is possible to suppress it below the current value.

  When a voltage exceeding 15V is applied to the power supply terminal 2 due to ESD or surge, the diode 104 is in a breakdown state and becomes sufficiently low with respect to the resistor 105. Therefore, the voltage between the source and gate of the power shutoff MSO transistor 6 The difference is 15 V, and the breakdown voltage is 20 V or less, so that destruction can be prevented. Since the diode 106 is also in a breakdown state and has a sufficiently low resistance with respect to the resistor 107, the voltage difference between the source and the gate of the well-fed MOS transistor 9 is 15V, and the breakdown voltage is 20V or less, thereby preventing breakdown. Since the diode 108 is also in a breakdown state and has a sufficiently low resistance with respect to the resistor 109, the voltage difference between the gate of the well-fed MOS transistor and the terminal connected to the power supply line of the signal processing circuit 7 is 15V or less, and the breakdown is destroyed. Can be prevented. In addition, when a voltage of −15 V or less is applied to the power supply terminal 2 due to ESD or surge, the diodes 104, 106, and 108 are applied with a forward voltage and become sufficiently low in resistance to the resistors 105, 107, and 109. Therefore, the gate voltages of the MOS transistors 6, 9, and 10 become substantially the same potential as that of the power supply terminal 2, and no potential difference is generated between the gate and the source, thereby preventing destruction.

  As described above, according to the present embodiment, it is possible to provide a sensor device with improved reliability without being damaged by overvoltage application or reverse connection of a power source, and a sensor device with strong ESD and surge resistance can be realized.

DESCRIPTION OF SYMBOLS 1 ... Sensor apparatus, 2 ... Power supply terminal, 3 ... Ground terminal, 4 ... Signal processing LSI, 5 ... Overvoltage detection circuit, 6 ... Power supply cutoff MOS transistor, 7 ... Signal processing circuit, 8 ... Sensor element, 9, 10 ... Well Power supply MOS transistor, 25... Reverse current overcurrent prevention MOS transistor, 201... Power supply wiring, 202.

Claims (6)

A load is provided with a signal processing circuit for processing the output signal of the sensor element that detects the physical quantity and outputs an output signal corresponding to the physical quantity, and supplies a power from the power terminal to the load, and a ground voltage from the ground terminal A power supply cutoff MOS transistor having a first terminal connected to the power supply terminal side and a second terminal connected to the load side, and a ground line for supplying the power supply line, A well-feeding MOS transistor disposed between the well and the first terminal, and an overvoltage detection circuit for detecting an overvoltage, wherein the power cutoff is performed by an input signal input to a gate terminal of the power cutoff MOS transistor A sensor device that prevents the abnormal voltage from being supplied to the load by switching between the ON state and the OFF state of the MOS transistor. In,
The overvoltage detection circuit sets the voltage between the gate and source of the power cut-off MOS transistor at different levels depending on whether the power supply is reversely connected or not when the power supply is reversely connected. Which switches between
When the power supply is normal and the voltage at the power supply terminal is higher than the voltage at the ground terminal, the well-feeding MOS transistor is turned on, and the voltage at the power supply terminal is connected to the power supply line. Supplied to the well,
When the power supply is abnormal and the voltage at the power supply terminal is lower than the voltage at the ground terminal, the well power supply MOS transistor is turned off so that no current flows from the well of the power supply cutoff MOS transistor to the power supply line. Configured,
When an overvoltage is detected by the overvoltage detection circuit, the well power supply MOS transistor is turned on, the power cut-off MOS transistor is turned off, and no current flows from the well of the power cut-off MOS transistor to the power supply line. A sensor device configured as described above . The sensor device according to claim 1,
A sensor device characterized in that a gate terminal of the well power feeding MOS transistor is connected to a ground line. The sensor device according to claim 1,
A second well feeding MOS transistor is provided between the well of the power cutoff MOS and the second terminal;
When the power supply voltage is higher than the ground voltage, the second well power supply MOS transistor is in an off state,
When the power supply is reversely connected and the power supply voltage is lower than the ground voltage, the sensor device is turned on, and the voltage of the second terminal is well-fed. The sensor device according to claim 1,
A sensor device characterized in that the gate of a well-fed MOS transistor is connected to a ground line. A signal processing circuit that detects the physical quantity and outputs an output signal corresponding to the physical quantity is used as a load, and a power processing line that supplies power to the load from the power terminal and a ground voltage from the ground terminal. In a sensor device comprising a ground line to be supplied and an overvoltage detection circuit for detecting an overvoltage,
A step-down power supply MOS transistor having a source connected to the power supply line, a drain connected to a power supply line of the signal processing circuit, and a gate voltage controlled so that an output voltage of the drain is constant;
A load current source MOS transistor connected to a power supply line of the signal processing circuit;
An operational amplifier that controls the gate of the step-down power supply MOS transistor; a constant voltage source that supplies a constant voltage to the operational amplifier and the load current source MOS transistor;
A well-feeding MOS transistor connected to the well of the step-down power supply MOS transistor and supplying a voltage to the well of the step-down power supply MOS transistor connected to the power supply line;
The overvoltage detection circuit supplies a signal of a different level to the operational amplifier so that the voltage between the gate and the source of the step-down power supply MOS transistor differs at a normal time and when the power supply is reversely connected. And
When the power supply is reversely connected, the output of the operational amplifier is controlled so that the step-down power supply MOS transistor is turned off.
When the voltage of the power supply terminal power a normal is higher than the voltage of the ground terminal, the well feeding MOS transistor is turned on, the voltage step-down power MOS transistor a voltage is connected to the power line of the terminal Supplied to the wells
When the power supply is abnormal and the voltage at the power supply terminal is lower than the voltage at the ground terminal, the well power supply MOS transistor is turned off so that no current flows from the well of the step-down power supply MOS transistor to the power supply line. Composed of
When an overvoltage is detected by the overvoltage detection circuit, the well power supply MOS transistor is turned on, the step-down power supply MOS transistor is turned off, and current flows from the well of the step-down power supply MOS transistor to the power supply line. The sensor device is configured so as not to exist . The sensor device according to claim 5,
An output terminal for outputting an output signal of the processing circuit to the outside; and an output driver for driving an external load;
The output driver is connected to a power supply line and a power supply voltage supply MOS transistor for supplying a power supply voltage to an output terminal;
A voltage extracting MOS transistor connected to the ground line and extracting the power supply voltage of the output terminal;
A well-feeding MOS transistor that connects a well of the power supply voltage supply MOS transistor and a power supply line;
A well-feeding MOS transistor connecting the well of the voltage extracting MOS transistor and the ground line;
2. The sensor device according to claim 1, wherein the well power supply MOS transistor is turned on when the power supply voltage is normal higher than the ground voltage, and is turned off when the power supply voltage is lower than the ground voltage.

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