JP5995054B2 - Waveform generator, program, waveform generation method, and electronic musical instrument - Google Patents

Description

The present invention relates to a waveform generation device , a program, a waveform generation method, and an electronic musical instrument suitable for use as a sound source of an electronic musical instrument .

  2. Description of the Related Art A so-called oscillator-synchronized waveform generator is known that includes two systems of oscillators on the master side and slave side and forcibly synchronizes the waveform generation start timing of the slave oscillator with the waveform generation start timing of the master oscillator. In this type of waveform generator, for example, if the pitch of the slave waveform output is made constant and only the pitch of the master waveform output is changed, the waveform shape of the slave waveform output is deformed, thereby causing the pitch change and the timbre change simultaneously. A waveform having a unique acoustic effect (oscillator synchronization effect) obtained can be generated, and this type of device is disclosed in, for example, Patent Document 1.

JP 2009-42785 A

  By the way, even if a general waveform data readout type sound source is equipped with a multi-channel oscillator (waveform generator), any two sets of oscillators are assigned to a master oscillator and a slave oscillator, and a slave oscillator is provided. If it is attempted to forcibly synchronize the top of the waveform in which the error occurs with the waveform read cycle of the master oscillator, a hardware configuration for this synchronization is required, resulting in an increase in product cost.

The present invention has been made in view of such circumstances, and a waveform generating apparatus , a program, a waveform generating method, and an electronic musical instrument capable of realizing an oscillator synchronization effect by a waveform data reading method without incurring high product costs The purpose is to provide.

In order to achieve the above object, the waveform generator of the present invention comprises:
Sets the master waveform reading speed when reading a plurality of data samples corresponding to the master waveform for one period from the memory and the slave waveform reading speed when reading a plurality of data samples corresponding to the slave waveform for one period from the memory. Reading speed setting process to
An acquisition process for acquiring the number of data samples that can be read at the set slave waveform reading speed while reading the number of data samples corresponding to the master waveform for the one period at the set master waveform reading speed;
A first waveform reading process that repeats an operation of sequentially reading a plurality of data samples corresponding to the master waveform for one period from the memory at the set master waveform reading speed ;
Synchronously with the start of reading of the plurality of data samples corresponding to the master waveform, the plurality of data samples corresponding to the slave waveform for one period stored in the memory are determined from the position of the predetermined data sample. A reading start process for starting reading;
After starting reading data samples corresponding to the slave waveform, a plurality of data samples corresponding to the slave waveform are sequentially read at the set slave waveform reading speed, and corresponding to the read slave waveform It is determined whether or not the number of data samples matches the acquired number of data samples. If it is determined that the number of data samples matches, the reading of the slave waveform is returned to the position of the predetermined data sample and the one cycle a second waveform readout process of repeating an operation for reading a plurality of data samples corresponding to the amount of the slave waveform, characterized by having a processing unit for executing.

  According to the present invention, the oscillator synchronization effect can be realized by the waveform data reading method without incurring high product cost.

1 is a block diagram illustrating an overall configuration of an electronic musical instrument 100 according to an embodiment. It is a block diagram which shows the structure of the sound source 17 provided with the waveform generator by this invention. It is a figure for demonstrating the waveform reading of an oscillator. It is a figure for demonstrating the relationship between master oscillator OSC1 and slave oscillator OSC2. It is a flowchart which shows the operation | movement of a sound generation process. It is a flowchart which shows the operation | movement of a pitch calculation process. It is a flowchart which shows the operation | movement of an address calculation process. It is a flowchart which shows the operation | movement of a hardware pitch / address process. It is a flowchart which shows the operation | movement of a period process.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
A. Constitution
FIG. 1 is a block diagram showing an overall configuration of an electronic musical instrument 100 according to an embodiment of the present invention. An electronic musical instrument 100 shown in this figure includes a keyboard 10, a switch unit 11, a pitch vendor 12, a CPU 13, a display unit 14, a ROM 15, a RAM 16, a sound source 17, a D / A converter 18, and a sound system 19.

  The keyboard 10 generates performance information including a key-on / key-off signal, a key number (key number), velocity, and the like corresponding to a press / release key operation (performance operation). The switch unit 11 is provided on the musical instrument panel and includes various switches such as a tone color selection switch for selecting a tone color of the generated musical tone and an oscillator sync switch for designating whether or not to perform the oscillator sync. Generate an operation event.

  The pitch bender 12 generates a pitch bend value corresponding to the user's bender wheel turning operation and supplies it to the CPU 13. The pitch bend value is used to variably control pitch data (phase information) specified by performance information (key number) of the keyboard 10 as will be described later.

  The CPU 13 sets the operating state of each part of the musical instrument based on an operation event that occurs in response to a switch operation of the switch unit 11, and commands (for example, a sound generation instruction command, a mute instruction command, etc.) according to performance information supplied from the keyboard 10 ) And is sent to the sound source 17 to form a musical tone. Further, the CPU 13 gives pitch data (phase information) changed according to the pitch bend value supplied from the pitch bender 12 to the sound source 17. The characteristic processing operation of the CPU 13 according to the gist of the present invention will be described later.

  The display unit 14 includes a liquid crystal display panel and a drive circuit, and displays, for example, a parameter setting state and an operation state according to a display control signal supplied from the CPU 13. The ROM 15 stores various control programs and control data that are loaded into the CPU 13. The various control programs referred to here include pitch calculation processing, address calculation processing, and hardware pitch / address processing described later. The RAM 16 is used as a work area for the CPU 13 and temporarily stores various register / flag data.

  The sound source 17 generates a musical sound waveform corresponding to the performance information supplied from the CPU 13. The configuration of the sound source 17 will be described in detail later. The D / A converter 18 converts the musical sound waveform output from the sound source 17 into an analog musical sound signal and outputs it. The sound system 19 performs filtering such as removing unnecessary noise from the musical sound signal output from the D / A converter 18, and then amplifies it to make it sound from the speaker.

(2) Configuration of Sound Source 17 Next, the configuration of the sound source 17 will be described with reference to FIG. The sound source 17 is configured by a well-known waveform memory reading method using a DSP. Therefore, FIG. 2 illustrates functional blocks in which each function of the microprogram executed in the DSP is regarded as a hardware image.

  In FIG. 2, an LFO (low frequency oscillator) 171 generates an LFO waveform for pitch modulation. The adder 172 adds the pitch bender output (pitch bend value) output from the pitch bender 12 and the LFO waveform output from the LFO 171 according to the user's vendor wheel rotation operation, and supplies the sum to the oscillator 170a.

  The oscillator 170 a is supplied from the CPU 13 in response to the key depression, and modulates the pitch data (phase information) representing the reading speed corresponding to the pitch (key number) of the depressed key with the output of the adder 172, The waveform data is read from the waveform memory 173 at a reading speed according to the pitch data (phase information). The waveform memory 173 stores waveform data of various timbres, and the timbre waveform data selected by the user is read out by the oscillator 170a.

  An EG (envelope generator) 170 b generates a known ADSR type envelope waveform used for volume control under the control of the CPU 13. The amplifier 170c controls and outputs the amplitude of the waveform data output from the oscillator 170a in accordance with the envelope waveform supplied from the EG 170b.

  In the above configuration, the oscillator 170a, the EG 170b, and the amplifier 170c constitute a waveform generator (oscillator OSC) 170 corresponding to one sound generation channel. In the present embodiment, 64 sets of waveform generators (oscillator OSC) 170-1 to 170-64 are provided, and oscillator sync using two fixed sets (master oscillator OSC1 and slave oscillator OSC2) of these sets. Embody the function. The mixer 174 adds the waveform data output from the waveform generators 170-1 to 170-64 to generate a musical sound output.

  Here, with reference to FIG. 3 and FIG. 4, the waveform read operation of the master oscillator OSC1 and the slave oscillator OSC2 that implement the oscillator sync function will be described. FIG. 3 is a diagram showing a waveform reading operation of the waveform generator (oscillator OSC) 170. A waveform generator (oscillator OSC) 170 that reads waveform data from the waveform memory 173 includes a start point SP (start address) that specifies the beginning of the waveform data, an end point EP (end address) that specifies the end of the waveform data, and a loop. Point LP (loop address) and readout speed are specified.

  In the present embodiment, since one cycle of waveform data is repeatedly read, the loop point LP serving as a repetition point coincides with the start point SP. The waveform reading speed is represented by the increase width of the reading address in one sampling period.

  When the oscillator sync function is implemented using two master oscillators OSC1 and slave oscillator OSC2 per tone generation, the master oscillator OSC1 performs a normal waveform reading operation. The start point SP and the loop point LP of the slave oscillator OSC2 are at the beginning of the waveform, but the end point EP changes according to the pitch (more specifically, the waveform read cycle) of the master oscillator OSC1. This will be described with reference to FIG.

  4A and 4B illustrate a read operation when the pitch of the master oscillator OSC1 is higher (or lower) than that of the slave oscillator OSC2. When implementing the oscillator sync function, the slave oscillator OSC2 always returns to the start address in the same cycle as the master oscillator OSC1.

  Therefore, the end point EP of the slave oscillator OSC2 is the time point when the master oscillator OSC1 finishes reading one period of waveform data. In other words, if the pitch of the master oscillator OSC1 is higher than that of the slave oscillator OSC2, the slave oscillator OSC2 becomes the end point EP before reading one cycle of waveform data. On the other hand, if the pitch of the master oscillator OSC1 is lower than that of the slave oscillator OSC2, The end point EP is reached when the oscillator OSC2 reads waveform data for one period or more.

B. Operation Next, with reference to FIG. 5 to FIG. 9, each operation of the sound generation process and the periodic process mainly performed by the CPU 13 will be described. The sound generation process is executed in response to a key depression event, and includes a pitch calculation process, an address calculation process, and a hardware pitch / address control process. The periodic process is executed at a constant period (for example, every 1 msec) by a timer interrupt, and includes a pitch calculation process, an address calculation process, and a hardware pitch / address control process similar to the sound generation process.

(1) Sound Generation Process Operation FIG. 5 is a flowchart showing the sound generation process operation. When this process is executed in response to the key depression event, the pitch calculation process is executed via step SA1 shown in FIG. In the pitch calculation process, as will be described later, for each of the master oscillator OSC1 and the slave oscillator OSC2, a waveform read speed (address increment INC [n] per sampling period) corresponding to the pitch to be generated is calculated.

  Subsequently, in step SA2, an address calculation process is executed. In the address calculation process, as described later, when the oscillator OSC [0] is assigned to the master oscillator OSC1 and the oscillator OSC [1] is assigned to the slave oscillator OSC2, the start address of the waveform data read by the oscillator OSC [0] The loop address and end address are set in the registers SADR [0], LADR [0], and EADR, respectively, and the start address and loop address of the waveform data read by the oscillator OSC [1] are set in the registers SADR [1], respectively. ], Register LADR [1].

  When the oscillator sync function is used, the end address (register EADR [1]) of the oscillator OSC [1] (slave oscillator OSC2) matches the waveform read cycle of the oscillator OSC [0] (master oscillator OSC1). Change to By doing so, the oscillator OSC [1] (slave oscillator OSC2) always returns to the head address in the same cycle as the oscillator OSC [0] (master oscillator OSC1).

  Next, in step SA3, hardware pitch / address control processing is executed. In the hardware pitch / address control process, as will be described later, each of the oscillator OSC [0] (master oscillator OSC1) and the oscillator OSC [1] (slave oscillator OSC2) of the sound source 17 is obtained by the above-described pitch calculation process. The read speed (address increment INC per sampling period) and the start address, loop address, and end address obtained by the address calculation process described above are supplied.

  In step SA4, the oscillator OSC [0] (master oscillator OSC1) and the oscillator OSC [1] (slave oscillator OSC2) of the sound source 17 are started to read waveforms.

  As described above, in the sound generation process, the oscillator OSC [1] (slave oscillator OSC2) always returns to the start address in the same cycle as the oscillator OSC [0] (master oscillator OSC1). (Register EADR [1]) is controlled to match the waveform readout cycle of the master oscillator OSC1.

(2) Operation of Pitch Calculation Process FIG. 6 is a flowchart showing the operation of the pitch calculation process. When this process is executed through the above-described sound generation process step SA1 (see FIG. 5), the process proceeds to step SB1 shown in FIG. In step SB1, the key number of the depressed key is stored in the register KYN, the current LFO peak value is stored in the register CLF, the pitch bend width setting value is stored in the register PBR, and the current pitch bend value is stored in the register CPB.

  Subsequently, in step SB2, the oscillator number n is reset to zero. The value of the oscillator number n is “0” or “1”. When “0”, the array element for the master oscillator OSC1 is designated, and when the value is “1”, the array element for the slave oscillator OSC2 is designated. specify.

Next, in step SB3, the LFO degree of the oscillator OSC [n] specified by the oscillator number n is stored in the register LFD [n], and the tuning value of the oscillator OSC [n] specified by the oscillator number n is stored in the register TUN [ n], the final pitch OP [n] instructed to the oscillator OSC [n] designated by the oscillator number n is calculated based on the following equation (1).
OP [n] ← KYN + (CPB × PBR) + (CLF × LFD [n]) + TUN [n] (1)

Subsequently, in step SB4, the pitch OP [n] obtained in step SB3 is converted into an equal-tempered frequency FRQ [n] according to the following equation (2).
FRQ [n] ← MTN × 2 ^ ((OP [n] -69.0) / 12) (2)
In the above equation (2), MTN represents a frequency (420 to 460 Hz) obtained by tuning an A4 sound (frequency 440 Hz) that is a reference pitch. “69.0” represents the MIDI key number of the reference pitch (A4 sound).

Further, in step SB4, the number of samples for one wavelength of the read waveform of the oscillator OSC [n] designated by the oscillator number n is stored in the register WL [n]. Based on the following equation (3), the waveform readout speed is expressed from the number of samples (number of waveform data) for one wavelength of the readout waveform stored in the register WL [n] and the converted frequency FRQ [n]. Address increment INC [n] per sampling period is calculated.
INC [n] ← WL [n] × (FRQ [n] / Fs) (3)
In the above equation (3), Fs represents the sampling frequency of the waveform data stored in the waveform memory 173.

  Next, in step SB5, the oscillator number n is incremented and stepped, and in the subsequent step SB6, it is determined whether or not the stepped oscillator number n is greater than “1”. If the incremented oscillator number n is “1”, the determination result is “NO”, the process proceeds to step SB3 described above, and the final pitch OP [n] of the oscillator OSC [1] (slave oscillator OSC2) is set. An average increment frequency FRQ [n] is converted, and an address increment INC [n] per sampling period representing a waveform reading speed is calculated from the converted frequency FRQ [n]. Then, when the oscillator number n advanced in step SB5 becomes “2”, the determination result in step SB6 becomes “YES”, and this processing is finished.

  As described above, in the pitch calculation process, the waveform readout speed (address increment INC [n] per sampling period) corresponding to the final pitch OP [n] is calculated for each of the master oscillator OSC1 and the slave oscillator OSC2. To do.

(3) Address Calculation Processing Operation FIG. 7 is a flowchart showing the address calculation processing operation. In this processing, it is assumed that the oscillator OSC [0] is assigned to the master oscillator OSC1, and the oscillator OSC [1] is assigned to the slave oscillator OSC2. When this process is executed through the above-described sound generation process step SA2 (see FIG. 5), the process proceeds to step SC1 shown in FIG. 7, and the start address, loop address, and end of the waveform data read out by the oscillator OSC [0]. The addresses are set in the registers SADR [0], LADR [0], and EADR, respectively.

  Next, in step SC2, the start address and loop address of the waveform data read by the oscillator OSC [1] are set in the register SADR [1] and the register LADR [1], respectively.

  Subsequently, in step SC3, it is determined whether or not the oscillator sync switch is set to ON. If the oscillator sync switch is set to ON, the determination result is “YES”, the process proceeds to step SC4, and the end address of the oscillator OSC [1] (slave oscillator OSC2) is set to the oscillator OSC [0] (master oscillator). Control is performed to match the waveform readout cycle of OSC1).

That is, in order to establish the relationship of WL [0] / INC [0] = WL [1] / INC [1], the number of waveform data WL [1] to be read by the slave oscillator OSC2 by the following equation (4) (FIG. 4) (corresponding to the length of the readout waveform shown in FIG. 4).
WL [1] ← WL [0] × INC [1] / INC [0] (4)

As shown in the following equation (5), the end address of the oscillator OSC [1] (slave oscillator OSC2) obtained by adding the calculated WL [1] to the register SADR [1] (start address) is used as the register EADR. Set to [1] to finish this process.
EADR [1] ← SADR [1] + WL [1] (5)

  On the other hand, if the oscillator sync switch is not set to ON and the oscillator sync function is not used, the determination result in step SC3 is “NO”, the process proceeds to step SC5, and the oscillator OSC [1] (slave oscillator OSC2 ) Is set in the register EADR [1], and this processing is completed.

  Thus, in the address calculation process, when the oscillator OSC [0] is assigned to the master oscillator OSC1 and the oscillator OSC [1] is assigned to the slave oscillator OSC2, the start address of the waveform data read by the oscillator OSC [0], The loop address and end address are set in the registers SADR [0], LADR [0], and EADR, respectively, and the top address and loop address of the waveform data read by the oscillator OSC [1] are set in the register SADR [1]. , Register LADR [1]. When the oscillator sync function is used, the end address (register EADR [1]) of the oscillator OSC [1] (slave oscillator OSC2) matches the waveform read cycle of the oscillator OSC [0] (master oscillator OSC1). To control.

(4) Hardware Pitch / Address Control Process FIG. 8 is a flowchart showing the operation of the hardware pitch / address control process. When this process is executed via the above-described sound generation process step SA3 (see FIG. 5), the process proceeds to step SD1 shown in FIG. 8 to reset the oscillator number n to zero. Subsequently, in step SD2, the address increment INC [n] per sampling period representing the waveform reading speed is stored in the pitch register of the oscillator OSC [n] designated by the oscillator number n.

  In step SD2, the head address stored in the register SADR [n] is stored in the start address register of the oscillator OSC [n] specified by the oscillator number n. The loop address stored in the register LADR [n] is stored in the loop address register of the oscillator OSC [n] specified by the oscillator number n. The end address stored in the register EASR [n] is stored in the end address register of the oscillator OSC [n] specified by the oscillator number n.

  Subsequently, in step SD3, the oscillator number n is incremented and incremented, and in the subsequent step SD4, it is determined whether or not the incremented oscillator number n has exceeded “1”. If the stepped-up oscillator number n does not exceed “1”, the process returns to step SD2, and the oscillator OSC [1] (slave oscillator OSC2) of the sound source 17 returns the waveform reading speed per one sampling period. The address increment INC [1], the start address of the register SADR [1], the loop address of the register LADR [1], and the end address of the register EADR [1] are supplied. When the stepped-up oscillator number n exceeds “1”, the determination result in step SD4 is “YES”, and this process is finished.

  As described above, in the hardware pitch / address control process, each of the oscillator OSC [0] (master oscillator OSC1) and the oscillator OSC [1] (slave oscillator OSC2) of the sound source 17 has a read speed (corresponding to the tone pitch). Address increment INC [1] per sampling period), the top address, the loop address, and the end address of the waveform data to be read are supplied. As a result, the sound source 17 has an oscillator synchronizing effect in which a pitch change and a timbre change can be obtained simultaneously according to the parameters given by the oscillator OSC [0] (master oscillator OSC1) and the oscillator OSC [1] (slave oscillator OSC2). Form a musical tone.

(5) Operation of Periodic Processing FIG. 9 is a flowchart showing the operation of periodic processing. This process is executed at regular intervals (for example, every 1 msec) by a timer interrupt. At the execution timing, the pitch calculation process shown in FIG. 6 is executed via step SE1 shown in FIG. In the pitch calculation process, as described above, for each of the master oscillator OSC1 and the slave oscillator OSC2, the waveform reading speed (address increment INC [n] per sampling period) corresponding to the pitch to be generated is calculated.

  Subsequently, the address calculation process shown in FIG. 7 is executed via step SE2. In the address calculation process, as described above, when the oscillator OSC [0] is assigned to the master oscillator OSC1 and the oscillator OSC [1] is assigned to the slave oscillator OSC2, the start address of the waveform data read by the oscillator OSC [0] The loop address and end address are set in the registers SADR [0], LADR [0], and EADR, respectively, and the start address and loop address of the waveform data read by the oscillator OSC [1] are set in the registers SADR [1], respectively. ], Register LADR [1].

  When the oscillator sync function is used, the end address (register EADR [1]) of the oscillator OSC [1] (slave oscillator OSC2) matches the waveform read cycle of the oscillator OSC [0] (master oscillator OSC1). Change to By doing so, the oscillator OSC [1] (slave oscillator OSC2) always returns to the head address in the same cycle as the oscillator OSC [0] (master oscillator OSC1).

  Next, the hardware pitch / address control process shown in FIG. 8 is executed through step SE3. In the hardware pitch / address control process, as described above, the readout obtained in step SE1 is performed on each of the oscillator OSC [0] (master oscillator OSC1) and the oscillator OSC [1] (slave oscillator OSC2) of the sound source 17. The speed (address increment INC per sampling period) and the start address, loop address, and end address obtained in step SE2 are supplied to complete the present process.

  As a result, the sound source 17 has an oscillator synchronizing effect in which a pitch change and a timbre change can be obtained simultaneously according to the parameters given by the oscillator OSC [0] (master oscillator OSC1) and the oscillator OSC [1] (slave oscillator OSC2). Form a musical tone.

  As described above, in this embodiment, two sets of master oscillator OSC1 and slave oscillator OSC2 configured by the waveform data reading method are used, and the end address (register EADR [1]) of slave oscillator OSC2 is set as master oscillator OSC1. Therefore, an oscillator sync function is realized in which the oscillator OSC [1] (slave oscillator OSC2) always returns to the start address in the same cycle as the oscillator OSC [0] (master oscillator OSC1). As a result, the oscillator synchronization effect can be realized by the waveform data reading method without incurring high product costs.

  As mentioned above, although one Embodiment of this invention was described, this invention is not limited to it, It is included in the invention described in the claim of this-application, and its equivalent range. Hereinafter, each invention described in the scope of claims at the beginning of the present application will be additionally described.

(Appendix)
[Claim 1]
A memory for storing a master waveform and a slave waveform for one cycle;
First waveform reading means for repeatedly reading a master waveform for one period from the memory;
The first waveform reading means performs an operation of repeatedly reading the slave waveform for one cycle from the memory from the beginning until the master waveform for the one cycle is read from the beginning to the end, and the operation is performed for the one cycle. A second waveform readout means for repeatedly executing the master waveform readout every minute,
The waveform generator characterized by comprising.

[Claim 2]
According to the ratio between the second waveform reading speed when the second waveform reading means reads the slave waveform and the first waveform reading speed when the first waveform reading means generates the master waveform, 2. The waveform generating apparatus according to claim 1, wherein a reading position of the slave waveform at a time point when reading of the master waveform for one period is finished is controlled.

[Claim 3]
To a computer having a memory for storing a master waveform and a slave waveform for one cycle,
A first waveform reading step for repeatedly reading a master waveform for one period from the memory;
While reading the master waveform for one cycle from the beginning to the end, the slave waveform for one cycle is read from the memory repeatedly from the beginning, and the master waveform for one cycle starts to be read. A second waveform generation step that is repeatedly executed each time;
A program characterized by having executed.

[Claim 4]
In accordance with the ratio of the second waveform reading speed when the second waveform reading step reads the slave waveform and the first waveform reading speed when the first waveform reading step reads the master waveform, 4. The program according to claim 3, wherein the reading position of the slave waveform at the end of reading of the master waveform for one period is controlled.

10 Keyboard 11 Switch 12 Pitch Bender 13 CPU
14 Display 15 ROM
16 RAM
17 Sound source 18 D / A converter 19 Sound system 100 Electronic musical instrument

Claims (7)

Sets the master waveform reading speed when reading a plurality of data samples corresponding to the master waveform for one period from the memory and the slave waveform reading speed when reading a plurality of data samples corresponding to the slave waveform for one period from the memory. Reading speed setting process to
An acquisition process for acquiring the number of data samples that can be read at the set slave waveform reading speed while reading the number of data samples corresponding to the master waveform for the one period at the set master waveform reading speed;
A first waveform reading process that repeats an operation of sequentially reading a plurality of data samples corresponding to the master waveform for one period from the memory at the set master waveform reading speed ;
Synchronously with the start of reading of the plurality of data samples corresponding to the master waveform, the plurality of data samples corresponding to the slave waveform for one period stored in the memory are determined from the position of the predetermined data sample. A reading start process for starting reading;
After starting reading data samples corresponding to the slave waveform, a plurality of data samples corresponding to the slave waveform are sequentially read at the set slave waveform reading speed, and corresponding to the read slave waveform It is determined whether or not the number of data samples matches the acquired number of data samples. If it is determined that the number of data samples matches, the reading of the slave waveform is returned to the position of the predetermined data sample and the one cycle A second waveform reading process that repeats an operation of reading a plurality of data samples corresponding to a minute slave waveform ;
The waveform generator which has a processing part which performs . When the acquired number of data samples is larger than the number of slave waveform data samples for one cycle , the processing unit corresponds to the end position of the slave waveform for one cycle. The waveform generation apparatus according to claim 1 , wherein after reading up to the data sample to be performed, the processing of returning to the data sample corresponding to the start position of the slave waveform for one cycle and starting reading is executed again . In a computer used as a waveform generator ,
Sets the master waveform reading speed when reading a plurality of data samples corresponding to the master waveform for one period from the memory and the slave waveform reading speed when reading a plurality of data samples corresponding to the slave waveform for one period from the memory. Reading speed setting step to perform,
An acquisition step of acquiring the number of data samples that can be read at the set slave waveform reading speed while reading the number of data samples corresponding to the master waveform for the one period at the set master waveform reading speed;
A first waveform reading step that repeats an operation of sequentially reading a plurality of data samples corresponding to the master waveform for one period from the memory at the set master waveform reading speed ;
Synchronously with the start of reading of the plurality of data samples corresponding to the master waveform, the plurality of data samples corresponding to the slave waveform for one period stored in the memory are determined from the position of the predetermined data sample. A reading start step for starting reading;
After starting reading data samples corresponding to the slave waveform, a plurality of data samples corresponding to the slave waveform are sequentially read at the set slave waveform reading speed, and corresponding to the read slave waveform It is determined whether or not the number of data samples matches the acquired number of data samples. If it is determined that the number of data samples matches, the reading of the slave waveform is returned to the position of the predetermined data sample and the one cycle A second waveform generation step that repeats an operation of reading a plurality of data samples corresponding to a minute slave waveform ;
A program that executes In the second waveform reading step , when the acquired number of data samples is larger than the number of data samples of the master waveform for one period, the second waveform reading step reads up to the data sample corresponding to the end position of the slave waveform for the one period. 4. The program according to claim 3 , wherein after reading out, the program returns to the data sample corresponding to the start position of the slave waveform for one cycle and starts reading . A waveform generation method used as a waveform generator, wherein the waveform generator is
Sets the master waveform reading speed when reading a plurality of data samples corresponding to the master waveform for one period from the memory and the slave waveform reading speed when reading a plurality of data samples corresponding to the slave waveform for one period from the memory. And
While reading the number of data samples corresponding to the master waveform for one period at the set master waveform reading speed, the number of data samples that can be read at the set slave waveform reading speed is acquired,
Repeating the operation of sequentially reading a plurality of data samples corresponding to the master waveform for one period from the memory at the set master waveform reading speed ;
Synchronously with the start of reading of the plurality of data samples corresponding to the master waveform, the plurality of data samples corresponding to the slave waveform for one period stored in the memory are determined from the position of the predetermined data sample. Start reading,
After starting reading data samples corresponding to the slave waveform, a plurality of data samples corresponding to the slave waveform are sequentially read at the set slave waveform reading speed, and corresponding to the read slave waveform It is determined whether or not the number of data samples matches the acquired number of data samples. If it is determined that the number of data samples matches, the reading of the slave waveform is returned to the position of the predetermined data sample and the one cycle Repeat the operation to read multiple data samples corresponding to the slave waveform
Waveform generation method. When the acquired number of data samples is larger than the number of data samples of the master waveform for one cycle, the waveform generator reads up to the data sample corresponding to the end position of the slave waveform for the one cycle 6. The waveform generating method according to claim 5 , wherein after that, returning to the data sample corresponding to the start position of the slave waveform for one cycle again, reading is started . A waveform generator according to claim 1;
A performance information generator for generating performance information according to the performance operation;
A control unit that controls to generate a waveform for generating a musical sound signal from the waveform generator in response to the performance information;
Electronic musical instrument with

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