JP5972600B2 - Capacitor calibration circuit and capacitor calibration method - Google Patents

Description

  Embodiments described herein relate generally to a capacitor calibration circuit and a capacitor calibration method for calibrating the capacitance of a capacitor used by applying an alternating high voltage.

  Conventionally, a voltage divider is required to measure an alternating high voltage. To calibrate the voltage divider, a reference voltage divider is required, but there is no reference voltage divider (reference device) corresponding to the voltage divider that measures the world's highest level of high voltage. Therefore, it is necessary to configure a high voltage divider by connecting a necessary number of elements calibrated at a low voltage in series.

  The voltage dividing element used in the high voltage divider needs to avoid changes in the characteristics of the voltage dividing element due to voltage application. Since this voltage dividing element is preferably a linear electric passive element, a resistor, a reactor, a capacitor, etc. Can be considered.

If a resistor is used for the voltage dividing element, the temperature deteriorates because the characteristic value changes due to Joule heat.
Further, when a reactor that does not close the magnetic path is used as the voltage dividing element, it is susceptible to external influences and is unstable. Also, using an iron core as a closed magnetic path is not optimal because it is strongly influenced by the non-linearity of the iron core and iron loss.

  For this reason, capacitors that do not consume energy are often used as voltage dividing elements, but in order to increase the voltage of the voltage divider using the capacitors, it is necessary to increase the distance between the electrodes of the capacitors, resulting in lower capacitance. Resulting in. In addition, a capacitor using a high dielectric constant material for inter-electrode insulation in order to increase the capacitance is strongly influenced by the characteristics of the dielectric, and the voltage characteristics are generated in the capacitance, so the accuracy deteriorates.

  In addition, when a capacitor is used, a high-voltage shield is required to suppress air discharge, and the ground-facing area increases, so the ground stray capacity also increases. Generally, high-pressure gas capacitors of about 50-200pC are stacked vertically, and a high-voltage shield of direct line 1m or more is provided at the top voltage application section.

  For this reason, the main capacitance of the voltage dividing element cannot be increased to such an extent that the ground stray capacity can be ignored. Moreover, in a high voltage capacitor, since a high voltage is applied also to the insulator which supports an electrode, the leakage current which flows on the capacitor | condenser surface is also large.

  Since the leakage current increases nonlinearly with the applied voltage, the error increases greatly when the applied voltage increases. In order to suppress these phenomena, the precision capacitor is generally a three-terminal capacitor that bypasses the main capacitance, surface leakage current, and stray capacitance. As a capacitance calibration method for canceling stray capacitance, for example, one end of a standard capacitor is connected to a signal input terminal of a capacitance meter, and the other end of the standard capacitor is a guard voltage that generates a voltage having the same potential as the signal input terminal. Connected to the output terminal, and in this connected state, zero adjustment of the capacity meter is performed.

JP 2003-156551 A

  As described above, when the voltage of a capacitor is increased, it is necessary to construct a capacitor having a rated voltage lower than the target voltage by stacking in series. When calibrating the capacitance and tan δ of other capacitors using the synthesized capacitance, the calibration is generally performed by comparing the currents flowing through both capacitors.

  In this case, it is necessary to accurately grasp the capacitance and tan δ of the reference capacitor. In the ultra-high voltage, it is necessary to increase the voltage of the capacitor by connecting in series a capacitor serving as a reference for a lower high voltage.

  However, a high voltage voltage divider in which capacitor voltage dividing elements calibrated in advance are connected in series requires a high voltage shield for relaxing its own electric field, and a potential plate is often provided also at the capacitor connecting portion which is an intermediate point.

  In the case of stacked capacitors, it is necessary to connect the three terminals of the upper capacitor or the ground terminal (guard terminal) to the high voltage side terminal of the lower capacitor. Therefore, the measured value of the capacitance of the upper capacitor in the stacked circuit may be different from the measured value at the time of calibration.

In addition, a fixed area for connection is required at the connection point between the upper and lower capacitors, and the stray capacity between the connection point and the ground cannot be ignored.
In other words, due to the high voltage shield and the stray capacitance between the connection point and the ground, the voltage division ratio of the upper and lower capacitors is not the simple sum of the values calibrated independently for each capacitor, the upper capacitor has the current flowing into the lower capacitor, A combined current of the current flowing through the stray capacitance between the connection point and the ground flows. In addition, a combined current of a current flowing in the stray capacitance between the high voltage shield and the connection point and a current flowing in the upper end capacitor flows in the lower capacitor.
For this reason, an excessive voltage is applied to the upper capacitor, or the leakage current effective current component of the upper capacitor flows through the lower capacitor and the phase error increases.

  In addition, since the current flowing through the guard electrode of the upper capacitor needs to flow through the lower capacitor, the combined electrostatic capacitance tan δ of the upper capacitor and the lower capacitor is increased. Therefore, the voltage of the upper and lower capacitors must be obtained as a vector sum rather than a scalar sum of the voltages generated in each capacitor, so there is a potential between the applied voltage of the upper and lower capacitors and the divided voltage of each capacitor. A phase difference will occur.

  There is no conventional method for canceling the stray capacitance with the connection point when capacitors are stacked, so in order to calibrate the capacitance of capacitors with higher voltage by stacking large high-voltage capacitors in series, It was assumed that the capacitance values of the capacitors were not calibrated even if the capacitances of the capacitors were calibrated in advance and the capacitors were stacked.

  However, when the voltage of the capacitor is increased, the ground stray capacitance cannot be ignored as described above, and an error occurs between the capacitance calibration value of each capacitor and the capacitance calibration value in the stacked state. End up. In particular, a capacitor having a sufficiently small loss has a lower capacitance due to a higher voltage, and the influence of the capacitance to the ground strongly affects the calibration accuracy. Many of these error factors are caused by the ground stray capacity, so it is necessary to accurately grasp or cancel the stray capacity.

  To accurately calibrate the composite capacitance of stacked capacitors, the above factors can be solved by measuring them in the stacked state, but the current flowing into or out of the connection points of the upper and lower capacitors of the stacked capacitor is measured at a high potential. There was no way to do it. Also, direct calibration of the capacitance at high voltage without a voltage reference was not performed.

  The problem to be solved by the present invention is to provide a capacitor calibration circuit and a capacitor calibration method capable of accurately calibrating a composite capacitance in a state where a plurality of capacitors are stacked.

  According to the embodiment, the capacitor calibration circuit includes an upper capacitor connected to the AC potential point, a lower capacitor connected to the ground potential point, and a current comparator that compares the current of the upper capacitor and the current of the lower capacitor. And when an AC voltage is applied to a circuit in which the upper capacitor and the lower capacitor are connected in series via an intermediate potential metal plate and an AC voltage is applied, the capacitance calibration value of the upper capacitor alone and the lower capacitor alone Generated in the upper capacitor of the stacked circuit based on the calibration value of capacitance and the measured value of the correlation between the current of the upper capacitor and the current of the lower capacitor indicated by the measurement result by the current comparator Voltage, voltage generated in the lower capacitor, and a voltage calculation method for calculating a vector sum of these voltages And a capacitance calculation means for calculating a combined capacitance of the stacked circuit of the upper capacitor and the lower capacitor based on the voltage calculated by the voltage calculation means and the current of the lower capacitor. .

  According to the present invention, it is possible to accurately calibrate the combined capacitance in a state where a plurality of capacitors are stacked.

The figure which shows an example of the circuit for capacitor | condenser calibration in 1st Embodiment. 6 is a flowchart illustrating an example of a procedure for calibrating the combined capacitance of the capacitor by the capacitor calibration circuit according to the first embodiment. The figure which shows an example of the circuit for a capacitor | condenser calibration in 2nd Embodiment. 9 is a flowchart illustrating an example of a procedure for calibrating a combined capacitance of a capacitor by a capacitor calibration circuit according to the second embodiment. The figure which shows an example of the circuit for a capacitor | condenser calibration in 3rd Embodiment. 9 is a flowchart illustrating an example of a procedure for calibrating a combined capacitance of a capacitor by a capacitor calibration circuit according to the third embodiment.

Hereinafter, embodiments will be described with reference to the drawings.
(First embodiment)
First, the first embodiment will be described.
In the present embodiment, a potential plate is provided at a connection point between an upper (upper side) capacitor and a lower (lower side) capacitor, and a measuring instrument having the potential plate as a virtual ground potential is provided in a high potential portion. It is characterized by accurately measuring the combined capacitance in a state where the capacitor and the lower capacitor are stacked.

If the capacitance of the upper capacitor is calibrated, the relationship between the current flowing in the upper capacitor and the shared voltage generated in the upper capacitor in the laminated state of the upper and lower capacitors can be found.
In this state, by comparing the current flowing out from the upper capacitor and the current flowing into the lower capacitor on the basis of the potential plate, the relationship between the shared voltage of the upper capacitor and the charging current of the lower capacitor can be understood.

  The capacitance of the lower capacitor can be calibrated using conventional techniques by applying a voltage to the potential plate. By the above means, even if there is a stray capacitance between the connection point of the upper and lower capacitors and the ground, the shared voltage of the upper capacitor is determined based on the calibrated capacitance of the lower capacitor alone and the charging current of the lower capacitor. Since it is accurately determined, the combined capacitance of the circuit in which the upper and lower capacitors are stacked is determined.

  That is, the voltage applied to the stacked upper and lower capacitors is determined based on the calibrated capacitance of the upper and lower capacitors alone and the charging current of the lower capacitor. Even if a current due to an external factor such as leakage current flows into the upper capacitor, the relationship between the shared voltage of the upper capacitor and the charging current of the lower capacitor is known, so the correlation between the combined capacitance and the applied voltage Has no effect.

  If the capacitance of the capacitor can be accurately calibrated by this method, the voltage measuring device and the wattmeter can be calibrated with reference to that. Therefore, the uncertainty of the measurement result can be reduced, and traceability is ensured because there is no assumption of characteristic invariance.

Hereinafter, a specific example of the capacitor calibration circuit will be described. FIG. 1 is a diagram illustrating an example of a capacitor calibration circuit according to the first embodiment.
In this embodiment, the capacitor calibration circuit includes a lower capacitor 1, an intermediate potential metal plate 2, an upper capacitor 3, a high voltage shield 4, a current comparator 5, a calibration measuring instrument 6, an AC high voltage source 7, and a voltage divider 10. Have.

  When the lower capacitor 1 and the upper capacitor 3 are stacked and the combined capacitance of these capacitors is calibrated, an intermediate potential metal plate having a diameter sufficiently larger than the diameter of the lower capacitor 1 is formed on the lower capacitor 1. 2 is provided to be electrically insulated from the terminal of the lower capacitor 1. On the intermediate potential metal plate 2, an upper capacitor 3 is installed with its terminals insulated. A large high voltage shield 4 is placed on the high voltage side terminal 3 a of the upper capacitor 3.

  A current comparator 5 is connected between the low voltage side terminal 3 b of the upper capacitor 3 and the high voltage side terminal 1 a of the lower capacitor 1, and the ground terminal of the current comparator 5 is connected to the intermediate potential metal plate 2.

  The ground terminal 3 c of the upper capacitor 3 is directly connected to the intermediate potential metal plate 2. Further, the low voltage side terminal 1 b of the lower capacitor 1 is grounded via the calibration measuring instrument 6. The calibration measuring device 6 is connected to the high-voltage shield 4 on the high potential side via the voltage divider 10.

  The capacitor calibration circuit includes a calibration device 20. The calibration device 20 includes a capacitance calibration unit 21 that calibrates the capacitances of the lower capacitor 1 and the upper capacitor 3, a voltage calculation unit 22 that calculates voltages of the lower capacitor 1 and the upper capacitor 3, and a storage such as a nonvolatile memory. It has a device 23.

Next, a procedure for calibrating the composite capacitance of the capacitor by the capacitor calibration circuit in the first embodiment will be described. FIG. 2 is a flowchart illustrating an example of a procedure for calibrating the composite capacitance of the capacitor by the capacitor calibration circuit according to the first embodiment.
First, the capacitance of the lower capacitor 1 is calibrated. In order to calibrate the capacitance of the lower capacitor 1 alone, the intermediate potential metal plate is short-circuited between the high voltage shield 4 and the intermediate potential metal plate 2 of the capacitor calibration circuit described above and the current comparator 5 is not connected. 2 and the high-voltage side terminal 1a of the lower capacitor 1 are connected (step S1), and an AC high voltage is applied from the AC high voltage source 7 between the intermediate potential metal plate 2 and the ground (step S2).

In this applied state, the current flowing through the lower capacitor 1 is measured by a current measuring device (not shown), and the ground potential of the intermediate potential metal plate 2 is measured by the voltage divider 10 or other voltage measuring device (not shown). The result is output to the calibration device 20. The current flowing through the lower capacitor 1 may be measured by the calibration measuring instrument 6. The capacitance calibration unit 21 of the calibration device 20 obtains a correlation between the value of the ground potential of the intermediate potential metal plate 2 and the measured value of the current flowing through the lower capacitor 1, and based on this correlation, the capacitance of the lower capacitor 1 alone is obtained. The capacitance is calibrated (step S3). The calibrated capacitance value is stored in the storage device 23 of the calibration device 20.
Next, the capacitance of the upper capacitor 3 alone is calibrated. In order to calibrate the capacitance of the upper capacitor 3 alone, the high-voltage shield 4 of the capacitor calibration circuit and the intermediate potential metal plate 2 are not short-circuited, and the intermediate potential metal plate 2 of the capacitor calibration circuit is grounded. After that (step S4), an AC high voltage is applied from the AC high voltage source 7 between the high-voltage side terminal 3a of the upper capacitor 3 and the ground (step S5).

In this applied state, the current flowing in the upper capacitor 3 is measured by a current measuring device (not shown), the ground potential of the high-voltage side terminal 3a of the upper capacitor 3 is measured by the voltage divider 10 or other voltage measuring device (not shown), These measurement results are output to the calibration device 20. The current flowing through the upper capacitor 3 may be measured by the calibration measuring instrument 6. The capacitance calibration unit 21 of the calibration device 20 obtains a correlation between the value of the ground potential of the high-voltage side terminal 3a of the upper capacitor 3 and the measured value of the current flowing through the upper capacitor 3, and based on this correlation, The capacitance of the capacitor 3 alone is calibrated (step S6). The calibrated capacitance value is stored in the storage device 23 of the calibration device 20.
Next, the combined capacitance of the circuit in which the upper capacitor 3 and the lower capacitor 1 are stacked is calibrated. To calibrate the composite capacitance, one of the input terminals of the current comparator 5 is connected to the low voltage side terminal 3b of the upper capacitor 3, the ground terminal of the current comparator 5 is connected to the intermediate potential metal plate 2, and The other input terminal of the current comparator 5 is connected to the high voltage side terminal 1 a of the lower capacitor 1.

  Then, a calibration measuring instrument 6 is connected between the low voltage side terminal 1b of the lower capacitor 1 and the ground, and an alternating current is connected between the high voltage side terminal 3a of the upper capacitor 3 and the ground so that a required current flows through the upper capacitor 3 and the lower capacitor 1. An alternating high voltage is applied from the high voltage source 7 (step S7).

  In this state, from the output of the current comparator 5 connected to the upper capacitor 3 and the lower capacitor 1, the calibration device 20 calculates the correlation between the current flowing in the upper capacitor 3 and the current flowing in the lower capacitor 1, that is, from the upper capacitor 3. A correlation between the current that flows out and the current that flows out to the lower capacitor 1 is obtained (step S8).

  The current I1 flowing through one terminal of the current comparator 5, the winding number n1 of the winding on one terminal side, the current I2 flowing through the other terminal of the current comparator 5, and the winding number n2 of the winding on the other terminal side There is a relationship shown in the following formula (1). The current comparator 5 obtains a correlation between the current on the lower capacitor 1 side and the current on the upper capacitor 3 side based on the following expression.

n1 × I1 = n2 × I2 Formula (2)
The voltage calculation unit 22 of the calibration device 20 is based on the correlation, the measured value of the current of the lower capacitor 1 by the calibration measuring instrument 6, and the calibration value of the capacitance of the upper capacitor 3 alone stored in the storage device 23. Then, the vector of the voltage applied to the upper capacitor 3 is calculated (step S9). Thereby, the calibration device 20 obtains a correlation between the current flowing into the lower capacitor 1 and the voltage applied to the upper capacitor 3.

  Next, the voltage calculation unit 22 of the calibration device 20 stores the correlation between the current flowing through the upper capacitor 3 and the current flowing through the lower capacitor 1, the measured value of the current of the lower capacitor 1 by the calibration measuring device 6, and the storage device 23. Based on the calibration value of the capacitance of the lower capacitor 1 alone, a vector of the applied voltage of the lower capacitor 1 is calculated (step S10).

  The voltage calculation unit 22 of the calibration device 20 is a circuit in which the vector sum of the calculated applied voltage vector of the upper capacitor 3 and the applied voltage vector of the lower capacitor 1 is laminated on the upper capacitor 3 and the lower capacitor 1. Calculation is made as the overall AC high voltage (step S11).

  Then, the capacitance calibration unit 21 of the calibration device 20 calculates the AC high voltage of the entire circuit in which the upper capacitor 3 and the lower capacitor 1 are laminated and the measured value of the current flowing through the lower capacitor 1 by the calibration measuring instrument 6. A correlation is obtained (step S12), and based on this correlation, a combined capacitance with respect to a current flowing through the lower capacitor 1, that is, a combined capacitance of a circuit in which the upper capacitor 3 and the lower capacitor 1 are stacked is calculated. (Step S13).

  The difference between the combined capacitance calculated from the calibration value of the capacitance of the upper capacitor 3 alone and the calibration value of the capacitance of the lower capacitor 1 alone and the combined capacitance calculated in step S13 is intermediate. This is the stray capacity 8 between the potential metal plate 2 and the ground.

  In the procedure described above, the combined capacitance of the circuit can be calculated in consideration of the stray capacitance 8 of the circuit in which the upper capacitor 3 and the lower capacitor 1 are laminated. It is possible to accurately grasp the combined capacitance of the stacked circuits.

  Further, as described above, since the combined capacitance with respect to the current flowing through the lower capacitor 1 can be accurately calculated, the applied AC high voltage can be accurately determined from the current flowing through the lower capacitor 1.

(Second Embodiment)
Next, a second embodiment will be described. Note that, in the configuration of the capacitor calibration circuit in each of the following embodiments, the description of the same part as that shown in FIG. 1 is omitted.
FIG. 3 is a diagram illustrating an example of a capacitor calibration circuit according to the second embodiment.
In this embodiment, the capacitor calibration circuit includes the lower capacitor 1, the intermediate potential metal plate 2, the upper capacitor 3, the high voltage shield 4, the calibration measuring device 6, the AC high voltage source 7, and the components described in the first embodiment. In addition to having the pressure device 10, a standard capacitor 9 whose capacitance is calibrated in advance is placed on the intermediate potential metal plate 2, and this standard capacitor 9 is connected in parallel with the upper capacitor 3.

In the present embodiment, instead of the current comparator 5 used in the first embodiment, a first current comparator 5a and a second current comparator 5b are provided. Low-voltage side terminal 9b of the low-voltage side terminal 3b and the standard capacitor upper capacitor 3 is connected to the intermediate potential metal plate 2 via the first current comparator 5 a.

  The ground terminal 3 c of the upper capacitor 3 is directly connected to the intermediate potential metal plate 2. The same applies when the standard capacitor 9 has a ground terminal. The high-voltage side terminal 1a of the lower capacitor 1 is connected to the intermediate potential metal plate 2 via the input terminal of the second current comparator 5b. The ground terminal of the second current comparator 5 b is connected to the intermediate potential metal plate 2.

Next, a procedure for calibrating the composite capacitance of the capacitor by the capacitor calibration circuit in the second embodiment will be described. FIG. 4 is a flowchart illustrating an example of a procedure for calibrating the composite capacitance of the capacitor by the capacitor calibration circuit according to the second embodiment.
First, as in the first embodiment, the capacitance of the lower capacitor 1 alone is calibrated. To calibrate the capacitance of the lower capacitor 1 alone is to short-circuit the high-pressure shield 4 and the intermediate potential metal plate 2 of capacitor calibration circuit shown in FIG. 3, and without connecting the current comparator 5 a, After the intermediate potential metal plate 2 and the high voltage side terminal 1a of the lower capacitor 1 are connected (step S21), an AC high voltage is applied from the AC high voltage source 7 between the intermediate potential metal plate 2 and the ground (step S22). .

In this applied state, the current flowing through the lower capacitor 1 is measured by a current measuring device (not shown), and the ground potential of the intermediate potential metal plate 2 is measured by the voltage divider 10 or other voltage measuring device (not shown). The result is output to the calibration device 20. The current flowing through the lower capacitor 1 may be measured by the calibration measuring instrument 6. The capacitance calibration unit 21 of the calibration device 20 obtains a correlation between the value of the ground potential of the intermediate potential metal plate 2 and the measured value of the current flowing through the lower capacitor 1, and based on this correlation, the capacitance of the lower capacitor 1 alone is obtained. The capacitance is calibrated (step S23). The calibrated capacitance value is stored in the storage device 23 of the calibration device 20.
Next, the standard capacitor 9 is used to calibrate the capacitance of the upper capacitor 3 alone. In order to calibrate the capacitance of the upper capacitor 3 alone, the intermediate potential metal plate 2 is not grounded as in the first embodiment, but the high voltage shield 4 and the intermediate potential metal plate 2 of the capacitor calibration circuit described above are used. The AC high voltage is applied from the AC high voltage source 7 between the high-voltage side terminal 3a of the upper capacitor 3 and the ground (step S24).

In this application state, the voltage calculation unit 22 of the calibration device 20 obtains the correlation between the charging current flowing to the charging current and the upper capacitor 3 flowing to the standard capacitor 9 from the current comparator 5 a, the known standard capacitor 9 the measured value of the current flowing through the standard capacitor 9 obtained by the calibration value and the current comparator 5 a of the electrostatic capacity can be calculated applied voltage of the parallel circuit of a standard capacitor 9 and the upper capacitor 3 to the original.

Then, the capacitance correction unit 21 compares the value of the calculated applied voltage, on the basis of the measured value of the current flowing through the upper capacitor 3 obtained by current comparator 5 a, the upper capacitor 3 single capacitance Is calibrated (step S25). The calibrated capacitance value is stored in the storage device 23 of the calibration device 20.
Next, the combined capacitance of the circuit in which the upper capacitor 3 and the lower capacitor 1 are stacked is calibrated. To calibrate the synthesized capacitance, with the standard capacitor 9 connected, one of the input terminals of the current comparator 5b is connected to the low-voltage side terminal 3b of the upper capacitor 3, and the ground terminal of the current comparator 5b is set to the middle. It is connected to the potential metal plate 2 and the other input terminal of the current comparator 5 b is connected to the high voltage side terminal 1 a of the lower capacitor 1.

  Then, a calibration measuring instrument 6 is connected between the low-voltage side terminal 1 b of the lower capacitor 1 and the ground, and the high-voltage side terminal 3 a of the upper capacitor 3 so that a required current flows through the upper capacitor 3, the standard capacitor 9 and the lower capacitor 1. AC high voltage is applied from the AC high voltage source 7 to the ground.

  In this state, from the output of the current comparator 5b connected to the upper capacitor 3 and the lower capacitor 1, the calibration device 20 correlates the current flowing in the parallel circuit of the upper capacitor 3 and the standard capacitor 9 and the current flowing in the lower capacitor 1. Is obtained (step S26).

  The voltage calculation unit 22 of the calibration device 20 has the above-described correlation, the measured value of the current of the lower capacitor 1 by the calibration measuring device 6, and the calibration value of the capacitance of the upper capacitor 3 alone stored in the storage device 23. Then, a vector of the applied voltage of the upper capacitor 3 is calculated (step S27). Thereby, the calibration device 20 obtains a correlation between the current flowing into the lower capacitor 1 and the voltage applied to the upper capacitor 3.

  Next, the voltage calculation unit 22 of the calibration device 20 stores the correlation between the current flowing through the upper capacitor 3 and the current flowing through the lower capacitor 1, the measured value of the current of the lower capacitor 1 by the calibration measuring device 6, and the storage device 23. Based on the calibration value of the capacitance of the lower capacitor 1 alone, the vector of the applied voltage of the lower capacitor 1 is calculated (step S28).

  The voltage calculation unit 22 of the calibration device 20 is a circuit in which the vector sum of the calculated applied voltage vector of the upper capacitor 3 and the applied voltage vector of the lower capacitor 1 is laminated on the upper capacitor 3 and the lower capacitor 1. The total AC high voltage is calculated (step S29).

  Then, the capacitance calibration unit 21 of the calibration device 20 calculates the AC high voltage of the entire circuit in which the upper capacitor 3 and the lower capacitor 1 are laminated and the measured value of the current flowing through the lower capacitor 1 by the calibration measuring instrument 6. A correlation is obtained (step S30), and based on this correlation, a combined capacitance with respect to a current flowing through the lower capacitor 1, that is, a combined capacitance of a circuit in which the upper capacitor 3 and the lower capacitor 1 are stacked is calculated. (Step S31).

  In this way, if a standard capacitor with a known capacitance is connected in parallel with the upper capacitor, the capacitance of the standard capacitor can be calibrated without grounding the upper capacitor when calibrating the capacitance of the upper capacitor alone. Since the applied voltage of the upper capacitor when the AC high voltage is applied using the value is found, the capacitance of the upper capacitor 3 alone can be calibrated without grounding the intermediate potential metal plate on the upper capacitor side. it can. Therefore, the combined capacitance of the circuit in which the upper capacitor and the lower capacitor are stacked can be calibrated without changing the ground stray capacitance of the upper capacitor 3 and the change of the ground potential distribution by grounding the intermediate potential metal plate. Compared to the first embodiment, the calibration accuracy of the combined capacitance can be improved. Further, if a high-voltage capacitor whose capacitance is calibrated is further laminated, it is possible to improve the calibration accuracy even with a UHV (ultra-high voltage) class capacitor.

(Third embodiment)
Next, a third embodiment will be described.
FIG. 5 is a diagram illustrating an example of a capacitor calibration circuit according to the third embodiment.
In this embodiment, the capacitor calibration circuit includes the lower capacitor 1, the intermediate potential metal plate 2, the upper capacitor 3, the high voltage shield 4, the current comparator 5, and the AC high voltage source 7 described in the first embodiment. A large intermediate shield 2a is provided around the intermediate potential metal plate 2 so as not to generate any corona in the air.
In this embodiment, the low-voltage side terminal 1 b of the lower capacitor 1 is grounded via the ammeter 11 instead of providing the calibration measuring instrument 6 and the voltage divider 10 described in the first embodiment.

Next, a procedure for calibrating the composite capacitance of the capacitor by the capacitor calibration circuit in the third embodiment will be described. FIG. 6 is a flowchart illustrating an example of a procedure for calibrating the composite capacitance of the capacitor by the capacitor calibration circuit according to the third embodiment.
In this embodiment, assume that the electrostatic capacitance of the lower capacitor 1 alone and the electrostatic capacitance of the upper capacitor 3 alone is calibrated, the procedure of calibration is not particularly limited.
Next, the combined capacitance of the circuit in which the upper capacitor 3 and the lower capacitor 1 are stacked is calibrated. To calibrate the composite capacitance, as shown in FIG. 5, one of the input terminals of the current comparator 5 is connected to the low voltage side terminal 3b of the upper capacitor 3, and the ground terminal of the current comparator 5 is connected to the intermediate potential metal. The other input terminal of the current comparator 5 is connected to the high voltage side terminal 1 a of the lower capacitor 1.

Then, an ammeter 11 is connected between the low voltage side terminal 1b of the lower capacitor 1 and the ground, and an AC high voltage is connected between the high voltage side terminal 3a of the upper capacitor 3 and the ground so that a required current flows through the upper capacitor 3 and the lower capacitor 1. An alternating high voltage is applied from the source 7 (step S41).

In this state, from the output of the current comparator 5 connected to the upper capacitor 3 and the lower capacitor 1, the calibration device 20 obtains a correlation between the currents flowing through the upper capacitor 3 and the lower capacitor 1 (step S42).
The difference between the two is the current flowing through the stray capacitance 8, and tan δ is nearly zero.

  The voltage calculation unit 22 of the calibration device 20 is based on the correlation described above, the measured value of the current of the lower capacitor 1 by the ammeter 11, and the calibration value of the capacitance of the upper capacitor 3 alone stored in the storage device 23. Then, the vector of the voltage applied to the upper capacitor 3 is calculated (step S43). Thereby, the calibration device 20 obtains a correlation between the current flowing into the lower capacitor 1 and the voltage applied to the upper capacitor 3.

  The voltage calculation unit 22 of the calibration device 20 includes the correlation between the current flowing through the upper capacitor 3 and the current flowing through the lower capacitor 1, the measured value of the current of the lower capacitor 1 by the ammeter 11, and the lower capacitor 1 stored in the storage device 23. Based on the calibration value of the single capacitance, the vector of the voltage applied to the lower capacitor 1 is calculated (step S44).

  The voltage calculation unit 22 of the calibration device 20 is a circuit in which the vector sum of the calculated applied voltage vector of the upper capacitor 3 and the applied voltage vector of the lower capacitor 1 is laminated on the upper capacitor 3 and the lower capacitor 1. The total AC high voltage is calculated (step S45).

  Then, the capacitance calibration unit 21 of the calibration device 20 correlates the overall AC high voltage of the circuit in which the upper capacitor 3 and the lower capacitor 1 are laminated with the measured value of the current flowing through the lower capacitor 1 by the ammeter 11. Then, based on this correlation, the combined capacitance with respect to the current flowing through the lower capacitor 1, that is, the combined capacitance of the circuit in which the upper capacitor 3 and the lower capacitor 1 are stacked is calculated (step S46). S47).

  With such a configuration, the combined capacitance can be calibrated without the need to provide the calibration measuring instrument 6 or the voltage divider 10 as in the first embodiment. In addition, since the lower capacitor 1 is directly grounded via the ammeter 11, the accuracy of calibration is also ensured.

According to each of these embodiments, it is possible to provide a capacitor calibration circuit that can accurately calibrate the combined capacitance in a state where a plurality of capacitors are stacked.
Although several embodiments of the invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  DESCRIPTION OF SYMBOLS 1 ... Lower capacitor, 1a ... Lower capacitor high voltage side terminal, 1b ... Lower capacitor low voltage side terminal, 2 ... Intermediate potential metal plate, 2a ... Intermediate shield, 3 ... Upper capacitor, 3a ... Upper capacitor high voltage side terminal, 3b ... Upper capacitor Low voltage side terminal, 3c ... Upper capacitor ground terminal, 4 ... High voltage shield, 5, 5a, 5b ... Current comparator, 6 ... Calibration measuring instrument, 7 ... AC high voltage source, 8 ... Stray capacity, 9 ... Standard capacitor, 9b: Standard capacitor low voltage side terminal, 10: Voltage divider, 11 ... Ammeter, 20 ... Calibration device, 21 ... Capacitance calibration unit, 22 ... Voltage calculation unit, 23 ... Storage device.

Claims (6)

An upper capacitor connected to the AC high potential point;
A lower capacitor connected to the ground potential point;
A current comparator for comparing the current of the upper capacitor and the current of the lower capacitor;
When an AC voltage is applied to a circuit in which the upper capacitor and the lower capacitor are connected in series via an intermediate potential metal plate and an AC voltage is applied, the calibration value of the capacitance of the upper capacitor alone and the electrostatic capacitance of the lower capacitor alone Based on the calibration value of the capacitance and the measured value of the correlation between the current of the upper capacitor and the current of the lower capacitor indicated by the measurement result by the current comparator, the voltage generated in the upper capacitor of the stacked circuit and Voltage calculation means for calculating the voltage generated in the lower capacitor, and the vector sum of these voltages;
Capacitance calculation means for calculating a combined capacitance of the stacked circuit of the upper capacitor and the lower capacitor based on the voltage calculated by the voltage calculation means and the current of the lower capacitor. Capacitor calibration circuit. The capacitance calculating means includes
The upper capacitor and the intermediate potential metal plate are short-circuited, and an AC voltage is applied between the intermediate potential metal plate and the ground potential point of the circuit in which the high-voltage side terminal of the lower capacitor is connected to the intermediate potential metal plate. 2. The capacitor calibration circuit according to claim 1, wherein a calibration value of a capacitance of the lower capacitor unit is calculated based on a measurement result of a current value of the lower capacitor in the case. The capacitance calculating means includes
Wherein in a case where the upper capacitor and the lower capacitor was applied to the intermediate potential metal plate alternating voltage to the high voltage side terminal of said upper capacitor while grounding the circuits formed by laminating serially connected via the intermediate potential metal plate 3. The capacitor calibration circuit according to claim 2, wherein a calibration value of the capacitance of the upper capacitor is calculated based on a measured value of the current of the upper capacitor. A standard capacitor with a known capacitance is connected in parallel to the upper capacitor,
A standard capacitor side current comparator for performing a comparative measurement of the current of the upper capacitor and the current of the standard capacitor;
The capacitance calculating means includes
And the capacitance of the standard capacitor, high-voltage side terminal of the upper the upper capacitor capacitor and the lower capacitor in a state in which the not ground the intermediate potential metal plate of the circuit formed by laminating serially connected via the intermediate potential metal plate The capacitance of the upper capacitor is calibrated based on the correlation between the current of the upper capacitor and the current of the standard capacitor, which is indicated by the measurement result of the standard capacitor side current comparator when an AC voltage is applied to the capacitor. 3. The capacitor calibration circuit according to claim 2, wherein a value is calculated. The lower capacitor is connected to a ground potential point via an ammeter,
The capacitance calculating means includes
Based on the voltage calculated by the voltage calculation means and the measured value of the current of the lower capacitor by the ammeter, the combined capacitance of the stacked circuit of the upper capacitor and the lower capacitor is calculated <br / The capacitor calibration circuit according to claim 2, wherein: Capacitor calibration for a capacitor calibration circuit having an upper capacitor connected to an AC high potential point, a lower capacitor connected to a ground potential point, and a current comparator for comparing the current of the upper capacitor and the current of the lower capacitor A method,
When an AC voltage is applied to a circuit in which the upper capacitor and the lower capacitor are connected in series via an intermediate potential metal plate and an AC voltage is applied, the calibration value of the capacitance of the upper capacitor alone and the electrostatic capacitance of the lower capacitor alone Based on the calibration value of the capacitance and the measured value of the correlation between the current of the upper capacitor and the current of the lower capacitor indicated by the measurement result by the current comparator, the voltage generated in the upper capacitor of the stacked circuit and Calculate the voltage generated in the lower capacitor, and the vector sum of these voltages,
A capacitor calibration method, comprising: calculating a combined capacitance of the stacked circuit of the upper capacitor and the lower capacitor based on the calculated voltage and a current of the lower capacitor.

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