JP5919669B2 - Composite substrate and manufacturing method thereof, and semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a composite substrate suitable for manufacturing a semiconductor device and a manufacturing method thereof, and a semiconductor device using the composite substrate and a manufacturing method thereof.

  In order to efficiently manufacture low-cost and high-performance semiconductor devices, composite substrates in which a group III nitride layer is bonded to a low-cost support substrate have been developed. For example, Japanese Patent Laying-Open No. 2010-232625 (Patent Document 1) discloses a step of forming a first buffer film on at least one of a group III nitride semiconductor substrate and a first support substrate, and a first buffer film interposed therebetween. And a step of bonding a group III nitride semiconductor substrate to a first support substrate.

JP 2010-232625 A

  However, in the bonded substrate disclosed in Japanese Patent Application Laid-Open No. 2010-232625 (Patent Document 1), Pt is used as the first buffer layer that is an intermediate layer for bonding the group III nitride semiconductor substrate and the first support substrate. When a metal layer such as Ni, Zn, Sn, or Al is used, light cannot be emitted to the first support substrate side, so that a flip-chip type LED (light emitting diode) such as a p-side down structure is used. It was difficult to manufacture a semiconductor device. In addition, when an insulating layer such as a SiO layer is used as the first buffer layer, it is difficult to manufacture a vertical semiconductor device.

Moreover, even if transparent conductive films such as ITO (indium tin oxide) and ZnO are used as the first buffer layer, these transparent conductive films have low durability under a high-temperature NH ₃ atmosphere, and are thus bonded onto the bonded substrate. In addition, it was difficult to epitaxially grow the semiconductor layer.

Therefore, the present invention provides a composite substrate having a transparent and conductive intermediate film having high durability even under a high-temperature NH ₃ atmosphere, and suitable for use in the manufacture of semiconductor devices, its manufacturing method, and such a composite substrate. An object of the present invention is to provide a semiconductor device and a manufacturing method thereof.

The present invention comprises a polycrystalline GaN supporting substrate, and a polycrystalline GaN supporting substrate being arranged on the amorphous intermediate GaN-based film, a single crystal GaN-based layer disposed intermediate GaN-based film, only contains A composite substrate in which a polycrystalline GaN support substrate and a single crystal GaN-based layer are bonded together with an intermediate GaN-based film interposed therebetween .

In the composite substrate according to the present invention, GaN-based film between the medium, as a dopant, the total concentration of oxygen and silicon of at least one of oxygen and silicon are 1 × 10 ¹⁷ cm ^-3 or higher than 5 × 10 ¹⁹ cm ^-3 Can be included. Moreover, both the GaN-based film and a single crystal GaN-based layer between the medium can be formed of GaN. Further, the main surface of the single crystal GaN-based layer can be a (0001) plane. Further, the main surface of the single crystal GaN-based layer can be a single surface selected from the group consisting of {10-10} plane and {11-20} plane. The main surface of the single crystal GaN-based layer is one selected from the group consisting of {10-11} plane, {20-21} plane, {20-2-1} plane, and {10-1-1} plane. It can be a surface. Further, the thickness of the polycrystalline GaN support substrate can be set to 200 μm or more and 1000 μm or less.

In addition, the present invention is a semiconductor device including the above-described composite substrate and at least one GaN-based semiconductor layer disposed on the single crystal GaN-based layer of the composite substrate .

  The present invention also provides a method for manufacturing the above-described composite substrate, the method comprising: forming a non-crystalline first intermediate GaN-based layer on one main surface of a polycrystalline group III nitride supporting substrate; A step of forming an ion implantation region at a predetermined depth from one main surface side of the crystalline GaN-based substrate, and a second intermediate layer on the main surface of the single crystal GaN-based substrate on the ion implantation region side. The step of forming the GaN-based layer and the first intermediate GaN-based layer and the second intermediate GaN-based layer are bonded together to form an intermediate GaN-based film, thereby interposing the intermediate GaN-based film and polycrystal III Bonding the group nitride support substrate and the single crystal GaN substrate, and separating the single crystal GaN substrate into a single crystal GaN layer and the remaining single crystal GaN substrate in the ion implantation region. A method for manufacturing a composite substrate for forming a composite substrate.

  In the composite substrate manufacturing method according to the present invention, the remaining single crystal GaN-based substrate is used as a further single crystal GaN-based substrate, and another polycrystalline group III nitride supporting substrate and another polycrystalline group III nitride supporting substrate are used. As another method for manufacturing a composite substrate, another method of manufacturing a composite substrate including another intermediate GaN-based film disposed on the substrate and a further single crystal GaN-based layer disposed on the other intermediate GaN-based film is provided. Forming another non-crystalline first intermediate GaN-based layer on one main surface of the polycrystalline group III nitride supporting substrate, and a predetermined depth from one main surface side of the further single-crystal GaN-based substrate. Forming a further ion implantation region at the position, forming another non-crystalline second intermediate GaN-based layer on the main surface of the further single-crystal GaN-based substrate on the further ion implantation region side, Another first intermediate GaN By bonding another layer and another second intermediate GaN-based layer to form another intermediate GaN-based film, another polycrystalline III-nitride supporting substrate is further interposed with another intermediate GaN-based film interposed therebetween. Bonding the single crystal GaN-based substrate to the substrate, and separating the additional single-crystal GaN-based substrate into a further single-crystal GaN-based layer and a remaining single-crystal GaN-based substrate in the additional ion implantation region. Can do.

The present invention is a method of manufacturing a semiconductor device as described above, wherein a polycrystalline GaN support substrate, an amorphous intermediate GaN-based film disposed on the polycrystalline GaN support substrate, and an intermediate GaN-based film are disposed. and the single-crystal GaN-based layer, only including, a polycrystalline GaN supporting substrate and the single crystal GaN-based layer, a step of preparing a composite substrate are bonded by interposing an intermediate GaN-based film, a single composite substrate And a step of growing at least one GaN-based semiconductor layer on the crystalline GaN-based layer. Further, in the step of growing the GaN-based semiconductor layer, the intermediate GaN-based film can be changed from amorphous to crystalline. The step of growing the GaN-based semiconductor layer includes a sub-step of growing an n-type GaN-based semiconductor layer on the single crystal GaN-based layer, and an active layer having a multiple quantum well structure on the n-type GaN-based semiconductor layer. A sub-step and a sub-step of growing a p-type GaN-based semiconductor layer on the active layer.

According to the present invention, a composite substrate having a transparent and conductive intermediate film having high durability even in a high-temperature NH ₃ atmosphere, and suitably used for manufacturing a semiconductor device, a method for manufacturing the same, and such a composite substrate are used. A semiconductor device and a method of manufacturing the same can be provided.

It is a schematic sectional drawing which shows one Embodiment of the composite substrate concerning this invention. It is a schematic sectional drawing which shows one Embodiment of the semiconductor device concerning this invention. It is a schematic sectional drawing which shows another embodiment of the semiconductor device concerning this invention. It is a schematic sectional drawing which shows one Embodiment of the manufacturing method of the composite substrate concerning this invention, and a semiconductor device. It is a schematic sectional drawing which shows an example of the semiconductor device concerning this invention. It is a schematic sectional drawing which shows an example of mounting of the semiconductor device concerning this invention. It is a schematic sectional drawing which shows an example of a typical semiconductor device. It is a schematic sectional drawing which shows an example of mounting of a typical semiconductor device. It is a schematic sectional drawing which shows another example of a typical semiconductor device. It is a schematic sectional drawing which shows another example of mounting of a typical semiconductor device. It is a schematic sectional drawing which shows another example of the semiconductor device concerning this invention. It is a schematic sectional drawing which shows another example of mounting of the semiconductor device concerning this invention. It is a schematic sectional drawing which shows another example of a typical semiconductor device. It is a schematic sectional drawing which shows another example of mounting of a typical semiconductor device.

[Embodiment 1]
Referring to FIG. 1, a composite substrate 1 according to an embodiment of the present invention includes a polycrystalline group III nitride support substrate 10 and an intermediate GaN-based film 30 disposed on the polycrystalline group III nitride support substrate 10. And a single crystal GaN-based layer 21 disposed on the intermediate GaN-based film 30. In the composite substrate 1 of the present embodiment, the polycrystalline group III nitride supporting substrate 10 is inexpensive, the single crystal GaN-based layer 21 is of high quality, the polycrystalline group III nitride supporting substrate 10, the intermediate GaN-based film. 30 and the single-crystal GaN-based layer 21 have high durability in a high-temperature NH ₃ atmosphere, are transparent, and have conductivity. Therefore, a high-quality GaN-based semiconductor layer is grown on the single-crystal GaN-based layer 21 of the composite substrate 1. High quality semiconductor devices can be manufactured at low cost.

(Polycrystalline group III nitride support substrate)
The polycrystalline group III nitride supporting substrate 10 is a low-cost substrate having high temperature resistance and NH ₃ resistance, has transparency to light in a wavelength region of 400 nm to 450 nm, and has conductivity. Therefore, it is suitable as a support substrate in the composite substrate 1 of the present embodiment.

The polycrystalline group III nitride supporting substrate 10 is not particularly limited, and is a polycrystalline Al _x GIn _y Ga _1-xy N supporting substrate (0 ≦ x, 0 ≦ y, x + y ≦ 1; x = 0 and y = A polycrystalline GaN support substrate when 0, a polycrystalline AlN support substrate when x = 1 and y = 0, etc. are preferably used. The polycrystalline group III nitride supporting substrate 10 has a high-quality GaN-based semiconductor layer at a high yield by making the thermal expansion coefficient the same as or close to that of the intermediate GaN-based film 30 and the single-crystal GaN-based layer 21. From the viewpoint of growth, it is preferable that the intermediate GaN-based film 30 and the single crystal GaN-based layer 21 have the same or similar chemical composition. When the intermediate GaN-based film 30 and the single crystal GaN-based layer 21 are formed of GaN, it is preferable that the polycrystalline group III nitride supporting substrate 10 is also formed of GaN.

  From the viewpoint of supporting the intermediate GaN-based film 30 and the single crystal GaN-based layer 21, the polycrystalline group III nitride supporting substrate 10 preferably has a thickness of the polycrystalline group III nitride supporting substrate 10 of 200 μm or more and 1000 μm or less, and 300 μm. More preferably, it is 900 μm or less. The polycrystalline group III nitride support substrate 10 is difficult to be a self-supporting substrate when the thickness is less than 200 μm, and the price increases when the thickness is greater than 1000 μm.

(Intermediate GaN film)
The intermediate GaN-based film 30 is suitable as an intermediate layer in the composite substrate 1 of the present embodiment because it has high durability under high-temperature NH ₃ atmosphere, transparency, and conductivity. Here, the intermediate GaN-based film 30 is provided between the polycrystalline III-nitride support substrate 10 and the single-crystal GaN-based layer 21 in order to increase the bonding strength between them.

  The intermediate GaN-based film 30 is not particularly limited, but is preferably amorphous. Since the amorphous intermediate GaN-based film 30 can be formed at a relatively low temperature of about 200 ° C. to 500 ° C., the manufacturing cost is low, and it can be easily formed in a low temperature atmosphere of about room temperature (25 ° C.) to about 300 ° C. The polycrystalline group III nitride supporting substrate 10 and the single crystal GaN-based layer 21 can be bonded together. Whether the intermediate GaN-based film 30 is amorphous or crystalline can be evaluated by X-ray diffraction, TEM (transmission electron microscope), or the like.

The intermediate GaN-based film 30 is a group III nitride film containing Ga as a group III element. In order to adjust transparency by adjusting the refractive index of the film, Al, In or the like is used as a group III element other than Ga. And can be represented by the chemical formula Al _x In _y Ga _1-xy N (0 ≦ x <1, 0 ≦ y <1). The refractive index of the intermediate GaN-based film 30 decreases as the Al content (mol% with respect to the entire group III element) increases and increases with the increase of the In content (mol% with respect to the entire group III element). In such a case, Al and In contained in the intermediate GaN-based film 30 are each preferably 0.1 mol% or more and 15 mol% or less with respect to the entire group III element. That is, in the chemical formula Al _x In _y Ga _1-xy N of the intermediate GaN-based film 30, 0.001 ≦ x ≦ 0.15 and 0.001 ≦ y ≦ 0.15 are preferable. The refractive index of the film can be easily adjusted by setting at least one of Al and In to 0.1 mol% or more with respect to the entire group III element, and Al and In are each set to 15 mol% or less. As a result, the film quality can be kept high. Here, the content of each group III element in the intermediate GaN-based film 30 (mol% with respect to the entire group III element) can be measured by SIMS (secondary ion mass spectrometry), glow discharge emission spectrometry, or the like.

Further, the intermediate GaN-based film 30 adjusts the conductivity of the film, so that the total concentration of oxygen and silicon is 1 × 10 ¹⁷ cm ⁻³ or more and 5 × 10 ¹⁹ cm as a dopant. ^-3 or less is preferable. The intermediate GaN-based film 30 has a concentration of 1 × 10 ¹⁷ cm ⁻³ or more in total of oxygen and silicon, thereby increasing the carrier concentration and reducing the specific resistance (increasing conductivity). By setting the concentration to 5 × 10 ¹⁹ cm ⁻³ or less, the carrier mobility can be increased and the specific resistance can be decreased (conductivity can be increased). Here, the oxygen and silicon concentrations in the intermediate GaN-based film 30 can be measured by SIMS.

  Further, the thickness of the intermediate GaN-based film 30 is not particularly limited, but is preferably 400 nm or more and 4000 nm or less. The thickness of the intermediate GaN-based film 30 is the sum of the thicknesses of a first intermediate GaN-based layer 31 and a second intermediate GaN-based layer, which will be described later, and the first intermediate GaN-based layer 31 and the second intermediate GaN-based layer. This is because the thickness of each system layer is preferably 200 nm or more and 2000 nm or less. If the thicknesses of the first intermediate GaN-based layer 31 and the second intermediate GaN-based layer are less than 200 nm, defects are likely to occur during film polishing after layer formation and before bonding. The production costs are increased.

(Single crystal GaN-based layer)
The single crystal GaN-based layer 21 is suitable as a crystal growth layer in the composite substrate 1 of the present embodiment because the crystal has high quality, has high durability in a high temperature NH ₃ atmosphere, is transparent, and has conductivity.

The single crystal GaN-based layer 21 is a group III nitride layer containing Ga as a group III element. From the same viewpoint as in the case of the intermediate GaN-based film, the single crystal GaN-based layer 21 can contain Al, In, etc. as group III elements other than Ga, and has a chemical formula of Al _x In _y Ga _1-xy N ( 0 ≦ x <1, 0 ≦ y <1) and the like. Here, Al and In contained in the single crystal GaN-based layer 21 are each preferably 0.1 mol% or more and 15 mol% or less with respect to the entire group III element. That is, in the chemical formula Al _x In _y Ga _1-xy N of the single crystal GaN-based layer 21, 0.001 ≦ x ≦ 0.15 and 0.001 ≦ y ≦ 0.15 are preferable. Here, the content of each group III element in the single crystal GaN-based layer 21 (mol% with respect to the entire group III element) can be measured by SIMS, glow discharge emission spectrometry, or the like.

From the same viewpoint as the case of the intermediate GaN-based film, the single-crystal GaN-based layer 21 has at least one of oxygen and silicon as a dopant, and the total concentration of oxygen and silicon is 1 × 10 ¹⁷ cm ⁻³ or more. It is preferable to contain 5 * 10 < ¹⁹ > cm <^-3> or less. Here, the oxygen and silicon concentrations in the single crystal GaN-based layer 21 can be measured by SIMS or the like.

  The thickness of the single crystal GaN-based layer 21 is not particularly limited, but is preferably 50 nm or more and 500 nm or less. If the thickness of the single-crystal GaN-based layer 21 is less than 50 nm, the probability that the single-crystal GaN-based layer 21 will be peeled off in the subsequent epitaxial growth process increases. It is difficult to recover the damage of the system layer 21 and there is a possibility that crystal defects occur.

  The main surface of the single crystal GaN-based layer 21 is preferably a (0001) plane. On the main surface having the (0001) plane orientation of the single crystal GaN-based layer 21, a GaN-based semiconductor layer having a (0001) plane orientation can be stably grown. By applying the epitaxial growth technology above (0001), high LED light emission output can be easily obtained.

  Moreover, it is preferable that the main surface of the single crystal GaN-based layer 21 is one surface selected from the group consisting of {10-10} plane and {11-20} plane. On the main surface having one plane orientation selected from the group consisting of {10-10} and {11-20} of the single crystal GaN-based layer 21, the main surfaces are {10-10} and {11-20, respectively. }, It is possible to stably grow a GaN-based semiconductor layer having one plane orientation selected from the group consisting of: a piezo electric field generated in a well layer in an MQW active layer (active layer having a multiple quantum well structure) In particular, high luminous efficiency can be easily obtained in a wavelength region such as blue or green.

  The main surface of the single crystal GaN-based layer is 1 selected from the group consisting of {10-11} plane, {20-21} plane, {20-2-1} plane, and {10-1-1} plane. One aspect is preferred. On the main surface of the single crystal GaN-based layer 21 having one plane orientation selected from the group consisting of {10-11}, {20-21}, {20-2-1} and {10-1-1} Are GaN-based semiconductor layers each having a plane orientation selected from the group consisting of {10-11}, {20-21}, {20-2-1} and {10-1-1}. Since it can be stably grown, it is possible to reduce the piezoelectric field generated in the well layer in the MQW active layer (active layer having a multiple quantum well structure) and to form an MQW active layer with good crystal quality. In particular, high luminous efficiency can be easily obtained in a wavelength region such as blue or green.

[Embodiment 2]
Referring to FIG. 2, a semiconductor device 3 according to another embodiment of the present invention includes at least one GaN layer disposed on the composite substrate 1 of Embodiment 1 and the single crystal GaN-based layer 21 of the composite substrate 1. And a semiconductor stacked body 2 formed by the system semiconductor layer 40. In the semiconductor device 3 of this embodiment, the entire composite substrate 1 of Embodiment 1 has high durability and transparency and conductivity in a high-temperature NH ₃ atmosphere, and further, the crystal of the single crystal GaN-based layer 21 of the composite substrate 1. Therefore, the high-quality at least GaN-based semiconductor layer 40 is disposed on the single-crystal GaN-based layer 21 and has high characteristics.

Here, the GaN-based semiconductor layer 40 is a group III nitride semiconductor layer containing Ga as a group III element, and can contain Al, In, or the like as a group III element other than Ga, and has a chemical formula of Al _x In _y Ga _{1. -xy} N (0 ≦ x <1, 0 ≦ y <1).

The threading dislocation density of the GaN-based semiconductor layer 40 is not particularly limited, but is preferably 1 × 10 ⁷ cm ⁻² or less from the viewpoint that the GaN-based semiconductor layer 40 has a high quality and high-performance semiconductor device 3 can be obtained. 1 × 10 ⁶ cm ⁻² or less is more preferable.

  The GaN-based semiconductor layer 40 has a configuration corresponding to the type of the semiconductor device 3. For example, when the semiconductor device 3 is an LED, as the GaN-based semiconductor layer 40, an n-type GaN-based semiconductor layer 41, an MQW active layer (active layer having a multiple quantum well structure) 43, and a p disposed sequentially from the composite substrate 1 side. A type GaN-based semiconductor layer 45 is included.

  Referring to FIG. 2, the LED which is the semiconductor device 3 of this embodiment includes a composite substrate 1, an n-type GaN-based semiconductor layer 41, which is arranged in order from the composite substrate 1 side as a GaN-based semiconductor layer 40, an MQW active layer 43 (active layer of multiple quantum well structure) and a p-type GaN-based semiconductor layer 45, a p-side electrode 50p is disposed on the p-type GaN-based semiconductor layer 45, and a composite substrate By arranging an n-side electrode on one polycrystalline III-nitride support substrate 10, a vertical LED can be obtained.

  Further, referring to FIGS. 5 and 6, in the LED which is the semiconductor device 3 or 4 of the present embodiment, the p-side electrode 50p is disposed so as to be electrically connected to the p-side lead frame 60p, and the n-side electrode 50n. Can mount a p-side down structure electrically connected to the n-side lead frame 60n by a bonding wire 50w. The LED that is the semiconductor device 3 can be mounted because the composite substrate 1 is transparent and conductive, and light can be extracted from the composite substrate 1 side.

[Embodiment 3]
Referring to FIG. 3, the semiconductor device 3 which is still another embodiment of the present invention is similar to the semiconductor device 3 of the second embodiment shown in FIG. 2, and includes the composite substrate 1 of the first embodiment and the composite substrate 1. And a semiconductor laminate 2 formed of at least one GaN-based semiconductor layer 40 disposed on the single-crystal GaN-based layer 21. In the semiconductor device 3 of this embodiment, the entire composite substrate 1 of Embodiment 1 has high durability and transparency and conductivity in a high-temperature NH ₃ atmosphere, and further, the crystal of the single crystal GaN-based layer 21 of the composite substrate 1. Therefore, the high-quality at least GaN-based semiconductor layer 40 is disposed on the single-crystal GaN-based layer 21 and has high characteristics.

Here, in the semiconductor device 3 of the present embodiment, as in the semiconductor device 3 of the second embodiment, the GaN-based semiconductor layer 40 is a group III nitride semiconductor layer containing Ga as a group III element. Al, In, or the like can be included as a group element, and is represented by a chemical formula Al _x In _y Ga _1-xy N (0 ≦ x <1, 0 ≦ y <1).

Further, the threading dislocation density of the GaN-based semiconductor layer 40 is not particularly limited, but is 1 × 10 ⁷ cm ⁻² or less from the viewpoint that the GaN-based semiconductor layer 40 has a high quality and high-performance semiconductor device 3. Is preferably 1 × 10 ⁶ cm ⁻² or less.

  The GaN-based semiconductor layer 40 has a configuration corresponding to the type of the semiconductor device 3. For example, when the semiconductor device 3 is an LED, as the GaN-based semiconductor layer 40, an n-type GaN-based semiconductor layer 41, an MQW active layer (active layer having a multiple quantum well structure) 43, and a p disposed sequentially from the composite substrate 1 side. A type GaN-based semiconductor layer 45 is included.

  Referring to FIG. 3, the LED that is the semiconductor device 3 of the present embodiment includes a composite substrate 1, an n-type GaN-based semiconductor layer 41 arranged in order from the composite substrate 1 side as a GaN-based semiconductor layer 40, and an MQW active layer. 43 (active layer having a multiple quantum well structure) and a p-type GaN-based semiconductor layer 45, a p-side electrode 50p is disposed on the p-type GaN-based semiconductor layer 45, and etching is performed. By arranging the n-side electrode 50n on the exposed n-type GaN-based semiconductor layer 41, a lateral LED can be obtained.

  Further, referring to FIGS. 11 and 12, in the LED which is the semiconductor device 3 or 4 of this embodiment, the p-side electrode 50p and the n-side electrode 50n are electrically connected to the p-side lead frame 60p and the n-side lead frame 60n, respectively. Flip chip type mounting having a p-down structure connected to the substrate can be performed. The LED that is the semiconductor device 3 can be mounted because the composite substrate 1 is transparent and light can be extracted from the composite substrate 1 side.

[Embodiment 4]
Referring to FIG. 4, the method for manufacturing a composite substrate according to still another embodiment of the present invention is a method for manufacturing composite substrate 1 according to Embodiment 1, and includes one of polycrystalline group III nitride support substrate 10. A step of forming an amorphous first intermediate GaN-based layer 31 on the main surface ((A-1) and (A-2) in FIG. 4) and one main surface side of the single-crystal GaN-based substrate 20 A step of forming an ion implantation region 20i at a predetermined depth from (B-1 and B-2 in FIG. 4), and on the main surface of the single crystal GaN-based substrate 20 on the ion implantation region 20i side. The step of forming the amorphous second intermediate GaN-based layer 32 ((B-3) in FIG. 4) and the first intermediate GaN-based layer 31 and the second intermediate GaN-based layer 32 are bonded together. By forming the intermediate GaN-based film 30 with the intermediate GaN-based film 30, the polycrystalline group III nitride support is interposed. A step of bonding the substrate 10 and the single crystal GaN-based substrate 20 ((C-1) in FIG. 4), and the single crystal GaN-based substrate 20 in the ion implantation region 20i and the remaining single crystal GaN-based layer 21. And a step ((C-2) in FIG. 4) of separation into the system substrate 22. The composite substrate 1 of Embodiment 1 can be efficiently manufactured by the method of manufacturing the composite substrate of this embodiment.

(Step of forming first intermediate GaN-based layer on polycrystalline group III nitride supporting substrate)
Referring to (A-1) and (A-2) of FIG. 4, the method for manufacturing the composite substrate of the present embodiment has an amorphous structure on one main surface of polycrystalline group III nitride support substrate 10. A step of forming the first intermediate GaN-based layer 31 is included.

  The polycrystalline group III nitride support substrate 10 used in this step is as described in the first embodiment, and is not repeated here.

In this step, the amorphous first intermediate GaN-based layer 31 grown on one main surface of the polycrystalline group III nitride supporting substrate 10 is a group III nitride layer containing Ga as a group III element. In order to adjust the transparency by adjusting the refractive index of the layer, Al, In and the like can be included as group III elements other than Ga, and the chemical formula Al _x In _y Ga _1-xy N (0 ≦ x <1 , 0 ≦ y <1). The refractive index of the first intermediate GaN-based layer 31 decreases as the Al content (mol% with respect to the entire group III element) increases, and increases as the In content (mol% with respect to the entire group III element) increases. . In such a case, Al and In contained in the first intermediate GaN-based layer 31 are each preferably 0.1 mol% or more and 15 mol% or less with respect to the entire group III element. That is, in the chemical formula Al _x In _y Ga _1-xy N of the first intermediate GaN-based layer 31, 0.001 ≦ x ≦ 0.15 and 0.001 ≦ y ≦ 0.15 are preferable. The refractive index of the film can be easily adjusted by setting at least one of Al and In to 0.1 mol% or more with respect to the entire group III element, and Al and In are each set to 15 mol% or less. Therefore, the layer quality can be kept high. Here, the content of each group III element in the first intermediate GaN-based layer 31 (mol% with respect to the entire group III element) can be measured by SIMS, glow discharge emission spectroscopy, or the like.

The first intermediate GaN-based layer 31 adjusts the conductivity of the layer, so that at least one of oxygen and silicon is used as a dopant, and the total concentration of oxygen and silicon is 1 × 10 ¹⁷ cm ⁻³ or more and 5 ×. It is preferable to include it at 10 ¹⁹ cm ⁻³ or less. The first intermediate GaN-based layer 31 can increase the carrier concentration and reduce the specific resistance (increase conductivity) by setting the concentration of oxygen and silicon as a whole to 1 × 10 ¹⁷ cm ⁻³ or more. By setting the total concentration of oxygen and silicon to 5 × 10 ¹⁹ cm ⁻³ or less, carrier mobility can be increased and specific resistance can be decreased (conductivity can be increased). Here, the oxygen and silicon concentrations in the first intermediate GaN-based layer 31 can be measured by SIMS.

  The thickness of the first intermediate GaN-based layer 31 is not particularly limited, but is preferably 200 nm or more and 2000 nm or less. If the thickness of the intermediate GaN-based film 30 is less than 200 nm, problems are likely to occur during layer polishing after layer formation, and if it is greater than 2000 nm, the productivity decreases and the production cost increases.

  The method for forming the first intermediate GaN-based layer 31 is not particularly limited as long as an amorphous layer can be formed. From the viewpoint of improving productivity, sputtering, MOCVD (metal organic chemical vapor deposition). The method is preferred.

(Process for forming ion implantation region into single crystal GaN-based substrate and process for forming second intermediate GaN-based layer)
With reference to (B-1) and (B-2) of FIG. 4, the composite substrate manufacturing method of the present embodiment is positioned at a predetermined depth from one main surface side of the single crystal GaN-based substrate 20. Forming an ion implantation region 20i.

The single crystal GaN-based substrate 20 used in this step is as described in the first embodiment, and is not repeated here.
This step is performed by implanting ions I from one main surface side of the single crystal GaN-based substrate 20. The ions I to be implanted are not particularly limited, but ions of elements having a small mass number such as hydrogen and helium are preferable from the viewpoint of suppressing deterioration of the crystal quality of the single crystal GaN-based substrate 20. The depth at which the ions I are implanted, that is, the depth at which the ion implantation region 20i is formed is not particularly limited, but is preferably about 10 nm to 1000 nm from the viewpoint of high accuracy of the depth.

  In the single crystal GaN-based substrate 20 in which the ion-implanted region 20i is formed by this process, the ion-implanted region 20i becomes brittle compared to other regions due to ion implantation.

  Referring to (B-3) of FIG. 4, in the method for manufacturing the composite substrate of this embodiment, the second intermediate GaN that is amorphous on the main surface of the single crystal GaN-based substrate 20 on the ion implantation region 20i side. Forming a system layer 32;

  In this step, the amorphous second intermediate GaN-based layer 32 grown on the main surface of the single crystal GaN-based substrate 20 on the ion implantation region 20i side is the same as the first intermediate GaN-based layer 31 described above. Yes, not repeated here. The method of forming the second intermediate GaN-based layer 32 is the same as the method of forming the second GaN-based layer 31 described above, and will not be repeated here.

  A step of forming the first intermediate GaN-based layer 31 on the above-mentioned polycrystalline group III nitride support substrate 10, a step of forming the ion implantation region 20 i in the single-crystal GaN-based substrate 20, and the single-crystal GaN-based substrate 20 In addition, the order of the step of forming the second intermediate GaN-based layer 32 may be reversed. Further, after the step of forming the ion implantation region 20 i in the single crystal GaN-based substrate 20, the step of forming the first intermediate GaN-based layer 31 on the polycrystalline group III nitride support substrate 10 and the single crystal GaN-based substrate 20. The step of forming the second intermediate GaN-based layer 32 thereon may be performed simultaneously.

  Further, after the step of forming the first intermediate GaN-based layer 31 on the polycrystalline group III nitride support substrate 10 and the step of forming the second intermediate GaN-based layer 32 on the single-crystal GaN-based substrate 20, the description will be given later. The main surfaces of the first intermediate GaN-based layer 31 and the second intermediate GaN-based layer 32 are subjected to surface treatment before the step of bonding the polycrystalline group III nitride supporting substrate 10 and the single crystal GaN-based substrate 20. Therefore, it is preferable to perform the step of increasing the flatness of the main surfaces of the first intermediate GaN-based layer 31 and the second intermediate GaN-based layer 32 from the viewpoint of increasing the bonding strength by bonding, which will be described later. The surface treatment method is not particularly limited, but polishing such as mechanical polishing, chemical mechanical polishing (CMP), and chemical polishing is preferable from the viewpoint of improving the flatness of the main surface.

(Step of bonding the polycrystal group III nitride support substrate to the single crystal GaN-based substrate)
Referring to FIG. 4C-1, in the method for manufacturing the composite substrate of the present embodiment, the first intermediate GaN-based layer 31 and the second intermediate GaN-based layer 32 are bonded to each other to form an intermediate GaN-based film. 30 is included to bond the polycrystalline group III nitride supporting substrate 10 and the single crystal GaN-based substrate 20 with the intermediate GaN-based film 30 interposed therebetween.

  This step is performed by bonding the first intermediate GaN-based layer 31 and the second intermediate GaN-based layer 32 to form the intermediate GaN-based film 30.

The method of bonding the first intermediate GaN-based layer 31 formed on the polycrystalline group III nitride supporting substrate 10 and the second intermediate GaN-based layer 32 formed on the single crystal GaN-based substrate 20 in particular There is no limitation, and a method such as pressure bonding is suitably performed. According to crimping, it can be attached to both substrates at a relatively low temperature of room temperature (e.g., about 25 ° C.) or higher 300 ° C. or less by applying a pressure of 10 kgf / cm ² or more 1000 kgf / cm ² or less between the substrates.

(Single-crystal GaN substrate separation process)
Referring to FIG. 4C-2, in the method of manufacturing the composite substrate of this embodiment, the single crystal GaN-based substrate 20 is replaced with the single-crystal GaN-based layer 21 and the remaining single-crystal GaN-based substrate in the ion implantation region 20i. 22 and the process of separating to 22.

  By this step, the polycrystalline group III nitride support substrate 10, the intermediate GaN-based film 30 disposed on the polycrystalline group III-nitride support substrate 10, and the single crystal GaN-based disposed on the intermediate GaN-based film 30 The composite substrate 1 of Embodiment 1 including the layer 21 is obtained.

  In this step, the method for separating the single crystal GaN-based substrate 20 into the single-crystal GaN-based layer 21 and the remaining single-crystal GaN-based substrate 22 in the ion implantation region 20 i is not particularly limited. A method of applying heat or stress is preferably used. By applying heat or stress to the single crystal GaN-based substrate 20, the embrittled ion implantation region 20i is easily separated.

(Reuse of remaining single crystal GaN substrate)
Referring to (C-2) and (B-1) of FIG. 4, the above-described single crystal GaN-based substrate is obtained in a separation step for separating the single crystal GaN-based substrate 21 into the remaining single crystal GaN-based substrate 22. Using the remaining single crystal GaN-based substrate as a further single crystal substrate, a further composite substrate can be manufactured by the following steps.
A method of manufacturing a further composite substrate using the remaining single crystal GaN-based substrate as a further single crystal substrate is arranged on another polycrystalline group III nitride support substrate and another polycrystalline group III nitride support substrate. A method for producing a further composite substrate comprising another intermediate GaN-based film and a further single-crystal GaN-based layer disposed on the other intermediate GaN-based film, the method comprising: Forming another amorphous first intermediate GaN-based layer on one main surface of the substrate, and a further ion implantation region at a predetermined depth from one main surface side of the further single-crystal GaN-based substrate Forming a second non-crystalline second intermediate GaN-based layer on the main surface of the additional single crystal GaN-based substrate on the side of the further ion implantation region, and another first intermediate GaN-based substrate A second intermediate GaN-based layer separate from the layer; Bonding another polycrystalline GaN-based substrate and another single-crystal GaN-based substrate with another intermediate GaN-based film interposed therebetween by further bonding to form another intermediate GaN-based film; and Separating the single crystal GaN-based substrate into a further single-crystal GaN-based layer and a further remaining single-crystal GaN-based substrate in the ion implantation region.

[Embodiment 5]
With reference to (C-2), (C-3), (C-3-1) and (C-3-2) in FIG. 4, a method for manufacturing a semiconductor device which is still another embodiment of the present invention Is a polycrystalline III-nitride support substrate 10, an intermediate GaN-based film 30 disposed on the polycrystalline III-nitride support substrate 10, and a single-crystal GaN-based layer 21 disposed on the intermediate GaN-based film 30. And a step of preparing the composite substrate 1 of the first embodiment including the step of growing at least one GaN-based semiconductor layer 40 on the single crystal GaN-based layer 21 of the composite substrate 1. In the semiconductor device manufacturing method of the present embodiment, the prepared composite substrate 1 as a whole has high durability in a high-temperature NH ₃ atmosphere, has transparency and conductivity, and further, the single crystal GaN-based layer 21 of the composite substrate 1. Therefore, the high-quality at least GaN-based semiconductor layer 40 can be grown on the single-crystal GaN-based layer 21 of the composite substrate 1, and a semiconductor device having high characteristics can be obtained.

(Preparation process of composite substrate)
With reference to (C-2) of FIG. 4, the manufacturing method of the semiconductor device 3 of the present embodiment is arranged on the polycrystalline group III nitride supporting substrate 10 and the polycrystalline group III nitride supporting substrate 10. This includes a step of preparing the composite substrate 1 of Embodiment 1 including the intermediate GaN-based film 30 and the single crystal GaN-based layer 21 disposed on the intermediate GaN-based film 30. The step of preparing the composite substrate 1 is as described in the fourth embodiment and will not be repeated here.

(Growth process of GaN-based semiconductor layers)
With reference to (C-3) of FIG. 4, in the method for manufacturing the semiconductor device 3 of the present embodiment, at least one GaN-based semiconductor layer 40 is grown on the single-crystal GaN-based layer 21 of the composite substrate 1. including. With this process, the semiconductor stacked body 2 in which at least one GaN-based semiconductor layer 40 is formed on the single crystal GaN-based layer 21 of the composite substrate 1 is obtained.

  Here, the GaN-based semiconductor layer 40 to be grown is as described in the second embodiment, and is not repeated here. The method for growing the GaN-based semiconductor layer 40 is not particularly limited. From the viewpoint of growing the high-quality GaN-based semiconductor layer 40, MOCVD (metal organic chemical vapor deposition) method, MBE (molecular beam growth). The method is preferred.

  The GaN-based semiconductor layer 40 to be grown has a configuration corresponding to the type of semiconductor device. For example, when the semiconductor device is an LED, the step of growing the GaN-based semiconductor layer 40 includes a sub-step of growing an n-type GaN-based semiconductor layer 41 on the single crystal GaN-based layer 21 of the composite substrate 1, and an n-type A sub-process for growing an MQW active layer 43 (an active layer having a multiple quantum well structure) on the GaN-based semiconductor layer 41; and a sub-process for growing a p-type GaN-based semiconductor layer 45 on the MQW active layer 43. Through this process, the composite substrate 1, the n-type GaN-based semiconductor layer 41, the MQW active layer 43 (multi-quantum well structure active layer), and the p-type GaN-based semiconductor layer 40 are sequentially arranged from the composite substrate 1 side. The semiconductor stacked body 2 formed by the semiconductor layer 45 is obtained.

  In the step of growing the GaN-based semiconductor layer 40, since the GaN-based semiconductor layer 40 is grown at a growth temperature of 700 ° C. or higher and 1100 ° C. or lower, the intermediate GaN-based film 30 can be changed from amorphous to crystalline. . For this reason, the adhesion between the intermediate GaN-based film 30 and the layer adjacent to the intermediate GaN-based film 30 is strengthened, so that defects such as film peeling are suppressed and the reliability is improved. Furthermore, the mobility of electrons in the intermediate GaN-based film 30 is improved. As a result, the resistance is lowered and the characteristics of the semiconductor device are enhanced.

  Further, referring to (C-3-1) in FIG. 4, in the semiconductor stacked body 2 shown in (C-3) of FIG. 4 obtained as described above, the p-type GaN of the GaN-based semiconductor layer 40 is obtained. A vertical LED is obtained as the semiconductor device 3 by forming the p-side electrode 50 p on the semiconductor layer 45 and the n-side electrode 50 n on the polycrystalline group III nitride supporting substrate 10 of the composite substrate 1. . Here, the method for forming the p-side electrode 50p and the n-side electrode 50n is not particularly limited, but from the viewpoint of improving productivity, a sputtering method, a vapor deposition method, or the like is preferable.

  Further, referring to FIGS. 5 and 6, in the vertical type LED as the semiconductor devices 3 and 4 obtained by the semiconductor device manufacturing method of the present embodiment, the p-side electrode 50 p is electrically connected to the p-side lead frame 60 p. The p-side down structure in which the n-side electrode 50n is electrically connected to the n-side lead frame 60n by the bonding wire 50w can be mounted. The LEDs that are the semiconductor devices 3 and 4 can be mounted because the composite substrate 1 is transparent and conductive, and thus light can be extracted from the composite substrate 1 side.

  Further, referring to (C-3-2) in FIG. 4, in the semiconductor stacked body 2 shown in (C-3) of FIG. 4 obtained as described above, on the p-type GaN-based semiconductor layer 45. A p-side electrode 50p is formed, a part of the n-type GaN-based semiconductor layer 41 is exposed by etching, and an n-side electrode 50n is formed on the exposed n-type GaN-based semiconductor layer 41, thereby forming a lateral type as the semiconductor device 3. LED is obtained.

  Further, referring to FIGS. 11 and 12, in the lateral LED which is the semiconductor device 3 or 4 obtained by the semiconductor device manufacturing method of the present embodiment, the p-side electrode 50 p is connected to the p-side lead frame 60 p, and the n-side A flip-chip type mounting having a p-side down structure can be implemented so that the electrodes 50n are electrically connected to the n-side lead frame, respectively. The LEDs that are the semiconductor devices 3 and 4 are horizontal LEDs, and the composite substrate 1 is transparent, so that light can be taken out from the composite substrate 1 side, so that such mounting is possible.

  Here, the method of electrically connecting the p-side electrode 50p and the p-side lead frame 60p and the n-side electrode 50n and the p-side lead frame 60n is not particularly limited, but is simple and reliable. From the viewpoint of connection, it is preferable to connect via bumps.

Example 1
1. Ion Implantation into Single-Crystal GaN-Based Substrate Referring to FIG. 4B-1, the front major surface having a diameter of 50 mm and a thickness of 400 μm is the (0001) plane, and the dislocation density is 5 × 10 ⁶ cm ^−2. A single crystal GaN substrate (single crystal GaN-based substrate 20) was prepared.

  Next, referring to FIG. 4B-2, hydrogen ions are implanted from the back main surface (this is the (000-1) plane) side of the single crystal GaN substrate (single crystal GaN-based substrate 20). As a result, an ion implantation region 20i was formed at a depth of 200 nm from the back main surface side of the single crystal GaN substrate. The ion implantation region 20i was a region embrittled as compared with the surrounding region.

2. Formation of Intermediate Group GaN-Based Layer on Polycrystalline Group III Nitride Support Substrate and Single Crystal GaN-Based Substrate On the other hand, referring to FIG. 4A-1, a polycrystalline GaN support having a diameter of 50 mm and a thickness of 400 μm A substrate (polycrystalline group III nitride supporting substrate 10) was prepared.

Next, a second intermediate is formed on the back main surface (main surface on the ion implantation region 20i side) of the single crystal GaN substrate (single crystal GaN-based substrate 20) on which the ion implantation region 20i is formed by reactive sputtering. A GaN layer (second intermediate GaN-based layer 32) is formed, and a first intermediate GaN layer (first intermediate GaN layer) is formed on one main surface of the polycrystalline GaN supporting substrate (polycrystalline III-nitride supporting substrate 10). An intermediate GaN-based layer 31) was formed. The formation conditions were such that the temperature of each substrate was 400 ° C., Ga was supplied by argon plasma using a GaN target, and N was supplied by N ₂ gas. The formed first intermediate GaN layer (first intermediate GaN-based layer 31) and second intermediate GaN layer (second intermediate GaN-based layer 32) both have a thickness of 500 nm. The oxygen concentrations of all were 2 × 10 ¹⁸ cm ⁻³ , and the silicon concentrations thereof were all 1 × 10 ¹⁸ cm ⁻³ .

  Next, the main surface of the first intermediate GaN layer (first intermediate GaN-based layer 31) formed on the polycrystalline GaN support substrate (polycrystalline group III nitride support substrate 10) and the single crystal GaN substrate (single crystal) The main surface of the second intermediate GaN layer (second intermediate GaN-based layer 32) formed on the GaN-based substrate 20) is planarized by mechanical polishing to a depth of 200 nm using diamond slurry. The RMS (root mean square) roughness of these main surfaces was 0.5 nm. Here, the RMS roughness means the roughness expressed by the square root of the value obtained by averaging the squares of the deviation (distance) from the average surface to the measurement curved surface, and means Rq defined in JIS B0601-2001. Measurement was performed in the range of 10 μm × 10 μm using an (atomic force microscope).

3. Bonding of Polycrystalline Group III Nitride Support Substrate and Single Crystal GaN-Based Substrate Next, referring to FIG. 4C-1, the first intermediate GaN layer (first intermediate GaN-based layer 31) The main surface after polishing and the main surface after polishing of the second intermediate GaN layer (second intermediate GaN-based layer 32) are bonded together and pressure-bonded for 1 hour at an atmospheric temperature of 200 ° C. and a pressure of 100 kgf / cm ^2. As a result, a polycrystalline GaN substrate (polycrystalline group III nitride support substrate 10) and a single crystal GaN substrate (single crystal GaN-based substrate 20) with an intermediate GaN film (intermediate GaN-based film 30) having a thickness of 600 nm interposed therebetween. And pasted together.

4). Separation of Single Crystal GaN-Based Substrate Next, referring to FIG. 4C-2, a polycrystalline GaN support substrate (polycrystalline group III nitride support substrate) with an intermediate GaN film (intermediate GaN-based film 30) interposed therebetween 10) and a single crystal GaN substrate (single crystal GaN-based substrate 20) are heated in an NH ₃ atmosphere at 700 ° C. for 2 hours to obtain a single-crystal GaN substrate (single-crystal GaN-based substrate). An intermediate GaN film (intermediate 600 nm) formed on a 400 μm thick polycrystalline GaN support substrate (polycrystalline III-nitride support substrate 10) by separating the substrate 20) at the embrittled ion implantation region 20i. A composite substrate 1 was obtained in which a single-crystal GaN layer (single-crystal GaN-based layer 21) having a (0001) plane and a thickness of 200 nm was formed on the GaN-based film 30).

5. Manufacturing of Semiconductor Device Next, referring to FIG. 5, a GaN-based semiconductor layer 40 having a thickness is formed on the single-crystal GaN layer (single-crystal GaN-based layer 21) of the composite substrate 1 obtained above by MOCVD. 6-fold MQW (quantitative well structure) activity composed of a 2 μm n-type GaN layer (n-type GaN-based semiconductor layer 41), a 5 nm thick In _0.12 Ga _0.88 N well layer, and a 10 nm thick GaN barrier layer A layer 43, a p-type Al _0.07 Ga _0.93 N layer 45a having a thickness of 20 nm, and a p-type GaN contact layer 45b having a thickness of 100 nm (all of which are p-type GaN-based semiconductor layers 45) were sequentially grown. The growth temperature of the GaN-based semiconductor layer 40 is 1050 ° C. for the n-type GaN layer, 750 ° C. for the In _0.12 Ga _0.88 N well layer, 850 ° C. for the GaN barrier layer, 1000 ° C. for the p-type Al _0.07 Ga _0.93 N layer, and p-type. The GaN contact layer was 1000 ° C. The threading dislocation density of the GaN-based semiconductor layer 40 was 5 × 10 ⁶ cm ^{−2 as} measured by the CL (cathode luminescence) method.

  Next, a Ti layer is formed by electron beam evaporation on the polycrystalline GaN support substrate (polycrystalline III nitride support substrate 10) of the composite substrate 1, and then an Al layer is formed by resistance heating evaporation. Then, a Ti / Al electrode serving as an ohmic electrode was formed as the n-side electrode 50n. On the p-type GaN contact layer 45b of the GaN-based semiconductor layer 40, an Ni layer and an Au layer are formed by resistance heating vapor deposition, thereby forming an Ni / Au electrode serving as an ohmic electrode and a semitransparent electrode as the p-side electrode 50p. did.

  Next, after forming a mesa in the GaN-based semiconductor layer 40, a chip was formed, and a vertical LED (semiconductor device 3) having a size of 400 μm × 400 μm in the p-side electrode 50p was formed.

6). Next, referring to FIGS. 5 and 6, the obtained vertical LED (semiconductor devices 3 and 4) has a p-side electrode 50 p and a p-side lead frame 60 p with an Ag electrode as a reflective electrode. The n-side electrode 50n was electrically connected to the n-side lead frame 60n by the bonding wire 50w, and the p-side down structure was mounted.

7). Evaluation of Semiconductor Device Next, an energization test of the mounted LED (semiconductor device 4) was performed. In order to suppress the influence of heat generation, a pulse power supply with a repetition frequency of 10 kHz and a duty ratio of 5% is used to measure the light output up to 200 A / cm ² at room temperature (25 ° C.) using an integrating sphere. did. The emission wavelength was 450 nm. The external quantum efficiency was calculated from the obtained light output L (mW), light wavelength λ (nm), and current value I (mA) using the following equation (1). Moreover, the operating voltage (V) of LED at this time was measured.

For the 20 vertical LEDs (semiconductor devices 3) of this example, the external quantum efficiency and the operating voltage were measured, and the average value at 200 A / cm ² was calculated. Was 3.1V. The results are summarized in Table 1.

(Reference Example 1)
7 and 8, a self-standing GaN support substrate 100 having a diameter of 50 mm and a thickness of 400 μm as the (0001) plane and a dislocation density of 5 × 10 ⁶ cm ⁻² is used instead of the composite substrate. Then, a GaN-based semiconductor layer 40 is grown on the self-standing GaN support substrate 100 in the same manner as in Example 1 to form an n-side electrode 50n and a p-side electrode 50p, thereby forming a vertical LED (semiconductor device 3). A p-side down structure was mounted on the LED. The threading dislocation density of the GaN-based semiconductor layer 40 was 5 × 10 ⁶ cm ⁻² .

For the 20 vertical LEDs (semiconductor device 4) mounted as described above, an energization test was performed in the same manner as in Example 1, and the emission wavelength, the average external quantum efficiency at 200 A / cm ² and the average operating voltage were determined. Measured and calculated. The LED in Reference Example 1 had an emission wavelength of 455 nm, an average external quantum efficiency of 60%, and an average operating voltage of 3.0V. The results are summarized in Table 1.

(Comparative Example 1)
Referring to FIGS. 9 and 10, a sapphire support substrate 200 having a diameter of 50 mm and a thickness of 400 μm is used as the 0001 sapphire support substrate 200 instead of the composite substrate. Other than cleaning at 1000 ° C. in the atmosphere, growing a low-temperature GaN layer having a thickness of 20 nm at 450 ° C., and further setting the thickness of the n-type GaN layer (n-type GaN-based semiconductor layer 41) to 5 μm. In the same manner as in Example 1, the GaN-based semiconductor layer 40 was grown. The threading dislocation density of the GaN-based semiconductor layer 40 was 5 × 10 ⁸ cm ⁻² .

Next, a p-side electrode 50p was formed on the p-type GaN contact layer 45b of the GaN-based semiconductor layer 40 in the same manner as in Example 1. Next, the p-side electrode 50p, the p-type GaN contact layer 45b of the GaN-based semiconductor layer 40, the p-type Al _0.07 Ga _0.93 N layer 45a, and part of the MQW active layer 43 are removed by mesa etching to remove the n-type GaN layer (n A part of the type GaN-based semiconductor layer 41) is exposed, and an n-side electrode 50n is formed in the exposed portion in the same manner as in Example 1 to form a chip, and the size of the p-side electrode 50p is 400 μm × 400 μm. A horizontal LED (semiconductor device 3) was prepared. Next, the LED was mounted on a flip chip type with a p-side down structure.

For the 20 horizontal LEDs mounted as described above, an energization test was performed in the same manner as in Example 1, and the emission wavelength, the average external quantum efficiency at 200 A / cm ^2, and the average operating voltage were measured and calculated. The LED in Comparative Example 1 had an emission wavelength of 455 nm, an average external quantum efficiency of 20%, and an average operating voltage of 4.2V. The results are summarized in Table 1.

(Example 2)
Referring to FIGS. 5 and 6, as single crystal GaN-based substrate 20, single crystal GaN having a diameter of 50 mm and a thickness of 400 μm and a main surface of (10-10) plane and a dislocation density of 5 × 10 ⁶ cm ^−2. A composite substrate 1 was obtained in the same manner as in Example 1 except that the substrate was used. The front principal surface of the single crystal GaN layer (single crystal GaN-based layer 21) of the obtained composite substrate 1 was a (10-10) plane. Next, using this composite substrate 1, a GaN-based semiconductor layer 40 is grown in the same manner as in Example 1, and an n-side electrode 50 n and a p-side electrode 50 p are formed to form a vertical LED (semiconductor device 3). The p-side down structure was mounted on the LED.

The 20 vertical LEDs mounted as described above were subjected to an energization test in the same manner as in Example 1 to measure and calculate the emission wavelength, the average external quantum efficiency at 200 A / cm ^2, and the average operating voltage. The LED in Reference Example 1 had an emission wavelength of 451 nm, an average external quantum efficiency of 50%, and an average operating voltage of 3.2V. The results are summarized in Table 1.

(Reference Example 2)
7 and 8, in place of the composite substrate, a free-standing GaN supporting substrate 100 having a diameter of 50 mm and a thickness of 400 μm and having a main surface of (10-10) and a dislocation density of 5 × 10 ⁶ cm ^−2. Using this, a GaN-based semiconductor layer 40 is grown on this free-standing GaN support substrate 100 in the same manner as in Example 1, and an n-side electrode 50n and a p-side electrode 50p are formed to form a vertical LED (semiconductor device). 3) was fabricated, and a p-side down structure was mounted on the LED. The threading dislocation density of the GaN-based semiconductor layer 40 was 5 × 10 ⁶ cm ⁻² .

The 20 vertical LEDs mounted as described above were subjected to an energization test in the same manner as in Example 1 to measure and calculate the emission wavelength, the average external quantum efficiency at 200 A / cm ^2, and the average operating voltage. The LED in Reference Example 2 had an emission wavelength of 453 nm, an average external quantum efficiency of 52%, and an average operating voltage of 3.0V. The results are summarized in Table 1.

(Example 3)
Referring to FIGS. 5 and 6, single crystal GaN substrate 20 having a diameter of 50 mm and a thickness of 400 μm is a (20-21) plane main surface and a dislocation density of 5 × 10 ⁶ cm ^−2. A composite substrate 1 was obtained in the same manner as in Example 1 except that the substrate was used. The front principal surface of the single crystal GaN layer (single crystal GaN-based layer 21) of the obtained composite substrate 1 was the (20-21) plane. Next, using this composite substrate 1, a GaN-based semiconductor layer 40 is grown in the same manner as in Example 1, and an n-side electrode 50 n and a p-side electrode are formed to produce a vertical LED (semiconductor device 3). Then, a p-side down structure was mounted on the LED.

For the 20 vertical LEDs mounted as described above, an energization test was performed in the same manner as in Example 3, and the emission wavelength, the average external quantum efficiency at 200 A / cm ^2, and the average operating voltage were measured and calculated. The LED in Reference Example 1 had an emission wavelength of 452 nm, an average external quantum efficiency of 55%, and an average operating voltage of 3.3V. The results are summarized in Table 1.

(Reference Example 3)
7 and 8, in place of the composite substrate, a free-standing GaN support substrate 100 having a diameter of 50 mm and a thickness of 400 μm and having a (20-21) plane main surface and a dislocation density of 5 × 10 ⁶ cm ⁻² Using this, a GaN-based semiconductor layer 40 is grown on this free-standing GaN support substrate 100 in the same manner as in Example 1, and an n-side electrode 50n and a p-side electrode 50p are formed to form a vertical LED (semiconductor device). 3) was fabricated, and a p-down flip chip type mounting was performed on the LED. The threading dislocation density of the GaN-based semiconductor layer 40 was 5 × 10 ⁶ cm ⁻² .

The 20 vertical LEDs mounted as described above were subjected to an energization test in the same manner as in Example 1 to measure and calculate the emission wavelength, the average external quantum efficiency at 200 A / cm ^2, and the average operating voltage. The LED in Reference Example 3 had an emission wavelength of 450 nm, an average external quantum efficiency of 57%, and an average operating voltage of 3.1V. The results are summarized in Table 1.

Example 4
Referring to FIGS. 11 and 12, a single crystal GaN substrate 20 having a diameter of 50 mm and a thickness of 400 μm is a single crystal GaN substrate having a (0001) plane main surface and a dislocation density of 5 × 10 ⁶ cm ^−2. Thus, a composite substrate 1 was obtained. The front main surface of the single crystal GaN layer (single crystal GaN-based layer 21) of the obtained composite substrate 1 was the (0001) plane. Next, using this composite substrate 1, a GaN-based semiconductor layer 40 was grown in the same manner as in Example 1. The threading dislocation density of the GaN-based semiconductor layer 40 was 5 × 10 ⁶ cm ⁻² . Next, a p-side electrode 50p was formed on the p-type GaN contact layer 45b of the GaN-based semiconductor layer 40 in the same manner as in Example 1. Next, the p-side electrode 50p, the p-type GaN contact layer 45b of the GaN-based semiconductor layer 40, the p-type Al _0.07 Ga _0.93 N layer 45a, and part of the MQW active layer 43 are removed by mesa etching to remove the n-type GaN layer (n A part of the type GaN-based semiconductor layer 41) is exposed, and an n-side electrode 50n is formed in the exposed portion in the same manner as in Example 1 to form a chip, and the size of the p-side electrode 50p is 400 μm × 400 μm. A horizontal LED (semiconductor device 3) was prepared. Next, the LED was mounted in a flip-chip type with a p-down structure.

For the 20 horizontal LEDs mounted as described above, an energization test was performed in the same manner as in Example 1, and the emission wavelength, the average external quantum efficiency at 200 A / cm ^2, and the average operating voltage were measured and calculated. The LED in Example 4 had an emission wavelength of 453 nm, an average external quantum efficiency of 63%, and an average operating voltage of 3.2V. The results are summarized in Table 1.

(Reference Example 4)
Referring to FIGS. 13 and 14, a self-standing GaN supporting substrate 100 having a diameter of 50 mm and a thickness of 400 μm as the (0001) plane and a dislocation density of 5 × 10 ⁶ cm ⁻² is used instead of the composite substrate. Then, the GaN-based semiconductor layer 40 was grown on the self-standing GaN support substrate 100 in the same manner as in Example 1. The threading dislocation density of the GaN-based semiconductor layer 40 was 5 × 10 ⁶ cm ⁻² . Next, a p-side electrode 50p was formed on the p-type GaN contact layer 45b of the GaN-based semiconductor layer 40 in the same manner as in Example 1. Next, the p-side electrode 50p, the p-type GaN contact layer 45b of the GaN-based semiconductor layer 40, the p-type Al _0.07 Ga _0.93 N layer 45a, and part of the MQW active layer 43 are removed by mesa etching to remove the n-type GaN layer (n A part of the type GaN-based semiconductor layer 41) is exposed, and an n-side electrode 50n is formed in the exposed portion in the same manner as in Example 1 to form a chip, and the size of the p-side electrode 50p is 400 μm × 400 μm. A horizontal LED (semiconductor device 3) was prepared. Next, the LED was mounted in a flip-chip type with a p-down structure.

For the 20 horizontal LEDs mounted as described above, an energization test was performed in the same manner as in Example 1, and the emission wavelength, the average external quantum efficiency at 200 A / cm ^2, and the average operating voltage were measured and calculated. The LED in Reference Example 4 had an emission wavelength of 452 nm, an average external quantum efficiency of 64%, and an average operating voltage of 3.1V. The results are summarized in Table 1.

Referring to Table 1, the LED using the composite substrate including the polycrystalline group III nitride supporting substrate, the intermediate GaN-based film, and the single-crystal GaN-based layer of Examples 1 to 4 is self-supporting of Reference Examples 1 to 4. A semiconductor device similar to each of the LEDs using the GaN support substrate can be formed, and the same high average external quantum efficiency and low average operating voltage as those of the LEDs using the self-supporting GaN support substrates of Reference Examples 1 to 4 can be obtained. It was. Here, since Examples 1 to 3 and Reference Examples 1 to 3 are vertical semiconductor devices, and Example 4 and Reference Example 4 are horizontal semiconductor devices, the present invention relates to both vertical and horizontal semiconductors. It can be suitably used for a device.
In an LED using a composite substrate including a polycrystalline group III nitride support substrate, an intermediate GaN-based film, and a single crystal GaN-based layer, and an LED using a free-standing GaN support substrate, the threading dislocation density of the GaN-based semiconductor layer Is as low as about 5 × 10 ⁶ cm ^−2, and if the thickness of the well layer in the MQW active layer is 3 nm or less, the internal quantum efficiency is increased at a relatively low current density of 100 A / cm ² or less, and the well layer When the thickness is 5 nm or more, the internal quantum efficiency at a relatively high current density higher than 100 A / cm ² can be increased.

  In an LED using a composite substrate including a polycrystalline group III nitride supporting substrate, an intermediate GaN-based film, and a single-crystal GaN-based layer, the single-crystal GaN-based substrate used for forming the single-crystal GaN-based layer may be repeatedly used. Therefore, it can be manufactured at a lower cost than an LED using a self-supporting GaN support substrate.

  Further, the LED using the composite substrate including the polycrystalline group III nitride supporting substrate, the intermediate GaN-based film, and the single-crystal GaN-based layer of Example 1 is compared with the LED using the sapphire supporting substrate of Comparative Example 1. The average external quantum efficiency was high, the average operating voltage was low, and it had excellent characteristics. The average external quantum efficiency is high because GaN forming the composite substrate of the LED of Example 1 has a higher refractive index than the sapphire substrate of the LED of Comparative Example 1, and the GaN system of the LED of Example 1 This is probably because the semiconductor layer has a lower threading dislocation density than the GaN-based semiconductor layer of the LED of Comparative Example 1. The average operating voltage was decreased because the structure was such that the current flowed in the vertical direction (perpendicular to the main surface of the LED) and the resistance of the polycrystalline III-nitride support substrate was low. This is thought to be because the current easily spreads in a direction parallel to the main surface of the LED.

  It should be understood that the embodiments and examples disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

DESCRIPTION OF SYMBOLS 1 Composite substrate, 2 Semiconductor laminated body, 3, 4 Semiconductor device, 10 Polycrystalline group III nitride support substrate, 20 Single-crystal GaN-type substrate, 20i Ion implantation area | region, 21 Single-crystal GaN-type layer, 22 Remaining single-crystal GaN System substrate, 30 intermediate GaN-based film, 31 first intermediate GaN-based layer, 32 second intermediate GaN-based layer, 40 GaN-based semiconductor layer, 41 n-type GaN-based semiconductor layer, 43 MQW active layer, 45 p-type GaN Semiconductor layer, 45a p-type Al _0.07 Ga _0.93 N layer, 45b p-type GaN contact layer, 50nn side electrode, 50pp side electrode, 50w bonding wire, 60nn side lead frame, 60pp side lead frame, 100 freestanding GaN Support substrate, 200 sapphire support substrate.

Claims (13)

A polycrystalline GaN support substrate, an amorphous intermediate GaN-based film disposed on the polycrystalline GaN support substrate, and a single-crystal GaN-based layer disposed on the intermediate GaN-based film,
A composite substrate in which the polycrystalline GaN support substrate and the single crystal GaN-based layer are bonded together with the intermediate GaN-based film interposed therebetween. 2. The intermediate GaN-based film according to claim 1, wherein the intermediate GaN-based film includes at least one of oxygen and silicon as a dopant at a total concentration of oxygen and silicon of 1 × 10 ¹⁷ cm ⁻³ or more and 5 × 10 ¹⁹ cm ⁻³ or less. Composite board.   The composite substrate according to claim 1, wherein each of the intermediate GaN-based film and the single crystal GaN-based layer is formed of GaN.   4. The composite substrate according to claim 1, wherein a main surface of the single crystal GaN-based layer is a (0001) plane. 5.   4. The main surface of the single crystal GaN-based layer is one surface selected from the group consisting of a {10-10} plane and a {11-20} plane. 5. Composite board.   The principal surface of the single crystal GaN-based layer is one selected from the group consisting of {10-11} plane, {20-21} plane, {20-2-1} plane, and {10-1-1} plane. The composite substrate according to claim 1, wherein the composite substrate is a surface.   The composite substrate according to any one of claims 1 to 6, wherein the polycrystalline GaN support substrate has a thickness of 200 µm or more and 1000 µm or less.   A semiconductor device comprising: the composite substrate according to claim 1; and at least one GaN-based semiconductor layer disposed on the single crystal GaN-based layer of the composite substrate. A composite comprising a polycrystalline group III nitride supporting substrate, an intermediate GaN-based film disposed on the polycrystalline group III-nitride supporting substrate, and a single crystalline GaN-based layer disposed on the intermediate GaN-based film A method for manufacturing a substrate, comprising:
Forming an amorphous first intermediate GaN-based layer on one main surface of the polycrystalline III-nitride supporting substrate;
Forming an ion implantation region at a predetermined depth from one main surface side of the single crystal GaN-based substrate; and forming a non-crystalline first layer on the main surface of the single crystal GaN-based substrate on the ion implantation region side. Forming two intermediate GaN-based layers;
Bonding the first intermediate GaN-based layer and the second intermediate GaN-based layer to form the intermediate GaN-based film, thereby supporting the polycrystalline group III nitride via the intermediate GaN-based film Bonding the substrate and the single crystal GaN-based substrate;
Separating the single crystal GaN-based substrate into the single crystal GaN-based layer and the remaining single crystal GaN-based substrate in the ion implantation region. Using the remaining single crystal GaN-based substrate as a further single crystal GaN-based substrate, another polycrystalline group III nitride support substrate and another intermediate disposed on the other polycrystalline group III nitride support substrate A method of manufacturing a composite substrate, which includes a GaN-based film and a further single-crystal GaN-based layer disposed on the other intermediate GaN-based film,
Forming another non-crystalline first intermediate GaN-based layer on one main surface of the other polycrystalline III-nitride supporting substrate; and one main surface side of the further single-crystal GaN-based substrate Forming a further ion implantation region at a predetermined depth from the second single-crystal GaN-based substrate and another second intermediate GaN-based layer that is amorphous on the main surface of the further single-crystal GaN-based substrate on the further ion implantation region side Forming another intermediate GaN-based film by bonding the other first intermediate GaN-based layer and the second second intermediate GaN-based layer together to form another intermediate GaN-based film. Bonding the additional polycrystalline III-nitride support substrate and the further single crystal GaN-based substrate with a film interposed therebetween, and further bonding the additional single crystal GaN-based substrate in the further ion-implanted region. Layer and Composite substrate manufacturing method according to claim 9 including the step of separating into a remaining monocrystalline GaN-based substrate, the made. A method for manufacturing a semiconductor device, comprising:
A polycrystalline GaN support substrate, a non-crystalline intermediate GaN-based film disposed on the GaN support substrate, and a single-crystal GaN-based layer disposed on the intermediate GaN-based film. Preparing a composite substrate in which a support substrate and the single crystal GaN-based layer are bonded together with the intermediate GaN-based film interposed therebetween;
Growing at least one GaN-based semiconductor layer on the single-crystal GaN-based layer of the composite substrate. The method of manufacturing a semiconductor device according to claim 11 , wherein in the step of growing the GaN-based semiconductor layer, the intermediate GaN-based film is changed from amorphous to crystalline. The step of growing the GaN-based semiconductor layer includes a sub-step of growing an n-type GaN-based semiconductor layer on the single-crystal GaN-based layer, and an active layer having a multiple quantum well structure on the n-type GaN-based semiconductor layer. The method for manufacturing a semiconductor device according to claim 11 or 12 , comprising: a sub-process for forming a p-type GaN-based semiconductor layer on the active layer.

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