JP5902931B2 - 配線基板の製造方法、及び、配線基板製造用の支持体 - Google Patents
配線基板の製造方法、及び、配線基板製造用の支持体 Download PDFInfo
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B38/00—Ancillary operations in connection with laminating processes
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- B—PERFORMING OPERATIONS; TRANSPORTING
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- B32B15/00—Layered products comprising a layer of metal
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- B—PERFORMING OPERATIONS; TRANSPORTING
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- B32B15/00—Layered products comprising a layer of metal
- B32B15/04—Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material
- B32B15/043—Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material of metal
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B15/00—Layered products comprising a layer of metal
- B32B15/14—Layered products comprising a layer of metal next to a fibrous or filamentary layer
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B3/00—Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shape; Layered products comprising a layer having particular features of form
- B32B3/02—Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shape; Layered products comprising a layer having particular features of form characterised by features of form at particular places, e.g. in edge regions
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- B32B5/00—Layered products characterised by the non- homogeneity or physical structure, i.e. comprising a fibrous, filamentary, particulate or foam layer; Layered products characterised by having a layer differing constitutionally or physically in different parts
- B32B5/22—Layered products characterised by the non- homogeneity or physical structure, i.e. comprising a fibrous, filamentary, particulate or foam layer; Layered products characterised by having a layer differing constitutionally or physically in different parts characterised by the presence of two or more layers which are next to each other and are fibrous, filamentary, formed of particles or foamed
- B32B5/24—Layered products characterised by the non- homogeneity or physical structure, i.e. comprising a fibrous, filamentary, particulate or foam layer; Layered products characterised by having a layer differing constitutionally or physically in different parts characterised by the presence of two or more layers which are next to each other and are fibrous, filamentary, formed of particles or foamed one layer being a fibrous or filamentary layer
- B32B5/26—Layered products characterised by the non- homogeneity or physical structure, i.e. comprising a fibrous, filamentary, particulate or foam layer; Layered products characterised by having a layer differing constitutionally or physically in different parts characterised by the presence of two or more layers which are next to each other and are fibrous, filamentary, formed of particles or foamed one layer being a fibrous or filamentary layer another layer next to it also being fibrous or filamentary
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- B—PERFORMING OPERATIONS; TRANSPORTING
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- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B7/00—Layered products characterised by the relation between layers; Layered products characterised by the relative orientation of features between layers, or by the relative values of a measurable parameter between layers, i.e. products comprising layers having different physical, chemical or physicochemical properties; Layered products characterised by the interconnection of layers
- B32B7/04—Interconnection of layers
- B32B7/06—Interconnection of layers permitting easy separation
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2260/00—Layered product comprising an impregnated, embedded, or bonded layer wherein the layer comprises an impregnation, embedding, or binder material
- B32B2260/02—Composition of the impregnated, bonded or embedded layer
- B32B2260/021—Fibrous or filamentary layer
- B32B2260/023—Two or more layers
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2305/00—Condition, form or state of the layers or laminate
- B32B2305/07—Parts immersed or impregnated in a matrix
- B32B2305/076—Prepregs
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2311/00—Metals, their alloys or their compounds
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2457/00—Electrical equipment
- B32B2457/08—PCBs, i.e. printed circuit boards
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1536—Temporarily stacked PCBs
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12486—Laterally noncoextensive components [e.g., embedded, etc.]
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- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
前記支持体及び前記配線基板のうち、平面視で前記外周部と重複する重複部分を除去する第4工程と、前記第4工程の後に、前記剥離層、前記第2金属層、及び前記配線基板を、前記基材及び前記第1金属層から分離する、又は、前記第2金属層及び前記配線基板を、前記基材、前記第1金属層、及び前記剥離層から分離する、第5工程とを含む。
図1(A)〜(C)は、実施の形態1の配線基板の製造方法で積層体を加工する工程を示す図である。ここでは、図1(A)〜(C)に示すようにXYZ座標系を定義する。
実施の形態2の配線基板の製造方法は、金属箔11の端部11Aに加えて、剥離層12の端部も除去し、プリプレグ20と金属箔13を接着する点が実施の形態1の配線基板の製造方法と異なる。
11、11B 金属箔
11A、12B 端部
12、12C 剥離層
12A、13A 周端部
13 金属箔
20 プリプレグ
30、30A、30B 支持体
40 めっきレジスト
40A 開口部
41 パッド
42 絶縁層
42A ビアホール
43 配線層
44 絶縁層
45 配線層
46 ソルダーレジスト層
50、51、51A、52 構造体
53 ビルドアップ基板
Claims (13)
- 第1金属層、剥離層、及び第2金属層の積層体のうち、前記第1金属層の端部を除去することにより、前記第1金属層を平面視で前記剥離層よりも小さく加工し、前記剥離層の外周部を露出する第1工程と、
半硬化状態の基材上に前記積層体の前記第1金属層側を当接させて前記第1金属層と前記基材とを接着するとともに、前記剥離層の外周部と前記基材とを接着することにより、支持体を形成する第2工程と、
前記支持体の前記第2金属層の上に、配線基板を形成する第3工程と、
前記支持体及び前記配線基板のうち、平面視で前記外周部と重複する重複部分を除去する第4工程と、
前記第4工程の後に、前記剥離層、前記第2金属層、及び前記配線基板を、前記基材及び前記第1金属層から分離する、又は、前記第2金属層及び前記配線基板を、前記基材、前記第1金属層、及び前記剥離層から分離する、第5工程と
を含む、配線基板の製造方法。 - 第1金属層、剥離層、及び第2金属層の積層体のうち、前記第1金属層の端部と前記剥離層の端部とを除去することにより、前記第1金属層と前記剥離層とを平面視で前記第2金属層よりも小さく加工し、前記第2金属層の外周部を露出する第1工程と、
半硬化状態の基材上に前記積層体の前記第1金属層側を当接させて前記第1金属層と前記基材とを接着するとともに、前記第2金属層の外周部と前記基材とを接着することにより、支持体を形成する第2工程と、
前記支持体の前記第2金属層の上に、配線基板を形成する第3工程と、
前記支持体及び前記配線基板のうち、平面視で前記外周部と重複する重複部分を除去する第4工程と、
前記第4工程の後に、前記剥離層、前記第2金属層、及び前記配線基板を、前記基材及び前記第1金属層から分離する、又は、前記第2金属層及び前記配線基板を、前記基材、前記第1金属層、及び前記剥離層から分離する、第5工程と
を含む、配線基板の製造方法。 - 前記基材は接着性を有し、前記第2工程において、前記積層体と前記基材とを加熱・加圧して接着する、請求項1又は2記載の配線基板の製造方法。
- 前記第4工程では、前記基材、前記積層体、及び前記配線基板のうち、前記重複部分よりも平面視で所定長さ内側の部分まで除去する、請求項1乃至3のいずれか一項記載の配線基板の製造方法。
- 前記第5工程において、前記剥離層と前記第1金属層との間で剥離を行い、前記基材及び前記第1金属層から前記剥離層、前記第2金属層、及び前記配線基板を分離する、請求項1乃至4のいずれか一項記載の配線基板の製造方法。
- 前記第5工程において、前記剥離層と前記第2金属層との間で剥離を行い、前記基材、前記第1金属層、及び前記剥離層から前記第2金属層、及び前記配線基板を分離する、請求項1乃至4のいずれか一項記載の配線基板の製造方法。
- 前記第5工程の後に、前記配線基板と前記第2金属層とを分離する、請求項1乃至6のいずれか一項記載の配線基板の製造方法。
- 前記基材はプリプレグである、請求項1乃至7のいずれか一項記載の配線基板の製造方法。
- 前記配線基板は、ビルドアップ基板である、請求項1乃至8のいずれか一項記載の配線基板の製造方法。
- 前記基材の両面に前記積層体を積層し、前記基材の両面に前記配線基板を形成する、請求項1乃至9のいずれか一項記載の配線基板の製造方法。
- 前記第1金属層は、前記第2金属層よりも薄い、請求項1乃至10のいずれか一項記載の配線基板の製造方法。
- 前記基材として、複数の基材を積層させて用いる、請求項1乃至11のいずれか一項記載の配線基板の製造方法。
- 前記第1工程の前に、前記第2金属層の前記剥離層側の表面を粗化する工程をさらに含む、請求項1乃至12のいずれか一項記載の配線基板の製造方法。
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JP2011266721A JP5902931B2 (ja) | 2011-12-06 | 2011-12-06 | 配線基板の製造方法、及び、配線基板製造用の支持体 |
US13/691,931 US20130143062A1 (en) | 2011-12-06 | 2012-12-03 | Method and support member for manufacturing wiring substrate, and structure member for wiring substrate |
KR1020120140519A KR101988923B1 (ko) | 2011-12-06 | 2012-12-05 | 배선 기판 제조 방법, 배선 기판 제조용 지지체 및 배선 기판용 구조체 |
TW101145579A TWI598221B (zh) | 2011-12-06 | 2012-12-05 | 配線基板之製造方法及支持件 |
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JP6063183B2 (ja) * | 2012-08-31 | 2017-01-18 | パナソニックIpマネジメント株式会社 | 剥離可能銅箔付き基板及び回路基板の製造方法 |
KR101448529B1 (ko) * | 2013-06-17 | 2014-10-08 | 주식회사 심텍 | 프라이머층을 이용하는 세미어디티브법을 적용하는 인쇄회로기판의 제조 방법 |
TWI555166B (zh) * | 2013-06-18 | 2016-10-21 | 矽品精密工業股份有限公司 | 層疊式封裝件及其製法 |
JP6266965B2 (ja) * | 2013-12-04 | 2018-01-24 | Jx金属株式会社 | 多層プリント配線基板の製造方法及びベース基材 |
US9554472B2 (en) * | 2013-12-19 | 2017-01-24 | Intel Corporation | Panel with releasable core |
US9522514B2 (en) | 2013-12-19 | 2016-12-20 | Intel Corporation | Substrate or panel with releasable core |
US9554468B2 (en) * | 2013-12-19 | 2017-01-24 | Intel Corporation | Panel with releasable core |
US9434135B2 (en) | 2013-12-19 | 2016-09-06 | Intel Corporation | Panel with releasable core |
JP2015144150A (ja) * | 2014-01-31 | 2015-08-06 | 京セラサーキットソリューションズ株式会社 | 配線基板の製造方法 |
CN105931997B (zh) * | 2015-02-27 | 2019-02-05 | 胡迪群 | 暂时性复合式载板 |
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KR101055495B1 (ko) * | 2009-04-14 | 2011-08-08 | 삼성전기주식회사 | 기판 제조용 캐리어 부재 및 이를 이용한 기판 제조방법 |
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- 2012-12-05 KR KR1020120140519A patent/KR101988923B1/ko active Active
- 2012-12-05 TW TW101145579A patent/TWI598221B/zh active
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JP2013120771A (ja) | 2013-06-17 |
TWI598221B (zh) | 2017-09-11 |
KR101988923B1 (ko) | 2019-06-13 |
US20130143062A1 (en) | 2013-06-06 |
KR20130063475A (ko) | 2013-06-14 |
TW201334956A (zh) | 2013-09-01 |
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