JP5790128B2 - Programmable controller system and its support device - Google Patents

Description

  The present invention relates to a programmable controller system, and more particularly to a support device therefor.

  The PLC (programmable controller) support tool compiles a program written by the user (source code; including variables) to generate a machine language object that operates on the PLC. Assign each variable (to any address). Then, the machine language object is downloaded and stored in the PLC. As a result, the PLC executes various processes by executing this program, and accesses the address (allocation position) assigned to the variable in the process of reading / writing the value of each variable. become.

  If the program is changed while the PLC is running (program version upgrade, etc.), the address of a variable that has already been assigned (referred to as an existing variable) cannot be changed (if the variable assignment position changes, (Because the variable value cannot be handled normally by the program before and after the change, it malfunctions.) By changing the address of the variable, data cannot be transferred before and after the change of the address).

  Therefore, conventionally, a spare area is provided to prevent the address of an existing variable from being changed even if a variable is added, and the added variable (referred to as an additional variable) is assigned to this spare area. Yes. By assigning the additional variable to the spare area, it is possible to add the variable without changing the assignment position of the already assigned variable (existing variable). Since the spare area has a program configuration unit (hereinafter referred to as POU), the size of the spare area is usually from several W (WORD) to several tens of W.

  The spare area is a useless area unless a variable is added. Since the PLC memory is finite and the number of POUs is large in a large scale system, a large (several) spare area cannot be secured.

  If the user changes the program with the addition of variables exceeding the number of spare areas, the allocation position of the existing variables cannot be maintained, so changing the program while continuing the PLC operation (online change) become unable.

  As a method for reserving a large spare area and relaxing the restriction on online change, for example, there is a conventional technique disclosed in Patent Document 1, but the spare area is grouped into task units instead of POU units so that the spare area is made larger. There is a problem that a variable exceeding the number of spare areas cannot be added because of the method of securing.

JP 2008-269449 A

  Here, the POU includes types such as PG (program), FB (function block), and FCT (function). Basically, PG may be regarded as a main program and FB or FCT as a subprogram, and PG calls FB, FCT, or the like during execution of the processing. In addition, the FB may call another FB or FCT during execution of the process.

  Taking PG as an example, a user who creates a source code of PG describes a call such as an arbitrary FB in the PG, and can be described so that it can be called any number of times regardless of the type. For example, it is assumed that there are two types of FBs, FB1 and FB2, and an arbitrary PG created by the user calls FB1 three times and FB2 calls twice.

Alternatively, the source code of FB1 can be written so that the called FB1 calls FB2 during the execution of the process.
Thus, even if the logic of the function block FB1 is only one, the user can use it multiple times. Similarly, even if there is only one logic of the function block FB2, the user can use it multiple times.

  Here, in the source code of various POUs such as PG (program), FB (function block), and FCT (function), an arbitrary variable is usually described. When compiling a program having various POUs, instantiating each POU (assigning each variable of each POU to a memory) is performed by a compiler function.

  For example, in the example in which FB1 is called three times as described above, instantiation is performed three times for FB1. For example, when FB1 is a logic for acquiring and storing the temperature measured by the thermometer and the humidity measured by the hygrometer, for example, the measured value of the thermometer A is stored at address 1000 and the measured value of the hygrometer a is stored at address 1001. An instance that stores the measured value of thermometer B at address 1010, the measured value of hygrometer b at address 1011, the measured value of thermometer C at address 1020, and the measured value of hygrometer c at address 1021 Three instances will be created.

  When instantiating each POU, the compiler function allocates memory as one lump including a spare area. When the FB is used a plurality of times as described above, instantiation is performed for each. As described above, in the case of the example of FB1, three instances are generated, and the memory is allocated as one lump for each instance. In the above example, for each instance, the memory is allocated as a lump with a total of 3 words, 1 word (1 address) for each thermometer and hygrometer, and 1 word for the spare area. become.

  If a variable is added to an arbitrary POU, for example, by correcting (upgrading) the program later, this additional variable is allocated to the spare area. Even if the spare area is insufficient due to the large number of additional variables, usually a sufficient margin (empty area) still remains in the PLC memory, so it is possible to allocate variables to other memory areas.

  However, in the conventional method, when a variable is added beyond the spare area, it is necessary to change the address (allocation position) of the existing variable. If the address of the existing variable is changed, normal data transfer is performed as described above. Therefore, it is necessary to stop the PLC, initialize data, transfer all the programs to the PLC, and then start the PLC. When the PLC stops, the system also stops, which causes a problem when the system operation rate, maintainability, expandability is deteriorated, or when the system cannot be stopped such as a plant.

  An object of the present invention is to add a variable that cannot be dealt with in a spare area without changing an address (allocation position) of an existing variable in accordance with the PLC system in the PLC support apparatus associated with the PLC system update / correction. Even when there is a PLC, a PLC (programmable controller) system that can update a program without suspending the PLC by allocating an additional variable to an empty area of the PLC memory, and its support device.

The programmable controller system of the present invention is a programmable controller system including a support device that compiles a source code of an arbitrary program for a programmable controller and generates a machine language object, and a programmable controller. When changing the program while the programmable controller is operating, for each POU included in the source code when the source code is compiled, a storage area, a spare area, and an additional variable for each variable related to the POU Variable information storage means for holding area information indicating each area of the storage destination storage area by a relative address, and a lump of memory reserved for each instance of each POU at the time of compiling the source code In the area With reference to the instance information storage means for storing at least the head address as information about the block, the variable information storage means and the instance information storage means, while performing memory allocation for each instance, the variables, Compile means for converting source code of an arbitrary program into the machine language object, and each POU included in the source code when compiling the source code of the correction / update program that is a correction / update version of the program Then, referring to the variable information storage means, the presence or absence of an additional variable is checked, and if there is an additional variable, it is determined whether or not it can be handled in the spare area. If this cannot be handled, an additional block is confirmed for each instance of the POU. While, and an additional variable corresponding means for generating and storing information for and stores the head address of the additional blocks in the additional variable storage destination memory area of the existing block.

  In the programmable controller system, for example, the compiling unit may convert the correction / update program into the machine language object regardless of the presence or absence of the additional variable and the variable information storage unit for the existing variable. Based on the area information, the same address as the previous compilation is assigned.

  In the programmable controller system, for example, the compiling means accesses the additional variable via the additional variable storage destination storage area regarding the conversion of the correction / update program into the machine language object. Is generated.

  In the programmable controller system, for example, in the support device, if there is an additional variable in the correction / update program, a spare area is allocated if it can be handled in the spare area, and an additional block is assigned even if it cannot be handled in the spare area. It can respond by securing. For existing variables, the same address as that at the previous compilation can be assigned based on the area information in the variable information storage means.

  According to the PLC (programmable controller) system of the present invention, its support device, etc., the address (allocation position) of an existing variable is changed as the PLC program in the PLC support device is updated / modified. In addition, even when there is a variable addition that cannot be dealt with in the spare area, the program can be updated without stopping the PLC by allocating the additional variable to the empty area of the PLC memory.

It is a whole block diagram of the PLC system of this example. It is a figure which shows an example of the memory allocation of a variable. (A), (b) is a figure which shows allocation of the additional variable storage area. (A)-(c) is a figure which shows the specific example of a variable information management table | surface. (A), (b) is a figure which shows the specific example of a POU instance address allocation correspondence table. It is a flowchart figure for demonstrating a compilation process. It is a figure which shows the specific example of a source code identification number corresponding table. It is a flowchart for demonstrating the compilation process of a correction version program. It is a figure which shows the specific example of POU instance address information.

Embodiments of the present invention will be described below with reference to the drawings.
In this description, it is assumed that “assignment” and “assignment” are almost synonymous.
FIG. 1 is a diagram showing an overall configuration of a programmable controller (PLC) system of this example.

  The PLC system of this example includes a PLC (programmable controller) 30 and a function for supporting a user to arbitrarily create a program for the PLC 30 (a control program or the like; the control program will be described below as an example). A development support apparatus (loader) 10 is provided.

  The development support device 10 also has a function of compiling the created control program and converting it into a machine language, and then downloading it to the PLC 30 via a communication line (not shown). The PLC 30 stores this machine language program (corresponding to a machine language object 41 described later). Further, when a machine language program such as an update / correction version is downloaded in accordance with the update / correction of the control program, the PLC 30 deletes the stored old program and stores the new program. Then, the PLC 30 controls various devices to be controlled by executing the machine language program currently stored.

Although not particularly illustrated, the PLC 30 is connected via a communication line to some device to be controlled or an I / O unit to which the device is connected.
The development support apparatus (loader) 10 includes various function units such as a compiler function unit 11, an interface function unit 12, a communication function unit 13, and a storage unit 20. In addition, it includes a display 14 for displaying a screen for allowing the user to create the control program and the like, an input device 15 such as a keyboard / mouse, and the like. Although not particularly shown, the development support apparatus (loader) 10 also has an arithmetic processing processor such as a CPU / MPU.

  The storage unit 20 stores an application program (not shown) in advance. When the CPU / MPU or the like reads and executes the application program, the functions of the various functional units 11, 12, and 13 (particularly, the processes shown in FIGS. 6 and 8 described later) are realized.

The storage unit 20 stores various data / programs shown in the figure.
That is, the storage unit 20 stores the source code 21 of the control program created by the user, the machine language object 23 that is the result of compiling the source code 21 by the compiler function unit 11, and the like.

  Further, the various types of data shown in the figure, that is, the source code identification number correspondence table 22, the variable information management table 24, the POU instance address information 25, the POU instance address assignment correspondence table 26, and the like are stored in the storage unit 20. These various data will be described later with reference to specific examples.

  Of the various functional units described above, first, the interface functional unit 12 is a process having an existing general function that assists the user in facilitating creation work when creating an arbitrary control program (source code 21). It is a functional part. For example, a predetermined input screen is displayed on the display 14, and the user operates the input device 15 to write an arbitrary control program on the input screen.

  The compiler function unit 11 converts the source code 21 created by the user into a machine language object 23 that operates on the target (PLC 30) (performs compilation). The communication function unit 13 transmits (downloads) the generated machine language object 23 to the target (PLC 30) via a communication line (not shown).

  The PLC (programmable controller) 30 includes various function units such as a program execution management function unit 31 and a communication function unit 32 and a storage unit 40. Although not particularly shown, the PLC 30 also has an arithmetic processing processor such as a CPU / MPU.

  An application program (not shown) is stored in the storage unit 40 in advance. The functions (processes) of the various functional units 31 and 32 are realized by the CPU / MPU and the like reading and executing the application program.

  The communication function unit 32 communicates with the development support apparatus 10 (its communication function unit 13), for example, receives the downloaded machine language object 23 and stores it in the storage unit 40 (this is illustrated). Machine language object 41). When the POU instance address information 25 is downloaded, it is stored in the storage unit 40 (this is the POU instance address information 42 shown in the figure).

  The program execution management function unit 31 manages the execution of the machine language object 41 and the like downloaded from the development support apparatus 10 and stored in the storage unit 40 as described above. Details will be described later.

  A part of the storage area of the storage unit 40 (memory) is a POU instance memory area 43. Each variable is assigned in this area 43 (a data storage area related to each variable is assigned). Details of these will also be described later.

Here, the PLC programming includes three POU elements: a program (PG), a function block (FB), and a function (FCT). Usually, each POU contains one or more variables. In order to operate the control program or the like on the PLC 30, when the development support apparatus 10 compiles, each variable of each POU is assigned to the memory (in the area 43) of the PLC 30 (address is assigned), and then the machine The word object 23 needs to be generated. The compiler function unit 11 performs memory allocation of each variable for each POU (for each instance) during the above compilation.

  When allocating each variable to the memory for each POU, the compiler function unit 11 secures a block area (block; variable allocation area) as described above for each instance. This includes the spare area as described above. That is, for each instance of each POU, a variable allocation area including a variable allocation area and a spare area is allocated (for example, see FIG. 2 described later). In this method, an “additional variable storage destination address” area is also secured (this is also included in the variable allocation area (block)).

  For example, when an arbitrary control program is newly created, the above memory allocation is performed at the time of compilation, and when this control program is subsequently modified / updated, if there are additional variables at the time of compilation, the above-mentioned Allocate to the spare area in the variable allocation area.

  However, when there are many additional variables, the spare area may not be sufficient. That is, it may not be possible to allocate all the additional variables in the reserved variable allocation area.

  In this method, the “additional variable storage destination address” area is also secured in the variable allocation area as described above in preparation for such a case. Further, for each instance of each POU, the variable address management table 24 and the POU instance address allocation correspondence table 26 store the start address and size of the variable allocation area, and the memory allocation status of the variable.

  When compiling a modified / updated version of the control program, the same address is assigned to variables already allocated to memory (the above-mentioned existing variables) by referring to the management table 24 and the correspondence table 26. be able to.

  If there is a variable addition that is not sufficient (cannot be handled) in the spare area, a new variable allocation area (block) is secured in a free area of the memory (in the area 43) of the PLC 30, and this variable An additional variable is allocated in the allocation area, and the start address of the added variable allocation area is written in the “additional variable storage destination address”. Thus, the additional variable can be accessed via the “additional variable storage destination address” (see, for example, FIG. 3 described later).

  Here, it is an arbitrary storage area in the POU instance memory area 43 as described above that the compiler function unit 11 performs memory allocation of each variable for each POU (for each instance) during the compilation. . FIG. 2 shows an example of such memory allocation.

As shown in FIG. 2, memory allocation of variables for each POU (for each instance) is performed on the POU instance memory area 43.
The example of FIG. 2 is an example of memory allocation when two function blocks (FB1, FB2) are instantiated with two FB1 and one FB2.

  As already described in the related art, the user can use the function block (FB) a plurality of times. When using multiple times, the compiler function instantiates (assigns function block variables to memory) for each use. Therefore, in the above example, FB1 is used twice and FB2 is used only once.

  Variable memory allocation is performed for each instance. Therefore, in the above example, the instance 2 of FB2 is instantiated for FB2, the instance 1 and instance 3 are instantiated for FB1, and memory allocation of variables is performed for each of these instances as shown in the figure.

  When instantiating a function block, the compiler function unit 11 allocates memory as one block (block; the variable allocation area). That is, for example, as in the example shown in FIG. 2, a memory area is allocated as one block (block) for each instance obtained by instantiating each function block.

  In the example of FIG. 2, three instantiations of instance 1, instance 2, and instance 3 are performed. Instance 1 and instance 3 are instances related to function block FB1, and instance 2 is an instance related to function block FB2.

  The variable allocation area for each instance includes a memory allocation area and a spare area for each variable. In the example of FIG. 2, two spare areas, spare 1 and spare 2, are added. In the illustrated example, the variables related to the function block FB1 are the variables 1 and 2, and the variables related to the function block FB2 are the variables 3, 4 and 5. Thus, as shown in the figure, for instance 1 and instance 3, memory is allocated as shown in the figure as one block (block) including variable 1, variable 2, spare 1 and spare 2. For instance 2, the memory is allocated as shown in the figure as one block (block) including variable 3, variable 4, variable 5, spare 1 and spare 2.

  In contrast to the example shown in FIG. 2, in the case of this method, an “additional variable storage destination address” is further added to the block as shown in FIG. That is, in this method, the memory allocation for each instance in the POU instance memory area 43 in FIG. 1 is as shown in FIG. 3, for example.

  In this method, as shown in FIG. 3A, the memory allocation for each of the variables 1, 2, 3, 4, and 5 is the same as in the example of FIG. On the other hand, regarding the two spare areas, only spare 1 is provided, and an “additional variable storage destination address” is assigned to the spare 2 allocation area as shown in the figure. However, the present invention is not limited to this example, and two additional areas, spare 1 and spare 2, may be used, and an “additional variable storage destination address” may be added.

  Here, when the PLC 30 is in operation, the user makes a program correction (for example, creation of the upgraded source code 21) accompanied by addition of a variable on the development support apparatus 10, and the PLC 30 is not particularly stopped. In order to change the program of the PLC 30, it is necessary not to change the memory allocation position of a variable (existing variable) that has already been allocated to the memory.

  Therefore, in this method, the compiler function unit 11 registers the memory allocation status of each variable in the management table 24 and the correspondence table 26 when the memory allocation for each instance is performed when the source code 21 is compiled. In addition, an area for storing the above “additional variable storage destination address” is secured in addition to the spare area. When compiling a new program (new source code 21), basically, no data is stored in this “additional variable storage destination address” area (the NULL will be described later).

  Then, when this new program is later corrected / updated (version upgrade, etc.), when the corrected / updated version program is compiled, if there are additional variables and only the spare area cannot be handled, for example, FIG. The “additional variable storage area” (additional block) shown in FIG. 6 is newly secured, and the start address of the “additional variable storage area” is stored in the area indicated by the “additional variable storage destination address”. This will be described in detail later with reference to FIG. 9. On the PLC 30 side, “POU instance address information” 42 (downloaded “POU instance address information” 25 generated on the development support apparatus 10 side) is stored. And the head address of the “additional variable storage area” is stored in the area indicated by the “additional variable storage destination address”. Thus, after that, the PLC 30 accesses each additional variable in the “additional variable storage area” via the “additional variable storage destination address”.

  In this method, only the “additional variable storage destination address” area may be secured without securing the spare area. Although not described one by one, the area allocation for each variable is naturally performed in the same manner as in FIG.

The compiler function unit 11 stores information indicating which variable is assigned to which storage area (address) in a table (the management table 24 or the like).
When compiling the modified version (upgraded version, etc.) program, the compiler function unit 11 refers to the table for the existing variables, particularly regarding the memory allocation related to the instance of the POU in which the variables have been added. This prevents the storage area that has already been allocated from being changed (so that the same address as the previous compilation is allocated). On the other hand, for a newly added variable (additional variable), first, the allocation to the spare area is attempted, and if the allocation is possible, the spare area is allocated.

  In the example shown in FIG. 3B, it is assumed that three variables are added to the function block FB1 in the source code 21. These three added variables are referred to as additional variable 1, additional variable 2, and additional variable 3. Therefore, regarding the new function block FB1, there are a total of five variables, namely the variable 1 and the variable 2, which are the existing variables, and the additional variable 1, the additional variable 2, and the additional variable 3.

  Therefore, at the time of the above compilation, regarding the instance 1 and the instance 3 related to the new function block FB1, both of the variables are allocated to the memory.

  Then, as described above (and as shown in FIG. 3B), with respect to the existing variables 1 and 2, the allocation position is the same as that shown in FIG. On the other hand, regarding the additional variable, one of the three additional variables (here, referred to as additional variable 1) can be allocated to the spare area, but the other two additional variables (here, additional variable 2). , 3) cannot be assigned.

  In this way, when a variable that cannot be handled by the spare area is added, a new variable storage area for the instance (additional variable storage area / additional block) is added to the free area in the POU instance memory area 43. ) And the address (head address, etc.) of the additional block is stored in the area indicated by the “additional variable storage destination address”.

  Then, the other two additional variables (here, additional variables 2 and 3) are allocated in the additional block. Thus, for example, the state shown in FIG. Here, as already described, since the memory area is allocated as one block (block) for each instance, not only the additional variables 2 and 3 but also in the new variable storage area (additional block). The spare area (spare 1) and the “additional variable storage destination address” area are also secured.

  In this example, since two FB1s are instantiated, it is necessary to secure a storage area for additional variables (which cannot be handled by a spare area) for each instance. For this reason, as shown in FIG. 3B, an additional variable storage area of instance 1 of FB1 and an additional variable storage area of instance 3 of FB1 are newly secured.

  In this way, in the memory area (called initial block) that is initially allocated as one lump for each instance, even if all the additional variables cannot be allocated, there is an empty area in the POU instance memory area 43. As long as it exists, an additional variable memory area (additional block) can be secured to allocate memory for the additional variable. This does not change the allocation position of variables that already exist, and performs memory allocation of additional variables almost without restriction (of course, if there is no free space in the area 43). It is possible to change the program without removing the restriction of adding variables and stopping the PLC.

  When compiling a program (source code 21) written by a user, the compiler function unit 11 uses a “variable information management table” for information management of variables used by the POU for each POU in the program. 24 is created. In the “variable information management table” 24, information such as a variable name, a type (size), and a relative position indicating an allocation position exists for each variable.

4A to 4C show specific examples of the “variable information management table” 24. FIG.
4A and 4B are specific examples of the “variable information management table” 24 related to the function block FB1. FIG. 4A is a diagram after the new compilation of FIG. 6, and FIG. 8 shows the state after compilation of the revised version. Such data examples will be described later in the description of FIGS. 6 and 8, and only the format of the “variable information management table” 24 will be described here. FIG. 4C is a specific example of a “variable information management table” 24 related to a function block FBCALL described later.

  As shown in FIGS. 4A to 4C, the format of the “variable information management table” 24 is composed of data items of a variable name 51, a type 52, a relative position 53, and a storage block 54. . Although not shown or described in particular, each “variable information management table” 24 includes information indicating which POU is the variable information management table.

  The variable name 51 stores variable names such as the illustrated variable 1 and variable 2 (not limited to names, but may be identification numbers or the like). 4A and 4B, the variable name of each variable used in the function block FB1 is stored in the variable name 51.

  However, the variable name 51 is not limited to the variable name or the like, but also stores a “reserved area”, an “additional variable storage destination address”, and the like as illustrated. These names and sizes are determined in advance, and when the above variable names and the like are stored, the predetermined names and use area sizes are subsequently stored in the variable names 51 and the mold 52. Details will be described later.

  In the type 52, when a variable name or the like is stored in the variable name 51, the variable type of the variable name and the storage capacity (the size of the used area) to be used are stored. For example, the variable 1 is an INT type and the use area size is 1 W (word). The variable 2 is WORD type, and the use area size is 1 W (word). Further, in the type 52, when a variable name 51 other than the variable name is stored, only the used area size is stored. In the illustrated example, the used area size is 2 W (words) for the “reserve area”, and the used area size is 2 W (words) for the “additional variable storage destination address”.

  The relative position 53 stores the relative address of each used area. This means a relative position from the head address 63 described later. That is, for each instance, the real address indicating the allocation position of each variable used in the instance can be known from the head address 63 of the block related to that instance and the relative position 53 of each variable.

  For example, since the relative position 53 of the variable 2 is “1” and FIG. 4A is an example of the function block FB1, if it is the instance 3, the start address 63 is “1018”. Therefore, the real address of the allocation position of variable 2 is “1018” address + 1 = “1019” address. In the case of this example, the real address of the use area of the spare area is “1018” address + 2 = “1020” address. Here, since the spare area type 51 (use area size) is 2 W (words) as described above, the use area of the spare area is from “1020” to “1021”.

  The storage block 54 indicates a block that stores a variable or the like of the variable name 51. That is, as described above, for each instance, one block (initial block) is secured first, and then an additional block is secured in some cases when a modified version program is compiled. Information indicating whether the allocation position of the variable 51 is in the initial block or in the additional block is stored in the storage block 54.

  In the example shown in FIG. 3A, all of the instances 1, 2, and 3 are only initial blocks. On the other hand, in the state shown in FIG. 3B, the instance 2 is only the initial block, but the instances 1 and 3 each have two blocks because an additional block is newly secured. In the case of this example, the storage block 54 indicates which of the two blocks the allocation position of the variable of the variable name 51 is in. In this example, when the storage destination block 54 is “0”, it indicates an initial block, and when the storage destination block 54 is “1”, it indicates an additional block. Note that the present invention is not limited to this example. For example, when the second additional block is secured without only one additional block, for example, when the storage block 54 is “2”, the second additional block is added. It may be a block.

  Although not described in detail, the variable declaration part to be described later includes information such as “FB1 instance” as the variable name and “FB1 (2)” as the type as shown in FIG. May be. This is information related to the FB call. In this example, FBCALL calls FB1, but since it is not particularly relevant here, it will not be described in further detail.

  Further, the compiler function unit 11 creates a “POU instance address assignment correspondence table” 26 based on the “variable information management table” 24 when assigning variables to the memory of the PLC 30 at the time of compilation.

  An example of the correspondence table 26 is shown in FIGS. FIG. 5A shows a state after the processing in FIG. 6, and FIG. 5B shows a state after the processing in FIG. Here, only the format of the “POU instance address allocation correspondence table” 26 will be described, and the contents will be described in the description of FIGS. 6 and 8.

  As shown in FIGS. 5A and 5B, the “POU instance address assignment correspondence table” 26 includes an instance number 61, a POU name 62, a head address 63, an instance size 64, an additional variable storage destination address 65, and an additional variable. Each data item has a storage destination size 66.

  First, as described above, one or more instances are generated for each POU, and an identification number is assigned to the instance for each instance generation. Here, the instance number is serially numbered from “1” every time an instance is generated (incremented by +1). Here, it is assumed that the identification numbers of the instances 1, 2, and 3 are ‘1’, ‘2’, and ‘3’. Therefore, the record of the instance number 61 = “1”, “3” shown in the figure is information regarding the instances 1 and 3, and therefore, the POU name 62 is “FB1” as shown in the figure.

  The start address 63 and the instance size 64 store the start address (real address) and size of the initial block allocated to the instance with the instance number 61. Here, for example, regarding the instance 1 that is the first generated instance, a predetermined default value (= 1000 addresses) is assigned to the head address. For FB1, in the example shown in FIG. 4B, the size of the entire block is 6W (words), so the instance size 64 = '6'. That is, the area of the initial block allocated to the instance 1 is from address 1000 to address 1005.

As a result, for the instance 2 generated next, the head address 63 is addressed 1006 (address 1005 + 1 or address 1000 + 6).
The additional variable storage destination address 65 and the additional variable storage destination size 66 store the start address (real address) and size of the additional variable storage area (additional block). Note that there are as many additional variable storage destination addresses 65 and additional variable storage destination sizes 66 as the number of additional blocks. Here, since there are no additional blocks, “NULL” and “0” are stored in the additional variable storage destination address 65 and the additional variable storage destination size 66 as shown in FIG.

In the example of FIG. 2, a total of three instantiations of instances 1 and 3 for FB1 and instance 2 for FB2 are made.
When the memory allocation of the instance 1 is performed, since the POU is FB1, the size (block size) necessary for instantiation is calculated from the “variable information management table” 24 of the FB1 (in this example, 6 W (word)). Based on this size, the block area of the instance 1 is secured in the memory of the PLC 30 (its POU instance memory area 43).

  Similarly, since the POU of the instance 2 is FB2, the size (block size) required for instantiation is calculated from the “variable information management table” 24 of the FB2, and the block area of the instance 2 is based on this size. Secure.

The above process is repeated for the number of instances.
In the “POU instance address allocation correspondence table” 26, the start address and size of the allocation area (block) of each instance are set. At the stage of FIG. 5A, the initial block start address 63 and size 64 are set, but no additional block yet exists, so the additional variable storage destination address 65 is set to NULL information indicating invalidity. At the same time, “0” is set in the additional variable storage destination size 66.

  When the user creates a modified / updated source code 21 (added version, etc.) with addition of a variable and instructs / operates to execute the compilation, the compiler function unit 11 adds for each POU. If there is a variable, the additional variable is first assigned to the spare area. If it falls within the spare area, the “variable information management table” 24 is updated (additional variable memory allocation information is added) to reduce the spare area size (type 52) and change the relative position 53 of the spare area. If a variable that does not fit in the spare area has been added, the compiler function unit 11 secures an additional block area in the free area and allocates the additional variable in the additional block area. Further, the start address and size of the reserved additional block area are stored in the additional variable storage destination address 65 and the additional variable storage destination size 66.

  As a result, for example, the state shown in FIG. 5A is shifted to the state shown in FIG. In the example of FIG. 5B, since a variable that cannot be handled in the spare area is added for FB1, an additional block is newly secured for each instance 1 and 3 of FB1, and The head address and size are stored as shown (in the example shown, addresses 65 are '1034' and '1044').

The additional block may include not only the variable storage area but also the spare area and the area of the “additional variable storage destination address”, as in the initial block.
Hereinafter, the processing of the compiler function unit 11 described above will be described in more detail with reference to the flowcharts of FIGS.

FIG. 6 shows processing at the time of compiling the newly created source code 21.
FIG. 8 shows a process at the time of compiling a modified version (upgraded version) of source code 21 obtained by modifying / updating a part of existing source code 21 (particularly, modifying / updating with addition of a variable).

First, the process of FIG. 6 will be described.
In FIG. 6, first, for each POU described in the source code 21 to be compiled, a “compile (variable declaration)” process is performed based on the source code. That is, the source code of each POU is roughly divided into a variable declaration part and a body part. In the “compile (variable declaration)” process, the process of steps S12 to S15 is performed with reference to this variable declaration part. Is to do. Although not particularly illustrated, the variable declaration portion declares the name and type of each variable, and further describes the name of the POU (POU name; arbitrarily determined by the program creator).

  In the processing of FIG. 6, it is determined whether or not “compilation (variable declaration)” processing has been completed for all POUs (step S11), and if there is a POU that has not yet undergone “compilation (variable declaration)” processing. (Step S11, NO), one of the unprocessed POUs is processed, and the “compile (variable declaration)” process (the processes of Steps S12 to S15) is executed.

  That is, the variable declaration part of the source code of the processing target POU is read (step S12), and based on this, a "source code identification number correspondence table" 22 and a "variable information management table" 24 are created (steps S13 to S15). .

  That is, first, based on the variable declaration part of the POU source code read in step S12, the POU name and identification number are registered in the “source code identification number correspondence table” 22 (step S13). Then, the identification number is updated (step S14).

Here, FIG. 7 shows a specific example of the “source code identification number correspondence table” 22.
The “source code identification number correspondence table” 22 in the illustrated example includes data items of a POU name 71 and an identification number 72. The POU name 71 stores a POU name and the like (identification information of the POU) obtained from the variable declaration part of the source code of the processing target POU. In the identification number 72, an identification number arbitrarily assigned to the POU of the POU name 71 is stored. Here, it is assumed that the initial value of the identification number is “1”, and updating is performed by incrementing by +1 in the process of step S14, so that the identification number 72 becomes 1, 2, 3, 4, etc. as shown in FIG. ing.

  Following the process of step S14, a “variable information management table” 24 relating to the processing target POU is created (step S15). That is, first, a template of the “variable information management table” 24 set in advance (FIG. 4A shows a created state, but no data is stored yet in the template), To this, the POU name / identification number of the processing target POU is given, and information (variable name, type, etc. as described above) regarding each variable described in the variable declaration part of the source code of the processing target POU is provided. And register it in the acquired template.

  For example, in the example shown in FIG. 4A, the processing target POU is FB1, the variable name of the variable first described in the variable declaration part of the source code is variable 1, and the type is INT type. The size is assumed to be 1 W (word). Therefore, as shown in the figure, variable 1 and INT (1) are registered in variable name 51 and type 52, respectively. In addition, the relative position 53 of the first registered variable is always “0”.

In the process of FIG. 6, since it is assigned to the initial block, the storage block 54 becomes “0” in all records as shown in FIG.
Here, it is assumed that the variable name of the second variable described in the variable declaration part is variable 2, its type is WORD type, and its size is 1W (word). Thus, as shown in the figure, for variable 2, variable 2 and WORD (1) are registered in variable name 51 and type 52, respectively. For the relative position 53, a value obtained by adding the relative position 53 to the pattern 52 (its size) in the previous record is registered. Here, since the type 52 of the previous record is INT (1) and the relative position 53 is “0”, 1 + 0 = 1 is registered in the relative position 53 of the record of the variable 2 as illustrated. Become.

  When registration of all variables is completed, a predetermined name (“reserve area” and “additional variable storage destination address”) is registered in the variable name 51 and a predetermined size (preliminary size) corresponding to each is registered. Is registered in the mold 52. In the example shown in the figure, size = '2' in both cases. Then, the relative position 53 is calculated and registered in the same manner as in the case of the variable 2 described above. This means that WORD (1) + 1 = 2 is registered for the “reserved area” and 2 + 2 = 4 is registered for the “additional variable storage destination address”.

  In the above processing, the value obtained by adding the relative position 53 to the type 52 (its size) in the last record (record of “additional variable storage destination address”) is further related to the target POU (here, FB1). The total size of the block may be calculated and registered in the instance size 64 when a “POU instance address allocation correspondence table” 26 described later is created. In the above example, since the type 52 (its size) in the record of “additional variable storage destination address” is “2” and the relative position 53 is “4”, the total size of this block = 2 + 4 = 6 is obtained. As a result, in the example of FIG. 5A, the instance size 64 relating to FB1 is “6”.

  If the above compilation (variable declaration) process has been executed for all POUs described in the source code 21 to be compiled (step S11, YES), then the instantiation process in steps S17 to S20 for all the POUs Execute. This is because the source code 21 (for example, PG) is sequentially referred to from the top, and every time there is a description of a POU (FB or FCT) call (in addition, every time a call is made to another POU in the called POU). A) Instantiate the called POU.

  For example, in the above example, for example, when there is a description of FB1, FB2, and FB1 calls in PG, instance 1 and instance 3 are obtained in two instantiations for FB1 as in the above example, and for FB2, Instance 2 is obtained by one instantiation.

When instantiation processing is executed for all POUs described in the source code 21 (YES in step S16), the processing proceeds to step S21 and subsequent steps.
Hereinafter, the process (instantiating process) of steps S17 to S20 will be described. This instantiation process secures the memory area of the block for each instance of each POU and registers the head address (real address) and size of this block area in the “POU instance address allocation correspondence table” 26. It is processing to do.

  First, the “variable information management table” 24 related to the processing target POU is read (step S17). Then, the size (of the block) of the entire memory area to be secured for the processing target POU is calculated (step S18). This calculation method has already been described. When the target POU is FB1 as described above, the overall size (block size) = '6' is calculated.

  Subsequently, an empty address is searched with reference to the “POU instance address assignment correspondence table” 26 (step S19). This is to obtain the head address of the block to be secured, for example.

  For example, in the case of the second instantiation related to FB1, four records are registered in the example of FIG. 5B, but only the first two records are “POU instance address allocation correspondence table” 26 here. It will be in the state registered in. That is, the first record whose instance number 61 is “1” and the second record whose instance number 61 is “2” are registered.

  In this state, when the second instantiation process for the FB1 is performed, the POU name is naturally “FB1”, the instance number = “3” is assigned, and the overall size for the FB1 is “6” as described above. Since it is calculated, if the start address of the block area of the instance 3 is known, new registration to the “POU instance address allocation correspondence table” 26 can be performed. This head address is obtained by adding the instance size 64 to the head address 63 in the last record (here, the second record) at the present time. Since the start address 63 of the second record is “1006” and the instance size 64 is “12”, 1006 + 12 = 1018 is calculated.

  The obtained information is stored in the instance number 61, the POU name 62, the head address 63, and the instance size 64 in the third record as shown. Furthermore, as already described, “NULL” is stored in the additional variable storage destination address 65, and “0” is stored in the additional variable storage destination size 66. When a new record is registered in the “POU instance address assignment correspondence table” 26 in this way (step S20), the process returns to step S16 to determine whether or not all instantiations have been performed. If (step S16, YES), the process proceeds to step S21.

  When the instantiation process is completed, finally, a “compile (code)” process is performed for each POU in the source code 21 to be compiled. The “compilation (variable declaration)” process already described is a process based on the variable declaration part. The “compile (code)” process is a process for converting the body part into a machine language.

  Although not specifically illustrated, the text portion describes arbitrary processing using various variables declared in the variable declaration portion, and it is necessary to assign an address when converting this into machine language.

  In step S21, it is determined whether or not “compile (code)” processing has been executed for all POU instances. If all POU instances have been executed (YES in step S21), the processing is terminated. On the other hand, if there is an unprocessed POU instance (step S21, NO), one of them is set as a processing target, and basically the source code (text part) of this processing target POU is read (step S22). This source code is converted into machine language (step S26). However, before the processing of step S26, after reading the “POU instance address assignment correspondence table” 26 (step S24) and reading the “variable information management table” 24 regarding the processing target POU (step S25), With reference to these, “variable address resolution” processing is performed (step S23), and machine language objects for one POU are generated (step S26).

  That is, first, the “POU instance address allocation correspondence table” 26 is searched using the POU name of the processing target POU, and each time a corresponding record is found, the start address 63 of the record, the additional variable storage destination address 65, etc. Further, referring to the “variable information management table” 24, “variable address resolution” processing is performed. The corresponding record is a record whose POU name 62 is the same as the POU name of the processing target POU.

  Basically, the address resolution of each variable is realized by the start address 63 of the corresponding record, the type 52 and the relative position 53 for each variable, but regarding the variable stored in the additional variable storage area, Furthermore, processing using the additional variable storage destination address 65 or the like is required. Details will be described later.

The above-described “address resolution of variables” and the conversion process to machine language will be described later using specific examples.
Next, the process of FIG. 8 will be described.

Although omitted in FIG. 8, if the determination in step S31 shown in the figure is YES, the processing in steps S21 to S26 in FIG. 6 is further executed.
In the case of the processing of FIG. 8, as already described, the compilation target is the source code 21 of the modified version / updated version (version-up version or the like). For example, one of the processes shown in FIGS. 6 and 8 is executed by a human being judging and specifying. That is, although not shown in particular, there are two types of operation buttons for the user to instruct compilation processing: new and modified versions. When the user operates the new version, the processing of FIG. 8 is executed.

  Alternatively, the development support apparatus (loader) 10 may automatically determine which process in FIGS. 6 and 8 is to be executed even if the user does not specify otherwise. For example, the processing of FIG. 8 may be executed when online, and the processing of FIG. 6 may be executed when offline. The online case is when the development support apparatus (loader) 10 is connected to the PLC 30 and communication between the two is established in order to maintain the PLC.

  When the modified version of the source code 21 is compiled, this processing (steps S32 to S39) is executed for each POU, and when this processing has been executed for all the POUs (step S31, YES), this processing is executed. Is terminated (the process proceeds to steps S21 to S26).

  If there is an unprocessed POU, one of them is set as a processing target, the source code of the processing target POU is read (step S32), and the “variable information management table” 24 related to the processing target POU is further read (step S33). Based on these, it is determined whether there is an additional variable (step S34). That is, all the variable names described in the variable declaration part of the source code read in step S32 are acquired, and all these variable names are registered in the variable name 51 of the “variable information management table” 24. Check whether or not. If there is no unregistered variable, it is determined that there is no additional variable (NO in step S34), and the process returns to step S31.

On the other hand, if there is an unregistered variable, the unregistered variable is an additional variable, and the determination in step S34 is YES, and the process proceeds to step S35.
In step S35, it is determined whether or not all additional variables can be allocated to the spare area. First, the “type” of each additional variable is extracted from the source code. The “type” is INT, WORD, or the like, and the size (occupied area) of the variable is determined by the “type”. In the above example, both INT and WORD have a size (occupied area) of 1 W (word). Since the size of each additional variable is known from the “type”, the total size of the additional variables can be found by calculating the sum of these. On the other hand, in the “variable information management table” 24 read in step S33, the size of the spare area can be obtained by acquiring the type 52 in the record whose variable name 51 is “spare area”. In the example of FIG. 4A, the size of the spare area is “2”.

If the size of the additional variable as a whole is equal to or smaller than the size of the spare area, the determination in step S35 is YES, and the process of step S36 is executed.
In step S36, the memory of the additional variable is allocated, and the “variable information management table” 24 is updated accordingly.

  For example, in the example of FIG. 4A, for example, if there is only one additional variable (assuming the variable name is “additional variable 1”) and the type is INT, Since the size (occupied area) of the entire additional variable is 1W (word) and the size of the spare area is “2”, the determination in step S35 is YES.

  In this example, although not shown in particular, “additional variable 1” is registered in the record (empty record) next to the record of “variable 2” shown in FIG. That is, although not shown in particular, in this record, the variable name 51 is “additional variable 1”, the type 52 is INT (1), the relative position 53 is “2”, and the storage block 54 is “0”. The method for obtaining the relative position 53 is as described above.

  Accordingly, the reserved area must be reduced, so the record type 52 and the relative position 53 of the “reserved area” shown in FIG. 4A are updated. Although the type 52 is “2”, it is updated to “1” by subtracting 1 W (word) which is the size of the additional variable. The relative position 53 is “3”. The method for obtaining the relative position 53 is as described above.

  On the other hand, for example, if there are two additional variables (assuming “additional variable 1” and “additional variable 2”) and each size (occupied area) is 2W (word), the total is 4W (word). Therefore, it cannot be handled in the spare area, and the determination in step S35 is NO. Here, when the “type” is DINT, 2 W (words) is required.

  When step S35 is NO, the additional variable storage area (additional block) is secured, and the address information and additional variable allocation information of the additional block area are stored in the various tables 24 and 26 (management table 24, corresponding Table 26) is registered.

  First, information for expansion is added to the “variable information management table” 24 (step S37) and an additional variable is registered (step S38). Thereby, for example, the “variable information management table” 24 in the example shown in FIG. 4A becomes the state shown in FIG. As shown in the figure, the expansion information (record) indicates allocation information in the additional variable storage area (additional block) by setting all storage destination blocks 54 to “1”. In the case of an additional block, as in the allocation information related to the initial block (shown in FIG. 4 (a)), not only variables but also a spare area and an additional variable storage destination address area are secured and relative as shown. The position 53 and the mold 52 (size) are registered.

  Then, an additional variable is allocated. This first tries to allocate the initial block to the spare area, and if possible, allocates the initial block to the spare area. In this example, both of the additional variables 1 and 2 cannot be assigned to the spare area of the initial block, but only the additional variable 1 can be assigned. Therefore, as shown in FIG. Allocate to spare area. As a result, there is no spare area in the initial block. Note that the process of assigning the additional variable 1 to the initial block may be substantially the same as step S36. However, in this example, the reserve area type 52 of the initial block is changed to ‘0’. In this case, the record of the reserve area of the initial block is deleted.

  On the other hand, in this example, since the additional variable 2 cannot be assigned to the initial block, it is assigned to the additional block. Therefore, as shown in the figure, the storage block 54 of the record related to the additional variable 2 is “1”. Except for this point, the process of assigning the additional variable 2 in the additional block is substantially the same as the process of assigning the variables 1 and 2 to the initial block, and will not be described in detail here. DINT (2) is registered in the mold 52, and '0' is registered in the relative position 53.

  The size of the spare area and additional variable storage destination address is arbitrarily determined and set in advance. Here, the size of the spare area is “2” for the initial block, but for the additional block, It is assumed that “8” is set. Regarding the additional variable storage destination address, both the initial block and the additional block have a size = “2”.

  When the “variable information management table” 24 has been updated, the “POU instance address assignment correspondence table” 26 is updated (step S39). That is, in FIG. 5A, the top address and size of the area of the additional block are registered in the additional variable storage destination address 65 and the additional variable storage destination size 66 which are set to “0” in NULL. As a result, for example, the state shown in FIG.

  Note that the additional variable storage destination size 66 can be obtained based on the “variable information management table” 24, similarly to the instance size 64. Further, the additional variable storage destination address 65 is the area information of the last block among the areas already secured, that is, the head address 63 = 1024 and the instance size 64 = 10 of the block whose POU name is “PG1” in the illustrated example. Based on the above, 1024 + 10 = 1034 is obtained.

Note that after the processing in step S36 or S39, the process returns to step S31.
When the process in FIG. 8 is completed, the processes in steps S21 to S26 in FIG. 6 are executed. Naturally, in this case, the process is executed with reference to the tables 24 and 26 in the states shown in FIGS. 4B and 5B, for example.

The processing in FIG. 8 has been described above.
Here, as described above, the processing of steps S23 to S26 will be described below with a specific example. In other words, an example of compiler machine language code generation will be described below.

First, in any of the following examples, the source code used in this description is assumed to be a simple example as follows.
Source code example; variable 2: = variable 1;
That is, it is a simple process of substituting the value of variable 1 into variable 2.

First, it is assumed that the source code example is described in the program PG1.
In this case, the head address (1024) of PG1 is obtained by referring to the “POU instance address assignment correspondence table” 26 (FIG. 5B) first. Further, by referring to the “variable information management table” 24, the offset addresses (relative positions) of the variables 1 and 2 can be obtained. Although a specific example of the “variable information management table” 24 related to PG1 is not shown in FIG. 4 and the like, it is assumed that the relative position 53 of the variable 1 is “0” and the relative position 53 of the variable 2 is “2”. In this case, a value obtained by adding the offset value of each of these variables to the top address (1024) of PG1 becomes the actual address of each variable. That is, 1024 + 0 = 1024 is the storage address (real address) of variable 1. Similarly, 1024 + 2 = 1026 is the storage address (real address) of variable 2.

From the above, in the case of PG1, a machine language example corresponding to the above source code example is as follows.
LD B 1024
ST B 1026
As is well known, the LD instruction is an instruction for reading the contents of a specified address into an arithmetic memory. The ST instruction is an instruction for writing the contents of the operation memory to a specified address. Furthermore, 'B' between the LD instruction and the specified address (1024 here) is an option for specifying the region size, and 'B' means 1 byte. Similarly, W means 2 bytes and T means 4 bytes. Therefore, the above-mentioned “LD B 1024” means “read the contents of an area of 1 byte from address 1024 into the arithmetic memory”. The same applies to the ST instruction. For example, “LD W 1024” means “reads stored data in an area corresponding to 2 bytes from address 1024 (that is, addresses 1024 to 1025) into the arithmetic memory”.

  In the case of a program (PG), since only one POU is instantiated, there is no problem even if a machine language is generated with a direct address (real address) as a code for accessing a variable. A problem occurs because multiple POUs are instantiated.

For example, in the case of FB1 in the above example, machine language examples corresponding to the above source code examples are as follows from the examples shown in FIGS.
LD B 1000
ST B 1001
If only one instance of FB1 is instantiated, this is not a problem. However, as described above, when multiple instances are created, all instances access the same address (1000 addresses for LD, 1001 addresses for ST). ), The independence of the variables in the FB cannot be maintained (the internal variable in the FB is stipulated as being independent).

  Therefore, when the POU to be compiled is FB (here, FB1), the compiler function unit 11 generates a machine language for accessing a variable via a base pointer (Base) as follows, for example.

LD B Base + 0
ST B Base + 1
Here, at the time of execution of each FB, the start address of the instance is entered in the above Base pointer (in the example of FIGS. 4 and 5, Base = 1000 in the case of instance 1, and in the case of instance 2) Base = 1018 is substituted), which is set by the POU that calls the FB. In the following, a case where the POU that calls FB1 is PG will be described with reference to a specific machine language code generation example.

  An example of calling FB1 (here, instance 1 of FB1) from the PG is shown below. In this case, the compiler function unit 11 refers to the various tables 22 and 26 and the like at the time of compiling, and generates machine language code for calling the FB1 from the PG and setting the Base pointer at that time.

  That is, basically, when calling an arbitrary FB (its instance), its identification number (POU identification number) and instance address (head address) are required. Thus, first, the identification number 72 (here, “1”) of the FB to be called (here, FB1) is acquired with reference to the source code identification number correspondence table 22 shown in FIG. The instance address is acquired from the “POU instance address assignment correspondence table” 26. In the example of FIG. 5, the start address 63 of the instance 1 of FB1 is “1000”.

As a result, the machine language code related to calling FB1 (instance 1) in the PG is generated as follows.
LD T1000
ST Base
CALL 1
Note that “LD 1000” is for reading data at address 1000 into the calculation memory, but “LD T1000” is for reading the numerical value after T (1000 here) into the calculation memory. Therefore, the above machine language is a process of calling FB1 after obtaining “1000” and substituting it into Base.

In this case, the machine language processing of the called FB 1 is substantially equivalent to the following contents.
LD B 1000 + 0
ST B 1000 + 1
The CALL instruction is an instruction for calling a POU designated by an identification number (here, “1”).

Even when the same FB1 is used, in the case of instance 3, the following machine language is generated.
LD T1018
ST Base
CALL 1
In this case, the processing of the machine language of the called FB 1 is substantially equivalent to the following content.

LD B 1018 + 0
ST B 1018 + 1
In the case of PG, a direct address (real address) can be described on the code like “LD 1000”.

Also when the caller is FB, it may be substantially the same as described above, so the description here is omitted.
Next, an example of machine language code generation related to access to an additional variable will be described below.

For example, a description will be given using an example of compiling the following source code to generate a machine language code.
Source code example;
Additional variable 2: = variable 2;
That is, it is a process of substituting the contents of variable 2 for additional variable 2.

  Although not specifically described, the POU of the FB caller also sets the Base value in this example. In addition, FB of this example shall be said FB1. And the variable information management table 24 concerning FB1 shall be in the state shown in FIG.4 (b).

  In this case, referring to the “variable information management table” 24 of FB1 shown in FIG. 4B, first, the variable 2 is stored in the initial block because the storage block 54 is “0”. Since the offset (relative position 53) is “1”, it is determined that the address corresponding to the variable 2 is “Base + 1”. Accordingly, in the above source code example, first, the stored data at the address corresponding to the variable 2 is read out, so that the machine language code “LD Base + 1” is generated.

Subsequently, regarding the additional variable 2, since the storage destination block 54 is “1” in the example of the “variable information management table” 24 of FB1 shown in FIG. 4B, the “additional variable storage destination address 1” is passed. At the same time, it is determined to be accessed, and the offset (relative position 53) = “0” is acquired and temporarily stored. Then, by referring to the record in which the variable name 51 is “additional variable storage destination address 1” in the “variable information management table” 24, the offset (relative position 53) is “4”, so the corresponding address Is determined to be “Base + 4”. Based on the above processing, the following machine language code is generated (in the following example, B and W are omitted).

LD Base + 1
LDAX Base + 4
ADDAX 0
ST AX
In the machine language code, the LDAX instruction is an instruction for setting stored data at a specified address in the AX register (internal variable for address calculation). In the case of the above example, the stored data at the address “Base + 4” is set in the AX register.

  In the case of instance 1 of FB1, since Base = 1000 is supposed to be set, the stored data at address “1004” is set in the AX register. Note that the head address (“1034” in this example) of the additional block related to the instance 1 is stored in advance at the address “1004”. This will be described later with reference to FIG.

  In the case of instance 3 of FB1, since Base = 1018 is supposed to be set, the stored data at address “1022” is set in the AX register. Note that the head address (“1044” in this example) of the additional block related to the instance 3 is stored in advance at the address “1022”. This will also be described later with reference to FIG.

  The ADDAX instruction is an instruction for adding a designated number to the stored contents of the AX register. In the machine language, the storage address of the additional variable 2 is calculated. In the case of instance 1, a value obtained by adding “0” to the stored data (“1034”) at the address “1004” becomes new stored data in the AX register. In the case of instance 3, a value obtained by adding “0” to the stored data (“1044”) at the address “1022” becomes new stored data in the AX register.

  The “ST AX” is an instruction for storing the data loaded by the LD instruction in the first row (data of variable 2) at the address indicated by the storage data of the AX register. Therefore, in this example, the variable 2 data is stored in the address “1034” in the case of the instance 1, and the variable 2 data is stored in the address “1044” in the case of the instance 3.

  Here, in the addresses “1004” and “1022”, the PLC 30 sets the corresponding data based on the POU instance address information 25 downloaded together with the machine language object 23 from the development support apparatus 10 in advance.

FIG. 9 shows an example of the POU instance address information 25 corresponding to the examples of FIGS. 4B and 5B.
The POU instance address information 25 in the example of FIG. 9 includes an address 81 and a value 82.

The address 81 stores the address of “additional variable storage destination address”, and the value 82 stores the top address of the additional variable storage area.
In the “variable information management table” 24 of FB1 shown in FIG. 4B, the offset (relative position 53) of the “additional variable storage destination address” is “4”. In the example of the “POU instance address allocation correspondence table” 26 in FIG. 5B, the start address 63 of the instance 1 by FB1 is “1000”, and the additional variable storage destination address 65 is “1034”. The start address 63 of the instance 3 is “1018”, and the additional variable storage destination address 65 is “1044”. As a result, as shown in FIG. 9, the address 81 is “1004” (= 1000 + 4), the value 82 is “1034”, and the address 81 is “1022” (= 1018 + 4). The value 82 is '1044'.

  The POU instance address information 25 generation process described above is performed, for example, by the compiler function unit 11 when compiling. Thereafter, the POU instance address information 25 is downloaded to the PLC 30 together with the machine language object 23 obtained as a compilation result. Thus, on the PLC 30 side (for example, the program execution management function unit 31), the setting process based on the POU instance address information 25 is performed before the operation using the new machine language object 23 is started.

  In the example shown in FIG. 9, data “1034” is stored at address “1004”, and data “1044” is stored at address “1022”. In this example, “LDAX Base + 4” stores the stored data of address “1004” in the case of instance 1, that is, “1034”, in the AX register, and in the case of instance 3, the address “1022”. The stored data of “1044” is stored in the AX register.

Note that the “POU instance address assignment correspondence table” 26 may be downloaded to the PLC 30 instead of the POU instance address information 25 so that the setting process is performed on the PLC 30 side. However, the “POU instance address assignment correspondence table” 26 is
Since the amount of data is large, it is difficult to handle in the PLC, and the “POU instance address information” 25 stores information obtained by extracting the corresponding address and its contents (the start address of the additional variable storage area). The PLC 30 acquires this information 25 and expands the value in the memory in the PLC 30 at the location specified by the corresponding address.

The above example of setting the Base pointer is implemented by a compiler (code generation), but a similar operation can also be performed by a system in PLC (within Call).
As described above, according to the programmable controller support device of the present example, even if the user updates the program that accompanies variable addition, the address (allocation position) of the already allocated variable (existing variable) is changed. Without adding, it is possible to assign the added variable to a new address, and the program can be updated without stopping the PLC (stopping the PLC will stop the system). , Maintainability and expandability are improved. In particular, even if it is not possible to allocate all additional variables with only already secured blocks, additional variables can be generated and stored with additional variables, so it is limited by the size of the first secured block (the size of the spare area) You can add variables without receiving.

10 Development support device (loader)
11 Compiler Function Unit 12 Interface Function Unit 13 Communication Function Unit 14 Display 15 Input Device 20 Storage Unit 21 Source Code 22 Source Code Identification Number Correspondence Table 23 Machine Language Object 24 Variable Information Management Table 25 POU Instance Address Information 26 POU Instance Address Assignment Correspondence Table 30 PLC (Programmable Controller)
31 Program execution management function unit 32 Communication function unit 40 Storage unit 41 Machine language object 42 POU instance address information 43 POU instance memory area 51 Variable name 52 Type 53 Relative position 54 Storage block 61 Instance number 62 POU name 63 First address 64 Instance Size 65 Additional variable storage destination address 66 Additional variable storage destination size 71 POU name 72 Identification number 81 Address 82 Value

Claims (8)

A programmable controller system comprising a support device that compiles source code of an arbitrary program for a programmable controller and generates a machine language object, and a programmable controller,
When the support device changes the program while the programmable controller is operating,
When compiling the source code, the POU included in the source code includes variable information storage means for holding area information indicating relative storage addresses, spare areas, and additional variable storage destination storage areas related to the POU. When,
An instance information storage means for storing at least a head address as information on a block which is a block of memory area reserved for the instance in the POU instance when compiling the source code;
Compile means for converting the source code of the arbitrary program into the machine language object while allocating memory to the instance with reference to the variable information storage means and the instance information storage means;
When compiling the source code of a modified / updated program that is a modified / updated version of the program, the POU included in the source code is checked for the presence of additional variables by referring to the variable information storage means and added. If there is a variable, it is determined whether or not it can be handled in the spare area. If it can be dealt with, an additional variable is assigned to the spare area. If it cannot be dealt with, an additional block is secured in the instance of the POU. And an additional variable corresponding means for generating and storing information for storing the head address of the additional block in the additional variable storage destination storage area of the existing block;
A programmable controller system comprising:   The compiling means converts the modified / updated program into the machine language object regardless of the presence of the additional variable, regardless of the existence of the additional variable, the existing compiling means based on the area information in the variable information storage means at the time of the previous compilation. The programmable controller system according to claim 1, wherein the same address is assigned.   The compiling means generates a machine language object that accesses the additional variable via the additional variable storage destination storage area with respect to conversion of the modification / update program into the machine language object. The programmable controller system described. The support device displays correspondence information between the address of the additional variable storage destination storage area and the start address of the additional block stored in the additional variable storage destination storage area together with the machine language object of the correction / update program. Download to the programmable controller,
The programmable controller stores the start address of the additional block in the additional variable storage destination storage area based on the correspondence information before starting execution of the machine language object of the correction / update program. The programmable controller system according to claim 3.   For the PG which is a kind of the POU, the compiling unit obtains a real address of a variable allocation position from a head address of the block and a relative address of the variable, and uses the real address to determine the machine language object. The programmable controller system according to claim 1, wherein the programmable controller system is generated.   For the function block which is a kind of the POU, the compiling means generates a machine language object for accessing a variable allocation position based on a base pointer and a relative address of the variable, and also calls a POU that calls an instance of the function block. 2. The programmable controller according to claim 1, wherein a machine language object for calling an instance of the function block is generated after setting a head address of the block corresponding to the instance of the function block to the base pointer. system.   2. The programmable controller system according to claim 1, wherein the variable information storage means also stores information indicating whether the variable is assigned to the existing block or the additional block. . A support device for generating a machine language object by compiling a source code of an arbitrary program for a programmable controller,
When changing the program while the programmable controller is running,
When compiling the source code, the POU included in the source code includes variable information storage means for holding area information indicating relative storage addresses, spare areas, and additional variable storage destination storage areas related to the POU. When,
An instance information storage means for storing at least a head address as information on a block which is a block of memory area reserved for the instance in the POU instance when compiling the source code;
Compile means for converting the source code of the arbitrary program into the machine language object while allocating memory to the instance with reference to the variable information storage means and the instance information storage means;
When compiling the source code of a modified / updated program that is a modified / updated version of the program, the POU included in the source code is checked for the presence of additional variables by referring to the variable information storage means and added. If there is a variable, it is determined whether or not it can be handled in the spare area. If it can be dealt with, an additional variable is assigned to the spare area. If it cannot be dealt with, an additional block is secured in the instance of the POU. And an additional variable corresponding means for generating and storing information for storing the head address of the additional block in the additional variable storage destination storage area of the existing block;
A support device for a programmable controller, comprising: