JP5749758B2 - Crystal laminated structure, manufacturing method thereof, and semiconductor device - Google Patents

Description

  The present invention relates to a crystal multilayer structure, a manufacturing method thereof, and a semiconductor element.

Conventionally, a method for manufacturing a light-emitting element in which a nitride semiconductor crystal is grown on a Ga ₂ O ₃ substrate via a buffer layer is known (see, for example, Patent Document 1).

  According to the method for manufacturing a light emitting device of Patent Document 1, a nitride semiconductor crystal is grown in two stages. After first growing nitrogen gas as a carrier gas at a temperature of 700 ° C. to 1035 ° C. Subsequently, growth is performed at a temperature of 1050 ° C. or higher using hydrogen gas as a carrier gas.

JP 2012-142512 A

One of the objects of the present invention is to provide a crystal multilayer structure in which a nitride semiconductor layer is hardly peeled off from a Ga ₂ O ₃ substrate, a manufacturing method thereof, and a semiconductor device including the crystal multilayer structure.

  In order to achieve the above object, one embodiment of the present invention provides a method for producing a crystal laminated structure according to the following [1] to [5].

[1] First having a composition represented by Al _x Ga _y In _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) on a Ga ₂ O ₃ substrate. And forming a buffer layer partially covering the upper surface of the Ga ₂ O ₃ substrate, and Al _x Ga _y In _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) on the buffer layer. Forming a nitride semiconductor layer made of a second crystal having a composition represented by 0 ≦ z ≦ 1, x + y + z = 1), and the step of forming the nitride semiconductor layer includes a growth pressure. A first growth step of growing the second crystal under growth conditions of 100 mbar or less and a growth temperature of 1020 ° C. or less, or a growth pressure of greater than 100 mbar and 400 mbar or less and a growth temperature of 900 ° C. or less; Temperature of 1050 ° C or higher after the growth process In comprising a second growth step of growing the second crystal, manufacturing method of a crystalline layered structure.

[2] The method for manufacturing a crystal stacked structure according to [1], wherein H ₂ gas is used as a carrier gas in the first growth step.

[3] The main surface of the Ga ₂ O ₃ substrate is (−201) plane, −0.5 to 1.5 ° in the [−10-2] direction from the (−201) plane, and − in the [010] direction. A plane tilted from 1.0 to 1.0 °, a (101) plane, or a (101) plane from 0.5 to 2.5 ° in the [10-1] direction, and from −1.0 to 1 in the [010] direction The method for producing a crystal laminated structure according to [1] or [2], which is a plane inclined by 0 °.

[4] The method for producing a crystal multilayer structure according to any one of [1] to [3], wherein the composition of the first crystal is AlN.

[5] The method for producing a crystal multilayer structure according to any one of [1] to [4], wherein the composition of the second crystal is a GaN crystal.

According to the present invention, it is possible to provide the nitride semiconductor layer is Ga ₂ O ₃ peeled hard crystalline layered structure and a method of manufacturing the same from the substrate, and a semiconductor device including the crystalline layered structure.

FIG. 1 is a vertical cross-sectional view of the crystal multilayer structure according to the first embodiment. FIGS. 2A to 2C are vertical sectional views showing manufacturing steps of the crystal multilayer structure according to the first embodiment. FIG. 3 is a vertical cross-sectional view of the LED element according to the second embodiment. 4A, 4B, and 4C are observation images of nitride semiconductor layers on the substrates A, B, and C, respectively. FIGS. 5A and 5B are an SEM observation image and a TEM observation image of a cross section of the crystal laminated structure including voids at the interface between the Ga ₂ O ₃ substrate and the nitride semiconductor layer, respectively.

When growing a nitride semiconductor crystal on a Ga ₂ O ₃ substrate through a buffer layer made of a nitride semiconductor, it is important to suppress etching of the surface of the Ga ₂ O ₃ substrate by a carrier gas or a crystal source gas. It is. If the surface of the Ga ₂ O ₃ substrate is etched with a carrier gas or a crystal source gas, voids may be generated at the interface between the Ga ₂ O ₃ substrate and the nitride semiconductor crystal. For example, NH ₃ gas used as a _{H 2} or N of the material used as the carrier gas, _Ga 2 _{O 3} has high reactivity to the substrate, it is easy to etch the _Ga 2 _{O 3} substrate.

When voids are generated at the interface between the Ga ₂ O ₃ substrate and the nitride semiconductor crystal, the nitride semiconductor layer may be cracked due to stress or the like generated during growth, or may be peeled off from the Ga ₂ O ₃ substrate. In addition, when ultrasonic cleaning or dicing is performed on a crystal stacked structure including a Ga ₂ O ₃ substrate on which a nitride semiconductor crystal is formed, the nitride semiconductor crystal may be separated from the Ga ₂ O ₃ substrate. For this reason, the yield in the case of manufacturing a device such as a light emitting element or a transistor using this crystal laminated structure is remarkably lowered.

Therefore, as one method for suppressing the generation of voids at the interface between the Ga ₂ O ₃ substrate and the nitride semiconductor crystal, a carrier other than the gas having high reactivity with respect to the Ga ₂ O ₃ substrate such as H ₂ gas is used as a carrier. There is a method of suppressing etching of a Ga ₂ O ₃ substrate of a nitride semiconductor crystal by using a carrier gas as a gas.

As another method for suppressing the generation of voids at the interface between the Ga ₂ O ₃ substrate and the nitride semiconductor crystal, the buffer layer is formed thick so as to cover the entire upper surface of the Ga ₂ O ₃ substrate, and Ga ₂ There is a method in which the O ₃ substrate and the nitride semiconductor crystal are not in direct contact with each other, and an interface between the Ga ₂ O ₃ substrate and the nitride semiconductor crystal is not formed.

However, when a gas having low reactivity with respect to the Ga ₂ O ₃ substrate, for example, N ₂ gas is used as the carrier gas, there is a problem that the crystal quality of the nitride semiconductor crystal is lowered and the electric resistance is increased. Further, when the buffer layer is formed thick, the electrical resistance in the vertical direction of the crystal multilayer structure is increased, and the crystal quality of the nitride semiconductor crystal is decreased.

Therefore, in order to avoid such a problem, the inventors of the present invention, as a result of intensive research, have controlled the growth conditions of the nitride semiconductor crystal, so that the Ga ₂ O ₃ substrate by the carrier gas can be used without using the above method. It has been found that a high-quality crystal multilayer structure can be obtained. One example thereof will be described below as an embodiment.

[First Embodiment]
(Structure of crystal laminated structure)
FIG. 1 is a vertical cross-sectional view of a crystal laminated structure 10 according to the first embodiment. The crystal stacked structure 10 includes a Ga ₂ O ₃ substrate 11, a buffer layer 12 on the Ga ₂ O ₃ substrate 11, and a nitride semiconductor layer 13 on the buffer layer 12.

The Ga ₂ O ₃ substrate 11 is made of a β-Ga ₂ O ₃ single crystal. The upper surface of the Ga ₂ O ₃ substrate 11 is a surface having a plane orientation such as (−201) or (101) that can serve as a base for the growth of a high-quality nitride semiconductor crystal. Further, the upper surface of the Ga ₂ O ₃ substrate 11 is −0.5 to 1.5 ° in the [−10-2] direction and −1.0 to 1.0 ° in the [010] direction from the (−201) plane. It may be an inclined surface, and is a surface inclined by 0.5 to 2.5 ° in the [10-1] direction and −1.0 to 1.0 ° in the [010] direction from the (101) surface. Also good.

The buffer layer 12 is a nitride semiconductor crystal, that is, a crystal having a composition represented by Al _x Ga _y In _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1). It consists of a certain first crystal. The typical composition of this first crystal is AlN (x = 1, y = z = 0). The buffer layer 12 partially covers the upper surface of the Ga ₂ O ₃ substrate 11.

The nitride semiconductor layer 13 has a composition represented by a nitride semiconductor crystal, that is, Al _x Ga _y In _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1). It consists of a second crystal that is a crystal. The typical composition of this second crystal is GaN (y = 1, x = z = 0).

  The nitride semiconductor layer 13 includes a first layer 13a and a second layer 13b on the first layer 13a. The first layer 13a is formed by growing the second crystal under growth conditions where the growth pressure is 100 mbar or less and the growth temperature is 1020 ° C. or less, or the growth pressure is greater than 100 mbar and 400 mbar or less and the growth temperature is 900 ° C. or less. Is the layer to be played. The second layer 13b is a layer formed by growing the second crystal at a temperature of 1050 ° C. or higher.

The nitride semiconductor layer 13 contacts a portion of the upper surface of the Ga ₂ O ₃ substrate 11 that is not covered with the buffer layer 12.

The interface between the Ga ₂ O ₃ substrate 11 and the nitride semiconductor layer 13, the growth time and the second crystal, _Ga 2 _{O 3} substrate of the nitride semiconductor layer 13 during ultrasonic cleaning and dicing of crystal laminated structure 10 Voids that are large enough to cause peeling from 11 are not included. Specifically, the size in the direction perpendicular to the upper surface of the Ga ₂ O ₃ substrate 11 of voids included in the interface between the Ga ₂ O ₃ substrate 11 and the nitride semiconductor layer 13 is 100 nm or less.

The Ga ₂ O ₃ substrate 11 and the nitride semiconductor layer 13 (second crystal) may contain a conductivity type impurity such as Si.

(Method for producing crystal laminated structure)
Below, an example of the manufacturing process of the crystal laminated structure of this Embodiment is demonstrated.

  FIGS. 2A to 2C are vertical sectional views showing manufacturing steps of the crystal multilayer structure 10 according to the first embodiment.

First, organic cleaning, SPM (Sulfuric acid / hydrogen peroxide mixture) cleaning, and cleaning with an HF solution are performed on the Ga ₂ O ₃ substrate 11 that has been subjected to CMP (Chemical Mechanical Polishing).

Next, the Ga ₂ O ₃ substrate 11 is transferred into a chamber of a MOCVD (Metal Organic Chemical Vapor Deposition) apparatus.

Next, as shown in FIG. 2A, a film-like buffer layer 12 is formed on the Ga ₂ O ₃ substrate 11. The film-like buffer layer 12 supplies the first crystal source gas and N ₂ gas as a carrier gas into the chamber while maintaining the temperature in the chamber at 400 to 600 ° C. It is formed by growing a crystal on the Ga ₂ O ₃ substrate 11.

Examples of the source gas for the first crystal include trimethylaluminum (TMA) gas as an Al source material, trimethylgallium (TMG) gas as a Ga source material, trimethylindium (TMI) gas as an In source material, and N NH ₃ gas is used as a raw material.

At this stage, the buffer layer 12 is a film having a substantially uniform thickness and covers the entire upper surface of the Ga ₂ O ₃ substrate 11.

  Next, as shown in FIG. 2B, a second crystal is grown on the buffer layer 12 to form a first layer 13 a of the nitride semiconductor layer 13. This step is the first growth step of the second crystal.

In the first growth step, the pressure and temperature in the chamber are maintained in such a condition that the pressure is 100 mbar or less and the temperature is 1020 ° C. or less, or the pressure is greater than 100 mbar and 400 mbar or less and the temperature is 900 ° C. or less. Then, the source gas of the second crystal and H ₂ gas as the carrier gas are supplied into the chamber to grow the second crystal on the buffer layer 12.

Examples of the source gas for the second crystal include trimethylaluminum (TMA) gas as an Al source material, trimethylgallium (TMG) gas as a Ga source material, trimethylindium (TMI) gas as an In source material, and N NH ₃ gas is used as a raw material.

Here, by increasing the pressure and temperature in the chamber in order to grow the second crystal, a plurality of first crystal nuclei are generated in an island shape from the film-like buffer layer 12. As a result, the buffer layer 12 changes to a layer composed of a plurality of island-shaped crystal nuclei, and partially covers the upper surface of the Ga ₂ O ₃ substrate 11.

Therefore, the second crystal grows not only from the surface of the buffer layer 12 but also from a region not covered by the buffer layer 12 on the upper surface of the Ga ₂ O ₃ substrate 11. Thereby, the crystal quality of the nitride semiconductor layer 13 can be improved.

  If the film-like buffer layer 12 is too thick, island-like crystal nuclei are not generated. Therefore, the film-like buffer layer 12 shown in FIG. 2A may be formed to a thickness of about 1 to 5 nm. preferable.

By growing the second crystal under growth conditions where the growth pressure is 100 mbar or less and the growth temperature is 1020 ° C. or less, or the growth pressure is greater than 100 mbar and 400 mbar or less and the growth temperature is 900 ° C. or less, the Ga ₂ O ₃ substrate 11 and The nitride semiconductor layer 13 can be formed at the interface with the nitride semiconductor layer 13 without generating a void whose size in the direction perpendicular to the upper surface of the Ga ₂ O ₃ substrate 11 is greater than 100 nm.

This is because the growth pressure and growth temperature of the second crystal satisfy the above conditions, and the exposed portion of the Ga ₂ O ₃ substrate 11 that is not covered with the buffer layer 12 is etched by NH ₃ gas or the like. On the other hand, it is conceivable that the speed at which the second crystal covers the exposed portion is increased, and that the pressure and temperature satisfy the conditions under which the etching of the Ga ₂ O ₃ substrate 11 does not proceed easily.

  Next, as shown in FIG. 2C, a second crystal is grown on the first layer 13a to form a second layer 13b. This step is referred to as a second growth step of the second crystal.

In the second growth step, with the temperature in the chamber maintained at 1050 ° C. or higher, the source gas of the second crystal and H ₂ gas as the carrier gas are supplied into the chamber to grow the second crystal. Continue.

  Here, when the growth temperature of the second crystal in the second growth step is set to a temperature lower than 1050 ° C., the growth temperature of the second crystal is too low, so that the upper surface of the second layer 13b is flat. The property becomes worse and cloudiness occurs.

  Needless to say, when the nitride semiconductor layer 13 is to be formed only by the first growth step of the second crystal (when the nitride semiconductor layer 13 is configured only by the first layer 13a), the process ends. Since the second crystal is grown at a temperature of 1020 ° C. or lower, the flatness of the upper surface of the nitride semiconductor layer 13 is deteriorated and white turbidity occurs.

As described above, peeling of the nitride semiconductor layer 13 from the Ga ₂ O ₃ substrate 11 can be prevented by the first growth step, and the upper surface of the nitride semiconductor layer 13 is flattened by the second growth step, thereby causing cloudiness. Can be blocked.

[Second Embodiment]
(Structure of semiconductor element)
The second embodiment is a form of a semiconductor element including the crystal laminated structure 10 of the first embodiment. Hereinafter, an LED element will be described as an example of the semiconductor element.

FIG. 3 is a vertical cross-sectional view of the LED element 20 according to the second embodiment. The LED element 20 includes a Ga ₂ O ₃ substrate 21, a buffer layer 22 on the Ga ₂ O ₃ substrate 21, an n-type cladding layer 23 on the buffer layer 22, a light emitting layer 24 on the n-type cladding layer 23, The p-type cladding layer 25 on the light emitting layer 24, the contact layer 26 on the p-type cladding layer 25, the p-side electrode 27 on the contact layer 26, and the surface of the Ga ₂ O ₃ substrate 21 opposite to the buffer layer 22 And the upper n-side electrode 28.

  In addition, the side surface of the multilayer structure including the buffer layer 22, the n-type cladding layer 23, the light emitting layer 24, the p-type cladding layer 25, and the contact layer 26 is covered with an insulating film 29.

Here, the Ga ₂ O ₃ substrate 21, the buffer layer 22, and the n-type cladding layer 23 are formed of the Ga ₂ O ₃ substrate 11, the buffer layer 12, and the nitridation that constitute the crystal multilayer structure 10 of the first embodiment. Each corresponds to the physical semiconductor layer 13. The thicknesses of the buffer layer 22 and the n-type cladding layer 23 are, for example, 5 nm and 4 μm, respectively.

  The light emitting layer 24 is composed of, for example, a three-layer multiple quantum well structure and a GaN crystal film having a thickness of 10 nm thereon. Each multiple quantum well structure includes a GaN crystal film having a thickness of 8 nm and an InGaN crystal film having a thickness of 2 nm.

The p-type cladding layer 25 is, for example, a GaN crystal film having a thickness of 150 nm and containing Mg having a concentration of 5.0 × 10 ¹⁹ / cm ³ .

The contact layer 26 is, for example, a GaN crystal film having a thickness of 10 nm and containing Mg having a concentration of 1.5 × 10 ²⁰ / cm ³ .

The insulating film 29 is made of an insulating material such as SiO ₂ .

The p-side electrode 27 and the n-side electrode 28 are electrodes that are in ohmic contact with the contact layer 26 and the Ga ₂ O ₃ substrate 21, respectively.

The LED element 20 is, for example, an LED chip that extracts light from the Ga ₂ O ₃ substrate 21 side, and is mounted on a can-type stem using Ag paste.

(Effect of embodiment)
According to the above embodiment, the nitride semiconductor layer 13 is separated from the Ga ₂ O ₃ substrate 11 by controlling the growth pressure and growth temperature of the second crystal in the first growth step. This void can be prevented from occurring at the interface between the Ga ₂ O ₃ substrate 11 and the nitride semiconductor layer 13. Further, even if H ₂ gas is used as the carrier gas in the first growth step, voids having such a size as to cause separation of the nitride semiconductor layer 13 from the Ga ₂ O ₃ substrate 11 are formed with the Ga ₂ O ₃ substrate 11. Since it can be prevented from occurring at the interface with the nitride semiconductor layer 13, the nitride semiconductor layer 13 with higher crystal quality can be formed.

When manufacturing a light emitting element such as the LED element 20 or a device such as a transistor using the crystal laminated structure 10 including the Ga ₂ O ₃ substrate 11 and the nitride semiconductor layer 13, the nitride semiconductor layer Peeling from the Ga ₂ O ₃ substrate can be prevented and the yield can be improved.

The influence of the growth conditions of the second crystal in the first growth step on the size of voids included in the interface between the Ga ₂ O ₃ substrate 11 and the nitride semiconductor layer 13 was evaluated.

First, using a MOCVD apparatus, a growth temperature of 490 ° C. is formed on _three Ga ₂ O ₃ substrates 11 whose main surface is a surface inclined by 0.7 ° in the [−10-2] direction from the (−201) plane. A first crystal, which is an AlN crystal, is grown to form a film-like buffer layer 12 having a thickness of 5 nm. Subsequently, on the _three Ga ₂ O ₃ substrates 11 in an H ₂ / NH ₃ mixed atmosphere. Then, a second crystal, which is a GaN crystal to which Si was added, was grown at a growth rate of 2000 nm / h to form a first layer 13a having a thickness of 1000 nm (first growth step).

Further, the second crystal is grown on the first layer 13a of the _three Ga ₂ O ₃ substrates 11 at a growth temperature of 1100 ° C., a growth pressure of 250 mbar, and a growth rate of 2000 nm / h. A second layer 13b was formed (second growth step). Then, the state of the nitride semiconductor layer 13 on each Ga ₂ O ₃ substrate 11 was observed from above with an optical microscope.

Here, the growth conditions of the second crystal in the first growth step are different for the _three Ga ₂ O ₃ substrates 11. On the first Ga ₂ O ₃ substrate 11 (referred to as substrate A), a second crystal was grown at a growth pressure of 400 mbar and a growth temperature of 1020 ° C. in the first growth step. On the second Ga ₂ O ₃ substrate 11 (referred to as substrate B), a second crystal was grown at a growth pressure of 400 mbar and a growth temperature of 860 ° C. in the first growth step. On the third Ga ₂ O ₃ substrate 11 (referred to as substrate C), a second crystal was grown at a growth pressure of 100 mbar and a growth temperature of 1020 ° C. in the first growth step.

  The growth conditions of the second crystal in the first growth step of the substrates B and C are the growth conditions according to the first embodiment, the growth pressure is 100 mbar or less and the growth temperature is 1020 ° C. or less, or the growth pressure is 100 mbar. It satisfies a large value of 400 mbar or less and a growth temperature of 900 ° C. or less. On the other hand, the growth condition of the second crystal in the first growth step of the substrate A does not satisfy the growth condition according to the first embodiment.

  4A, 4B, and 4C are observation images of the nitride semiconductor layer 13 on the substrates A, B, and C, respectively. A void present at the interface between the substrate A and the nitride semiconductor layer 13 is observed at a position indicated by an arrow in FIG. On the other hand, as shown in FIGS. 4B and 4C, no conspicuous voids are observed on the substrates B and C. This indicates that there are no voids of a size that can be easily observed with an optical microscope at the interface between the substrate B and the nitride semiconductor layer 13 and at the interface between the substrate C and the nitride semiconductor layer 13. Yes.

FIGS. 5A and 5B are SEM (Scanning Electron Microscope) observation images of the cross section of the crystal multilayer structure 10 including voids at the interface between the Ga ₂ O ₃ substrate 11 and the nitride semiconductor layer 13, respectively, and TEM. (Transmission Electron Microscope) Observation image.

Voids are observed in a portion surrounded by a circle in FIG. 5A and a portion indicated by an arrow arranged on the lower side of FIG. The long arrow on the upper side of FIG. 5B represents a direction perpendicular to the upper surface of the Ga ₂ O ₃ substrate 11. When a void having a size in this direction larger than 100 nm is present in the Ga ₂ O ₃ substrate 11 and the nitride semiconductor layer 13, the nitride semiconductor layer 13 is easily peeled off from the Ga ₂ O ₃ substrate 11.

The following Table 1 shows the growth pressure and growth temperature of the second crystal in the first growth step, the half width of the X-ray rocking curve of the nitride semiconductor layer 13, and the Ga ₂ O ₃ substrate 11 and the nitride semiconductor layer 13. 5 is a table showing the presence or absence of voids having a size in the direction perpendicular to the upper surface of the Ga ₂ O ₃ substrate 11 at the interface of 100 nm.

  “Half width” in Table 1 represents a measured value of the half width of the X-ray rocking curve of the (002) plane and the (101) plane of the second crystal of the nitride semiconductor layer 13. Since the (002) plane and the (101) plane are orthogonal, the crystal quality of the nitride semiconductor layer 13 can be evaluated three-dimensionally by measuring the half width of the X-ray rocking curve of these planes.

“Void” in Table 1 indicates the presence or absence of a void having a size in the direction perpendicular to the top surface of the Ga ₂ O ₃ substrate 11 at the interface between the Ga ₂ O ₃ substrate 11 and the nitride semiconductor layer 13 greater than 100 nm. “O” means no, “x” means yes.

  Table 1 shows that a larger void is less likely to occur as the growth pressure in the first growth process is lower, and a larger void is less likely to occur as the growth temperature is lower. Note that it is not preferable that the growth temperature in the first growth step exceeds 1020 ° C. because the possibility of cracks occurring in the second crystal increases.

Then, from the results shown in Table 1, the growth pressure is 100 mbar or less of the growth temperature of 1020 ° C. or less when, if and when the growth pressure of from greater 400mbar than 100 mbar 900 ° C. or less growth temperature, _Ga 2 _{O 3} substrate 11 It can be seen that voids having a size in the direction perpendicular to the upper surface of the Ga ₂ O ₃ substrate 11 of more than 100 nm do not occur at the interface between the silicon nitride layer 13 and the nitride semiconductor layer 13.

  The numerical value of “half width” in Table 1 indicates that the higher the growth pressure in the first growth step, the higher the crystal quality of the nitride semiconductor layer 13 and the higher the growth temperature, the higher the crystal of the nitride semiconductor layer 13. It shows that the quality is high.

In this example, the evaluation results are shown in the case where an AlN crystal and a GaN crystal are used for the first crystal and the second crystal, respectively, but the first crystal is a nitride semiconductor crystal other than the AlN crystal. In some cases, even when the second crystal is a nitride semiconductor crystal other than the GaN crystal, similar results can be obtained. Further, even when the surface orientation of the main surface of the Ga ₂ O ₃ substrate 11 is different from the above surface orientation, at least from the (−201) plane and the (−201) plane to the [−10-2] direction − 0.5 to 1.5 °, a plane inclined by −1.0 to 1.0 ° in the [010] direction, (101) plane, or 0.5 to 2 in the [10-1] direction from the (101) plane A similar result can be obtained if the surface is inclined by -1.0 to 1.0 ° in the [010] direction at 0.5 °.

A plurality of LED elements 20 according to the second embodiment were manufactured, whether or not the n-type cladding layer 23 was peeled off from the Ga ₂ O ₃ substrate 21 was determined, and the yield was obtained. As a comparative example, an LED element was manufactured by a manufacturing method in which the growth temperature of the second crystal in the first growth step was different from that of the example, and the yield was obtained.

First, using a MOCVD apparatus, on a Ga ₂ O ₃ substrate 21 doped with Sn having a thickness of 400 μm and having a main surface inclined by 0.7 ° in the [−10-2] direction from the (−201) plane. Then, a first crystal which is an AlN crystal was grown at a growth temperature of 490 ° C. to form a film-like buffer layer 22 having a thickness of 5 nm.

Next, Si having a concentration of 4 × 10 ¹⁸ / cm ³ was added onto the Ga ₂ O ₃ substrate 21 in a H ₂ / NH ₃ mixed atmosphere at a growth pressure of 400 μm, a growth temperature of 860 ° C., and a growth rate of 2000 nm / h. A second crystal, which is a GaN crystal, was grown to form a first layer having a thickness of 2000 nm (first growth step).

  Subsequently, the second crystal was grown on the first layer at a growth temperature of 1100 ° C., a growth pressure of 250 mbar, and a growth rate of 2000 nm / h to form a second layer having a thickness of 2000 nm (the second layer). Growth process). By forming the first layer and the second layer, an n-type cladding layer 23 was obtained.

  Next, a three-layer multiple quantum well structure in which each layer is composed of a GaN crystal film having a thickness of 8 nm and an InGaN crystal film having a thickness of 2 nm, and a GaN crystal film having a thickness of 10 nm thereon are formed at a growth temperature of 750 ° C. As a result, a light emitting layer 24 was obtained.

Next, a GaN crystal containing Mg having a concentration of 5.0 × 10 ¹⁹ / cm ³ at a growth temperature of 1000 ° C. was grown on the light emitting layer 24 to form a p-type cladding layer 25 having a thickness of 150 nm.

Next, a GaN crystal containing Mg having a concentration of 1.5 × 10 ²⁰ / cm ³ at a growth temperature of 1000 ° C. was grown on the p-type cladding layer 25 to form a contact layer 26 having a thickness of 10 nm.

Here, in the formation of the buffer layer 22, the n-type cladding layer 23, the light emitting layer 24, the p-type cladding layer 25, and the contact layer 26, TMG (trimethylgallium) gas as the Ga material and TMI (trimethylindium) as the In material. Gas, (C ₂ H ₅ ) ₂ SiH ₂ (diethylsilane) gas was used as the Si source, Cp ₂ Mg (biscyclopentadienylmagnesium) gas was used as the Mg source, and NH ₃ (ammonia) gas was used as the N source.

  Next, the contact layer 26, the p-type cladding layer 25, the light emitting layer 24, the n-type cladding layer 23, and the buffer layer 22 were etched from above using an ICP-RIE apparatus, and processed into a mesa shape.

Next, an insulating film 29 made of SiO ₂ was formed by sputtering on the side surfaces of the contact layer 26, the p-type cladding layer 25, the light emitting layer 24, the n-type cladding layer 23, and the buffer layer 22 processed into a mesa shape.

Next, the p-side electrode 27 and the n-side electrode 28 were formed to be in ohmic contact with the contact layer 26 and the Ga ₂ O ₃ substrate 21, respectively, using a vapor deposition apparatus.

Next, the Ga ₂ O ₃ substrate 21 was separated into a plurality of 300 μm square chips by dicing to obtain LED elements 20 according to a plurality of examples. Then, the obtained LED element 20 was mounted on a can-type stem using Ag paste.

  Then, the LED element which concerns on a comparative example was manufactured according to the same process, and it mounted in the can type | system | group stem. In the LED element manufacturing process according to the comparative example, the growth temperature of the second crystal in the first growth process is 1000 ° C., and only this point is different from the manufacturing process of the LED element 20 according to the example.

  The growth pressure and the growth temperature of the second crystal in the first growth step of the LED element 20 according to the example are 400 μm and 860 ° C., respectively, and the growth condition and the growth pressure according to the first embodiment are 100 mbar or less. The growth temperature is 1020 ° C. or lower, or the growth pressure is higher than 100 mbar and 400 mbar or lower and the growth temperature is 900 ° C. or lower. On the other hand, the growth pressure and the growth temperature of the second crystal in the first growth step of the LED element according to the comparative example are 400 μm and 1000 ° C., respectively, and do not satisfy the growth conditions according to the first embodiment.

In the LED element 20 according to the example, the n-type cladding layer 23 was not peeled off from the Ga ₂ O ₃ substrate 21, and the yield was 99.8%. On the other hand, in the LED element according to the comparative example, the n-type cladding layer 23 was peeled off from the Ga ₂ O ₃ substrate 21 in the dicing step, and the yield was 60.4%.

In this example, the evaluation results are shown in the case where an AlN crystal and a GaN crystal are used for the first crystal and the second crystal, respectively, but the first crystal is a nitride semiconductor crystal other than the AlN crystal. In some cases, even when the second crystal is a nitride semiconductor crystal other than the GaN crystal, similar results can be obtained. Further, even when the surface orientation of the main surface of the Ga ₂ O ₃ substrate 11 is different from the above surface orientation, at least from the (−201) plane and the (−201) plane to the [−10-2] direction − 0.5 to 1.5 °, a plane inclined by −1.0 to 1.0 ° in the [010] direction, (101) plane, or 0.5 to 2 in the [10-1] direction from the (101) plane A similar result can be obtained if the surface is inclined by -1.0 to 1.0 ° in the [010] direction at 0.5 °.

  Although the embodiments and examples of the present invention have been described above, the present invention is not limited to the above-described embodiments and examples, and various modifications can be made without departing from the spirit of the invention.

  The embodiments and examples described above do not limit the invention according to the claims. It should be noted that not all combinations of features described in the embodiments and examples are necessarily essential to the means for solving the problems of the invention.

10 ... crystal multilayer structure, 11 ... _Ga 2 _{O 3} substrate, 12 ... buffer layer, 13 ... nitride semiconductor layer, 13a ... first layer, 13b ... second layer, 20 ... LED element, 21 ... Ga ₂ O ₃ substrate, 22 ... buffer layer, 23 ... n-type cladding layer

Claims (5)

From a first crystal having a composition represented by Al _x Ga _y In _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) on a Ga ₂ O ₃ substrate. Forming a buffer layer partially covering the upper surface of the Ga ₂ O ₃ substrate;
A nitride composed of a second crystal having a composition represented by Al _x Ga _y In _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) on the buffer layer. Forming a semiconductor layer;
Including
The step of forming the nitride semiconductor layer includes the step of forming the second crystal under a growth condition of a growth pressure of 100 mbar or less and a growth temperature of 1020 ° C. or less, or a growth pressure of greater than 100 mbar and 400 mbar or less and a growth temperature of 900 ° C. or less. A method for manufacturing a crystal stacked structure, comprising: a first growth step for growth; and a second growth step for growing the second crystal at a temperature of 1050 ° C. or higher after the first growth step. In the first growth step, H ₂ gas is used as a carrier gas.
The manufacturing method of the crystal | crystallization laminated structure of Claim 1. The main surface of the Ga ₂ O ₃ substrate is (−201) plane, −0.5 to 1.5 ° in the [−10-2] direction from the (−201) plane, and −1.0 in the [010] direction. -1.0 [deg.] In the [10-1] direction from the (101) plane or the (101) plane inclined at -1.0 [deg.], And -1.0-1.0 [deg.] In the [010] direction A slanted surface,
The manufacturing method of the crystal laminated structure of Claim 1 or 2. The composition of the first crystal is AlN.
The manufacturing method of the crystal laminated structure of any one of Claims 1-3. The composition of the second crystal is a GaN crystal.
The manufacturing method of the crystal laminated structure of any one of Claims 1-4.