JP5731141B2 - Analog signal input device - Google Patents

Description

  The present invention relates to an analog signal input device, and more particularly, to an analog signal input device in which an arithmetic processing unit takes in an external analog signal as a digital signal via an analog processing unit and an A / D conversion unit. .

Conventionally, as this type of analog signal input device, for example, there has been a device as described in Patent Document 1.
This analog signal input device is a device that converts an analog signal into a digital signal by an A / D conversion means and takes it into an arithmetic processing means (microcomputer), and switches the input of the A / D conversion means to a reference voltage source by a multiplexer. A / D for comparing the digital signal obtained by converting the voltage of the reference voltage source with the A / D converter and the initial value stored in advance, and detecting the deterioration of the conversion accuracy of the A / D converter Conversion monitoring means is provided.

Japanese Patent Laid-Open No. 5-244000

  By the way, when the analog signal is input to the A / D conversion means via the analog processing means such as a filter circuit, if the analog processing means is broken, even if the A / D conversion means is not broken, The arithmetic processing means captures a digital signal that does not match the actual analog signal. For this reason, when the analog processing means fails, there is a problem that the arithmetic processing means may generate an erroneous control output based on a control calculation result that does not correspond to an actual analog signal.

In the conventional apparatus, since the reference voltage source to be input to the A / D conversion means is a direct current, when an AC coupling circuit (DC removal circuit) is provided as the analog processing means, the A / D conversion means is connected to the A / D conversion means. There is a problem in that an AC signal to be used as a reference for D conversion cannot be provided, and deterioration detection of conversion accuracy of the A / D conversion means becomes impossible.
Furthermore, in the conventional apparatus, the reference voltage input to the A / D conversion means is limited to one voltage value in the reference voltage source, so that the expected conversion accuracy can be maintained in the voltage range near the reference voltage. For example, there is a problem that even if the conversion accuracy deteriorates in a voltage range away from the reference voltage, such deterioration cannot be detected.

  SUMMARY OF THE INVENTION The present invention has been made paying attention to the above-mentioned problems, and has an object to make it possible to diagnose a failure of an analog signal input device including an analog processing means and an A / D conversion means with high accuracy and versatility. To do.

For this reason, the invention according to claim 1 is an analog signal input device that takes in an analog signal into an arithmetic processing means via an analog processing circuit and an A / D converter, and outputs the analog signal from the outside and the arithmetic processing means. A selection output means for inputting a diagnostic analog signal obtained by converting a digital signal by a D / A converter and selecting a signal to be output to the analog processing circuit in accordance with a control signal of the arithmetic processing means; Means for fault diagnosis based on the output of the A / D converter when all channels of the selection output means are turned off, and the A / D conversion when the analog signal for diagnosis is input to the analog processing circuit The fault diagnosis based on the output of the instrument was performed .

In such a configuration, the arithmetic processing means outputs a digital signal to the D / A converter, outputs a diagnostic analog signal from the D / A converter, and inputs the diagnostic analog signal to the analog processing circuit. Depending on whether the A / D converter outputs a digital signal corresponding to the digital signal output to the D / A converter, the failure of the circuit including the analog processing circuit, the A / D converter and the D / A converter Can be diagnosed. Further, the arithmetic processing means diagnoses the occurrence of a failure in the selection output means and the A / D conversion means by performing failure diagnosis based on the output of the A / D converter when all channels of the selection output means are turned off. it can.

Further, in the invention according to claim 2, the arithmetic processing means is configured to perform the diagnosis when the output of the A / D converter is within a first predetermined range when all channels of the selection output means are turned off. A failure diagnosis is performed by inputting an analog signal to the analog processing circuit.

In the invention according to claim 3, the arithmetic processing means is configured such that when the analog signal for diagnosis is input to the analog processing circuit, the output of the A / D converter is within a second predetermined range. Then, an analog signal from the outside is input to the analog processing circuit from the selection output means, and a control operation according to the analog signal from the outside is performed.

According to a fourth aspect of the present invention, the arithmetic processing means determines normality when the output of the A / D converter is within a predetermined range including zero when all channels of the selection output means are turned off. I do.

In the invention according to claim 5, the arithmetic processing means turns off all channels of the selection output means when the diagnosis analog signal that is not zero is being input to the selection output means.

According to such an analog signal input device, it is possible to diagnose a failure of a circuit including the selection output means and the analog processing circuit with high accuracy.

The block diagram which shows 1st Embodiment of the analog signal input device which concerns on this invention The flowchart which shows the failure diagnosis process in the said 1st Embodiment. The flowchart which shows another example of the failure diagnosis process in the said 1st Embodiment. The block diagram which shows 2nd Embodiment of the analog signal input device which concerns on this invention The flowchart which shows the failure diagnosis process in the said 2nd Embodiment.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing a first embodiment of an analog signal input device according to the present invention. This analog signal input device is used, for example, in a digital electronic relay that operates by inputting an analog control condition signal. . However, the application of the analog signal input device is not limited to the digital electronic relay.
An analog signal input device 1 shown in FIG. 1 includes a multiplexer (selection output means) 2, an analog input circuit (analog processing means) 3, an A / D converter (A / D conversion means) 4, and a D / A converter (D / A conversion means) 5 and a microcomputer (arithmetic processing means) 6 including a CPU, RAM, ROM and the like.

The A / D converter 4, the D / A converter 5, and the microcomputer (hereinafter referred to as a microcomputer) 6 constitute a micro controller unit (MCU) 7 that is a one-chip microcomputer.
The multiplexer 2 inputs an analog signal A1 that is a control condition signal from the outside and an analog signal A2 that is the output of the D / A converter 5, and the analog signal A1 according to the selection control signal S from the microcomputer 6 And analog signal A2 are output.

The analog input circuit 3 is an analog circuit such as a filter circuit composed of a capacitor and a resistor, inputs the analog signal A output from the multiplexer 2, processes it, and outputs it as an analog signal Af. The analog input circuit 3 may be an AC coupling circuit (DC removal circuit) such as a differentiation circuit, or may be a circuit that passes a DC component.
The A / D converter 4 receives the analog signal Af output from the analog input circuit 3, and converts the analog signal Af into a digital signal D1.

The microcomputer 6 receives the digital signal D1 output from the A / D converter 4 and performs arithmetic processing on the digital signal D1, thereby controlling the output of the external device, that is, the signal for controlling the operation / dropping of the relay. Is output. In this embodiment, the system including the analog signal input device is guided to the safe side by dropping the relay.
The D / A converter 5 receives the digital signal D2 output from the microcomputer 6 and converts it into an analog signal A2, and outputs the analog signal A2 to the multiplexer 2. The analog signal A2 is output for failure diagnosis of the analog signal input circuit 1, and the microcomputer 6 outputs the digital signal D1 output from the A / D converter 4 when the analog signal A2 is input to the analog input circuit 3. Based on this, the presence / absence of a failure in the analog signal input device 1 is self-diagnosed.

The flowchart of FIG. 2 shows the details of the failure diagnosis process by the microcomputer 6.
In the flowchart of FIG. 2, first, in step S <b> 101, it is determined whether it is a failure diagnosis execution timing. The execution timing of the failure diagnosis can be, for example, at the time of starting the system including the analog signal input device 1 or every fixed time after the start, or can be the time when a diagnosis instruction signal from the outside is received. it can.

If it is determined in step S101 that it is the execution timing of the failure diagnosis, the process proceeds to step S102, and the digital signal D2 as a reference signal for diagnosis is output to the D / A converter 5. The digital signal D2 is arbitrary data stored in advance for failure diagnosis in a memory provided in the microcomputer 6.
In the next step S103, the selection control signal S for instructing the multiplexer 2 to output the analog signal A2 output from the D / A converter 5 is output.

As a result, the digital signal D2 is converted into the analog signal A2 by the D / A converter 5, the analog signal A2 is output from the multiplexer 2 to the analog input circuit 3, and the analog signal Af that has passed through the analog input circuit 3 is further converted. The A / D converter 4 converts the digital signal D1.
In step S104, the digital signal D1 output from the A / D converter 4 is captured in a state where the analog signal A2 is input to the analog input circuit 3.

In step S105, it is determined whether or not the digital signal D1 captured in step S104 is a signal within an allowable error range (normal range) corresponding to the digital signal D2 output to the D / A converter 5.
For example, when the analog input circuit 3 is a circuit that allows a DC signal to pass, the digital signal D2 is set to a constant voltage value, and the DC signal is output as the analog signal A2. In this case, a voltage value after analog processing in the analog input circuit 3 is obtained in advance as a reference voltage value Vth, and a voltage value within a normal range (allowable range) including the reference voltage value Vth is captured as a digital signal D1. It is determined whether or not it has been done.

When the analog input circuit 3 is an AC coupling circuit that does not pass a DC signal, the digital signal D2 is a signal whose voltage value changes at a constant period, and AC is output as the analog signal A2. In this case, the frequency, amplitude, average voltage and the like of the AC signal after analog processing in the analog input circuit 3 are obtained in advance as reference characteristic values, and the characteristic values within the normal range (allowable range) including the reference characteristic values are obtained. It is determined whether or not an AC signal is captured as a digital signal D1.
As described above, the microcomputer 6 outputs the known digital signal D2, converts this digital signal D2 into the analog signal A2 by the D / A converter 5, and this analog signal A2 is converted into an analog input circuit via the multiplexer 2. 3, the digital signal D 1 output from the A / D converter 4 becomes a scheduled signal corresponding to the digital signal D 2 output to the D / A converter 5.

Therefore, when the digital signal D1 is not a signal corresponding to the digital signal D2 (when the characteristic is shifted beyond an allowable level), the multiplexer 2, the analog input circuit 3, the A / D converter 4, and the D / A conversion. It can be estimated that at least one of the devices 5 and / or a line connector connecting these devices has failed (deteriorated).
In particular, if a failure occurs in a circuit including the multiplexer 2, the analog input circuit 3, and the A / D converter 4 that processes the analog signal A1 from the outside, the microcomputer 6 accurately sets the level (voltage) of the analog signal A1. Therefore, it is impossible to make a determination, and an erroneous control output is generated.

Therefore, if the digital signal D1 is a signal within the allowable error range (normal range) corresponding to the digital signal D2 output to the D / A converter 5, the process proceeds to step S106, where the multiplexer 2, the analog input circuit 3 , A / D converter 4 and D / A converter 5 are determined to be normal.
If it is normal, the process further proceeds to step S107, the selection control signal S for instructing the multiplexer 2 to output the analog signal A1 from the outside is output, and the analog signal A1 from the outside is output to the analog input circuit. 3. Capture through the A / D converter 4.

In step S108, the digital signal D1 output from the A / D converter 4 is captured. In step S109, the digital signal D1 captured in step S108 is processed to determine the operation / dropping of the relay. Generate the corresponding control output.
That is, in step S109, the control output (control signal) is calculated according to the analog signal A1 as the control condition signal taken from outside, and the control output as the calculation result is output to the outside, whereby the external device (relay). To control.

On the other hand, if the digital signal D1 is not within the allowable error range (normal range) corresponding to the digital signal D2 output to the D / A converter 5, the process proceeds to step S110, where the multiplexer 2, the analog input circuit 3, It is determined that a failure has occurred in the circuit including the A / D converter 4 and the D / A converter 5.
And when it is at the time of failure occurrence, it progresses further to Step S111, controls the control output to the safe side and holds it (holds the control output to drop the relay), and responds to the analog signal A1 from the outside Fail processing is executed to stop output control.
The fail processing can include processing such as outputting an alarm operation signal for operating a warning means such as a lamp or an alarm, and storing a failure diagnosis history.

According to the above configuration, the occurrence of a failure can be detected not only when the conversion accuracy of the A / D converter 4 is deteriorated but also when a failure occurs in the analog input circuit 3, and the A / D converter 4 or The output control (relay control) is performed based on the external analog signal A1 in a state in which the microcomputer 6 cannot correctly determine the voltage level of the external analog signal A1 due to deterioration or failure of the analog input circuit 3. It can be prevented beforehand.
Furthermore, even when deterioration or failure occurs in the multiplexer 2 or the D / A converter 5 provided for verifying the soundness of the analog input circuit 3 and the A / D converter 4, a failure determination is performed and a control output is output. Since control is performed on the safe side (the side on which the relay is dropped), the soundness of the analog input circuit 3 and the A / D converter 4 cannot be confirmed due to deterioration or failure in the multiplexer 2 or the D / A converter 5. Output control (relay operation) is not performed based on the external analog signal A1.

Further, the analog signal A2 to be input to the analog input circuit 3 as the reference analog signal can be set to either DC or AC by setting the digital signal D2 output from the microcomputer 6, so that the analog input circuit 3 is an AC coupling circuit. However, failure diagnosis of the circuit including the analog input circuit 3 can be performed.
Further, the digital signal D2 output from the microcomputer 6 can be arbitrarily set and is not limited to a constant value. Therefore, the digital signal D2 is set to an optimum value based on the output range of the analog signal A1 in the system to which the analog signal input device 1 is applied. Can be set. Furthermore, the digital signal D2 can be switched to a plurality of types, and the presence or absence of a failure can be diagnosed depending on the output state of each digital signal D2, thereby enabling a more accurate failure diagnosis.

By the way, as a diagnostic method suitable for the failure diagnosis of the multiplexer 2, when all the channels of the multiplexer 2 are controlled to be turned off and the output of the analog signal A from the multiplexer 2 is stopped, the analog input circuit 3 and the A / D conversion are performed. There is a method for determining whether or not the input of the device 4 is actually zero.
An embodiment in which such failure diagnosis and failure diagnosis based on the digital signal D2 (analog signal A2) are combined will be described with reference to the flowchart of FIG.

In the flowchart of FIG. 3, first, in step S201, it is determined whether or not it is the execution timing of the failure diagnosis, as in step S101 described above.
If it is determined in step S201 that it is the timing for executing the failure diagnosis, the process proceeds to step S202, and the digital signal D2 as a reference signal for diagnosis is output to the D / A converter 5.

In the next step S203, both the analog signal A1 from the outside and the analog signal A2 output from the D / A converter 5 are not output from the multiplexer 2, and the output from the multiplexer 2 is zero. A selection control signal S for turning off all channels is output.
In step S204, the digital signal D1 output from the A / D converter 4 with the output of the multiplexer 2 set to zero, that is, with the inputs of the analog input circuit 3 and the A / D converter 4 set to zero. Capture.

In step S205, it is determined whether or not the digital signal D1 captured in step S204 is within an allowable error of A / D conversion centered on zero or zero.
By stopping the output of the multiplexer 2, the inputs of the analog input circuit 3 and the A / D converter 4 become zero. Therefore, it is normal that the digital signal D1 becomes zero or a value near zero. When D1 is not zero or a value close to zero, the output of the multiplexer 2 is not actually stopped and the multiplexer 2 is outputting the analog signal A1 or the analog signal A2, or the output of the A / D converter 4 It can be presumed that an abnormal shift occurs.
Note that the analog signal A1 and the analog signal A2 are not zero.

  Therefore, when it is determined in step S205 that the digital signal D1 is a value that deviates from zero and exceeds the error range of A / D conversion, a failure of the multiplexer 2 and / or the A / D converter 4 occurs. In step S213, the occurrence of a failure is determined, and in the next step S214, the control output is controlled and held on the safe side (the control output that causes the relay to drop is held). Fail processing is executed to stop output control according to the analog signal A1 from the outside.

On the other hand, if it is determined in step S205 that the digital signal D1 is zero or a value within the error range of A / D conversion, the selection output function of the multiplexer 2 and the conversion accuracy of the A / D converter 4 are normal. And proceed to step S206.
In step S206, the selection control signal S that instructs the multiplexer 2 to output the analog signal A2 output from the D / A converter 5 is output.

In the next step S207, the digital signal D1 is captured as the output of the A / D converter 4 when the analog signal A2 is input to the analog input circuit 3.
In step S208, as in step S105 described above, is the digital signal D1 captured in step S207 within the allowable error range (normal range) commensurate with the digital signal D2 output to the D / A converter 5? Determine whether or not.

When the digital signal D1 is within the allowable error range corresponding to the digital signal D2 output to the D / A converter 5, the process proceeds to step S209, where the multiplexer 2, the analog input circuit 3, and the A / D conversion are performed. It is determined that the circuit including the converter 4 and the D / A converter 5 is normal.
If it is normal, the process further proceeds to step S210, the selection control signal S for instructing the multiplexer 2 to output the analog signal A1 from the outside is output, and the analog signal A1 from the outside is output to the analog input circuit 3, The data is taken in via the A / D converter 4.

In step S211, the digital signal D1 output from the A / D converter 4 is acquired. In step S212, the digital signal D1 acquired in step S211 is arithmetically processed to determine a control output to be output to the outside. The output is output to the outside, and the control operation (relay operation / drop control) is performed according to the analog signal A1 from the outside.
On the other hand, if the digital signal D1 is not within the allowable error range corresponding to the digital signal D2 output to the D / A converter 5, the process proceeds to step S213, where the multiplexer 2, the analog input circuit 3, and the A / D converter are processed. 4, it is determined that a failure has occurred in the circuit including the D / A converter 5.

If a failure has occurred, the process further proceeds to step S214 where the control output is controlled and held on the safe side (the control output for dropping the relay is held), and the output according to the analog signal A1 from the outside. A fail process is executed to stop the control.
In the above configuration, diagnosis is performed with the output from the multiplexer 2 stopped, and further, the analog signal A2 obtained by D / A conversion of the digital signal D2 is diagnosed with being output from the multiplexer 2, High diagnostic accuracy can be obtained.

  By the way, the analog input device 1 described above includes only one MCU, but the two MCUs perform processing such as input, calculation, and output in synchronization, and compare and collate data with each other at regular intervals. The above-described failure diagnosis can also be applied to the dual analog input device 1 configured to obtain a control output for operating an external device (relay).

FIG. 4 is a block diagram illustrating a dual analog input device according to the second embodiment.
4 includes a multiplexer (selection output means) 52, an analog input circuit (analog processing means) 53, a first MCU (micro controller unit) 60, and a second MCU (micro controller unit). Unit) 70 and a fail-safe verification circuit 90.
The first MCU 60 includes an A / D converter (first A / D conversion means) 61, a D / A converter (D / A conversion means) 62, and a microcomputer 63 (first arithmetic processing means) including a CPU, RAM, ROM, and the like. The second MCU 70 is a single chip including an A / D converter (second A / D conversion means) 71 and a microcomputer 73 (second arithmetic processing means) including a CPU, RAM, ROM and the like. It is a microcomputer.

The multiplexer 52 receives the analog signal A1 from the outside and the analog signal A2 that is the output of the D / A converter 62 of the first MCU 60, and in response to the selection control signal S output from the microcomputer 63 of the first MCU 60, the analog 52 One of the signal A1 and the analog signal A2 is output.
In this embodiment, since the digital signal D2 used for diagnosis is output from the D / A converter 62 of the first MCU 60, the D / A converter 72 is not provided in the second MCU 70. The 2MCU 70 can be composed of the same device, and both the first MCU 60 and the second MCU 70 can be provided with D / A converters.

The analog input circuit 53 is an analog circuit such as a filter circuit composed of a capacitor and a resistor, inputs the analog signal A output from the multiplexer 52, processes it, and outputs it as an analog signal Af. The analog signal Af output from the analog input circuit 53 is input to the A / D converter 61 of the first MCU 60 and the A / D converter 71 of the second MCU 70 connected in parallel to the analog input circuit 53, respectively.
The analog input circuit 53 may be an AC coupling circuit (DC removal circuit) such as a differentiation circuit, or may be an analog circuit that passes a DC component.

The A / D converters 61 and 71 receive the analog signal Af output from the analog input circuit 53, and convert the analog signal Af into a digital signal D1.
The microcomputers 63 and 73 receive the digital signal D1 output from the A / D converters 61 and 71, and perform arithmetic processing on the digital signal D1, thereby determining a control output to be output to an external device (relay).
The first MCU 60 and the second MCU 70 are connected by an I / O port 80, and each other's processing results (including the diagnostic result and the captured digital signal D1) can be read.

The D / A converter 62 receives the digital signal D2 output from the microcomputer 63 and converts it into an analog signal A2, and outputs the analog signal A2 to the multiplexer 2.
The analog signal A2 is output for fault diagnosis. When the analog signal A2 is input to the analog input circuit 3, the microcomputers 63 and 73 are based on the digital signal D1 output from the A / D converters 61 and 71. Diagnose the presence or absence of failure.

The first MCU 60 includes a reference voltage source Vref1 used for the conversion operation in the A / D converter 61 and the D / A converter 62, and the second MCU 70 includes a reference voltage source Vref2 used for the conversion operation in the A / D converter 71. ing.
The fail-safe collation circuit 90 has a logic circuit, inputs and collates the control output output from the first MCU 60 and the control output of the second MCU 70, and operates the relay only when the output is normal.
In the present embodiment, the first MCU 60 outputs the analog signal A2 to the multiplexer 2 and the first MCU 60 outputs the selection control signal S to the multiplexer 2. However, one of the first MCU 60 and the second MCU 70 is for diagnosis. The analog signal A <b> 2 is output to the multiplexer 2, and the other outputs the selection control signal S to the multiplexer 2.

The flowchart of FIG. 5 shows details of failure diagnosis by the first MCU 60 and the second MCU 70.
In the flowchart of FIG. 5, steps S301 to S315 indicate processing performed by the first MCU 60 (microcomputer 63), and steps S401 to S407 and steps S411 to S414 indicate processing performed by the second MCU 70 (microcomputer 73). Show.

In step S301, similarly to step S101, it is determined whether or not it is the execution timing of failure diagnosis.
If it is determined in step S301 that it is the execution timing of the failure diagnosis, the process proceeds to step S302, and the digital signal D2 as a reference signal for diagnosis is output to the D / A converter 5. The digital signal D2 is arbitrary data stored in advance in a memory provided in the microcomputer 63 for failure diagnosis.

In the next step S303, the selection control signal S for instructing the multiplexer 52 to output the analog signal A2 output from the D / A converter 62 is output.
Thus, the digital signal D2 is converted into the analog signal A2 by the D / A converter 62, the analog signal A2 is output from the multiplexer 52 to the analog input circuit 53, and the analog signal Af that has passed through the analog input circuit 53 is further converted. The A / D converter 61 on the first MCU 60 side and the A / D converter 71 on the second MCU 70 side respectively convert to the digital signal D1.

In step S304, the digital signal D1 output from the A / D converter 61 is captured.
In step S305, as in step S105 described above, the digital signal D1 captured in step S304 is a signal within an allowable error range (normal range) corresponding to the digital signal D2 output to the D / A converter 62. It is determined whether or not there is.
If the digital signal D1 captured in step S304 is within the allowable error range corresponding to the digital signal D2 output to the D / A converter 62, the process proceeds to step S306, where the multiplexer 52, the analog input circuit 53, It is determined that the circuit including the A / D converter 61 and the D / A converter 62 is normal.

On the other hand, if the digital signal D1 captured in step S304 is not within the allowable error range corresponding to the digital signal D2 output to the D / A converter 62, the process proceeds to step S307, where the multiplexer 52, the analog input circuit 53, A / It is determined that a failure has occurred in any of the circuits including the D converter 61 and the D / A converter 62.
The above fault diagnosis is also performed in parallel on the second MCU 70 (microcomputer 73) side. In step S401, the digital signal D1 output from the A / D converter 71 is fetched. In the next step S402, the above-described step S105 is performed. In the same manner as in step S401, it is determined whether or not the digital signal D1 captured in step S401 is a signal within an allowable error range (normal range) corresponding to the digital signal D2 output to the D / A converter 62 on the first MCU 60 side. To do.

Here, if the digital signal D1 captured in step S401 is within the allowable error range corresponding to the digital signal D2 output to the D / A converter 62 on the first MCU 60 side, the process proceeds to step S403, where the multiplexer 52, analog It is determined that the circuit including the input circuit 53, the A / D converter 71, and the D / A converter 62 is normal.
On the other hand, when the digital signal D1 captured in step S401 is not within the allowable error range corresponding to the digital signal D2 output to the D / A converter 62 on the first MCU 60 side, the process proceeds to step S404, where the multiplexer 52, the analog input circuit 53, it is determined that a failure has occurred in any of the circuits including the A / D converter 71 and the D / A converter 62.

In step S308 and step S405, the diagnosis result on the first MCU 60 side and the diagnosis result on the second MCU 70 (microcomputer 73) side are read from each other.
Whether the first MCU 60 side that has captured the diagnosis result on the second MCU 70 (microcomputer 73) side diagnoses itself as normal in step S309 (collation means), and whether the second MCU 70 is also diagnosed as normal. In other words, it is determined whether or not the diagnosis results are normal.

If at least one of the first MCU 60 side and the second MCU 70 side determines that a failure has occurred, the process proceeds to step S310, and a safety side output (fail output) for dropping the relay is generated as a control output. Let
On the other hand, if it is determined that both the first MCU 60 side and the second MCU 70 side are normal, it is determined that the diagnosis result indicating normal is correct, and the process proceeds to step S311 to the multiplexer 52. A selection control signal S for instructing the output of the analog signal A1 from the outside is output.

Whether or not the diagnostic results are normal and coincident is also determined on the second MCU 70 side that has captured the diagnostic results on the first MCU 60 (microcomputer 63) side.
That is, in step S406 (collation means), it is diagnosed that the device itself is normal and the first MCU 60 is also diagnosed as normal. In other words, whether or not the diagnosis results are normal. Judging.

When at least one of the first MCU 60 side and the second MCU 70 side determines the occurrence of a failure, the process proceeds to step S407, and a safety side output for dropping the relay is generated as a control output.
When it is determined that both of them are normally diagnosed by collating the diagnosis results on the first MCU 60 side and instructing to take in the analog signal A1 from the outside in step S311, both the first MCU 60 side and the second MCU 70 side In parallel, the digital signal D1 obtained by A / D converting the analog signal Af after the analog signal A1 from the outside is processed by the analog input circuit 53, and the digital signal D1 read by the other is read in parallel. It performs (step S312 and step SS411).

In step S313, the digital signal D1 captured by the own system is compared with the result of capturing the output of the A / D converter 71 on the second MCU 70 side.
The two digital signals D1 to be compared in step S313 are values obtained by converting the same analog signal Af by different A / D converters 61 and 71, and the A / D converters 61 and 71 are between the two digital signals D1. However, if a difference exceeding the conversion error occurs, it is possible that a failure has occurred in at least one of the A / D converters 61 and 71.
The failure of the A / D converters 61 and 71 includes a failure of the attached reference voltage sources Vref1 and Vref2 (change in voltage level).

Therefore, when a difference exceeding the allowable conversion error (threshold value) between the A / D converters 61 and 71 occurs between the two digital signals D1, the process proceeds to step S314, and the relay is set as a control output. Generate safety side output (fail output) to drop.
On the other hand, when it is determined that the difference between the two digital signals D1 is sufficiently small and within the allowable conversion error between the A / D converters 61 and 71, the process proceeds to step S315, where the A / D converter 61 By calculating the output digital signal D1, a control output to be output to the outside is determined and output.

The collation of the digital signal D1 is also performed on the second MCU 70 side, and in step S412, the digital signal D1 captured by the own system is compared with the result of capturing the output of the A / D converter 61 on the first MCU 60 side. .
If a difference exceeding the allowable conversion error (threshold value) between the A / D converters 61 and 71 occurs between the two digital signals D1, the process proceeds to step S413, and the relay is set as a control output. Generate safety side output (fail output) to drop.

On the other hand, if it is determined that the difference between the two digital signals D1 is sufficiently small and within the allowable conversion error between the A / D converters 61 and 71, the process proceeds to step S414, where the A / D converter 71 By calculating the output digital signal D1, a control output to be output to the outside is determined and output.
The control output output by the first MCU 60 and the control output output by the second MCU 70 are input to the fail-safe verification circuit 90. The fail-safe verification circuit 90 causes at least one of the control outputs to drop the relay and If the output is a fail output that leads to the relay, the control output that is finally output is the fail output, and the relay operates as the control output that is finally output only when both control outputs match the signal that operates the relay. To generate output.

Therefore, when the occurrence of a failure is diagnosed on at least one of the first MCU 60 side and the second MCU 70 side, the difference between the digital signals D1 captured by both of the first MCU 60 side and the second MCU 70 side is abnormal. When it is diagnosed that it is large, the control output to be finally output is a fail output, and the relay is dropped to guide the system to the safe side.
In the case of the dual analog signal input device described above, even if diagnosis is normal on the first MCU 60 side, the control output is controlled and held on the safe side if the occurrence of a failure is diagnosed on the second MCU 70 side. And further fail-safe can be achieved.

Further, by comparing the digital signal D1 captured by the first MCU 60 side with the digital signal D1 captured by the second MCU 70 side, the conversion accuracy due to the voltage change of the reference voltage sources Vref1 and Vref2 attached to the A / D converters 61 and 71 is compared. Therefore, it is possible to avoid the determination of the control signal to be output to the outside based on the digital signal D1 obtained in a state where the conversion accuracy is lowered.
Furthermore, the control output calculated on the first MCU 60 side and the control output calculated on the second MCU 70 side are compared, and if both match, the control output is output to the outside, and if they do not match, the safety side signal is output. Therefore, when the calculation result of the control output conflicts, the control output that is not on the safe side is not output to the outside, and fail-safe can be achieved.

It should be noted that the fail safe collation circuit 90 (collation means) can also collate the diagnosis result on the first MCU 60 side with the diagnosis result on the second MCU 70 side, and whether or not the control outputs of both coincide. All the verifications including the verification can be performed by software processing in the first MCU 60 and the second MCU 70. Further, the collation process can be performed by only one of the first MCU 60 and the second MCU 70.
Further, the digital signal D1 captured by the first MCU 60 and the digital signal D1 captured by the second MCU 70 in a state in which the analog signal A2 for diagnosis is input to the analog input circuit 53 are at least the first MCU 60 and the second MCU 70. On the other hand, it is possible to diagnose whether or not a failure has occurred in the A / D converters 61 and 71 (reference voltage sources Vref1 and Vref2).

  Further, in the dual-system analog signal input device, as shown in the single-system embodiment, the presence or absence of a failure of the multiplexer 52 is diagnosed based on the digital signal D1 in a state where the output from the multiplexer 52 is stopped. can do. In addition, it is obvious that the embodiment shown in the single-system embodiment can be applied to a double-system analog signal input apparatus as appropriate.

1 Analog signal input device 2 Multiplexer (selection output means)
3 Analog input circuit (analog processing means)
4 A / D converter (A / D conversion means)
5 D / A converter (D / A conversion means)
6 Microcomputer (arithmetic processing means)
51 Analog signal input device 52 Multiplexer (selection output means)
53 Analog input circuit (analog processing means)
60 1st MCU
61 A / D converter (first A / D conversion means)
62 D / A converter (D / A conversion means)
63 Microcomputer (first arithmetic processing means)
70 Second MCU
71 A / D converter (second A / D conversion means)
73 Microcomputer (second arithmetic processing means)

Claims (5)

In an analog signal input device that takes an analog signal into an arithmetic processing means via an analog processing circuit and an A / D converter, an analog signal from the outside and a digital signal output from the arithmetic processing means are converted by a D / A converter. And a selection output unit that inputs a diagnostic analog signal and selects a signal to be output to the analog processing circuit in accordance with a control signal of the calculation processing unit, and the calculation processing unit sets all channels of the selection output unit. Fault diagnosis based on the output of the A / D converter when turned off and fault diagnosis based on the output of the A / D converter when the analog signal for diagnosis is input to the analog processing circuit. Analog signal input device. The arithmetic processing means inputs the diagnostic analog signal to the analog processing circuit when the output of the A / D converter when all channels of the selection output means are turned off is within a first predetermined range. The analog signal input device according to claim 1 , wherein fault diagnosis is performed . The arithmetic processing means selects and outputs an analog signal from the outside when an output of the A / D converter is within a second predetermined range when the analog signal for diagnosis is input to the analog processing circuit. The analog signal input device according to claim 2 , wherein a control operation is performed according to an analog signal from the outside by inputting to the analog processing circuit from means . The said arithmetic processing means performs a normal determination, when the output of the said A / D converter when all the channels of the said selection output means are turned off is in the predetermined range containing zero , Any one of Claim 1 to 3 The analog signal input device according to any one of the above. 5. The arithmetic processing unit according to claim 1, wherein all the channels of the selection output unit are turned off when the analog signal for diagnosis that is not zero is input to the selection output unit. Analog signal input device.

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