JP5691651B2 - Integrated circuit heat dissipation device and electronic device - Google Patents

Description

  The present invention relates to an integrated circuit heat dissipation device and an electronic device, and more particularly, to an integrated circuit heat dissipation device and an electronic device that are small and efficiently dissipate heat of the integrated circuit.

  In an electronic apparatus such as an image processing apparatus such as a printer apparatus, a copying apparatus, a composite apparatus, a scanner apparatus, or an image forming apparatus, an integrated circuit (IC) such as a large number of semiconductor integrated circuits is used to perform various processes such as image processing. ICs are mounted, and ICs have increased in circuit scale and heat generation from ICs as semiconductor technology has advanced.

  On the other hand, as the circuit scale increases, the number of pins of a package has been increased, and a bottom electrode type BGA (Ball Grid Array) package has been widely adopted.

  However, the IC of the BGA package has solder bumps used for signal input / output and power connection on the bottom surface, and the solder bumps have a small pitch and cannot be directly mounted on a wiring board. Instead of being mounted directly on the wiring substrate, it is mounted on the interposer substrate by solder bumps.

  In such a BGA package IC, as a countermeasure against the heat generation of the IC, conventionally, for example, a substrate TH (through hole) is formed on a heat sink mounted on the opposite side of the substrate from a heat radiation pattern provided at the center of the BGA package. A technique is disclosed in which the heat generated from the integrated circuit is dissipated by a heat sink by being connected (see Patent Document 1).

  However, in the above prior art, a heat radiation pattern is provided at the center of the BGA package, and the heat of the IC is radiated by connecting to a heat sink mounted on the opposite surface of the substrate via a through hole of the substrate. There has been a problem that a heat dissipation path from the center of the BGA package to the outside of the BGA package mounting area cannot be provided on the substrate.

  That is, in the BGA package, the wiring lead-out in the center part is limited by the wiring fine processing accuracy on the board side, and the outer peripheral part of the BGA package on the board is all used for signal line drawing. A heat dissipation path from the center of the BGA package to the outside of the BGA package mounting area can be provided on the substrate even if the heat dissipation pattern mounted on the opposite surface of the substrate is connected to the heat dissipation pattern at the center of the BGA package via a hole. However, in order to obtain a sufficient heat dissipation effect, the height of the heat sink, which is a heat dissipation portion, is required, and improvement is required in order to reduce the size and improve the heat dissipation efficiency. If a heat radiation pattern is provided not on the center of the BGA package but on the outer periphery, the signal line cannot be drawn out and cannot be handled.

  SUMMARY OF THE INVENTION An object of the present invention is to provide an integrated circuit heat dissipation device and an electronic device that are small in size and can improve heat dissipation efficiency.

  In order to achieve the above object, the present invention provides a substrate having a plurality of heat radiation terminals formed at a central portion of an integrated circuit package on which an integrated circuit is mounted at a position facing the heat radiation terminal. A through heat dissipation path penetrating through the circuit board and connected to a bypass member disposed on the opposite side of the substrate from the integrated circuit package, and the bypass member connects the through heat dissipation path to a heat dissipation terminal of the integrated circuit package. Connected to the discharge heat radiating terminal provided on the side of the bypass member of the substrate located outside the outer signal terminal, the discharge heat radiating terminal is connected to the peripheral substrate signal outside the heat radiating terminal of the substrate. A heat dissipation path member formed on a substrate outside the terminals is connected to a predetermined heat dissipation member.

  In addition, the present invention combines at least one of the heat dissipation terminal of the integrated circuit package, the substrate heat dissipation terminal of the substrate, the opposite surface substrate heat dissipation terminal of the substrate, the bypass heat dissipation terminal, and the emission heat dissipation terminal. It is good also as connecting to one with a member.

  Furthermore, the present invention may be characterized in that the heat dissipation member is a solid pattern formed on the substrate.

  According to the present invention, the heat of the integrated circuit can be efficiently radiated in a small size.

1 is a front sectional view of an integrated circuit heat dissipation device to which an embodiment of the present invention is applied. The board | substrate top view by the side of the bypass auxiliary package. The board | substrate top view when not providing the auxiliary | assistant package for bypass. The board | substrate top view at the time of putting together a signal path | route. The board | substrate top view at the time of forming a solid pattern in the position with favorable ventilation. The top view at the time of forming a through-hole while forming a solid pattern in a position with good ventilation. The board | substrate top view at the time of forming a solid pattern around the components which dislike a heat change. The board | substrate top view at the time of connecting the thermal radiation path | route to the connection location with other components.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In addition, since the Example described below is a suitable Example of this invention, various technically preferable restrictions are attached | subjected, However, The range of this invention is unduly limited by the following description. However, not all the configurations described in the present embodiment are essential constituent elements of the present invention.

  1 to 8 are diagrams showing an embodiment of an integrated circuit heat dissipation device and an electronic device according to the present invention. FIG. 1 is an integrated circuit to which an embodiment of the integrated circuit heat dissipation device and the electronic device according to the present invention is applied. 1 is a front sectional view of a heat dissipation device and an electronic device 1.

  In FIG. 1, an integrated circuit heat dissipation device 1 has an IC (an integrated circuit package on which an integrated circuit is mounted) 3 mounted on one surface (the lower surface in FIG. 1) of a substrate 2, and the IC 3 of the substrate 2 is mounted. The bypass auxiliary package 4 is mounted on the opposite surface (upper surface in FIG. 1) opposite to the surface.

  The IC 3 is an IC of a BGA package, and a grid (solder ball) 5 as a bottom electrode is arranged on the surface on the substrate 2 side. In the IC 3, for example, grids (pins) 5 of 30 rows × 30 rows (900 pins, file grid arrangement) are arranged, and each outer peripheral 8 rows (704 pins) is a signal pin (signal terminal) 5 s and a center 14. The row (196 pin) is a heat radiation pin (heat radiation terminal) 5h. IC3 has a terminal-to-terminal pitch of 1.27 mm.

  In the present embodiment, the bypass auxiliary package (bypass member) 4 has a BGA package configuration that is substantially the same size as the IC 3, and is provided with a grid (pin) 6 as a bottom electrode. For example, the bypass auxiliary package 4 has two printed circuit wiring layers on the front and back sides, and a PAD size that is a copper foil space size for connecting the bypass auxiliary package 4 and the substrate 2 with solder is φ0. The penetration VIA4a that penetrates the upper layer and the lower layer (surface and lower surface) is 1.6 mm, the surface VIA land size is φ0.5 mm, and the line width / space width is 0.1 mm / 0.00 mm. The accuracy of solder resist position is ± 0.075 mm.

  The substrate 2 is formed with a plurality of, for example, four layers of printed circuit wiring layers connected to the grid 5 of the IC 3 and the grid 6 of the bypass auxiliary package 4, the PAD size is 0.6 mm, and the through VIA 2 a is The thickness is 1.6 mm, the surface layer VIA land size is φ0.5 mm, the inner layer VIA land size is φ0.76 mm, the line width / space width is 0.1 mm / 0.1 mm, and the solder resist position accuracy is ± 0.075 mm.

  Then, the substrate 2 is connected to the peripheral six rows (576 pins) of the IC 3 by using printed circuit wiring layers from the first layer to the third layer from the IC 3 side, and is drawn out by the substrate signal terminal (substrate signal terminal) 7s. The 128-pin board signal terminal 7s remaining at the position facing the central part of the IC 3 passes through the signal penetration VIA 2s of the board 2 and enters the seventh and eighth rows on the bypass auxiliary package 4 side. It is connected to the opposite substrate signal terminal (opposite substrate signal terminal) 8s.

  The bypass auxiliary package 4 has signal lines extending from the bypass signal pins 6s in the 7th and 8th rows on the substrate 2 side to the bypass signal pins 6s on the surface of the bypass auxiliary package 4 (on the substrate 2 side in FIG. 1). The bypass signal pin 6s is connected to the opposite substrate signal terminal 8s on the opposite side of the substrate 2 by soldering or the like, and a signal line indicated by a solid line in FIG. It is drawn out as a route Ls.

  On the other hand, the heat radiation pins 5h in the center 14 rows (196 pins) of the IC 3 are connected to the substrate heat radiation terminals 7h at positions corresponding to the heat radiation pins 5h of the substrate 2 by soldering or the like. Further, via the heat dissipation through VIA 2 h, it is connected to the opposite surface substrate heat dissipation terminal 8 h in the center 14 rows (196 pins) on the bypass auxiliary package 4 side.

  The bypass auxiliary package 4 has 14 rows (196 pins) in the center serving as bypass heat radiation pins (bypass heat radiation terminals) 6h, and is connected to the board heat radiation terminals 8h on the opposite side of the substrate 2 by soldering or the like. In the bypass auxiliary package 4, the bypass heat dissipation pins 6 h in the center 14 rows pass through the vias VIA 4 a and the back layer heat dissipation of the back layer of the bypass auxiliary package 4 (the printed circuit wiring layer opposite to the substrate in FIG. 1). The backside heat radiation pin 9h is connected to the pin 9h, and as shown by the wavy line in FIG. 1, the back layer heat radiation pin 9h is coupled as a single coupling portion 9k via the heat radiation feedback through-via VIA4b of the bypass auxiliary package 4. Are connected to the radiation pins 6p outside the substrate signal terminal 8s on the opposite side of the outermost periphery of the IC3. The released heat radiation pin 6p is connected to a heat radiation path Lc formed on the surface of the substrate 2 on the side of the bypass auxiliary package 4 by soldering or the like.

  Further, as shown in FIG. 2, a solid pattern 10 for heat dissipation is formed on the surface layer (the upper surface of the substrate 2 in FIG. 1) on which the bypass auxiliary package 4 of the substrate 2 is mounted. Is sufficient to dissipate heat, and is formed to the maximum size within a range regulated by other circuit components and wirings mounted on the substrate 2.

  The solid pattern 10 is connected to the heat dissipation path Lc formed on the surface of the substrate 2 on the side of the bypass auxiliary package 4 and releases heat released from the heat dissipation pins 5h of the IC3.

  Next, the operation of this embodiment will be described. The integrated circuit heat dissipation device 1 of this embodiment performs heat dissipation of the IC 3 in a small and efficient manner.

  In the integrated circuit heat dissipation device 1, a 196 pin heat dissipation pin 5 h provided at the center of the IC 3 is connected to the substrate heat dissipation terminal 7 h of the substrate 2 at a position corresponding to the heat dissipation pin 5 h. , And connected to the penetrating VIA 2a by soldering or the like. The through VIA 2a is connected to the opposite substrate heat radiation terminal 8h of the substrate 2 on the bias auxiliary package 4 side, and the opposite substrate heat radiation terminal 8h is soldered to the bypass heat radiation pin 6h on the substrate 2 side of the bypass auxiliary package 4. Etc. The bypass heat radiation pin 6 h of the bypass auxiliary package 4 is connected to the back layer heat radiation pin 9 h of the bypass auxiliary package 4 through the through VIA 4 a of the bypass auxiliary package 4.

  The back layer heat radiation pin 9h of the bypass auxiliary package 4 is coupled as one coupling portion 9k as shown by the wavy line in FIG. 1, and the coupling portion 9k is a through hole for heat radiation feedback of the bypass auxiliary package 4. Via the VIA 4b, it is connected to the discharge heat radiation pin 6p outside the opposite substrate signal terminal 8s on the outermost periphery of the IC3. The released heat radiation pin 6p is connected to a heat radiation path Lc formed on the surface of the substrate 2 on the side of the bypass auxiliary package 4 by soldering or the like.

  On the surface layer of the substrate 2, as shown in FIG. 2, the solid pattern 10 is formed around the bypass auxiliary package 4, and the heat dissipation path Lc is connected to the solid pattern 10.

  Therefore, the heat generated in the IC 3 is released from the heat radiation pins 5 h of the IC 3 to the solid pattern 10 via the substrate 2, the bypass auxiliary package 4 and the heat radiation path Lc of the substrate 2, and is radiated by the solid pattern 10.

  In the integrated circuit heat dissipation device 1 of the present embodiment, the heat dissipation pin 5h of the IC3 is connected to the heat dissipation path Lc outside the IC3 through the auxiliary auxiliary package 4 mounted on the opposite side surface of the substrate 2. When the auxiliary package 4 is not used, for example, as shown in FIG. 3, the solid pattern 10a cannot be formed so as to protrude from the pattern of the heat radiation pin 5h of the IC 3, and only the solid pattern 10a having a small area is formed. I can't.

  However, in the integrated circuit heat dissipation device 1 of the present embodiment, the heat dissipation pin 5h of the IC 3 is connected to the heat dissipation path Lc outside the IC3 through the bypass auxiliary package 4 mounted on the opposite side surface of the substrate 2.

  That is, the integrated circuit heat dissipation device 1 according to the present embodiment includes, on the substrate 2, a plurality of heat dissipation pins (heat dissipation terminals) 5 h formed circumferentially at the center of an IC (integrated circuit package) 3 on which the integrated circuit is mounted. Auxiliary bypass package (bypass) that is formed on the opposite side of the substrate 2 from the IC 3 in the heat dissipation through VIA (through heat dissipation path) 2a that is formed at a position facing the heat dissipation pin 5h and penetrates the substrate 2. Member) 4, the bypass auxiliary package 4, and the through hole VIA 2 a for heat dissipation is located on the side surface of the bias auxiliary package 4 on the substrate 2 positioned outside the signal pin (signal terminal) 5 s outside the heat dissipation terminal 5 h of the IC 3. The discharge heat dissipation terminal 6p is connected to the discharge heat dissipation pin (discharge heat dissipation terminal) 6p provided on the substrate 2 and the heat dissipation formed on the substrate 2 outside the substrate signal terminal 8s on the opposite side of the substrate 2. And it connects the solid pattern (heat radiating member) in the road (heat dissipation path member) Lc.

  Therefore, the solid pattern 10 for heat dissipation can be formed in a state having a wide area, and the heat dissipation efficiency can be improved. Further, since the bypass auxiliary package 4 has substantially the same thickness as the substrate 2 (usually 1.6 mm or less), the height dimension on the substrate 2 can be made lower than when a conventional heat sink is provided. In addition, it is possible to reduce the thickness of an image forming apparatus, an image reading apparatus, or the like to which the integrated circuit heat dissipation device 1 is applied.

  Further, the integrated circuit heat dissipation device 1 of this embodiment includes a through-via VIA4a of the bypass auxiliary package 4 connected to the 196-pin heat dissipation pin 5h of the IC 3, and a back layer heat dissipation pin 9h connected to the through-via VIA4a. The coupling portion 9k is coupled by being coupled to the heat radiation path Lc of the substrate 2 by soldering or the like via the heat radiation feedback through VIA 4b of the bypass auxiliary package 4.

  Therefore, it is possible to unify the routing of the heat dissipation path Lc after the coupling, to prepare the routing of the heat dissipation path Lc in the bypass auxiliary package 4 and the substrate 2, and to strengthen the heat dissipation path Lc, Thermal resistance can be reduced.

  In the above description, the heat dissipation path is combined into one on the upper layer of the bypass auxiliary package 4. However, the coupling location of the heat dissipation path is not limited to the upper layer of the bypass auxiliary package 4. The heat radiation pins 5h, the substrate heat radiation terminal 7h portion on the lower surface of the substrate 2, or the opposite surface substrate heat radiation terminal 8h portion on the upper surface of the substrate 2 may be coupled at any two or more locations.

  Further, in the integrated circuit heat dissipation device 1 of this embodiment, the signal path Ls of the IC 3 may be collectively connected to the substrate 2 as shown in FIG. In the case of FIG. 4, the signal path Ls is grouped into the signal path Ls1 and the signal path Ls2, and the two surrounding ICs 11 and 12 are connected. Then, on the surface layer of the substrate 2, heat radiation solid patterns 10 b and 10 c are formed in regions other than the signal paths Ls 1 and Ls 2 around the bypass auxiliary package 4. In this case, the number of signal paths Ls to be collected is set as appropriate according to the circuit status of the connection destination of the signal paths Ls. In addition, the gap between the solid pattern 10 and the signal path Ls is determined by the capability of the apparatus that the substrate 2 creates. However, since a certain gap is required, the heat radiation is more than the wiring between the signal path Ls and the heat radiation path Lc alternately. If the paths Lc are combined, the flutter pattern 10 can be widened by this gap.

  In this way, by collecting the signal paths Ls, the solid patterns 10b and 10c for heat dissipation can be formed larger, and the heat dissipation efficiency can be further improved.

  Further, as shown in FIG. 5, the integrated circuit heat dissipation device 1 of the present embodiment has a solid pattern 10d for heat dissipation, which is a device on which the integrated circuit heat dissipation device 1 is mounted, for example, a printer device, a copying device, a composite device, etc. In an electronic apparatus such as an image reading apparatus such as an image forming apparatus or a scanner apparatus, it may be formed at a position with good ventilation.

  That is, in an electronic apparatus such as an image forming apparatus or an image reading apparatus to which the integrated circuit heat dissipation device 1 is applied, ventilation (per unit time) is performed both in the apparatus and in the apparatus in which the integrated circuit heat dissipation device 1 is disposed. The solid pattern 10d may be formed at a location where the airflow is good and the location where the airflow is bad, and where the airflow is good on the substrate 2. In this case, the heat dissipation path Lc on the substrate 2 that connects the bypass auxiliary package 4 and the solid pattern 10d is formed on the substrate 2 through a better ventilation position in consideration of other wirings and the like. Also good.

  If it does in this way, the heat dissipation efficiency in the solid pattern 10d can be further improved by the air-cooling effect by ventilation, and the heat dissipation efficiency in the heat dissipation path Lc can be improved.

  The place where the ventilation is good is not limited to the board 2, and a member formed with the solid pattern 10 is arranged at a place off the board 2 to dissipate the solid pattern 10 and the bypass auxiliary package 4. You may connect by the path | route Lc.

  Further, as shown in FIG. 6, the integrated circuit heat dissipation device 1 of the present embodiment may form a through hole 13 that penetrates the substrate 2 in the solid pattern 10 d. FIG. 6 shows the case where the through hole 13 having a square opening shape is formed. However, the opening shape of the through hole 13 is not limited to a square shape, and may be, for example, a round shape. May be.

  If it does in this way, the wind which passes through the solid pattern 10d will pass through the through-hole 13, air permeability can be improved, and the heat dissipation effect can be improved further.

  Moreover, plating may be provided in the through-hole 13 to reduce the resistance to wind and increase the metal area in contact with the airflow.

  If it does in this way, while improving air permeability further, heat dissipation can be improved, and the heat dissipation effect can be improved further.

  Further, as shown in FIG. 7, the integrated circuit heat dissipating device 1 of the present embodiment forms a solid pattern 10e around a part that dislikes a heat change on the substrate 2, for example, an IC 12, and this solid pattern 10e and the bypass pattern are used. The auxiliary package 4 may be connected by the heat dissipation path Lc.

  In this way, it is possible to continue to dissipate heat from the IC3 to the solid pattern 10e around the IC12 that dislikes the heat change, and to improve the heat dissipation effect of the IC3, and to keep the IC12 that dislikes the heat change at a constant temperature, The circuit performance can be improved.

  Further, as shown in FIG. 8, the integrated circuit heat dissipation device 1 of the present embodiment is integrated in an electronic device such as an image forming apparatus or an image reading device to which the integrated circuit heat dissipation device 1 is applied. A heat dissipation path Lc is connected to a member having a large heat capacity on which the substrate 2 of the circuit heat dissipation device 1 is disposed and having a good thermal conductivity, for example, a casing metal plate 14 that provides GND (installation potential) to the substrate 2. Also good.

  In this way, heat can be continuously radiated from the IC 3 to other parts having a large heat capacity such as the housing sheet metal 14 and the like, and the thermal conductivity is good, and the heat radiation effect of the IC 3 can be improved.

  The invention made by the present inventor has been specifically described based on the preferred embodiments. However, the present invention is not limited to that described in the above embodiments, and various modifications can be made without departing from the scope of the invention. It goes without saying that it is possible.

  INDUSTRIAL APPLICABILITY The present invention can be used for an integrated circuit heat dissipation device and an electronic device that are small and efficiently dissipate heat of the integrated circuit.

DESCRIPTION OF SYMBOLS 1 Integrated circuit heat dissipation device 2 Board | substrate 2s Signal penetration VIA
2h Heat dissipation through VIA
3 IC
4 Auxiliary package for bypass 4a, 4b Through VIA
5 grid 5 s signal pin 5 h heat dissipation pin 6 s bypass signal pin 6 h bypass heat dissipation pin 7 s substrate signal terminal 7 h substrate heat dissipation terminal 8 s opposite surface substrate signal terminal 8 h opposite surface substrate heat dissipation terminal 9 h back layer heat dissipation pin 9 k coupling portion 10, 10 a, 10 b, 10c, 10d, 10e Solid pattern 11, 12 IC
13 Through hole 14 Housing sheet metal Ls Signal path Lc Heat dissipation path

Japanese Patent Laid-Open No. 10-275883

Claims (7)

In addition to mounting an integrated circuit, a plurality of terminals are formed on one side in a plurality of circumferential directions outward from the center of the one side, and a predetermined number of terminals on the center side serve as heat radiation terminals, and the circumferential shape outside the heat radiation terminals. An integrated circuit package in which terminals are formed as signal terminals;
A substrate on which the integrated circuit package is mounted, a substrate heat radiation terminal and a substrate signal terminal formed on one side at positions facing the heat radiation terminal and the signal terminal of the integrated circuit package, on a side opposite to the one side An opposite substrate substrate radiation terminal formed at a position facing at least the substrate radiation terminal, and a substrate through which the substrate radiation terminal and the opposite substrate radiation terminal are connected to each other through the substrate,
A bypass heat radiating terminal connected to the opposite surface substrate heat radiating terminal of the substrate, an emission heat radiating terminal positioned outside the substrate signal terminal of the substrate, and a connection path connecting the bypass heat radiating terminal and the radiation radiating terminal are formed. A bypass member,
A heat dissipation path member formed on the substrate outside the substrate signal terminal of the substrate and connecting the discharge heat dissipation terminal of the bypass member to a predetermined heat dissipation member;
An integrated circuit heat dissipating device comprising: The integrated circuit heat dissipation device comprises:
A coupling member that couples at least one of the heat radiation terminal of the integrated circuit package, the substrate heat radiation terminal of the substrate, the opposite surface substrate heat radiation terminal of the substrate, the bypass heat radiation terminal, and the emission heat radiation terminal; The integrated circuit heat dissipation device according to claim 1, further comprising: The heat dissipation member is
The integrated circuit heat dissipation device according to claim 1, wherein the integrated circuit heat dissipation device is a solid pattern formed on the substrate. The solid pattern is
4. The integrated circuit heat dissipation device according to claim 3, wherein the integrated circuit heat dissipation device is formed around a predetermined circuit component on the substrate. The heat dissipation member is
The integrated circuit heat dissipation device according to any one of claims 1 to 3, wherein the integrated circuit heat dissipation device is disposed at a position having good ventilation. The heat dissipation path member is
2. The integrated circuit heat dissipation device according to claim 1, wherein the metal member to which the substrate is attached is used as the heat dissipation member to connect the metal member and the emission heat dissipation terminal.   An electronic device comprising the integrated circuit heat dissipation device according to claim 1.

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