JP5690395B2 - Manufacturing method of semiconductor light emitting device - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor light emitting device, and more particularly, to a method for manufacturing a semiconductor light emitting device with improved light extraction efficiency.

  In order to increase the brightness of a light emitting diode (LED), a metal reflection layer is provided as a light reflection layer between a substrate and an active layer composed of a multi-quantum well (MQW) layer. The structure to be formed has been proposed. As a method for forming such a metal reflective layer, for example, a technique for bonding (pasting) a substrate of a light emitting diode layer is disclosed (see, for example, Patent Document 1 and Patent Document 2).

  In Patent Document 1 and Patent Document 2, a transparent substrate such as GaP or sapphire is applied to the substrate used for pasting.

  In order to increase the brightness of a semiconductor light emitting device (LED), there is also a method in which a distributed black reflection (DBR) layer is provided between a GaAs substrate and an active layer (MQW) as a light reflection layer. The DBR layer reflects only light incident from a certain direction, and when the incident angle changes, the DBR does not reflect light but transmits it. Therefore, there is a problem that the transmitted light is absorbed by the GaAs substrate and the light emission luminance of the semiconductor light emitting element (LED) is lowered.

  Further, it is known that light extraction efficiency can be improved by frosting the surface of the semiconductor light emitting element (see, for example, Patent Document 3).

JP-A-6-302857 US Pat. No. 5,376,580 JP 2005-347497 A

  An effective method for creating a concavo-convex shape for the material of the AlInGaP layer has not been known.

  An object of the present invention is to provide a method for manufacturing a semiconductor light emitting device with improved light extraction efficiency.

  According to one aspect of the present invention, a step of forming a first cladding layer on a substrate, a step of forming a multiple quantum well layer on the first cladding layer, and a second cladding layer on the multiple quantum well layer Forming a surface of the second cladding layer by performing a frost treatment using a chlorine-based etching gas at a substrate temperature in the range of 150 ° C. to 250 ° C. And a step of forming a frosted layer formed of an AlInGaP layer. A method for manufacturing a semiconductor light emitting device is provided.

  According to another aspect of the present invention, a step of preparing a substrate structure for pasting and a light emitting diode structure for pasting, a step of forming a first metal layer on a substrate in the substrate structure, and the light emitting diode In the structure, a step of sequentially forming a second cladding layer, a multiple quantum well layer, and a first cladding layer on a GaAs substrate, and a metal contact layer and a first layer on the patterned insulating layer on the first cladding layer. A step of forming two metal layers, a substrate structure for pasting, and an LED structure for pasting by thermocompression bonding of the first metal layer and the second metal layer, and the GaAs substrate And a surface treatment of the second cladding layer by performing a frost treatment using a chlorine-based etching gas at a substrate temperature in the range of 150 ° C. to 250 ° C. It was carried out, a method of manufacturing a semiconductor light emitting device characterized by a step of forming a frost treatment layer formed by the AlInGaP layer on a surface of the second cladding layer.

  According to another aspect of the present invention, a step of preparing a substrate structure for pasting and a light emitting diode structure for pasting, and in the substrate structure, a plurality of grooves are formed on the substrate, the surface of the substrate, Forming a metal buffer layer on a side wall of the groove and a bottom surface of the groove, and forming a first metal layer on the metal buffer layer; and in the light emitting diode structure, a second cladding layer and a multiple quantum well on the GaAs substrate A step of sequentially forming a layer and a first cladding layer, a step of forming a metal contact layer and a second metal layer on the patterned insulating layer on the first cladding layer, and a substrate structure for pasting A step of attaching the LED structure for attachment by thermocompression bonding of the first metal layer and the second metal layer, a step of removing the GaAs substrate by etching, A surface treatment of the second cladding layer is performed by performing a frost treatment using a chlorine-based etching gas at a substrate temperature in a range of 50 ° C. to 250 ° C., and an AlInGaP layer is formed on the surface of the second cladding layer. And a process for forming a frosted layer. A method for manufacturing a semiconductor light emitting device is provided.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the semiconductor light-emitting device with improved light extraction efficiency can be provided.

1 is a schematic cross-sectional structure diagram of a semiconductor light emitting element according to a first embodiment of the present invention. The typical cross-section figure of the semiconductor light-emitting device which concerns on the modification of the 1st Embodiment of this invention. The typical cross-section figure of the semiconductor light-emitting device which concerns on the 2nd Embodiment of this invention. The typical cross-section figure of the semiconductor light-emitting device which concerns on the modification of the 2nd Embodiment of this invention. The typical cross-section figure of the semiconductor light-emitting device which concerns on the 3rd Embodiment of this invention. The typical cross-section figure of the semiconductor light-emitting device which concerns on the modification of the 3rd Embodiment of this invention. The typical cross-section figure of the semiconductor light-emitting device which concerns on the 4th Embodiment of this invention. The typical cross-section figure of the semiconductor light-emitting device which concerns on the modification of the 4th Embodiment of this invention. The typical plane pattern block diagram of the semiconductor light-emitting device based on the 4th Embodiment of this invention (structure example 1). The typical plane pattern block diagram of the semiconductor light-emitting device based on the 4th Embodiment of this invention (structure example 2). The typical plane pattern block diagram of the semiconductor light-emitting device based on the 4th Embodiment of this invention (structure example 3). The typical plane pattern block diagram (structure example 1) of the metal contact layer 11 and the insulating layer 17 of the semiconductor light-emitting device concerning the 4th Embodiment of this invention. The typical plane pattern block diagram of the metal contact layer 11 and the insulating layer 17 of the semiconductor light-emitting device concerning the 4th Embodiment of this invention (configuration example 2). Comparative example of a light-emitting characteristics of the semiconductor light emitting device according to a fourth embodiment of the present invention, the light output intensity Po before and after the dry frosting (W) forward current I _F (mA). The figure which shows the relationship between the substrate temperature T (degreeC) at the time of a dry frost process, and luminous intensity increase rate R (%) in the semiconductor light-emitting device concerning the 4th Embodiment of this invention. In FIG. 15, the surface SEM photograph of the semiconductor light emitting element when the substrate temperature T = 200 degrees. In the semiconductor light-emitting device concerning the 4th Embodiment of this invention, the figure which shows the relationship between the plasma power P (W) at the time of a dry frost process, and luminous intensity increase rate R (%). 17 is a surface SEM photograph of a semiconductor light emitting device corresponding to A to D, where (a) a surface SEM photograph when plasma power P = 200 W, and (b) a surface SEM photograph when plasma power P = 300 W. (C) Surface SEM photograph when plasma power P = 400 W, (d) Surface SEM photograph when plasma power P = 400 W.

  Next, a first embodiment of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and the planar dimensions, the ratio of the thickness of each layer, and the like are different from the actual ones. Therefore, specific thicknesses and dimensions should be determined in consideration of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

  Also, the following first to fourth embodiments exemplify apparatuses and methods for embodying the technical idea of the present invention, and the embodiments of the present invention are the components. The material, shape, structure, arrangement, etc. are not specified below. Various modifications can be made to the embodiment of the present invention within the scope of the claims.

In the following description, the (Al _x Ga _1-x ) _y In _1-y P (0 <= x <1, 0 <y <= 1) layer is simplified and expressed as an AlInGaP layer, and x = A Ga _y In _1-y P (0 <y <= 1) layer corresponding to 0 is simplified and displayed as an InGaP layer.

(First embodiment)
As shown in FIG. 1, a schematic cross-sectional structure of the semiconductor light emitting device according to the first embodiment of the present invention includes a substrate 10 and an n-type AlGaInP layer (first cladding layer) 12 disposed on the substrate 10. An MQW layer 14 disposed on the n-type AlGaInP layer (first cladding layer) 12, a p-type AlGaInP layer (second cladding layer) 16 disposed on the MQW layer 14, and a p-type AlGaInP layer (first cladding layer). And a frosted layer 30 formed of an AlInGaP layer. The surface of the p-type AlGaInP layer 16 is frosted to form an uneven frosted layer 30.

  The substrate 10 is formed of GaAs, the n-type AlGaInP layer 12 and the p-type AlGaInP layer 16 are formed of an AlInGaP layer, and the MQW layer 14 is formed of an InGaP / AlInGaP pair.

  A back electrode layer 22 is disposed on the back surface of the substrate 10, and a surface electrode layer 20 is disposed on the surface of the p-type AlGaInP layer 16. The front electrode layer 20 and the back electrode layer 22 are both formed of, for example, an Au layer.

  As shown in FIG. 2, the schematic cross-sectional structure of the semiconductor light emitting device according to the modification of the first embodiment is formed by frosting the entire surface of the p-type AlGaInP layer 16 so that the uneven frosted layer 30 is formed. The transparent electrode layer 24 is further formed on the frosted layer 30. The transparent electrode layer 24 is made of ITO or the like. Further, the surface electrode layer 20 is disposed on the transparent electrode layer 24.

  In the frost treatment of the surface of the p-type AlGaInP layer 16, a dry frost treatment technique using a reactive ion etching (RIE) technique can be applied. Using the RIE dry frost treatment, the conditions of the substrate temperature T and the plasma power P (W) are obtained, and the uneven frost treatment layer 30 can be formed on the p-type AlGaInP layer 16 formed of the AlInGaP layer.

  According to the first embodiment, an uneven shape is formed on the surface of a p-type AlGaInP layer 16 formed of an AlInGaP layer by using RIE dry frost processing, and a semiconductor light emitting device with improved light extraction efficiency is provided. can do.

Note that the configuration of the p-type AlGaInP layer 16 is not limited to the configuration as a cladding layer. The p-type AlGaInP layer 16 may have a laminated structure of a cladding layer and a window layer. For example, when the MQW layer 14 emits red light, the cladding layer may be (Al _0.5 Ga _0.5 ) _0.5 In _0.5 P and the window layer may be (Al _x Ga _1-x ) _0.5 In _0.5 P (x> 0.5). good.

(Second Embodiment)
The schematic cross-sectional structure of the semiconductor light emitting device according to the second embodiment includes a DBR layer 13 between the substrate 10 and the n-type AlGaInP layer 12, as shown in FIG. The other configuration is the same as that of the first embodiment, and a duplicate description is omitted.

  The DBR layer 13 can be formed of any pair of AlInGaP / AlInP, GaAs / AlGaAs, and GaAs / AlInP, for example.

  As shown in FIG. 4, a schematic cross-sectional structure of the semiconductor light emitting device according to the modification of the second embodiment is such that the entire surface of the p-type AlGaInP layer 16 is frosted, and the uneven frosted layer 30 is formed. The transparent electrode layer 24 is further formed on the frosted layer 30. The transparent electrode layer 24 is made of ITO or the like. Further, the surface electrode layer 20 is disposed on the transparent electrode layer 24.

  In the frost process on the surface of the p-type AlGaInP layer 16, a dry frost process technique based on the RIE technique can be applied as in the first embodiment. Using the RIE dry frost treatment, the conditions of the substrate temperature T and the plasma power P (W) are obtained, and the uneven frost treatment layer 30 can be formed on the p-type AlGaInP layer 16 formed of the AlInGaP layer.

  According to the second embodiment, the concavo-convex shape is formed on the surface of the p-type AlGaInP layer 16 formed of the AlInGaP layer using RIE dry frost treatment, and further, between the substrate 10 and the n-type AlGaInP layer 12, The structure including the DBR layer 13 can provide a semiconductor light emitting device with improved light extraction efficiency.

(Third embodiment)
As shown in FIG. 5, a schematic cross-sectional structure of the semiconductor light emitting device according to the third embodiment includes a substrate 10, a metal layer 15 disposed on the substrate 10, a metal layer 15, and patterning. Metal contact layer 11 and insulating layer 17 formed, p-type AlGaInP layer (first cladding layer) 16 disposed on metal contact layer 11 and insulating layer 17, and p-type AlGaInP layer (first cladding layer) 16 Formed on the MQW layer 14, the n-type AlGaInP layer (second cladding layer) 12 disposed on the MQW layer 14, and the n-type AlGaInP layer (second cladding layer) 12. Frosted layer 30. The surface of the n-type AlGaInP layer (second clad layer) 12 is frosted to form a concavo-convex frosted layer 30.

  The substrate 10 is formed of GaAs, the n-type AlGaInP layer 12 and the p-type AlGaInP layer 16 are formed of AlInGaP layers, and the multiple quantum well layer 14 is formed of an InGaP / AlInGaP pair.

  A back electrode layer 22 is disposed on the back surface of the substrate 10, and a surface electrode layer 20 is disposed on the surface of the n-type AlGaInP layer 12. The front electrode layer 20 and the back electrode layer 22 are both formed of, for example, an Au layer.

  As shown in FIG. 6, the schematic cross-sectional structure of the semiconductor light emitting device according to the modification of the third embodiment is such that the entire surface of the n-type AlGaInP layer 12 is frosted, and the uneven frosted layer 30 is formed. The transparent electrode layer 24 is further formed on the frosted layer 30. The transparent electrode layer 24 is made of ITO or the like. Further, the surface electrode layer 20 is disposed on the transparent electrode layer 24.

  In the frost treatment of the surface of the n-type AlGaInP layer 12, a dry frost treatment technique based on the RIE technique can be applied. Using the RIE dry frost treatment, the conditions of the substrate temperature T and the plasma power P (W) are obtained, and the uneven frost treatment layer 30 can be formed on the n-type AlGaInP layer 12 formed of the AlInGaP layer.

  5 and 6, the metal layer 15 is formed of, for example, an Au layer, and has a thickness of about 2.5 to 5 μm, for example. The metal contact layer 11 is formed of, for example, an AuBe layer or an alloy layer of AuBe and Ni, and has a thickness that is about the same as that of the insulating layer 17 and about 450 nm. The insulating layer 17 is formed of, for example, a silicon oxide film, a silicon nitride film, a SiON film, a SiOxNy film, or a multilayer film thereof.

  Since the metal layer 15 made of an Au layer absorbs blue light and ultraviolet light, a metal buffer layer made of, for example, an Ag, Al, Ni, Cr, or W layer in order to reflect such short wavelength light. May be provided between the metal layer 15 and the metal contact layer 11 and the insulating layer 17.

  The semiconductor light emitting device according to the third embodiment can be formed using a bonding technique.

  By using the metal layer 15 and affixing an LED structure composed of a GaAs substrate 10 and an epitaxially grown layer, it is possible to form a metal reflective layer with good reflectivity. The metal reflection layer is formed by the metal layer 15. Since the mirror surface is formed by the interface between the insulating layer 17 and the metal layer 15, the emitted light from the LED is reflected on the mirror surface. The metal contact layer 11 is a layer for making an ohmic contact between the metal layer 15 and the p-type AlGaInP layer 16, is interposed at the interface between the metal layer 15 and the p-type AlGaInP layer 16, and is as thick as the insulating layer 17. Have

  When the pattern width of the metal contact layer 11 is wide, since a substantial light emitting region is limited, the area efficiency is lowered and the light emitting efficiency is reduced. On the other hand, when the pattern width of the metal contact layer 11 is narrow, the sheet resistance of the metal contact layer 11 increases and the forward voltage Vf of the LED increases, so that an optimum pattern width and pattern structure exist. In some pattern examples, there is a honeycomb pattern structure based on a hexagon or a dot pattern structure based on a circle. These pattern shapes will be described with reference to FIGS. 12 and 13 in relation to the fourth embodiment.

  In the semiconductor light emitting device according to the third embodiment, a metal layer (not shown) disposed on the GaAs substrate 10 and a metal layer 15 disposed on the LED side are both formed of an Au layer, thereby forming a GaAs substrate. The metal layer 15 on the LED structure side composed of a metal layer (not shown) on the 10 side and an epitaxial growth layer can be attached by thermocompression bonding.

  The pasting condition is, for example, about 250 ° C. to 700 ° C., desirably 300 ° C. to 400 ° C., and the pressure of thermocompression bonding is, for example, about 10 MPa to 20 MPa.

  According to the semiconductor light emitting device according to the third embodiment, the transparent insulating layer 17 is formed between the metal layer 15 serving as the metal reflection layer and the semiconductor layer such as the p-type AlGaInP layer 16, so that p It is possible to avoid contact between the semiconductor layer such as the type AlGaInP layer 16 and the metal layer 15, prevent light absorption, and form a metal reflective layer with good reflectivity.

  According to the third embodiment, a concavo-convex shape is formed on the surface of the n-type AlGaInP layer 12 formed of the AlInGaP layer using RIE dry frost treatment, and the metal layer 15 is used to form a metal with good reflectivity. By forming the reflective layer, a semiconductor light emitting device with improved light extraction efficiency can be provided.

The configuration of the n-type AlGaInP layer 12 is not limited to the configuration as a cladding layer. The n-type AlGaInP layer 12 may have a laminated structure of a clad layer and a window layer. For example, when the MQW layer 14 emits red light, the cladding layer may be (Al _0.5 Ga _0.5 ) _0.5 In _0.5 P and the window layer may be (Al _x Ga _1-x ) _0.5 In _0.5 P (x> 0.5). good.

(Fourth embodiment)
As shown in FIG. 7, a schematic cross-sectional structure of the semiconductor light emitting device according to the fourth embodiment includes a substrate 10 having a plurality of groove portions 40 formed on the surface, and a surface of the substrate 10 and sidewalls and bottom surfaces of the groove portions 40. The metal buffer layer 42 disposed, the metal layer 41 disposed on the metal buffer layer 42, the metal layer 15 disposed on the metal layer 41, and the metal contact layer disposed on the metal layer 15 and patterned. 11 and insulating layer 17, p-type AlGaInP layer (first cladding layer) 16 disposed on metal contact layer 11 and insulating layer 17, and MQW disposed on p-type AlGaInP layer (first cladding layer) 16. A layer 14 and an n-type AlGaInP layer (second cladding layer) 12 disposed on the MQW layer 14. The surface of the n-type AlGaInP layer (second clad layer) 12 is frosted to form a concavo-convex frosted layer 30.

  The substrate is formed of GaAs, the first cladding layer and the second cladding layer are formed of an AlInGaP layer, and the multiple quantum well layer is formed of an InGaP / AlInGaP pair.

  As shown in FIG. 8, a schematic cross-sectional structure of a semiconductor light emitting device according to a modification of the fourth embodiment is formed by frosting the entire surface of the n-type AlGaInP layer (second clad layer) 12 to form an uneven shape. The frosted layer 30 is formed, and a transparent electrode layer 24 is provided on the frosted layer 30.

  In the frost processing of the surface of the n-type AlGaInP layer (second clad layer) 12, a dry frost processing technology based on the RIE technology can be applied. Using the RIE dry frost process, the conditions of the substrate temperature T and the plasma power P (W) are obtained, and the uneven frosted layer 30 is formed on the n-type AlGaInP layer (second cladding layer) 12 formed of the AlInGaP layer. can do.

  7 and 8, the metal layer 15 is formed of, for example, an Au layer, and has a thickness of about 2.5 to 5 μm, for example. The metal contact layer 11 is formed of, for example, an AuBe layer or an alloy layer of AuBe and Ni, and has a thickness that is about the same as that of the insulating layer 17 and about 450 nm. The insulating layer 17 is formed of, for example, a silicon oxide film, a silicon nitride film, a SiON film, a SiOxNy film, or a multilayer film thereof.

  Since the metal layer 15 made of an Au layer absorbs blue light and ultraviolet light, a metal buffer layer made of, for example, an Ag, Al, Ni, Cr, or W layer in order to reflect such short wavelength light. May be provided between the metal layer 15 and the metal contact layer 11 and the insulating layer 17.

  As shown in FIG. 7, the GaAs substrate 10 applied to the semiconductor light emitting device according to the fourth embodiment has a plurality of groove portions 40 formed on the surface, and the surface of the GaAs substrate 10, the side walls and the bottom surface of the groove portion 40. A metal buffer layer 42 made of a titanium (Ti) layer and a metal layer 41 made of an Au layer arranged on the surface of the metal buffer layer 42.

  The semiconductor light emitting device according to the fourth embodiment can be formed by bonding the GaAs substrate 10 and the LED to each other by a bonding technique.

  A metal reflection layer is formed by the metal layer 15 disposed on the LED structure side. Since the mirror surface is formed by the interface between the p-type AlGaInP layer 16 and the metal layer 15, the emitted light from the LED is reflected on the mirror surface.

  As shown in FIG. 7, the semiconductor light emitting device according to the fourth embodiment is formed of a metal layer 41 on the GaAs substrate 10 side and an epitaxially grown layer by forming both the metal layer 41 and the metal layer 15 with an Au layer. The metal layer 15 on the LED structure side is pasted by thermocompression bonding, and an air gap exists between the metal layer 41 and the metal layer 15 in the groove.

  The pasting condition is, for example, about 250 ° C. to 700 ° C., desirably 300 ° C. to 400 ° C., and the pressure of thermocompression bonding is, for example, about 10 MPa to 20 MPa. By providing the air gap, the contact area between the metal layer 41 and the metal layer 15 is reduced as compared with the structure in which the entire surface is in close contact. As a result, the pressure of the thermocompression bonding is pressurized to the contact area between the metal layer 41 and the metal layer 15 whose contact area is relatively reduced by providing the air gap. When the layer 15 is thermocompression bonded, the bonding strength is increased. Therefore, when the GaAs substrate 10 and the LED structure are attached, the air gap exists, so that the adhesion between the metal layer 41 and the metal layer 15 disposed on the surface of the GaAs substrate 10 can be kept good.

  According to the semiconductor light emitting device according to the fourth embodiment, a metal is used for the reflective layer in order to prevent light absorption into the GaAs substrate 10 while maintaining good adhesion between the metal layer 41 and the metal layer 15. Thus, the light is totally reflected to prevent absorption into the GaAs substrate 10. As a material for the semiconductor substrate, in addition to GaAs, an opaque semiconductor substrate material such as Si can be used.

(Production method)
A method for manufacturing a semiconductor light emitting device according to the fourth embodiment will be described below.

(A) First, a GaAs substrate structure for pasting and an LED structure for pasting are prepared.

  First, stripe-shaped grooves having a predetermined pitch and width are formed on the surface of the GaAs substrate 10 by RIE technology or wet etching technology. The width of the stripe groove is, for example, about 10 μm, about 30 μm, or about 60 μm, and the pitch is, for example, about 100 μm, 200 μm, 410 μm, 1000 μm, or 2000 μm. The groove portion 40 is not limited to a stripe shape, and may be a lattice shape, a dot shape, a spiral shape, a hexagonal pattern shape, or the like. Further, the depth of the groove 40 may be the same as or shallower than the width of the stripe. Instead of the etching, a groove portion may be formed to a predetermined depth by applying a cutting technique using a laser beam, a cutting technique using a dicer, or the like using a YAG laser or the like.

(B) Further, a metal buffer layer 42 made of a titanium alloy and a metal layer 41 made of Au or the like are sequentially formed on the GaAs substrate 10 having a plurality of groove portions 40 formed on the surface by a sputtering method, a vacuum evaporation method, or the like.

(C) In the LED structure, the second cladding layer 12 and the MQW layer are formed on a GaAs substrate (not shown) by using molecular beam epitaxy (MBE), MOCVD (Metal Organic Chemical Vapor Deposition), or the like. 14 and the first cladding layer 16 are sequentially formed. Next, the metal contact layer 11 and the metal layer 15 are formed on the patterned insulating layer 17 on the first cladding layer 16 by using a lift-off method.

(D) Next, a GaAs substrate structure for pasting and an LED structure for pasting are pasted. In the attaching step, for example, using a press machine, the thermocompression bonding temperature is about 340 ° C., the thermocompression bonding pressure is about 18 MPa, and the thermocompression bonding time is about 10 minutes. As a result, as shown in FIG. 7, an air gap is formed between the metal layer 41 and the metal layer 15 of the groove 40.

(E) Next, as shown in FIG. 7, a back electrode layer 22 made of a titanium layer, Au, or the like is formed on the back surface of the GaAs substrate 10 by sputtering, vacuum evaporation, or the like.

(F) Next, after the back electrode layer 22 is protected with a resist or the like, the GaAs substrate (not shown) is removed by etching. For example, an etching solution composed of ammonia / hydrogen peroxide solution is used, and the etching time is about 65 to 85 minutes.

(G) Next, as shown in FIG. 7, the surface electrode layer 20 is formed on the n-type AlGaInP layer 12 by using a sputtering method, a vacuum deposition method, or the like, and then patterned. The pattern of the surface electrode layer 20 is substantially matched with the pattern of the insulating layer 17, but may be matched with the pattern of the metal contact layer 11. As a material of the surface electrode layer 20, a laminated structure made of, for example, Au / AuGe-Ni alloy / Au can be used.

(H) Next, RIE dry frost treatment is performed to perform surface treatment of the n-type AlGaInP layer 12 other than the n-type AlGaInP layer 12 formed of the AlInGaP layer immediately below the surface electrode layer 20. As conditions for the RIE dry frost treatment, the substrate temperature T is about 150 ° C. to about 250 ° C., and the plasma power P is about 200 W to 500 W.

  As a material of the metal buffer layer 42, for example, tungsten (W) barrier metal, platinum (Pt) barrier metal, or the like can be used instead of the titanium alloy.

  By the above description, as shown in FIG. 7, the semiconductor light emitting device according to the fourth embodiment using the GaAs substrate 10 having a plurality of groove portions 40 formed on the surface is completed.

  Further, in the method for manufacturing a semiconductor light emitting device according to the modification of the fourth embodiment, as shown in FIG. 8, the surface of the n-type AlGaInP layer 12 formed of the AlInGaP layer by performing the RIE dry frost process. After performing the treatment on the entire surface, a transparent electrode layer 24 made of ITO is formed. Furthermore, the structure of FIG. 8 can be formed by forming the surface electrode layer 20 on the transparent electrode layer 24.

(Plane pattern configuration)
9 to 11 show schematic planar pattern configuration examples of the semiconductor light emitting device according to the fourth embodiment.

  As shown in FIG. 9, the n-type AlGaInP layer 12 has, for example, a rectangular planar pattern, and the surface electrode layer 20 includes a central electrode 27 disposed at the center of the rectangular planar pattern, and the central electrode 27. And a peripheral electrode 25 connected to the coupling electrode 26 and disposed at four corners of the rectangle.

  The peripheral electrode 25 has an opening 28. In the example of FIG. 9, the opening 28 is rectangular.

  FIG. 10 shows another plane pattern configuration diagram of the surface electrode layer of the semiconductor light emitting device according to the fourth embodiment. FIG. 11 shows still another plane pattern configuration diagram of the surface electrode layer of the semiconductor light emitting device according to the fourth embodiment.

  As shown in FIG. 10, the opening 28 may be a perfect circle or a substantially circular shape, or may be an ellipse or an ellipse.

  Further, as shown in FIG. 11, the peripheral electrode 32 may include a portion orthogonal to the coupling electrode 26. A plurality of peripheral electrodes 32 may be arranged. When a plurality of peripheral electrodes are arranged, the lengths of the peripheral electrodes 32 may be different from each other.

  Further, although not shown here, the peripheral electrode 32 may be arranged in a fractal graphic structure.

(Planar pattern structure of the metal contact layer 11)
12 to 13 show schematic planar pattern configuration examples of the metal contact layer 11 and the insulating layer 17 of the semiconductor light emitting device according to the fourth embodiment.

  When the pattern width of the metal contact layer 11 is wide, since a substantial light emitting region is limited, the area efficiency is lowered and the light emitting efficiency is reduced. On the other hand, when the pattern width of the metal contact layer 11 is narrow, the sheet resistance of the metal contact layer 11 increases and the forward voltage Vf of the LED increases. For this reason, the optimum pattern width W and pattern pitch D1 exist. In some pattern examples, there is a honeycomb pattern structure based on a hexagon or a circular dot pattern structure based on a circular dot shape.

  A schematic planar pattern structure of the metal contact layer 11 applied to the semiconductor light emitting device according to the fourth embodiment has a honeycomb pattern structure having a hexagonal basic structure as shown in FIG. 12, for example. 12, the shape portion indicated by the pattern width W indicates the pattern of the metal contact layer 11 formed of, for example, an AuBe layer or an alloy layer of AuBe and Ni in FIG. 7, and the hexagonal pattern having the width D1 is It corresponds to the portion of the insulating layer 17 and represents a region where the emitted light from the LED is guided. The width D1 is about 100 μm, for example, and the pattern width W is about 5 μm to about 11 μm.

  Another schematic planar pattern structure of the metal contact layer 11 applied to the semiconductor light emitting element according to the fourth embodiment has a dot pattern structure based on a circle as shown in FIG. 13, for example. In FIG. 13, the shape portion indicated by the width d indicates the pattern of the metal contact layer 11 formed of, for example, an AuBe layer or an alloy layer of AuBe and Ni in FIG. 7, and is arranged at a pattern pitch having a width D2. Yes. In FIG. 13, a region other than the circular pattern portion having the width d and the pattern pitch D2 corresponds to the portion of the insulating layer 17 and represents a region where the emitted light from the LED is guided. The pattern pitch D2 is about 100 μm, for example, and the width d is about 5 μm to about 11 μm.

  Further, the schematic planar pattern structure of the metal contact layer 11 applied to the semiconductor light emitting device according to the fourth embodiment of the present invention is not limited to a hexagonal honeycomb pattern or a circular dot pattern, but a triangular pattern. A random pattern in which a rectangular pattern, a hexagonal pattern, an octagonal pattern, a circular dot pattern, etc. are randomly arranged can also be applied.

  The schematic planar pattern structure of the metal contact layer 11 applied to the semiconductor light emitting element according to the fourth embodiment of the present invention ensures the area of the light guide region and does not decrease the light emission luminance from the LED. It is only necessary to secure a metal wiring pattern width that does not increase the forward voltage Vf of the LED.

In the semiconductor light emitting device according to the fourth embodiment, the light emission characteristics of the light output intensity Po (W) and the forward current I _F (mA) as a result of trial manufacture of a sample having a device area of 0.38 mm square are shown in FIG. As shown, there is an improvement of about 25% before and after the dry frost treatment. By performing the dry frost process on the second clad layer 16 formed of the AlInGaP layer, the uneven frosted layer 30 can be formed, the light refraction effect can be enhanced, and the light extraction efficiency can be increased.

(Dry frost processing conditions)
In the semiconductor light emitting device according to the fourth embodiment, the relationship between the substrate temperature T (° C.) and the luminous intensity increase rate R (%) during the dry frost process is expressed as shown in FIG. When the substrate temperature T is in the range of 150 ° C. to 250 ° C., the luminous intensity increase rate R is improved. In particular, when the substrate temperature T is about 200 ° C., R = 50% is obtained.

  In FIG. 15, the surface SEM photograph of the semiconductor light emitting device according to the fourth embodiment when the substrate temperature T = 200 ° C. is expressed as shown in FIG. A frosted layer is obtained.

In the semiconductor light emitting device according to the fourth embodiment, the relationship between the plasma power P (W) and the luminous intensity increase rate R (%) during the dry frost process is expressed as shown in FIG. At the operating point A, the luminous intensity increase rate R = 30% at the plasma power P = 200 W, at the operating point B, the luminous intensity increase rate R = 40% at the plasma power P = 300 W, and at the operating point C, the plasma power P = 400 W. The luminous intensity increase rate R = 50%, and at the operating point D, the luminous intensity increase rate R = 20% is obtained at the plasma power P = 500 W. A peak value is obtained at plasma power P = 400 W. As an etching gas in the RIE dry frost process, for example, a chlorine-based gas such as Cl ₂ or SiCl ₄ can be used.

  In FIG. 17, surface SEM photographs of the semiconductor light emitting elements corresponding to the operating points A to D are represented as shown in FIGS. 18 (a) to 18 (d), respectively.

  When the substrate temperature T is as high as 250 ° C., even if the plasma power P is changed from 200 W to 500 W, the second cladding layer 16 formed of the AlInGaP layer is almost isotropically etched in the RIE dry frost process. It is difficult to obtain an uneven shape. In addition, when the substrate temperature T is as low as 150 ° C., the n-type AlGaInP layer 12 formed of the AlInGaP layer is not etched in the RIE dry frost process even if the plasma power P is changed from 200 W to 500 W.

  On the other hand, when the substrate temperature T is about 200 ° C., when the plasma power P is changed from 200 W to 500 W, the n-type AlGaInP layer 12 formed of the AlInGaP layer has an uneven shape in the RIE dry frost process. Can be obtained.

  According to the fourth embodiment, a concavo-convex shape is formed on the surface of the n-type AlGaInP layer 12 formed of the AlInGaP layer by using RIE dry frost treatment, and further, a GaAs substrate structure and an LED structure are formed by using a bonding technique. In order to prevent adhesion of light to the GaAs substrate, it can be applied while maintaining good adhesion, and light is totally reflected using a metal for the reflective layer, preventing absorption to the GaAs substrate, and light at all angles. Therefore, it is possible to provide a semiconductor light emitting device with improved light extraction efficiency.

(Other embodiments)
As described above, the present invention has been described according to the first to fourth embodiments. However, it should not be understood that the description and drawings constituting a part of this disclosure limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

  In the first to second embodiments, examples are disclosed in which the conductivity type of the substrate 10 and the first cladding layer 12 is n-type, and the conductivity type of the second cladding layer 16 is p-type. The conductivity type may be reversed.

  In the third to fourth embodiments, examples are disclosed in which the conductivity type of the substrate 10 and the first cladding layer 16 is p-type, and the conductivity type of the second cladding layer 12 is n-type. These conductivity types may be reversed.

  Also in the second and fourth embodiments, similarly to the first and third embodiments, the p-type AlGaInP layer 16 and the n-type AlGaInP layer 12 may have a laminated structure of a cladding layer and a window layer. .

  In the first to fourth embodiments, examples in which a GaAs substrate is mainly applied as the substrate 10 are disclosed, but a silicon substrate, a SiC substrate, a GaP substrate, a sapphire substrate, or the like can also be applied. is there.

  The first cladding layer 12 and the second cladding layer 16 may be formed of, for example, an AlGaAs layer, and the MQW layer 14 may be formed by stacking heterojunction pairs made of, for example, a GaAs / GaAlAs layer.

  As described above, the present invention naturally includes various embodiments not described herein. Therefore, the technical scope of the present invention is defined only by the invention specifying matters according to the scope of claims reasonable from the above description.

  The semiconductor light emitting device and the method for manufacturing the same according to the present invention can be used for semiconductor light emitting devices such as LED devices and LD devices having an opaque substrate such as a GaAs substrate or Si substrate.

10 ... Substrate 11 ... Metal contact layer (AuBe-Ni alloy)
DESCRIPTION OF SYMBOLS 12, 16 ... Cladding layer 13 ... Distributed black reflection (DBR) layer 14 ... Multiple quantum well (MQW) layer 15, 41 ... Metal layer (Au layer)
DESCRIPTION OF SYMBOLS 17 ... Insulating layer 20 ... Front electrode layer 22 ... Back electrode layer 24 ... Transparent electrode layer 25, 32 ... Peripheral electrode 26 ... Coupling electrode 27 ... Center electrode 28 ... Opening part 30 ... Frost process layer 40 ... Groove part 42 ... Metal buffer layer (Ti alloy)

Claims (16)

Forming a first cladding layer on the substrate;
Forming a multiple quantum well layer on the first cladding layer;
Forming a second cladding layer on the multiple quantum well layer;
A surface treatment of the second cladding layer is performed by performing a frost treatment using a chlorine-based etching gas at a substrate temperature in a range of 150 ° C. to 250 ° C., and an AlInGaP layer is formed on the surface of the second cladding layer. Forming a frosted layer. A method for manufacturing a semiconductor light emitting device, comprising:   The method of manufacturing a semiconductor light emitting element according to claim 1, further comprising a step of forming a transparent electrode layer on the frosted layer after the frosting process.   The substrate is formed of GaAs, the first cladding layer and the second cladding layer are formed of an AlInGaP layer, and the multiple quantum well layer is formed of an InGaP / AlInGaP pair. A method for producing a semiconductor light emitting device according to 1 or 2. Further comprising forming a distributed black reflective layer on the substrate;
4. The method of manufacturing a semiconductor light emitting element according to claim 1, wherein in the step of forming the first cladding layer, the first cladding layer is formed on the distributed black reflective layer. 5. .   5. The method of manufacturing a semiconductor light emitting device according to claim 4, wherein the distributed black reflective layer is formed of any pair of AlInGaP / AlInP, GaAs / AlGaAs, and GaAs / AlInP. Preparing a substrate structure for pasting and a light emitting diode structure for pasting;
Forming a first metal layer on the substrate in the substrate structure;
In the light emitting diode structure, a step of sequentially forming a second cladding layer, a multiple quantum well layer, and a first cladding layer on a GaAs substrate;
Forming a metal contact layer and a second metal layer on the patterned cladding layer on the first cladding layer;
The step of attaching the substrate structure for attachment and the LED structure for attachment by thermocompression bonding of the first metal layer and the second metal layer;
Removing the GaAs substrate by etching;
A surface treatment of the second cladding layer is performed by performing a frost treatment using a chlorine-based etching gas at a substrate temperature in a range of 150 ° C. to 250 ° C., and an AlInGaP layer is formed on the surface of the second cladding layer. Forming a frosted layer. A method for manufacturing a semiconductor light emitting device, comprising:   The method of manufacturing a semiconductor light-emitting element according to claim 6, further comprising a step of forming a transparent electrode layer on the frost-treated layer after the frost treatment.   The substrate is formed of GaAs, the first cladding layer and the second cladding layer are formed of an AlInGaP layer, and the multiple quantum well layer is formed of an InGaP / AlInGaP pair. 8. A method for producing a semiconductor light emitting device according to 6 or 7. Preparing a substrate structure for pasting and a light emitting diode structure for pasting;
In the substrate structure, a plurality of grooves are formed on the substrate, a metal buffer layer is formed on a surface of the substrate, a sidewall of the groove, and a bottom surface of the groove, and a first metal layer is formed on the metal buffer layer. Process,
In the light emitting diode structure, a step of sequentially forming a second cladding layer, a multiple quantum well layer, and a first cladding layer on a GaAs substrate;
Forming a metal contact layer and a second metal layer on the patterned cladding layer on the first cladding layer;
The step of attaching the substrate structure for attachment and the LED structure for attachment by thermocompression bonding of the first metal layer and the second metal layer;
Removing the GaAs substrate by etching;
A surface treatment of the second cladding layer is performed by performing a frost treatment using a chlorine-based etching gas at a substrate temperature in a range of 150 ° C. to 250 ° C., and an AlInGaP layer is formed on the surface of the second cladding layer. Forming a frosted layer. A method for manufacturing a semiconductor light emitting device, comprising:   The method for manufacturing a semiconductor light-emitting element according to claim 9, further comprising a step of forming a transparent electrode layer on the frost-treated layer after the frost treatment.   The substrate is formed of GaAs, the first cladding layer and the second cladding layer are formed of an AlInGaP layer, and the multiple quantum well layer is formed of an InGaP / AlInGaP pair. The manufacturing method of the semiconductor light-emitting device of 9 or 10.   10. The method of manufacturing a semiconductor light emitting element according to claim 1, wherein the frost treatment is performed at a substrate temperature of 200 ° C. 10.   10. The method for manufacturing a semiconductor light emitting element according to claim 1, wherein the frost treatment is performed with a plasma power in a range of 200 W to 500 W. 10.   The method for manufacturing a semiconductor light-emitting element according to claim 1, wherein the frost treatment is performed with the plasma power set to 400 W. 10. The method of manufacturing a semiconductor light emitting device according to claim 1, wherein the chlorine-based etching gas is Cl ₂ or SiCl ₄ . Before performing the frost treatment, further comprising a step of patterning a surface electrode layer on the second cladding layer;
The frost treatment layer (30) is formed by performing the frost treatment on the surface of the second clad layer other than the second clad layer directly below the surface electrode layer. 10. A method for manufacturing a semiconductor light emitting device according to any one of items 6 and 9.