JP5611568B2 - Power supply circuit and image forming apparatus - Google Patents

Description

  BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply device that supplies power to an image forming apparatus, and relates to a power supply circuit that reduces power consumption when a load of a power output such as a standby state or a sleep state of the image forming apparatus is no load or light load The present invention also relates to an image forming apparatus including the power supply circuit.

  In an image forming apparatus having an image forming means for forming an image on a conventional recording medium, various DC actuators such as a DC motor are used, and an AC power source is often used as a main power source. Various power supply apparatuses for an image forming apparatus that rectify the generated voltage and output a voltage corresponding to a DC actuator and a DC voltage for logic that performs control and control have been proposed.

  In such a power supply device, a dummy current is supplied at no load and at a light load so that the output voltage of the auxiliary winding becomes an appropriate level, and the dummy current is cut off at a large load that does not require the dummy current. In some cases, the efficiency of the switching regulator is improved (for example, see Patent Document 1).

JP-A-6-178535 (paragraphs “0012” to “0015”, FIG. 1)

  However, the above-described conventional technique only saves power consumption in the operation state, and cannot save power consumption in the standby state and the sleep state, which occupy the most time in the normal use state of the image forming apparatus. There's a problem.

  An object of the present invention is to solve such a problem, and it eliminates unnecessary power waste when the load of a power supply output such as a standby state or a sleep state is no load or light load, thereby reducing power consumption. It is an object to provide a power supply circuit and an image forming apparatus including the power supply circuit.

Therefore, the present invention provides a power rectifier that rectifies an AC voltage input from the outside and outputs a DC voltage, a transformer that converts the voltage output from the power rectifier, and a voltage converted by the transformer A secondary rectifying unit that rectifies and smoothes the output, a feedback unit that outputs a feedback signal according to a result of comparing the output voltage of the secondary rectifying unit and a reference voltage, and a feedback signal output by the feedback unit A pulse width control unit that outputs a switching drive signal based on the control signal, and a switching operation time of the DC voltage output from the power supply rectification unit based on the switching drive signal to control a voltage applied to the transformer unit. DCD which converts the voltage output from the switching unit and the secondary rectification unit into a predetermined voltage lower than the voltage and outputs the converted voltage A conversion unit; a control unit to which an output voltage from the DCDC conversion unit is supplied; and a feedback constant of the feedback unit is switched based on a control signal output from the control unit to change an output voltage of the secondary rectification unit. Output voltage switching means for switching to the first output voltage or the second output voltage, and the DCDC converter includes a first switching element and a second switching element that switches the first switching element to a conductive state. And a rectifying / smoothing circuit for rectifying and smoothing the output of the first switching element, and controlling the switching time of the first switching element when the second switching element is non-conductive. a high voltage is stepped down output was, when the second switching element is conductive, the by the second switching element a And outputs as the input voltage by the switching element to a conducting state of the.

  The present invention thus configured has an effect that power consumption can be reduced by eliminating unnecessary power consumption when the load of the power supply output in the standby state or the sleep state is no load or light load. .

The block diagram which shows the structure of the power supply circuit in a 1st Example. Explanatory drawing which shows the structure of the feedback part and pulse width control part in 1st Example. 1 is an external perspective view of an image forming apparatus according to a first embodiment. 1 is a schematic cross-sectional view illustrating a configuration of an image forming apparatus according to a first embodiment. 1 is a block diagram showing a control configuration of an image forming apparatus according to a first embodiment. Time chart showing the operation of the image forming apparatus in the first embodiment The block diagram which shows the structure of the power supply circuit in a 2nd Example. Explanatory drawing which shows the structure of the DCDC conversion part in 2nd Example. Time chart showing the operation of the image forming apparatus in the second embodiment The block diagram which shows the structure of the power supply circuit in a prior art example Explanatory drawing which shows the structure of the feedback part and pulse width control part in a prior art example Explanatory drawing which shows the structure of the DCDC conversion part in a prior art example.

  Hereinafter, embodiments of a power supply circuit and an image forming apparatus according to the present invention will be described with reference to the drawings.

  FIG. 3 is an external perspective view of the image forming apparatus according to the first embodiment, and FIG. 4 is a schematic cross-sectional view illustrating the configuration of the image forming apparatus according to the first embodiment. The image forming apparatus 101 in FIGS. 3 and 4 is, for example, a tandem printer.

  In FIG. 4, the image forming apparatus 101 includes an image forming unit 107, a paper feeding unit 116, and a fixing unit 104, so that an image can be formed on a recording sheet (hereinafter referred to as “paper”) S. It has become.

  Hereinafter, the configuration of the image forming apparatus 101 will be described according to the flow of the printing operation.

  The conveyance of the sheet S is performed by the sheet feeding unit 116 described above. The paper feeding unit 116 includes a paper feeding cassette 121, a paper feeding roller 122, a registration roller 123, and the like. The paper S carried out of the paper feeding cassette 121 by the rotation of the paper feeding roller 122 is sent to the registration roller 123. Further, the toner is fed on the transfer conveyance belt 115 and reaches the image forming unit 107 for each color.

  The image forming unit 107 is configured by mounting four image forming units 103 for each color. As shown in FIG. 4, the four image forming units 103 are black (K), yellow (Y), magenta (M), and cyan (C) from the right side (upstream) to the left side (downstream). Are arranged in this order. Further, the image forming unit 103 is mounted with toner cartridges 102 (102K, 102Y, 102M, 102C) corresponding to the respective colors. The image forming unit 103 and the toner cartridge 102 are separable, and each toner cartridge 102 (102K, 102Y, 102M, 102C) has the same configuration except for the stored developer (color). . Further, each image forming unit 103 has a structure in which the print head 117 abuts by closing the cover 119.

  In the image forming unit 103, a photosensitive drum 110, a charger 111, a developing roller 112, and a cleaner 113 are accommodated. The peripheral surface of the photosensitive drum 110 is made of a photoconductive material. A charger 111 for charging the peripheral surface of the photosensitive drum 110 is provided in the vicinity of the peripheral surface of the photosensitive drum 110, and a developer is added to the photosensitive drum 110. And a cleaner 113 for scraping off the developer remaining on the photosensitive drum 110 are sequentially disposed. The transfer unit 114 is in contact with the photosensitive drum 110 via the transfer conveyance belt 115 to form a transfer unit.

  The photosensitive drum 110 rotates in the paper transport direction, and first, the peripheral surface thereof is uniformly charged by applying a charge from the charger 111. Then, an electrostatic latent image is formed on the peripheral surface of the photosensitive drum 110 by optical writing based on print information from the print head 117, and a toner image is formed by development processing by the developing roller 112. At this time, the toner image formed on the peripheral surface of the photosensitive drum 110 is the toner of each color stored in the toner cartridge 102. The toner image formed on the peripheral surface of the photosensitive drum 110 in this way reaches the position of the transfer unit 114 as the photosensitive drum 110 rotates in the direction of the arrow in the drawing, and shows a position directly below the photosensitive drum 110. Transferred onto the sheet S moving in the direction of the middle arrow. Then, the toner image is transferred onto the upper surface of the paper S, and printing is performed.

  Then, the sheet S on which the toner image formed on the peripheral surface of the photosensitive drum 110 is transferred in each transfer unit moves on the transfer conveyance belt 115 in the direction of the arrow in accordance with the movement of the transfer conveyance belt 115, and is fixed. A heat fixing process is performed in the apparatus 104.

  While the sheet S is nipped and conveyed between the heating roller 106 and the pressure roller 105 of the fixing device 104, the toner images of a plurality of colors transferred to the sheet S are melted and thermally fixed to the sheet S. The sheet S on which the toner image is fixed by the fixing device 104 is conveyed to the discharge unit 109 and then discharged, or is conveyed to the double-sided printing unit 108 via the switching plate 120 for double-sided printing. An image is formed on the opposite side of the sheet S by the forming unit 107.

  FIG. 5 is a block diagram showing a control configuration of the image forming apparatus in the first embodiment.

  In FIG. 5, the control unit 9 is composed of a drive system circuit unit 90 and a logic (logic) system circuit unit 91.

  The main components of the logic system circuit unit 91 include a CPU (Central Processing Unit) 40 as a control control, a RAM (Random Access Memory) 41 and a ROM (Read Only Memory) 42 as storage means. The CPU 40 is connected to various sensors 44 and the operation board 43 and is connected to the drive circuit 50 of the drive system circuit unit 90, and a signal for drive control is output to the drive circuit 50.

  Here, the ROM 42 stores various programs such as a control program (software) relating to an image forming operation in the image forming unit 107. The CPU 40 reads a necessary program from the ROM 42 and controls the operations of the image forming unit 107, the paper feeding unit 116, and the fixing unit 104 in an integrated manner to execute an image forming operation. The RAM 41 is used as a work area (work area) when the CPU 40 executes the control program. The DC voltage used in the logic system circuit unit 91 of the control unit 9 is 5V.

  The drive system circuit unit 90 includes the above-described drive circuit 50 and actuators that operate according to drive signals output from the drive circuits. The actuators include a paper feed motor 45, a transport motor 46, a belt motor 47, a fixing motor 48, a development drive motor 49, and the like. The actuators are for driving the constituent members described with reference to FIG. The driving system circuit unit 90 of the control unit 9 uses a driving DC voltage of 24V.

  The DC voltage 5V supplied to the logic system circuit unit 91 of the control unit 9 configured as described above and the driving DC voltage 24V supplied to the drive system circuit unit 90 are supplied by a power supply circuit described later.

  In addition, the control unit 9 includes a timing unit such as a timer for measuring the passage of time, and waits for a predetermined time after the transition to the standby state after completion of the initial operation and the image forming operation when the power is turned on. It is assumed that the state shifts to the sleep state. In addition, when an operation instruction such as a print instruction is received by an operation of a host device or an operator in a standby state or a sleep state, the state is shifted to the operation state.

  In the above operating state, the DC voltage 5V is supplied to the logic system circuit unit 91 and the driving DC voltage 24V is supplied to the driving system circuit unit 90. On the other hand, in the standby state or the sleep state, the DC voltage 5V is supplied to the logic system circuit unit 91. And the driving system circuit unit 90 is not supplied with the driving DC voltage 24V.

  In this embodiment, the operation state refers to a state in which the image forming apparatus is operating in response to an operation instruction such as a print instruction by an operation of a host device or an operator, and the standby state refers to image formation. If the device is not in operation and if it receives an operation instruction such as print data, it means that it is waiting in a state where it can be printed immediately, and the sleep state is the state after entering the standby state. This is a state where a preparatory operation is necessary to perform a printing operation after a predetermined time has elapsed and an operation instruction such as print data has been received, and is a state where the operation has been suspended from the standby state.

  FIG. 1 is a block diagram showing the configuration of the power supply circuit in the first embodiment.

  In FIG. 1, a power supply circuit 200 switches a power supply rectifier 1 that rectifies an AC AC voltage input from the outside and a DC voltage output from the power rectifier 1 by a switching operation. The switching unit 2 supplied to the secondary side (input winding side) and the rectangular wave induced on the secondary side (output winding side) of the transformer 4 are rectified to output a DC voltage to the load device 2 The secondary rectifier 5 compares the output voltage of the secondary rectifier 5 with the reference voltage, and outputs a control signal (feedback signal) according to the comparison result, and the feedback unit 6 outputs The pulse width control unit 3 outputs a switching drive signal to the switching unit 2 in accordance with the control signal, that is, the feedback amount of the output voltage of the secondary rectification unit 5.

  The switching unit 2 changes the operation time for switching the DC voltage output from the power supply rectifying unit 1 based on the switching drive signal output from the pulse width control unit 3 and applies a voltage to be applied to the primary side of the transformer 4. Change.

  Further, since the power supply circuit 200 is a power supply configured to supply outputs of a plurality of voltages, the DCDC converter 7 that converts the voltage output from the secondary rectifier 5 into a predetermined voltage that is different (low) from the voltage. Is connected to the output of the secondary rectifier 5, the output of the DCDC converter 7 is connected to the input of the logic circuit 91 of the controller 9, and the output of the secondary rectifier 5 is the drive circuit 90. Connected to the input.

  As described above, the DC voltage outputs from the secondary rectifier 5 and the DCDC converter 7 are respectively supplied to the logic circuit 91 and the drive circuit 90 of the controller 9 described in detail above.

  Note that a switching signal S <b> 1 as a control signal for switching a feedback constant is output from the output terminal of the control unit 9 to the feedback unit 6.

  FIG. 2 is an explanatory diagram showing the configuration of the feedback section and the pulse width control section in the first embodiment.

  2, the feedback unit 6 includes a shunt regulator 16 serving as a reference voltage, and voltage dividing resistors 13a, 13b, and 13c that generate a detection voltage from the output voltage of the secondary rectifying unit 5, and the voltage dividing resistors 13a, The detection voltage generated by the resistance voltage division by 13b and 13c is input to the reference terminal of the shunt regulator 16 as a comparison voltage.

  The shunt regulator 16 is connected in series with a limiting resistor 14 for limiting the current flowing to the photodiode 17 a of the photocoupler 17 via the photocoupler 17.

  The pulse width control unit 3 includes a phototransistor 17b of the photocoupler 17 and a control element 18 for converting the output of the phototransistor 17b into a pulse width. An output of the control element 18 is connected to an FET (Field Effect Transistor) 20 of the switching unit 2 through a limiting resistor 19.

  Here, the pulse width control unit 3 is an element that controls the on / off time interval of the switching unit 2 to obtain a stable output voltage. When a current is supplied to the photodiode 17a of the photocoupler 17, a current flows to the base of the phototransistor 17b by light, a current flows from the collector end to the emitter end, and the photocoupler 17 is turned on. Thus, on / off switching is performed by supplying current to the photodiode 17a of the photocoupler 17. At this time, the photodiode 17a and the phototransistor 17b are electrically insulated from each other.

  In addition, a transistor 11 is connected in parallel to the voltage dividing resistor 13a, a bias resistor 12 and a limiting resistor 10 are connected to the base portion of the transistor 11, and a feedback constant switching signal is supplied from the control unit 9 to the limiting resistor 10. When S1 is input and the switching signal S1 is switched to Low level or High level, the transistor 11 is switched on / off (output voltage switching means).

  By switching on / off of the transistor 11, the detection voltage as a food back constant input to the reference terminal of the shunt regulator 16 can be switched.

  10 is a block diagram showing the configuration of the power supply circuit in the conventional example, FIG. 11 is an explanatory diagram showing the configurations of the feedback unit and the pulse width control unit in the conventional example, and the conventional feedback unit 6 includes a voltage dividing resistor. The transistor for switching on / off of the voltage dividing resistor 13a does not exist in parallel with 13a. In this embodiment, the transistor 11 of the feedback unit 6 is switched according to the feedback constant switching signal S1 from the control unit 9. It is configured to switch on / off.

  The operation of the above configuration will be described.

  First, the operation of the power supply circuit will be described with reference to FIGS.

  In the power supply circuit 200, an AC voltage (AC input) input from the outside is rectified and smoothed by the power rectifier 1 and output to the switching unit 2 as a DC voltage. The switching unit 2 is turned on / off under the control of the feedback unit 6 and the pulse width control unit 3 to switch the output voltage of the power supply rectification unit 1 and supply it to the primary side of the transformer 4.

  The rectangular wave induced on the secondary side of the transformer 4 is rectified and smoothed as a DC voltage by the secondary rectifying unit 5 and outputted, and this output is converted into a DC voltage of another voltage by the DCDC converting unit 7 to load. Output as the power supply of the device.

  In this embodiment, the voltage output from the secondary rectifier 5 is 24V, and the voltage output by converting the 24V output by the DCDC converter 7 is 5V. The 24V output output from the secondary rectifying unit 5 is supplied to the drive system circuit unit 90 shown in FIGS. 1 and 5, and the 5V output converted and output by the DCDC converter 7 is the logic shown in FIGS. 1 and 5. It is supplied to the system circuit unit 91.

  Further, the output voltage of the secondary rectifying unit 5 is applied to the feedback unit 6. The feedback unit 6 compares the reference voltage of the shunt regulator 16 with the detection voltage output from the voltage dividing resistors 13a, 13b, and 13c in order to maintain a constant voltage at all times, and the output voltage of the secondary rectifying unit 5 is When the voltage is higher or lower than the reference voltage, a control signal is output to the pulse width control unit 3 to adjust the switching on / off operation time of the switching unit 2.

  Thus, the feedback unit 6 outputs the feedback control signal to the pulse width control unit 3 so that the output voltage of the secondary rectification unit 5 becomes the reference voltage, and the pulse width control unit 3 switches the switching unit based on the feedback control signal. By controlling the ON / OFF time of the switching operation 2, the output voltage of the secondary rectifying unit 5 is always set to a constant voltage (first output voltage). In this embodiment, this voltage is 24V.

  On the other hand, when the image forming apparatus 101 serving as the load device is in a standby state or a sleep state, the 24V output is used as a drive voltage for actuators, and thus is a voltage that is not substantially used in this state.

  Therefore, the control unit 9 outputs the switching signal S1 at the low level, and turns on the transistor 11 via the limiting resistor 10. In this case, the detection voltage compared with the reference voltage by the shunt regulator 16 is higher than that in the normal case where the transistor 11 is off. An increase in the detection voltage as a feedback constant means that the output voltage applied to the transformer 4 is controlled to be low and stable, and as a result, the output voltage of the secondary rectifier 5 is reduced to a lower voltage (second Output voltage). In this case, the output voltage of the secondary rectification unit 5 is converted to 5V by the DCDC conversion unit 7, and therefore, in the present embodiment, it is output as, for example, 6V in the sense that there is no problem in the conversion.

  As described above, in the standby state or the sleep state, the supply voltage to the logic system circuit unit 91 remains 5V, but the supply voltage to the drive system circuit unit 90 is decreased from 24V to 6V.

  As a result, the drive system circuit unit 90 of the control unit 9 of the image forming apparatus 101 reduces the supply voltage to 6 V as compared with the state where 24 V is applied during driving and the current corresponding to the impedance of the drive circuit 50 is consumed. Therefore, the current consumption can be simply reduced to a quarter of 24V / 6V. This indicates that the power consumption (voltage × current) can be reduced to 1/16. Further, since the current consumption is reduced, heat generation in the power supply unit and heat generation in the drive circuit unit are also reduced.

  Next, the operation sequence of the power supply circuit will be described with reference to FIG. 1 based on the time chart showing the operation of the image forming apparatus in the first embodiment of FIG.

  In FIG. 6, when the image forming apparatus 101 is powered on (M0), the voltage supplied to the drive system circuit unit 90 is 24V, and the voltage supplied to the logic system circuit unit 91 is 5V.

  After the image forming apparatus 101 is turned on and completes the initial operation or the printing operation, the control unit 9 switches the switching signal S1 from the high level to the low level when shifting to the standby state or the sleep state (M1). When the switching signal S1 becomes low level, the power supply circuit 200 decreases the voltage supplied to the drive system circuit unit 90 from 24V to 6V. Note that the voltage supplied to the logic circuit unit 91 remains 5V.

  When the image forming apparatus 101 returns from the standby state or the sleep state to the operating state, the control unit 9 switches the switching signal S1 from the Low level to the High level (M2). When the switching signal S1 becomes High level, the power supply circuit 200 restores the voltage supplied to the drive system circuit unit 90 from 6V to 24V.

  As described above, in the first embodiment, when the image forming apparatus is in the standby state or the sleep state, the feedback unit is provided as a means for reducing the unnecessary output voltage on the secondary side. It is possible to reduce the power consumption of the load, and the effect that the power supply efficiency can be improved is obtained.

  FIG. 7 is a block diagram showing the configuration of the power supply circuit in the second embodiment, and FIG. 8 is an explanatory diagram showing the configuration of the DCDC converter in the second embodiment. Note that parts similar to those of the first embodiment described above are denoted by the same reference numerals and description thereof is omitted.

  In FIG. 7, the DCDC converter 71 of the power supply circuit 200 is configured to receive a switching signal S <b> 2 that becomes a high level from the controller 9 when in a standby state or a sleep state.

  In FIG. 8, the DCDC converter 71 receives the DC voltage (24V) output from the secondary rectifier 5 and converts the DC voltage to 5V.

  The DC voltage output from the secondary rectifier 5 is input to the FET 23 as a switching element. The output of the DCDC controller 21 is connected to the gate of the FET 23 via the limiting resistor 22, controls the switching time of the FET 23, and controls the output voltage. A bias resistor 31 is connected to the gate of the FET 23.

  Further, the GND terminal of the DCDC control 21 is applied with a voltage of 0V, and the Vin terminal is applied with 24V as a circuit power supply of the DCDC controller 21.

  The output of the FET 23 is connected to a choke coil 24 and a rectifier diode 25. The output of the choke coil 24 is connected to a smoothing capacitor 28, and performs rectification / smoothing operation after switching by the FET 23 as a whole. Further, voltage dividing resistors 29 and 30 are connected to the output of the choke coil 24 to detect the voltage after rectification. The detection voltage divided by the voltage dividing resistors 29 and 30 is input to the feedback (FB) terminal of the DCDC controller 21, and the switching time of the FET 23 is switched by this voltage. As a result, the voltage is controlled to a constant voltage. Become.

  Further, the transistor 26 is connected to the output line to the gate of the FET 23 of the DCDC controller 21 so as to be short-circuited to 0 V (bypass means), and the base of the transistor 26 is switched from the control unit 9 via the limiting resistor 27. A signal (control signal for operating / stopping the bypass means) S2 is input.

  FIG. 12 is an explanatory diagram showing the configuration of the DCDC converter in the conventional example. This configuration differs from the configuration of the present embodiment in that there is no transistor that shorts the output of the DCDC controller 21.

  The operation of the above configuration will be described.

  When the image forming apparatus 101 is in the standby state or the sleep state, the feedback unit 6 of the power supply circuit 200 switches the voltage detection by the switching signal S1 from the control unit 9 as in the first embodiment, and the secondary rectifying unit 5 Switch the output voltage. However, unlike the first embodiment, in this embodiment, the feedback unit 6 switches the output voltage of the secondary rectification unit 5 to 5 V, which is the same as the voltage 5 V output from the DCDC converter 71.

  This operation will be described with reference to FIGS. 7 and 8 based on the time chart showing the operation of the image forming apparatus in the second embodiment of FIG.

  In FIG. 9, when the image forming apparatus 101 is turned on (M0), the voltage supplied to the drive system circuit unit 90 is 24V, and the voltage supplied to the logic system circuit unit 91 is 5V.

  After the image forming apparatus 101 is turned on and completes the initial operation or the printing operation, the control unit 9 switches the switching signal S1 from the high level to the low level when shifting to the standby state or the sleep state (M1).

  Thereby, as described above, the output voltage of the secondary rectification unit 5 is reduced from 24V to 5V. At this time, the output voltage of 24V drops to 5V, and it is necessary to elapse time T1 until it becomes stable. Further, at the timing TA before the output voltage is stabilized at 5V, there is a possibility that an undershoot occurs in which the output voltage is momentarily reduced to 5V or less.

  For this reason, the control unit 9 waits for the elapse of a time T2 greater than the elapsed time T1 since the switching signal S1 was switched to the low level, that is, after the output voltage of the secondary rectification unit 5 is completely stabilized at 5V, The switching signal S2 of the DCDC converter 71 is switched from the Low level to the High level and output, and the transistor 26 is turned on. When the transistor 26 is turned on, 0V is applied to the gate of the FET 23, so that the FET 23 is turned on.

  Therefore, when the switching signal S2 of the DCDC conversion unit 71 is output at a high level from the control unit 9, the FET 23 is turned on and the switching operation is not performed, so that the input of the DCDC conversion unit 71 is the output of the DCDC conversion unit 71. When the direct connection is made, the DCDC converter 71 uses the input voltage as it is as the output voltage.

  In this way, by controlling the DCDC converter 71 to enter the bypass state after waiting for the elapse of time T2, the DCDC converter can be used even when an undershoot in which the output voltage is 5 V or less occurs at the timing TA. Since the choke coil 24 in which 71 exists and the smoothing circuit of the electrolytic capacitor 28 absorb the positive influence, the output 5V of the DCDC converter 71 can obtain a stable output voltage even when switching from 24V.

  As described above, since the DCDC converter 71 does not perform the switching operation, power consumption due to the switching operation in the DCDC converter 71 is eliminated, and the impedance of the FET 23 and the choke coil 24 when a current is passed in a direct current is eliminated. Since only power consumption is achieved, power consumption can be reduced.

  When the image forming apparatus 101 returns from the standby state or the sleep state to the operating state, the control unit 9 switches the switching signal S2 from the high level to the low level to turn off the transistor 26 and the FET 23 of the DCDC conversion unit 71 (M2). When the transistor 26 and the FET 23 are turned off, the DCDC converter 71 returns to normal conversion control and the switching operation of the FET 23 is resumed.

  The controller 9 switches the switching signal S1 from the low level to the high level after waiting for the elapse of time T3 necessary for the DCDC converter 71 to return to the switching operation. When the switching signal S1 becomes a high level, the power supply circuit 200 returns the voltage supplied to the drive system circuit unit 90 from 5V to 24V, and the image forming apparatus 101 enters a printable state.

  As described above, in the second embodiment, when the image forming apparatus is in a standby state or a sleep state, a feedback unit is provided as a means for reducing unnecessary output voltage on the secondary side, and a switching operation is performed. Since the DCDC converter having means for bypassing the output voltage from the secondary rectifier is provided, the power supply circuit having a plurality of DC outputs can be switched to a single DC output power supply. An effect is obtained in which power consumption due to switching can be eliminated. Therefore, the power consumption can be further reduced and the power supply efficiency can be improved as compared with the first embodiment.

  In the above embodiments, the image forming apparatus is described as a tandem color electrophotographic printer apparatus. However, the image forming apparatus is not limited to an electrophotographic printer, and may be various image forming apparatuses such as a copying machine and an ink jet printer.

  Further, the present invention can be similarly applied to a device other than the image forming apparatus that does not require an actuator driving voltage in a standby state, a sleep state, or a device that has a DC output that is not used depending on the state. It is.

DESCRIPTION OF SYMBOLS 1 Power supply rectification part 2 Switching part 3 Pulse width control part 4 Transformer 5 Secondary rectification part 6 Feedback part 7 DCDC conversion part 9 Control part 10, 14, 19, 22, 27 Limit resistance 11, 26 Transistor 12, 31 Bias resistance 13a , 13b, 13c, 29, 30 Voltage dividing resistor 16 Shunt regulator 17 Photocoupler 17a Photodiode 17b Phototransistor 18 Control element 20, 23 FET
90 drive system circuit section 91 logic system circuit section 101 image forming apparatus 200 power supply circuit

Claims (7)

A power source rectifier that rectifies an AC voltage input from the outside and outputs a DC voltage;
A transformer for converting the voltage output from the power rectifier;
A secondary rectifier that rectifies and smoothes the voltage converted by the transformer, and outputs the rectified voltage;
A feedback unit that outputs a feedback signal according to a result of comparing the output voltage of the secondary rectification unit and a reference voltage;
A pulse width control unit that outputs a switching drive signal based on the feedback signal output by the feedback unit;
A switching unit for controlling a voltage applied to the transformer unit by controlling a switching operation time of a DC voltage output from the power source rectifier unit based on the switching drive signal;
A DCDC converter that converts the voltage output from the secondary rectifier to a predetermined voltage lower than the voltage and outputs the voltage;
A controller to which an output voltage from the DCDC converter is supplied;
Output voltage switching means for switching a feedback constant of the feedback unit based on a control signal output from the control unit to switch the output voltage of the secondary rectifier to the first output voltage or the second output voltage. ,
The DCDC converter is
A first switching element; a second switching element that switches the first switching element to a conductive state; and a rectifying / smoothing circuit that rectifies and smoothes the output of the first switching element;
When the second switching element is in a non-conductive state, the switching time of the first switching element is controlled and the input high voltage is stepped down and output ,
When the second switching element is in a conductive state, an input voltage is directly output by setting the first switching element in a conductive state by the second switching element. The power supply circuit according to claim 1, wherein
The second switching element is a bypass unit that outputs an input voltage as it is based on a control signal output from the control unit,
The controller is
A device state for supplying power is determined, a control signal for switching the feedback constant for the feedback unit according to the device state, and a control signal for operating the bypass means for the DCDC converter, The power supply circuit, wherein the voltage output from the secondary rectifier is reduced to a voltage supplied to the controller, and the DCDC converter outputs the input voltage as it is. The power supply circuit according to claim 2,
The power supply circuit according to claim 1, wherein the bypass means is means for stopping a switching operation of the FET that is the first switching element of the DCDC converter. In the power supply circuit of Claim 2 or Claim 3,
The device state is an operation state of the device,
The controller is
A power supply circuit which outputs the control signal after the operation of the apparatus is completed. The power supply circuit according to any one of claims 1 to 4,
The power supply circuit according to claim 1, wherein the feedback constant is a voltage generated based on a voltage output from the secondary rectifier. In the power supply circuit according to any one of claims 1 to 5,
A power supply circuit that supplies an output voltage from the secondary rectifier to a drive system circuit and supplies an output voltage from the DCDC converter to a logic system circuit.   An image forming apparatus comprising the power supply circuit according to claim 1.

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